Commit Graph

73 Commits

Author SHA1 Message Date
Vladimir Kondratyev
8f733dabcc ig4(4): Add device HID to match I2C controller on ASUS X540 laptops
Tested by:	Andrés Ramírez <rrandresf_AT_hotmail_DOT_com>
MFC after:	1 week
2022-07-22 02:49:13 +03:00
John Baldwin
4e9e71fd2a ichiic: Remove unused devclass arguments to DRIVER_MODULE. 2022-05-09 12:22:02 -07:00
John Baldwin
676ea8e177 Remove unused iicbus_devclass. 2022-05-06 15:39:30 -07:00
Vladimir Kondratyev
166f2cb40d ig4(4): Add PNP info for ACPI attachment
MFC after:	2 month
2022-03-03 02:35:23 +03:00
Alexander Motin
e8e8d2290e ig4: Add PCI IDs for Intel Alder Lake I2C controller.
Submitted by:	Dmitry Luhtionov <dmitryluhtionov@gmail.com>
MFC after:	2 weeks
2021-11-24 20:15:02 -05:00
Vladimir Kondratyev
bbacb7ce72 ig4: Add PCI IDs for Intel Gemini Lake I2C controller.
Submitted by:	Dmitry Luhtionov
MFC after:	2 weeks
2021-02-24 01:23:43 +03:00
Allan Jude
37ef8d4cd6 ig4(4): Increase timeout to about 1 second
Per the i2c spec, a slave device can stretch SCL idefinitely, so 25ms is
a bit arbitrary in general. smbus does specify an optional timeout
recovery mechanism to be done at about 25~35ms, but the IPMI SSIF spec
says that BMCs don't have any obligation to implement that.
The BMC on Altra seems to mostly respond within 25ms, but occasionally
will stretch SCL for ~300 msec.

Also, the count_us mechanism seems to actually timeout around 25%
earlier than it would claim (timeout really happening around 19ms
instead of 25ms).

Sponsored by:	Ampere Computing LLC
Submitted by:	Klara Inc.
Reviewed by:	manu, imp
Differential Revision:	https://reviews.freebsd.org/D28747
2021-02-18 15:47:17 +00:00
Vladimir Kondratyev
6c6fd2b4a9 ig4(4): Add PCI IDs for Intel Tiger Lake
Submitted by:	Neel Chauhan <neel AT neelc DOT org>
Differential Revision:	https://reviews.freebsd.org/D27483
2020-12-05 10:57:15 +00:00
Vladimir Kondratyev
f19aed3517 ig4(4): Add PCI IDs for Intel Comit Lake I2C controllers.
MFC after:	2 weeks
2020-10-31 19:30:23 +00:00
Andriy Gapon
4a04cc26e3 ig4iic_acpi_probe: remove set but unused variable
MFC after:	1 week
2020-04-30 15:45:01 +00:00
Vladimir Kondratyev
6f6e2de005 ig4(4): Add PCI IDs for Intel Bay Trail I2C controllers.
PR:		245654
Reported by:	<xspbe3ho3p5uac@protonmail.com>
MFC after:	1 week
2020-04-26 20:16:18 +00:00
Andriy Gapon
7a451e61ab ig4: ensure that drivers always attach in correct order
Use DRIVER_MODULE_ORDERED(SI_ORDER_ANY) so that ig4's ACPI attachment
happens after iicbus and acpi_iicbus drivers are registered.

I have seen a problem where iicbus attached under ig4 instead of
acpi_iicbus when ig4.ko was loaded with kldload.  I believe that that
happened because ig4 driver was a first driver to register, it attached
and created an iicbus child.  Then iicbus driver was registered and,
since it was the only driver that could attach to the iicbus child
device, it did exactly that.  After that acpi_iicbus driver was
registered.  It would be able to attach to the iicbus device, but it was
already attached, so nothing happened.

MFC after:	2 weeks
2020-04-24 07:49:21 +00:00
Vladimir Kondratyev
9b7938dcf3 iicbus(4): Add support for ACPI-based children enumeration
When iicbus is attached as child of Designware I2C controller it scans all
ACPI nodes for "I2C Serial Bus Connection Resource Descriptor" described
in section 19.6.57 of ACPI specs.
If such a descriptor is found, I2C child is added to iicbus, it's I2C
address, IRQ resource and ACPI handle are added to ivars. Existing
ACPI bus-hosted child is deleted afterwards.

The driver also installs so called "I2C address space handler" which is
disabled by default as nontested.
Set hw.iicbus.enable_acpi_space_handler loader tunable to 1 to enable it.

Reviewed by:		markj
MFC after:		2 weeks
Differential Revision:	https://reviews.freebsd.org/D22901
2020-03-09 20:31:38 +00:00
Vladimir Kondratyev
fdae7d9496 [ig4] Remove unused methods from bus interface
bus_get/set_resource methods are implemented in child device (iicbus).
As their implementation with bus_generic_rl_get/set calls do not
recurse up the tree, the versions in ig4 are never called.

Suggested by:	jhb
2019-12-10 20:23:05 +00:00
Vladimir Kondratyev
69fac7c3af [ig4] Try to workaround MIPS namespace pollution issue 2019-11-04 02:29:58 +00:00
Vladimir Kondratyev
371d37d89f [ig4] Convert ithread interrupt handler to filter based one. 2019-11-03 21:17:50 +00:00
Vladimir Kondratyev
b97c743766 [ig4] Enable additional registers support on Appolo Lake controllers
To be inline with intel-lpss Linux driver
2019-11-03 21:17:01 +00:00
Vladimir Kondratyev
81e8183814 [ig4] Add support for CannonLake controllers
They are clocked at 216MHz rate, much higher than previous models.

PR:		240485
Submitted by:	Neel Chauhan <neel@neelc.org>
2019-11-03 21:16:06 +00:00
Vladimir Kondratyev
fceaa2ec31 [ig4] Add generic resource methods to bus interface
That allows ig4 children to allocate IRQs
2019-11-03 21:15:01 +00:00
Vladimir Kondratyev
bff2755582 [ig4] Minor improvement of write pipelining
With leaving some data queued in the TX FIFO at the end of write cycle.
2019-11-03 21:14:08 +00:00
Vladimir Kondratyev
0eb21d1b6e [ig4] wait for bus stop condition after stop command issued
It gives better error detection and ig4 driver's lock coverage
in a pipelined write case
2019-11-03 21:12:59 +00:00
Vladimir Kondratyev
ae73652c4f [ig4] On SkyLake controllers issue reset on attach unconditionally.
It is very helpful during debugging of I2C issues.
It is done only for SkyLakes due to lack of testing on other hardware.
2019-11-03 21:10:47 +00:00
Vladimir Kondratyev
847f557cb4 [ig4] Set STOP condition and flush TX/RX FIFOs on error
if controller has not it done for us yet.

Reset controller when transfer abort is failed.
2019-11-03 21:08:26 +00:00
Vladimir Kondratyev
e3a56ba233 [ig4] Improve error detection
Handle error bits of INTR_STAT and TX_ABORT registers.

Move interrupt clearing from interrupt handler to polling loop to get
common execution path with polled mode.

Do not clear interrupts with reading of IG4_REG_CLR_INTR register as
interrupts, triggered during the period from reg_read(IG4_REG_INTR_STAT)
to reg_read(IG4_REG_CLR_INTR) will be missed.
Instead, read each IG4_REG_CLR_* register separately.
2019-11-03 21:07:12 +00:00
Vladimir Kondratyev
b0eb9d3e08 [ig4] Convert polling loop from status-based to interrupt-based
INTR_STAT register exposes more useful informaton then STA register does
e.g. it exposes error and I2C bus STOP conditions. Make it a main source
of I2C transfer state.
2019-11-03 21:06:06 +00:00
Vladimir Kondratyev
7f6aee646a [ig4] Use interrupts for waiting for empty TX FIFO 2019-11-03 21:04:51 +00:00
Vladimir Kondratyev
7814f978e2 [ig4] Convert last remaining usage of TX_NOTFULL status to TX_EMPTY
in ig4iic_read routine. It makes possible interrupt utilization while
waiting for empty space in TX FIFO.
2019-11-03 21:03:55 +00:00
Vladimir Kondratyev
023c42edae [ig4] Rewrite ig4iic_write routine to use TX_EMPTY status flag
rather than TX_NOTFULL. It makes possible interrupt utilization while
waiting for empty space in TX FIFO.
2019-11-03 21:03:07 +00:00
Vladimir Kondratyev
6f0c4b8583 [ig4] Remove dead code inherited from DragonflyBSD 2019-11-03 21:01:53 +00:00
Vladimir Kondratyev
db7caa2ea7 [ig4] Add suspend/resume support
That is done with re-execution of controller initialization procedure
from resume handler.

PR:		238037
2019-11-03 21:00:55 +00:00
Vladimir Kondratyev
83a66b9bda [ig4] Implement burst mode for data reads
In this mode DATA_CMD register reads and writes are performed in
TX/RX FIFO-sized bursts to increase I2C bus utilization.

That reduces read time from 60us to 30us per byte when read data is fit
in to RX FIFO buffer in FAST speed mode in my setup.
2019-11-03 20:59:04 +00:00
Vladimir Kondratyev
885128387e [ig4] Set clock registers based on controller model
IC clock rates are varied between different controller models so we have
to adjust timing registers in each case individually. Borrow intresting
constants and formulas from Intel specs, i2c-designware and lpss_intel
drivers and apply them to FreeBSD supported controller models.

Implement fetching of timing data via ACPI methods execution if available.
2019-11-03 20:57:59 +00:00
Vladimir Kondratyev
38cca60be5 [ig4] dump IG4_REG_COMP_PARAM1 and IG4_REG_COMP_VER registers unconditionally
They appeared to be supported (although undocumented) on SkyLakes+ too.
2019-11-03 20:56:53 +00:00
Vladimir Kondratyev
6777ccd98b [ig4] Do not wait until interrupts are enabled at attach stage
as the driver is fully functional on a cold boot through utilization of
polled mode.

As a side effect, ig4 children probe and attach methods can be called
earlier in the boot sequence, so now it is up to the child drivers
to wait for a kernel initialization completion if it is required.
2019-11-03 20:54:17 +00:00
Vladimir Kondratyev
41b24e0917 [ig4] Allow enabling of polled mode from iicbus allocation callback
If controller is allocated with IIC_NOWAIT option ig4 enables polled mode
for a period of allocation that makes possible to start I2C transfers
from the contexts where sleeping is not allowed e.g. from ithreads or
callouts.
2019-11-03 20:53:13 +00:00
Vladimir Kondratyev
c59aca578e [ig4] Add support for polled mode
Currently ig4 internally depends on it's own interrupts and uses mtx_sleep()
to wait for them. That means it can not be used from any context where
sleeping is disallowed e.g. on cold boot, from DDB/KDB, from other device
driver's interrupt handlers and so on.

This change replaces sleeps with busy loops in cold boot and DDB cases.
2019-11-03 20:51:22 +00:00
Vladimir Kondratyev
d117e36316 [ig4] disable controller before initialization of clock counters
It is required by controller specifications.
2019-11-03 20:50:06 +00:00
Vladimir Kondratyev
edcf6a9f7a [ig4] Stop I2C controller after checking that it's kind of functional.
Obtained from:	DragonfliBSD (0b3eedb)
2019-11-03 20:49:04 +00:00
Vladimir Kondratyev
811ff4dd37 [ig4] We actually need to set the Rx threshold register one smaller.
Setting the IG4_REG_RX_TL register to 1 was actually generating an
interrupt after 2 bytes were available in the Rx fifo. We need to set the
register to 0 to get an interrupt for 1 byte already.

Obtained from:	DragonflyBSD (02f0bf2)
2019-11-03 20:47:49 +00:00
Vladimir Kondratyev
0a6b1b56d9 [ig4] Ignore stray interrupts 2019-11-03 20:46:20 +00:00
Vladimir Kondratyev
733d657a74 [ig4] Reduce scope of io_lock
Now io_lock is used as condition variable to synchronize active process with
the interrupt handler. It is not used for tasks other than waiting for
interrupt and passing parameters to and from it's handler.
2019-11-03 20:45:25 +00:00
Vladimir Kondratyev
85cd895fc0 [ig4] Do not wait for interrupts in set_controller() routine
Specs shows no dedicated interrupt firing on disable of the controller.

Remove io lock acquisitions around set_controller() calls as they are
not needed anymore.
2019-11-03 20:44:16 +00:00
Vladimir Kondratyev
eca74de013 [ig4] Drop driver's internal RX FIFO
There is no need to read all controller's RX FIFO data to clear RX_FULL
bit in interrupt handler as interrupts are masked permanently since
previous commit.
2019-11-03 20:43:02 +00:00
Vladimir Kondratyev
21e459c61b [ig4] Only enable interrupts when we want them. Otherwise keep mask at 0.
This avoids possible interrupt storms, depending on the state of the I2C
controller before the driver attached.

During attaching this clears the interrupt mask.

Revert r338215 as this change makes it no-op.

Obtained from:	DragonflyBSD (d7c8555)
2019-11-03 20:42:04 +00:00
Vladimir Kondratyev
bf9c3c58ca [ig4] Handle controller startup errors
Fail the attach on controller startup errors.  For some reason the
dell xps 13 says there's I2C controller, but the controller appears
to be permanente disabled and will refuse to enable.

Obtained from:	DragonflyBSD (509820b)
2019-11-03 20:40:55 +00:00
Vladimir Kondratyev
984ed3e493 [ig4] Give common name to PCI and ACPI device drivers
They share common device driver code with different bus attachments

This commit starts a bunch of changes which have following properties:

Reviewed by:		imp (previous version)
MFC after:		1 month
Differential Revision:	https://reviews.freebsd.org/D22016
2019-11-03 20:39:46 +00:00
Vladimir Kondratyev
3ca6000f2a ig4(4): Fix SDA HOLD time set too low on Skylake controllers
Execution of "Soft reset" command (IG4_REG_RESETS_SKL) at controller init
stage sets SDA_HOLD register value to 0x0001 which is often too low for
normal operation.

Set SDA_HOLD back to 28 after reset to restore controller functionality.

PR:		240339
Reported by:	imp, GregV, et al.
MFC after:	3 days
2019-09-12 12:33:09 +00:00
Mark Johnston
e710f8caf5 Catch up with r338948.
MFC with:	r342178
2018-12-17 21:34:09 +00:00
Andriy Gapon
9744b779a8 fix formatting and style in ig4iic_acpi_probe afetr r339754
This includes removing stray whitespace, adding a line after the
variable declaration block and removing a redundant check.

MFC after:	1 week
X-MFC with:	r339754
2018-12-17 21:33:25 +00:00
Mark Johnston
c491ffc3fb Revert r336326.
In testing on a Dell Latitude 7480, having ig4.ko loaded during a
suspend caused the system to hang.  It turns out that ig4iic_intr() was
being called after the device entered D3, and entered an infinite loop
because a read of the I2C status register returned all ones, causing us
to attempt to read a byte from the data buffer until one of the status
bits clears.  This occured because ig4iic_pci0 shares an interrupt with
the VGA device on this laptop, so ig4iic_intr() gets called even when
there is no work to do.  This is exactly the problem fixed by r342170,
which resolves the hang for me and allows suspend/resume to work with
ig4.ko loaded.  So, re-enable autoloading of ig4.ko in the hope that
r342170 resolves the problem universally.

Reviewed by:	gonzo
MFC after:	1 month (pending an MFC of r342170)
Differential Revision:	https://reviews.freebsd.org/D18587
2018-12-17 21:13:05 +00:00