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freebsd-nq/sys/dev/pci/pci.c

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Completely replace the PCI bus driver code to make it better reflect reality. There will be a new call interface, but for now the file pci_compat.c (which is to be deleted, after all drivers are converted) provides an emulation of the old PCI bus driver functions. The only change that might be visible to drivers is, that the type pcici_t (which had been meant to be just a handle, whose exact definition should not be relied on), has been converted into a pcicfgregs* . The Tekram AMD SCSI driver bogusly relied on the definition of pcici_t and has been converted to just call the PCI drivers functions to access configuration space register, instead of inventing its own ... This code is by no means complete, but assumed to be fully operational, and brings the official code base more in line with my development code. A new generic device descriptor data type has to be agreed on. The PCI code will then use that data type to provide new functionality: 1) userconfig support 2) "wired" PCI devices 3) conflicts checking against ISA/EISA 4) maps will depend on the command register enable bits 5) PCI to Anything bridges can be defined as devices, and are probed like any "standard" PCI device. The following features are currently missing, but will be added back, soon: 1) unknown device probe message 2) suppression of "mirrored" devices caused by ancient, broken chip-sets This code relies on generic shared interrupt support just commited to kern_intr.c (plus the modifications of isa.c and isa_device.h).
1997-05-26 15:08:43 +00:00
/*
* Copyright (c) 1997, Stefan Esser <se@freebsd.org>
Next round of PCI subsystem updates: - Break out the /dev/pci driver into a separate file. - Kill the COMPAT_OLDPCI support. - Make the EISA bridge attach a bit more like the old code; explicitly check for the existence of eisa0/isa0 and only attach if they don't already exist. Only make one bus_generic_attach() pass over the bridge, once both busses are attached. Note that the stupid Intel bridge's class is entirely unpredictable. - Add prototypes and re-layout the core PCI modules in line with current coding standards (not a major whitespace change, just moving the module data to the top of the file). - Remove redundant type-2 bridge support from the core PCI code; the PCI-CardBus code does this itself internally. Remove the now entirely redundant header-class-specific support, as well as the secondary and subordinate bus number fields. These are bridge attributes now. - Add support for PCI Extended Capabilities. - Add support for PCI Power Management. The interface currently allows a driver to query and set the power state of a device. - Add helper functions to allow drivers to enable/disable busmastering and the decoding of I/O and memory ranges. - Use PCI_SLOTMAX and PCI_FUNCMAX rather than magic numbers in some places. - Make the PCI-PCI bridge code a little more paranoid about valid I/O and memory decodes. - Add some more PCI register definitions for the command and status registers. Correct another bogus definition for type-1 bridges.
2000-12-13 01:25:11 +00:00
* Copyright (c) 2000, Michael Smith <msmith@freebsd.org>
* Copyright (c) 2000, BSDi
Completely replace the PCI bus driver code to make it better reflect reality. There will be a new call interface, but for now the file pci_compat.c (which is to be deleted, after all drivers are converted) provides an emulation of the old PCI bus driver functions. The only change that might be visible to drivers is, that the type pcici_t (which had been meant to be just a handle, whose exact definition should not be relied on), has been converted into a pcicfgregs* . The Tekram AMD SCSI driver bogusly relied on the definition of pcici_t and has been converted to just call the PCI drivers functions to access configuration space register, instead of inventing its own ... This code is by no means complete, but assumed to be fully operational, and brings the official code base more in line with my development code. A new generic device descriptor data type has to be agreed on. The PCI code will then use that data type to provide new functionality: 1) userconfig support 2) "wired" PCI devices 3) conflicts checking against ISA/EISA 4) maps will depend on the command register enable bits 5) PCI to Anything bridges can be defined as devices, and are probed like any "standard" PCI device. The following features are currently missing, but will be added back, soon: 1) unknown device probe message 2) suppression of "mirrored" devices caused by ancient, broken chip-sets This code relies on generic shared interrupt support just commited to kern_intr.c (plus the modifications of isa.c and isa_device.h).
1997-05-26 15:08:43 +00:00
* All rights reserved.
*
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* are met:
* 1. Redistributions of source code must retain the above copyright
* notice unmodified, this list of conditions, and the following
* disclaimer.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
$Id$ -> $FreeBSD$
1999-08-28 01:08:13 +00:00
* $FreeBSD$
Completely replace the PCI bus driver code to make it better reflect reality. There will be a new call interface, but for now the file pci_compat.c (which is to be deleted, after all drivers are converted) provides an emulation of the old PCI bus driver functions. The only change that might be visible to drivers is, that the type pcici_t (which had been meant to be just a handle, whose exact definition should not be relied on), has been converted into a pcicfgregs* . The Tekram AMD SCSI driver bogusly relied on the definition of pcici_t and has been converted to just call the PCI drivers functions to access configuration space register, instead of inventing its own ... This code is by no means complete, but assumed to be fully operational, and brings the official code base more in line with my development code. A new generic device descriptor data type has to be agreed on. The PCI code will then use that data type to provide new functionality: 1) userconfig support 2) "wired" PCI devices 3) conflicts checking against ISA/EISA 4) maps will depend on the command register enable bits 5) PCI to Anything bridges can be defined as devices, and are probed like any "standard" PCI device. The following features are currently missing, but will be added back, soon: 1) unknown device probe message 2) suppression of "mirrored" devices caused by ancient, broken chip-sets This code relies on generic shared interrupt support just commited to kern_intr.c (plus the modifications of isa.c and isa_device.h).
1997-05-26 15:08:43 +00:00
*
*/
Submitted by: Wolfgang Stanglmeier <wolf@dentaro.GUN.de> + Stefan Esser <se> Directory for PCI autoconfigure and device driver code.
1994-09-01 01:45:19 +00:00
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
#include "opt_bus.h"
Added a bit of missing functionality to make this work correctly on a wider variety of systems. Include the deivers from pci_intel.c in pci_config.c (I hope this is what was intended; my system works ok). Use pmap_mapdev(). Automatically map any large linear frame buffers or whatnot in VGA-style devices which ordinarily would not have their own drivers, and don't call not_supported() for them. (This shuts up complaints about my Matrox card.) Include the beginnings of what could eventually become dynamically-loadable PCI devices. Allow for the possibility of PCI devices simply providing a PCI veneer over an existing ISA device, and shut up about them, too. Make autoconfiguration text conform more to the style of other supported buses.
1994-09-14 01:34:51 +00:00
#include <sys/param.h>
#include <sys/systm.h>
Submitted by: Wolfgang Stanglmeier <wolf@dentaro.GUN.de> Bug fixed, that caused system hang on first interrupt on some motherboards. New version of PCI bus configuration code, now supports dynamic interrupt configuration (using BIOS supplied values). NCR SCSI and DEC Ethernet driver patched to use this feature. *** Remove PCI IRQ specifications from your kernel config file ! ***
1994-10-12 02:33:23 +00:00
#include <sys/malloc.h>
Replace the pcidevice_set linker set based configuration mechanism for old style pci drivers with a simple one-line change to use a module that registers itself under new-bus and should in theory enable just about all of the pci drivers to be loadable (kldload and loader(8)) but without having the impact of converting the APIs yet. This also fixes the problem of having undefined variables when only new-style pci drivers are present.
1999-04-24 19:59:20 +00:00
#include <sys/module.h>
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
#include <sys/linker.h>
Completely replace the PCI bus driver code to make it better reflect reality. There will be a new call interface, but for now the file pci_compat.c (which is to be deleted, after all drivers are converted) provides an emulation of the old PCI bus driver functions. The only change that might be visible to drivers is, that the type pcici_t (which had been meant to be just a handle, whose exact definition should not be relied on), has been converted into a pcicfgregs* . The Tekram AMD SCSI driver bogusly relied on the definition of pcici_t and has been converted to just call the PCI drivers functions to access configuration space register, instead of inventing its own ... This code is by no means complete, but assumed to be fully operational, and brings the official code base more in line with my development code. A new generic device descriptor data type has to be agreed on. The PCI code will then use that data type to provide new functionality: 1) userconfig support 2) "wired" PCI devices 3) conflicts checking against ISA/EISA 4) maps will depend on the command register enable bits 5) PCI to Anything bridges can be defined as devices, and are probed like any "standard" PCI device. The following features are currently missing, but will be added back, soon: 1) unknown device probe message 2) suppression of "mirrored" devices caused by ancient, broken chip-sets This code relies on generic shared interrupt support just commited to kern_intr.c (plus the modifications of isa.c and isa_device.h).
1997-05-26 15:08:43 +00:00
#include <sys/fcntl.h>
Add support for ioctl() accesses to PCI config space registers. Garrett Wollman sent me this code a few weeks ago for review, and I made some significant changes, which he in turn accepted ... In order to make use of these changes, a device entry has to added to /dev. Submitted by: wollman
1996-10-22 20:20:14 +00:00
#include <sys/conf.h>
Completely replace the PCI bus driver code to make it better reflect reality. There will be a new call interface, but for now the file pci_compat.c (which is to be deleted, after all drivers are converted) provides an emulation of the old PCI bus driver functions. The only change that might be visible to drivers is, that the type pcici_t (which had been meant to be just a handle, whose exact definition should not be relied on), has been converted into a pcicfgregs* . The Tekram AMD SCSI driver bogusly relied on the definition of pcici_t and has been converted to just call the PCI drivers functions to access configuration space register, instead of inventing its own ... This code is by no means complete, but assumed to be fully operational, and brings the official code base more in line with my development code. A new generic device descriptor data type has to be agreed on. The PCI code will then use that data type to provide new functionality: 1) userconfig support 2) "wired" PCI devices 3) conflicts checking against ISA/EISA 4) maps will depend on the command register enable bits 5) PCI to Anything bridges can be defined as devices, and are probed like any "standard" PCI device. The following features are currently missing, but will be added back, soon: 1) unknown device probe message 2) suppression of "mirrored" devices caused by ancient, broken chip-sets This code relies on generic shared interrupt support just commited to kern_intr.c (plus the modifications of isa.c and isa_device.h).
1997-05-26 15:08:43 +00:00
#include <sys/kernel.h>
Revive PCIConf. Submitted by: "Kenneth D. Merry" <ken@plutotech.com>
1998-09-15 08:21:13 +00:00
#include <sys/queue.h>
Make PCI_ENABLE_IO_MODES a sysctl hw.pci.enable_io_modes. It can also be set at boot time. It defaults to 1 now since it can be set in the boot loader. If this proves unwise, we can reset it to defaulting to 0.
2002-07-26 07:58:16 +00:00
#include <sys/sysctl.h>
Revive PCIConf. Submitted by: "Kenneth D. Merry" <ken@plutotech.com>
1998-09-15 08:21:13 +00:00
#include <sys/types.h>
Completely new PCI code: 1) Supports PCI to PCI bridge devices (and tries to initialise them, even if the BIOS is brain dead). 2) Supports shared PCI interrupts. Interrupt handlers now MUST return '0' if they found nothing to do, '1' otherwise. New features tested with i486 systems based on the Intel Saturn and a DEC 4channel Ethernet card only, but expected to work on most systems. The option PCI_REMAP has been removed ! Submitted by: Wolfgang Stanglmeier <wolf@kintaro.cologne.de>
1995-03-21 23:01:06 +00:00
Submitted by: Wolfgang Stanglmeier <wolf@dentaro.GUN.de> + Stefan Esser <se> Directory for PCI autoconfigure and device driver code.
1994-09-01 01:45:19 +00:00
#include <vm/vm.h>
Untangled the vm.h include file spaghetti.
1995-12-07 12:48:31 +00:00
#include <vm/pmap.h>
Revive PCIConf. Submitted by: "Kenneth D. Merry" <ken@plutotech.com>
1998-09-15 08:21:13 +00:00
#include <vm/vm_extern.h>
Submitted by: Wolfgang Stanglmeier <wolf@dentaro.GUN.de> + Stefan Esser <se> Directory for PCI autoconfigure and device driver code.
1994-09-01 01:45:19 +00:00
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
#include <sys/bus.h>
#include <machine/bus.h>
#include <sys/rman.h>
#include <machine/resource.h>
Encapsulate the old PCI compatability support and APIs completely under "options COMPAT_OLDPCI". This option already existed, but now also tidies up the declarations in #include <pci/pci*.h>. It is amazing how much stuff was using the old pre-FreeBSD 3.x names and going silently undetected.
2000-05-28 16:35:57 +00:00
#include <sys/pciio.h>
Use the pci.c code wherever possible, rather than copying all the pci code into cardbus and s/pci/cardbus. This exposes a few pci_* functions that are now static. This work is similar to work Justin posted to the mobile list about a year or two ago, which I have neglected since then. This is a subset of his current work with the multiple inheritance newbus architecutre. When completed, that will eliminate the need for pci/pci_private.h. Similar work is needed for the cardbus_cis and pccard_cis code as well.
2002-02-27 05:09:14 +00:00
#include <dev/pci/pcireg.h>
#include <dev/pci/pcivar.h>
#include <dev/pci/pci_private.h>
Completely new PCI code: 1) Supports PCI to PCI bridge devices (and tries to initialise them, even if the BIOS is brain dead). 2) Supports shared PCI interrupts. Interrupt handlers now MUST return '0' if they found nothing to do, '1' otherwise. New features tested with i486 systems based on the Intel Saturn and a DEC 4channel Ethernet card only, but expected to work on most systems. The option PCI_REMAP has been removed ! Submitted by: Wolfgang Stanglmeier <wolf@kintaro.cologne.de>
1995-03-21 23:01:06 +00:00
* Completely rewrite the alpha busspace to hide the implementation from the drivers. * Remove legacy inx/outx support from chipset and replace with macros which call busspace. * Rework pci config accesses to route through the pcib device instead of calling a MD function directly. With these changes it is possible to cleanly support machines which have more than one independantly numbered PCI busses. As a bonus, the new busspace implementation should be measurably faster than the old one.
2000-08-28 21:48:13 +00:00
#include "pcib_if.h"
Next round of PCI subsystem updates: - Break out the /dev/pci driver into a separate file. - Kill the COMPAT_OLDPCI support. - Make the EISA bridge attach a bit more like the old code; explicitly check for the existence of eisa0/isa0 and only attach if they don't already exist. Only make one bus_generic_attach() pass over the bridge, once both busses are attached. Note that the stupid Intel bridge's class is entirely unpredictable. - Add prototypes and re-layout the core PCI modules in line with current coding standards (not a major whitespace change, just moving the module data to the top of the file). - Remove redundant type-2 bridge support from the core PCI code; the PCI-CardBus code does this itself internally. Remove the now entirely redundant header-class-specific support, as well as the secondary and subordinate bus number fields. These are bridge attributes now. - Add support for PCI Extended Capabilities. - Add support for PCI Power Management. The interface currently allows a driver to query and set the power state of a device. - Add helper functions to allow drivers to enable/disable busmastering and the decoding of I/O and memory ranges. - Use PCI_SLOTMAX and PCI_FUNCMAX rather than magic numbers in some places. - Make the PCI-PCI bridge code a little more paranoid about valid I/O and memory decodes. - Add some more PCI register definitions for the command and status registers. Correct another bogus definition for type-1 bridges.
2000-12-13 01:25:11 +00:00
#include "pci_if.h"
static u_int32_t pci_mapbase(unsigned mapreg);
static int pci_maptype(unsigned mapreg);
static int pci_mapsize(unsigned testval);
static int pci_maprange(unsigned mapreg);
static void pci_fixancient(pcicfgregs *cfg);
static int pci_porten(device_t pcib, int b, int s, int f);
static int pci_memen(device_t pcib, int b, int s, int f);
static int pci_add_map(device_t pcib, int b, int s, int f, int reg,
struct resource_list *rl);
Various changes to make it easier to subclass the PCI bus device. - Make the pci devclass a global variable. - Add child devices in pci_attach() instead of pci_probe(). Change pci_probe() to just check for a valid bus number from the associated bridge and return -1000 if successful. This allows subclasses of the PCI bus driver to override the generic driver. - Move the code to load the vendor data into its own public function. Really though, doing this at attach is just plain wrong. This should really be done in the module load routine instead. As a side effect, the 'busno' variable in pci_attach() is now no longer static (minor bug that was harmless so far.) - Change pci_add_children() to take an extra argument that is the size of the device info structure passed to pci_read_device() and make it public so subclasses of the PCI bus can call it in their attach routines. - Move the bits to attach a probed PCI child to a PCI bus into a global pci_add_child() function. This will allow subclasses that can detect a PCI device not found in the normal PCI probe to add those devices in their own attach routine. (I have seen this in the ACPI tree on my laptop for example.) As a side effect, change the static function pci_add_resources() to get the busno, slot, and func from the passed in dinfo structure instead of requiring them as function arguments. Tested on: i386, alpha, ia64, sparc64
2002-08-26 15:23:52 +00:00
static void pci_add_resources(device_t pcib, device_t dev);
Next round of PCI subsystem updates: - Break out the /dev/pci driver into a separate file. - Kill the COMPAT_OLDPCI support. - Make the EISA bridge attach a bit more like the old code; explicitly check for the existence of eisa0/isa0 and only attach if they don't already exist. Only make one bus_generic_attach() pass over the bridge, once both busses are attached. Note that the stupid Intel bridge's class is entirely unpredictable. - Add prototypes and re-layout the core PCI modules in line with current coding standards (not a major whitespace change, just moving the module data to the top of the file). - Remove redundant type-2 bridge support from the core PCI code; the PCI-CardBus code does this itself internally. Remove the now entirely redundant header-class-specific support, as well as the secondary and subordinate bus number fields. These are bridge attributes now. - Add support for PCI Extended Capabilities. - Add support for PCI Power Management. The interface currently allows a driver to query and set the power state of a device. - Add helper functions to allow drivers to enable/disable busmastering and the decoding of I/O and memory ranges. - Use PCI_SLOTMAX and PCI_FUNCMAX rather than magic numbers in some places. - Make the PCI-PCI bridge code a little more paranoid about valid I/O and memory decodes. - Add some more PCI register definitions for the command and status registers. Correct another bogus definition for type-1 bridges.
2000-12-13 01:25:11 +00:00
static int pci_probe(device_t dev);
Various changes to make it easier to subclass the PCI bus device. - Make the pci devclass a global variable. - Add child devices in pci_attach() instead of pci_probe(). Change pci_probe() to just check for a valid bus number from the associated bridge and return -1000 if successful. This allows subclasses of the PCI bus driver to override the generic driver. - Move the code to load the vendor data into its own public function. Really though, doing this at attach is just plain wrong. This should really be done in the module load routine instead. As a side effect, the 'busno' variable in pci_attach() is now no longer static (minor bug that was harmless so far.) - Change pci_add_children() to take an extra argument that is the size of the device info structure passed to pci_read_device() and make it public so subclasses of the PCI bus can call it in their attach routines. - Move the bits to attach a probed PCI child to a PCI bus into a global pci_add_child() function. This will allow subclasses that can detect a PCI device not found in the normal PCI probe to add those devices in their own attach routine. (I have seen this in the ACPI tree on my laptop for example.) As a side effect, change the static function pci_add_resources() to get the busno, slot, and func from the passed in dinfo structure instead of requiring them as function arguments. Tested on: i386, alpha, ia64, sparc64
2002-08-26 15:23:52 +00:00
static int pci_attach(device_t dev);
- Make pci_load_vendor_data() static and do it during MOD_LOAD instead of when the first PCI bus attaches. - Create /dev/pci during MOD_LOAD as well. - Destroy /dev/pci during MOD_UNLOAD (not that you can kldunload pci, but might as well get the code right)
2002-09-04 03:13:16 +00:00
static void pci_load_vendor_data(void);
Next round of PCI subsystem updates: - Break out the /dev/pci driver into a separate file. - Kill the COMPAT_OLDPCI support. - Make the EISA bridge attach a bit more like the old code; explicitly check for the existence of eisa0/isa0 and only attach if they don't already exist. Only make one bus_generic_attach() pass over the bridge, once both busses are attached. Note that the stupid Intel bridge's class is entirely unpredictable. - Add prototypes and re-layout the core PCI modules in line with current coding standards (not a major whitespace change, just moving the module data to the top of the file). - Remove redundant type-2 bridge support from the core PCI code; the PCI-CardBus code does this itself internally. Remove the now entirely redundant header-class-specific support, as well as the secondary and subordinate bus number fields. These are bridge attributes now. - Add support for PCI Extended Capabilities. - Add support for PCI Power Management. The interface currently allows a driver to query and set the power state of a device. - Add helper functions to allow drivers to enable/disable busmastering and the decoding of I/O and memory ranges. - Use PCI_SLOTMAX and PCI_FUNCMAX rather than magic numbers in some places. - Make the PCI-PCI bridge code a little more paranoid about valid I/O and memory decodes. - Add some more PCI register definitions for the command and status registers. Correct another bogus definition for type-1 bridges.
2000-12-13 01:25:11 +00:00
static int pci_describe_parse_line(char **ptr, int *vendor,
int *device, char **desc);
static char *pci_describe_device(device_t dev);
static int pci_modevent(module_t mod, int what, void *arg);
These don't need to be semi-public after all.
2003-02-17 19:47:02 +00:00
static void pci_hdrtypedata(device_t pcib, int b, int s, int f,
pcicfgregs *cfg);
static void pci_read_extcap(device_t pcib, pcicfgregs *cfg);
Next round of PCI subsystem updates: - Break out the /dev/pci driver into a separate file. - Kill the COMPAT_OLDPCI support. - Make the EISA bridge attach a bit more like the old code; explicitly check for the existence of eisa0/isa0 and only attach if they don't already exist. Only make one bus_generic_attach() pass over the bridge, once both busses are attached. Note that the stupid Intel bridge's class is entirely unpredictable. - Add prototypes and re-layout the core PCI modules in line with current coding standards (not a major whitespace change, just moving the module data to the top of the file). - Remove redundant type-2 bridge support from the core PCI code; the PCI-CardBus code does this itself internally. Remove the now entirely redundant header-class-specific support, as well as the secondary and subordinate bus number fields. These are bridge attributes now. - Add support for PCI Extended Capabilities. - Add support for PCI Power Management. The interface currently allows a driver to query and set the power state of a device. - Add helper functions to allow drivers to enable/disable busmastering and the decoding of I/O and memory ranges. - Use PCI_SLOTMAX and PCI_FUNCMAX rather than magic numbers in some places. - Make the PCI-PCI bridge code a little more paranoid about valid I/O and memory decodes. - Add some more PCI register definitions for the command and status registers. Correct another bogus definition for type-1 bridges.
2000-12-13 01:25:11 +00:00
static device_method_t pci_methods[] = {
/* Device interface */
DEVMETHOD(device_probe, pci_probe),
Various changes to make it easier to subclass the PCI bus device. - Make the pci devclass a global variable. - Add child devices in pci_attach() instead of pci_probe(). Change pci_probe() to just check for a valid bus number from the associated bridge and return -1000 if successful. This allows subclasses of the PCI bus driver to override the generic driver. - Move the code to load the vendor data into its own public function. Really though, doing this at attach is just plain wrong. This should really be done in the module load routine instead. As a side effect, the 'busno' variable in pci_attach() is now no longer static (minor bug that was harmless so far.) - Change pci_add_children() to take an extra argument that is the size of the device info structure passed to pci_read_device() and make it public so subclasses of the PCI bus can call it in their attach routines. - Move the bits to attach a probed PCI child to a PCI bus into a global pci_add_child() function. This will allow subclasses that can detect a PCI device not found in the normal PCI probe to add those devices in their own attach routine. (I have seen this in the ACPI tree on my laptop for example.) As a side effect, change the static function pci_add_resources() to get the busno, slot, and func from the passed in dinfo structure instead of requiring them as function arguments. Tested on: i386, alpha, ia64, sparc64
2002-08-26 15:23:52 +00:00
DEVMETHOD(device_attach, pci_attach),
Next round of PCI subsystem updates: - Break out the /dev/pci driver into a separate file. - Kill the COMPAT_OLDPCI support. - Make the EISA bridge attach a bit more like the old code; explicitly check for the existence of eisa0/isa0 and only attach if they don't already exist. Only make one bus_generic_attach() pass over the bridge, once both busses are attached. Note that the stupid Intel bridge's class is entirely unpredictable. - Add prototypes and re-layout the core PCI modules in line with current coding standards (not a major whitespace change, just moving the module data to the top of the file). - Remove redundant type-2 bridge support from the core PCI code; the PCI-CardBus code does this itself internally. Remove the now entirely redundant header-class-specific support, as well as the secondary and subordinate bus number fields. These are bridge attributes now. - Add support for PCI Extended Capabilities. - Add support for PCI Power Management. The interface currently allows a driver to query and set the power state of a device. - Add helper functions to allow drivers to enable/disable busmastering and the decoding of I/O and memory ranges. - Use PCI_SLOTMAX and PCI_FUNCMAX rather than magic numbers in some places. - Make the PCI-PCI bridge code a little more paranoid about valid I/O and memory decodes. - Add some more PCI register definitions for the command and status registers. Correct another bogus definition for type-1 bridges.
2000-12-13 01:25:11 +00:00
DEVMETHOD(device_shutdown, bus_generic_shutdown),
DEVMETHOD(device_suspend, bus_generic_suspend),
DEVMETHOD(device_resume, bus_generic_resume),
/* Bus interface */
DEVMETHOD(bus_print_child, pci_print_child),
DEVMETHOD(bus_probe_nomatch, pci_probe_nomatch),
DEVMETHOD(bus_read_ivar, pci_read_ivar),
DEVMETHOD(bus_write_ivar, pci_write_ivar),
DEVMETHOD(bus_driver_added, bus_generic_driver_added),
DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
DEVMETHOD(bus_get_resource_list,pci_get_resource_list),
DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource),
DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource),
DEVMETHOD(bus_delete_resource, pci_delete_resource),
DEVMETHOD(bus_alloc_resource, pci_alloc_resource),
DEVMETHOD(bus_release_resource, bus_generic_rl_release_resource),
DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
Move the pnp and location info into the common pci bus. Make all known pci busses implement this. Also minor comment smithing in cardbus. Fix copyright to this year with my name on it since I've been doing a lot to this file. Reviewed by: jhb
2003-02-17 21:20:35 +00:00
DEVMETHOD(bus_child_pnpinfo_str, pci_child_pnpinfo_str_method),
DEVMETHOD(bus_child_location_str, pci_child_location_str_method),
Next round of PCI subsystem updates: - Break out the /dev/pci driver into a separate file. - Kill the COMPAT_OLDPCI support. - Make the EISA bridge attach a bit more like the old code; explicitly check for the existence of eisa0/isa0 and only attach if they don't already exist. Only make one bus_generic_attach() pass over the bridge, once both busses are attached. Note that the stupid Intel bridge's class is entirely unpredictable. - Add prototypes and re-layout the core PCI modules in line with current coding standards (not a major whitespace change, just moving the module data to the top of the file). - Remove redundant type-2 bridge support from the core PCI code; the PCI-CardBus code does this itself internally. Remove the now entirely redundant header-class-specific support, as well as the secondary and subordinate bus number fields. These are bridge attributes now. - Add support for PCI Extended Capabilities. - Add support for PCI Power Management. The interface currently allows a driver to query and set the power state of a device. - Add helper functions to allow drivers to enable/disable busmastering and the decoding of I/O and memory ranges. - Use PCI_SLOTMAX and PCI_FUNCMAX rather than magic numbers in some places. - Make the PCI-PCI bridge code a little more paranoid about valid I/O and memory decodes. - Add some more PCI register definitions for the command and status registers. Correct another bogus definition for type-1 bridges.
2000-12-13 01:25:11 +00:00
/* PCI interface */
DEVMETHOD(pci_read_config, pci_read_config_method),
DEVMETHOD(pci_write_config, pci_write_config_method),
Slightly reimplement some recently added helper functions as methods, so that drivers are not reaching into the internals of the pci bus. There are no driver changes, the public interface is the same.
2001-02-27 23:13:20 +00:00
DEVMETHOD(pci_enable_busmaster, pci_enable_busmaster_method),
DEVMETHOD(pci_disable_busmaster, pci_disable_busmaster_method),
DEVMETHOD(pci_enable_io, pci_enable_io_method),
DEVMETHOD(pci_disable_io, pci_disable_io_method),
DEVMETHOD(pci_get_powerstate, pci_get_powerstate_method),
DEVMETHOD(pci_set_powerstate, pci_set_powerstate_method),
Next round of PCI subsystem updates: - Break out the /dev/pci driver into a separate file. - Kill the COMPAT_OLDPCI support. - Make the EISA bridge attach a bit more like the old code; explicitly check for the existence of eisa0/isa0 and only attach if they don't already exist. Only make one bus_generic_attach() pass over the bridge, once both busses are attached. Note that the stupid Intel bridge's class is entirely unpredictable. - Add prototypes and re-layout the core PCI modules in line with current coding standards (not a major whitespace change, just moving the module data to the top of the file). - Remove redundant type-2 bridge support from the core PCI code; the PCI-CardBus code does this itself internally. Remove the now entirely redundant header-class-specific support, as well as the secondary and subordinate bus number fields. These are bridge attributes now. - Add support for PCI Extended Capabilities. - Add support for PCI Power Management. The interface currently allows a driver to query and set the power state of a device. - Add helper functions to allow drivers to enable/disable busmastering and the decoding of I/O and memory ranges. - Use PCI_SLOTMAX and PCI_FUNCMAX rather than magic numbers in some places. - Make the PCI-PCI bridge code a little more paranoid about valid I/O and memory decodes. - Add some more PCI register definitions for the command and status registers. Correct another bogus definition for type-1 bridges.
2000-12-13 01:25:11 +00:00
{ 0, 0 }
};
static driver_t pci_driver = {
"pci",
pci_methods,
0, /* no softc */
};
Various changes to make it easier to subclass the PCI bus device. - Make the pci devclass a global variable. - Add child devices in pci_attach() instead of pci_probe(). Change pci_probe() to just check for a valid bus number from the associated bridge and return -1000 if successful. This allows subclasses of the PCI bus driver to override the generic driver. - Move the code to load the vendor data into its own public function. Really though, doing this at attach is just plain wrong. This should really be done in the module load routine instead. As a side effect, the 'busno' variable in pci_attach() is now no longer static (minor bug that was harmless so far.) - Change pci_add_children() to take an extra argument that is the size of the device info structure passed to pci_read_device() and make it public so subclasses of the PCI bus can call it in their attach routines. - Move the bits to attach a probed PCI child to a PCI bus into a global pci_add_child() function. This will allow subclasses that can detect a PCI device not found in the normal PCI probe to add those devices in their own attach routine. (I have seen this in the ACPI tree on my laptop for example.) As a side effect, change the static function pci_add_resources() to get the busno, slot, and func from the passed in dinfo structure instead of requiring them as function arguments. Tested on: i386, alpha, ia64, sparc64
2002-08-26 15:23:52 +00:00
devclass_t pci_devclass;
Next round of PCI subsystem updates: - Break out the /dev/pci driver into a separate file. - Kill the COMPAT_OLDPCI support. - Make the EISA bridge attach a bit more like the old code; explicitly check for the existence of eisa0/isa0 and only attach if they don't already exist. Only make one bus_generic_attach() pass over the bridge, once both busses are attached. Note that the stupid Intel bridge's class is entirely unpredictable. - Add prototypes and re-layout the core PCI modules in line with current coding standards (not a major whitespace change, just moving the module data to the top of the file). - Remove redundant type-2 bridge support from the core PCI code; the PCI-CardBus code does this itself internally. Remove the now entirely redundant header-class-specific support, as well as the secondary and subordinate bus number fields. These are bridge attributes now. - Add support for PCI Extended Capabilities. - Add support for PCI Power Management. The interface currently allows a driver to query and set the power state of a device. - Add helper functions to allow drivers to enable/disable busmastering and the decoding of I/O and memory ranges. - Use PCI_SLOTMAX and PCI_FUNCMAX rather than magic numbers in some places. - Make the PCI-PCI bridge code a little more paranoid about valid I/O and memory decodes. - Add some more PCI register definitions for the command and status registers. Correct another bogus definition for type-1 bridges.
2000-12-13 01:25:11 +00:00
DRIVER_MODULE(pci, pcib, pci_driver, pci_devclass, pci_modevent, 0);
Add MODULE_VERSION.
2002-04-17 00:31:32 +00:00
MODULE_VERSION(pci, 1);
* Completely rewrite the alpha busspace to hide the implementation from the drivers. * Remove legacy inx/outx support from chipset and replace with macros which call busspace. * Rework pci config accesses to route through the pcib device instead of calling a MD function directly. With these changes it is possible to cleanly support machines which have more than one independantly numbered PCI busses. As a bonus, the new busspace implementation should be measurably faster than the old one.
2000-08-28 21:48:13 +00:00
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
static char *pci_vendordata;
static size_t pci_vendordata_size;
Modified to use renamed get_pci_apic_irq() -> pci_apic_pin() function.
1997-06-25 20:56:29 +00:00
* Completely rewrite the alpha busspace to hide the implementation from the drivers. * Remove legacy inx/outx support from chipset and replace with macros which call busspace. * Rework pci config accesses to route through the pcib device instead of calling a MD function directly. With these changes it is possible to cleanly support machines which have more than one independantly numbered PCI busses. As a bonus, the new busspace implementation should be measurably faster than the old one.
2000-08-28 21:48:13 +00:00
Fix some resource allocation peculiarities of the intpm device.
1999-10-28 08:06:59 +00:00
struct pci_quirk {
u_int32_t devid; /* Vendor/device of the card */
int type;
Fix typo: wierd -> weird. There is no such thing as wierd in the english language.
2001-02-06 09:25:10 +00:00
#define PCI_QUIRK_MAP_REG 1 /* PCI map register in weird place */
Fix some resource allocation peculiarities of the intpm device.
1999-10-28 08:06:59 +00:00
int arg1;
int arg2;
};
struct pci_quirk pci_quirks[] = {
Add support for the Intel 82443MX chipset PR: kern/33032 MFC after: 1 month
2001-12-21 01:28:59 +00:00
/* The Intel 82371AB and 82443MX has a map register at offset 0x90. */
Fix some resource allocation peculiarities of the intpm device.
1999-10-28 08:06:59 +00:00
{ 0x71138086, PCI_QUIRK_MAP_REG, 0x90, 0 },
Add support for the Intel 82443MX chipset PR: kern/33032 MFC after: 1 month
2001-12-21 01:28:59 +00:00
{ 0x719b8086, PCI_QUIRK_MAP_REG, 0x90, 0 },
The serverworks OSB4 pci->isa bridge has the same mapping register at offset 0x90 for the SMBus device as the PIIX4.
2001-03-15 06:51:45 +00:00
/* As does the Serverworks OSB4 (the SMBus mapping register) */
{ 0x02001166, PCI_QUIRK_MAP_REG, 0x90, 0 },
Fix some resource allocation peculiarities of the intpm device.
1999-10-28 08:06:59 +00:00
{ 0 }
};
* Implement bus_set/get/delete_resource for pci. * Change the hack used on the alpha for mapping devices into DENSE or BWX memory spaces to a simpler one. Its still a hack and should be a seperate api to explicitly map the resource. * Add $FreeBSD$ as necessary.
1999-10-14 21:38:33 +00:00
/* map register information */
#define PCI_MAPMEM 0x01 /* memory map */
#define PCI_MAPMEMP 0x02 /* prefetchable memory map */
#define PCI_MAPPORT 0x04 /* port map */
Don't put variable declarations in header files, put prototypes. 'pci_devq' provides useful information now.
2001-12-19 08:49:11 +00:00
struct devlist pci_devq;
u_int32_t pci_generation;
Revive PCIConf. Submitted by: "Kenneth D. Merry" <ken@plutotech.com>
1998-09-15 08:21:13 +00:00
u_int32_t pci_numdevs = 0;
Make PCI_ENABLE_IO_MODES a sysctl hw.pci.enable_io_modes. It can also be set at boot time. It defaults to 1 now since it can be set in the boot loader. If this proves unwise, we can reset it to defaulting to 0.
2002-07-26 07:58:16 +00:00
/* sysctl vars */
SYSCTL_NODE(_hw, OID_AUTO, pci, CTLFLAG_RD, 0, "PCI bus tuning parameters");
Staticize local variable. Submitted by: Hiten Pandya <hiten@angelica.unixdaemons.com> Obtained from: re (murray)
2002-11-13 09:40:09 +00:00
static int pci_enable_io_modes = 1;
Make PCI_ENABLE_IO_MODES a sysctl hw.pci.enable_io_modes. It can also be set at boot time. It defaults to 1 now since it can be set in the boot loader. If this proves unwise, we can reset it to defaulting to 0.
2002-07-26 07:58:16 +00:00
TUNABLE_INT("hw.pci.enable_io_modes", (int *)&pci_enable_io_modes);
SYSCTL_INT(_hw_pci, OID_AUTO, enable_io_modes, CTLFLAG_RW,
&pci_enable_io_modes, 1,
"Enable I/O and memory bits in the config register. Some BIOSes do not\n\
enable these bits correctly. We'd like to do this all the time, but there\n\
are some peripherals that this causes problems with.");
Implement 2 small helper functions: pci_find_bsf() - Find a device_t by bus/slot/function. pci_find_device() - Find a device_t by vendor/device ID.
2002-01-10 00:56:02 +00:00
/* Find a device_t by bus/slot/function */
device_t
Whitespace.
2002-10-16 19:11:59 +00:00
pci_find_bsf(u_int8_t bus, u_int8_t slot, u_int8_t func)
Implement 2 small helper functions: pci_find_bsf() - Find a device_t by bus/slot/function. pci_find_device() - Find a device_t by vendor/device ID.
2002-01-10 00:56:02 +00:00
{
struct pci_devinfo *dinfo;
STAILQ_FOREACH(dinfo, &pci_devq, pci_links) {
if ((dinfo->cfg.bus == bus) &&
(dinfo->cfg.slot == slot) &&
(dinfo->cfg.func == func)) {
return (dinfo->cfg.dev);
}
}
return (NULL);
}
/* Find a device_t by vendor/device ID */
device_t
Whitespace.
2002-10-16 19:11:59 +00:00
pci_find_device(u_int16_t vendor, u_int16_t device)
Implement 2 small helper functions: pci_find_bsf() - Find a device_t by bus/slot/function. pci_find_device() - Find a device_t by vendor/device ID.
2002-01-10 00:56:02 +00:00
{
struct pci_devinfo *dinfo;
STAILQ_FOREACH(dinfo, &pci_devq, pci_links) {
if ((dinfo->cfg.vendor == vendor) &&
(dinfo->cfg.device == device)) {
return (dinfo->cfg.dev);
}
}
return (NULL);
}
Completely replace the PCI bus driver code to make it better reflect reality. There will be a new call interface, but for now the file pci_compat.c (which is to be deleted, after all drivers are converted) provides an emulation of the old PCI bus driver functions. The only change that might be visible to drivers is, that the type pcici_t (which had been meant to be just a handle, whose exact definition should not be relied on), has been converted into a pcicfgregs* . The Tekram AMD SCSI driver bogusly relied on the definition of pcici_t and has been converted to just call the PCI drivers functions to access configuration space register, instead of inventing its own ... This code is by no means complete, but assumed to be fully operational, and brings the official code base more in line with my development code. A new generic device descriptor data type has to be agreed on. The PCI code will then use that data type to provide new functionality: 1) userconfig support 2) "wired" PCI devices 3) conflicts checking against ISA/EISA 4) maps will depend on the command register enable bits 5) PCI to Anything bridges can be defined as devices, and are probed like any "standard" PCI device. The following features are currently missing, but will be added back, soon: 1) unknown device probe message 2) suppression of "mirrored" devices caused by ancient, broken chip-sets This code relies on generic shared interrupt support just commited to kern_intr.c (plus the modifications of isa.c and isa_device.h).
1997-05-26 15:08:43 +00:00
/* return base address of memory or port map */
Submitted by: Wolfgang Stanglmeier <wolf@dentaro.GUN.de> Bug fixed, that caused system hang on first interrupt on some motherboards. New version of PCI bus configuration code, now supports dynamic interrupt configuration (using BIOS supplied values). NCR SCSI and DEC Ethernet driver patched to use this feature. *** Remove PCI IRQ specifications from your kernel config file ! ***
1994-10-12 02:33:23 +00:00
* Implement bus_set/get/delete_resource for pci. * Change the hack used on the alpha for mapping devices into DENSE or BWX memory spaces to a simpler one. Its still a hack and should be a seperate api to explicitly map the resource. * Add $FreeBSD$ as necessary.
1999-10-14 21:38:33 +00:00
static u_int32_t
Completely replace the PCI bus driver code to make it better reflect reality. There will be a new call interface, but for now the file pci_compat.c (which is to be deleted, after all drivers are converted) provides an emulation of the old PCI bus driver functions. The only change that might be visible to drivers is, that the type pcici_t (which had been meant to be just a handle, whose exact definition should not be relied on), has been converted into a pcicfgregs* . The Tekram AMD SCSI driver bogusly relied on the definition of pcici_t and has been converted to just call the PCI drivers functions to access configuration space register, instead of inventing its own ... This code is by no means complete, but assumed to be fully operational, and brings the official code base more in line with my development code. A new generic device descriptor data type has to be agreed on. The PCI code will then use that data type to provide new functionality: 1) userconfig support 2) "wired" PCI devices 3) conflicts checking against ISA/EISA 4) maps will depend on the command register enable bits 5) PCI to Anything bridges can be defined as devices, and are probed like any "standard" PCI device. The following features are currently missing, but will be added back, soon: 1) unknown device probe message 2) suppression of "mirrored" devices caused by ancient, broken chip-sets This code relies on generic shared interrupt support just commited to kern_intr.c (plus the modifications of isa.c and isa_device.h).
1997-05-26 15:08:43 +00:00
pci_mapbase(unsigned mapreg)
Completely new PCI code: 1) Supports PCI to PCI bridge devices (and tries to initialise them, even if the BIOS is brain dead). 2) Supports shared PCI interrupts. Interrupt handlers now MUST return '0' if they found nothing to do, '1' otherwise. New features tested with i486 systems based on the Intel Saturn and a DEC 4channel Ethernet card only, but expected to work on most systems. The option PCI_REMAP has been removed ! Submitted by: Wolfgang Stanglmeier <wolf@kintaro.cologne.de>
1995-03-21 23:01:06 +00:00
{
Completely replace the PCI bus driver code to make it better reflect reality. There will be a new call interface, but for now the file pci_compat.c (which is to be deleted, after all drivers are converted) provides an emulation of the old PCI bus driver functions. The only change that might be visible to drivers is, that the type pcici_t (which had been meant to be just a handle, whose exact definition should not be relied on), has been converted into a pcicfgregs* . The Tekram AMD SCSI driver bogusly relied on the definition of pcici_t and has been converted to just call the PCI drivers functions to access configuration space register, instead of inventing its own ... This code is by no means complete, but assumed to be fully operational, and brings the official code base more in line with my development code. A new generic device descriptor data type has to be agreed on. The PCI code will then use that data type to provide new functionality: 1) userconfig support 2) "wired" PCI devices 3) conflicts checking against ISA/EISA 4) maps will depend on the command register enable bits 5) PCI to Anything bridges can be defined as devices, and are probed like any "standard" PCI device. The following features are currently missing, but will be added back, soon: 1) unknown device probe message 2) suppression of "mirrored" devices caused by ancient, broken chip-sets This code relies on generic shared interrupt support just commited to kern_intr.c (plus the modifications of isa.c and isa_device.h).
1997-05-26 15:08:43 +00:00
int mask = 0x03;
if ((mapreg & 0x01) == 0)
mask = 0x0f;
return (mapreg & ~mask);
Completely new PCI code: 1) Supports PCI to PCI bridge devices (and tries to initialise them, even if the BIOS is brain dead). 2) Supports shared PCI interrupts. Interrupt handlers now MUST return '0' if they found nothing to do, '1' otherwise. New features tested with i486 systems based on the Intel Saturn and a DEC 4channel Ethernet card only, but expected to work on most systems. The option PCI_REMAP has been removed ! Submitted by: Wolfgang Stanglmeier <wolf@kintaro.cologne.de>
1995-03-21 23:01:06 +00:00
}
Completely replace the PCI bus driver code to make it better reflect reality. There will be a new call interface, but for now the file pci_compat.c (which is to be deleted, after all drivers are converted) provides an emulation of the old PCI bus driver functions. The only change that might be visible to drivers is, that the type pcici_t (which had been meant to be just a handle, whose exact definition should not be relied on), has been converted into a pcicfgregs* . The Tekram AMD SCSI driver bogusly relied on the definition of pcici_t and has been converted to just call the PCI drivers functions to access configuration space register, instead of inventing its own ... This code is by no means complete, but assumed to be fully operational, and brings the official code base more in line with my development code. A new generic device descriptor data type has to be agreed on. The PCI code will then use that data type to provide new functionality: 1) userconfig support 2) "wired" PCI devices 3) conflicts checking against ISA/EISA 4) maps will depend on the command register enable bits 5) PCI to Anything bridges can be defined as devices, and are probed like any "standard" PCI device. The following features are currently missing, but will be added back, soon: 1) unknown device probe message 2) suppression of "mirrored" devices caused by ancient, broken chip-sets This code relies on generic shared interrupt support just commited to kern_intr.c (plus the modifications of isa.c and isa_device.h).
1997-05-26 15:08:43 +00:00
/* return map type of memory or port map */
Update PCI bus code from my current sources: - always use pci_conf_read() and pci_conf_write(). (This is required to simulate non-existant devices in my system for PCI bridge code tests.) - reorder some functions (put the main functions at the end). - correct off by one bug in the code dealing with unitialized PCI to PCI bridge chips. (Bug found by ASAMI Satoshi.) - print function number for multi-function devices.
1996-04-14 20:14:36 +00:00
static int
Completely replace the PCI bus driver code to make it better reflect reality. There will be a new call interface, but for now the file pci_compat.c (which is to be deleted, after all drivers are converted) provides an emulation of the old PCI bus driver functions. The only change that might be visible to drivers is, that the type pcici_t (which had been meant to be just a handle, whose exact definition should not be relied on), has been converted into a pcicfgregs* . The Tekram AMD SCSI driver bogusly relied on the definition of pcici_t and has been converted to just call the PCI drivers functions to access configuration space register, instead of inventing its own ... This code is by no means complete, but assumed to be fully operational, and brings the official code base more in line with my development code. A new generic device descriptor data type has to be agreed on. The PCI code will then use that data type to provide new functionality: 1) userconfig support 2) "wired" PCI devices 3) conflicts checking against ISA/EISA 4) maps will depend on the command register enable bits 5) PCI to Anything bridges can be defined as devices, and are probed like any "standard" PCI device. The following features are currently missing, but will be added back, soon: 1) unknown device probe message 2) suppression of "mirrored" devices caused by ancient, broken chip-sets This code relies on generic shared interrupt support just commited to kern_intr.c (plus the modifications of isa.c and isa_device.h).
1997-05-26 15:08:43 +00:00
pci_maptype(unsigned mapreg)
{
static u_int8_t maptype[0x10] = {
PCI_MAPMEM, PCI_MAPPORT,
PCI_MAPMEM, 0,
PCI_MAPMEM, PCI_MAPPORT,
0, 0,
PCI_MAPMEM|PCI_MAPMEMP, PCI_MAPPORT,
PCI_MAPMEM|PCI_MAPMEMP, 0,
PCI_MAPMEM|PCI_MAPMEMP, PCI_MAPPORT,
0, 0,
Add PCI LKM support.
1997-01-21 23:23:40 +00:00
};
Completely replace the PCI bus driver code to make it better reflect reality. There will be a new call interface, but for now the file pci_compat.c (which is to be deleted, after all drivers are converted) provides an emulation of the old PCI bus driver functions. The only change that might be visible to drivers is, that the type pcici_t (which had been meant to be just a handle, whose exact definition should not be relied on), has been converted into a pcicfgregs* . The Tekram AMD SCSI driver bogusly relied on the definition of pcici_t and has been converted to just call the PCI drivers functions to access configuration space register, instead of inventing its own ... This code is by no means complete, but assumed to be fully operational, and brings the official code base more in line with my development code. A new generic device descriptor data type has to be agreed on. The PCI code will then use that data type to provide new functionality: 1) userconfig support 2) "wired" PCI devices 3) conflicts checking against ISA/EISA 4) maps will depend on the command register enable bits 5) PCI to Anything bridges can be defined as devices, and are probed like any "standard" PCI device. The following features are currently missing, but will be added back, soon: 1) unknown device probe message 2) suppression of "mirrored" devices caused by ancient, broken chip-sets This code relies on generic shared interrupt support just commited to kern_intr.c (plus the modifications of isa.c and isa_device.h).
1997-05-26 15:08:43 +00:00
return maptype[mapreg & 0x0f];
Add PCI LKM support.
1997-01-21 23:23:40 +00:00
}
Completely replace the PCI bus driver code to make it better reflect reality. There will be a new call interface, but for now the file pci_compat.c (which is to be deleted, after all drivers are converted) provides an emulation of the old PCI bus driver functions. The only change that might be visible to drivers is, that the type pcici_t (which had been meant to be just a handle, whose exact definition should not be relied on), has been converted into a pcicfgregs* . The Tekram AMD SCSI driver bogusly relied on the definition of pcici_t and has been converted to just call the PCI drivers functions to access configuration space register, instead of inventing its own ... This code is by no means complete, but assumed to be fully operational, and brings the official code base more in line with my development code. A new generic device descriptor data type has to be agreed on. The PCI code will then use that data type to provide new functionality: 1) userconfig support 2) "wired" PCI devices 3) conflicts checking against ISA/EISA 4) maps will depend on the command register enable bits 5) PCI to Anything bridges can be defined as devices, and are probed like any "standard" PCI device. The following features are currently missing, but will be added back, soon: 1) unknown device probe message 2) suppression of "mirrored" devices caused by ancient, broken chip-sets This code relies on generic shared interrupt support just commited to kern_intr.c (plus the modifications of isa.c and isa_device.h).
1997-05-26 15:08:43 +00:00
/* return log2 of map size decoded for memory or port map */
Completely new PCI code: 1) Supports PCI to PCI bridge devices (and tries to initialise them, even if the BIOS is brain dead). 2) Supports shared PCI interrupts. Interrupt handlers now MUST return '0' if they found nothing to do, '1' otherwise. New features tested with i486 systems based on the Intel Saturn and a DEC 4channel Ethernet card only, but expected to work on most systems. The option PCI_REMAP has been removed ! Submitted by: Wolfgang Stanglmeier <wolf@kintaro.cologne.de>
1995-03-21 23:01:06 +00:00
Add heuristic to detect multi-function devices that don't announce this feature in the header type register, though it is required by the PCI spec. This should correctly probe both functions of the Intel 82371FB chip, without the need for a special case based on the device ID.
1996-01-30 01:14:29 +00:00
static int
Completely replace the PCI bus driver code to make it better reflect reality. There will be a new call interface, but for now the file pci_compat.c (which is to be deleted, after all drivers are converted) provides an emulation of the old PCI bus driver functions. The only change that might be visible to drivers is, that the type pcici_t (which had been meant to be just a handle, whose exact definition should not be relied on), has been converted into a pcicfgregs* . The Tekram AMD SCSI driver bogusly relied on the definition of pcici_t and has been converted to just call the PCI drivers functions to access configuration space register, instead of inventing its own ... This code is by no means complete, but assumed to be fully operational, and brings the official code base more in line with my development code. A new generic device descriptor data type has to be agreed on. The PCI code will then use that data type to provide new functionality: 1) userconfig support 2) "wired" PCI devices 3) conflicts checking against ISA/EISA 4) maps will depend on the command register enable bits 5) PCI to Anything bridges can be defined as devices, and are probed like any "standard" PCI device. The following features are currently missing, but will be added back, soon: 1) unknown device probe message 2) suppression of "mirrored" devices caused by ancient, broken chip-sets This code relies on generic shared interrupt support just commited to kern_intr.c (plus the modifications of isa.c and isa_device.h).
1997-05-26 15:08:43 +00:00
pci_mapsize(unsigned testval)
Add heuristic to detect multi-function devices that don't announce this feature in the header type register, though it is required by the PCI spec. This should correctly probe both functions of the Intel 82371FB chip, without the need for a special case based on the device ID.
1996-01-30 01:14:29 +00:00
{
Completely replace the PCI bus driver code to make it better reflect reality. There will be a new call interface, but for now the file pci_compat.c (which is to be deleted, after all drivers are converted) provides an emulation of the old PCI bus driver functions. The only change that might be visible to drivers is, that the type pcici_t (which had been meant to be just a handle, whose exact definition should not be relied on), has been converted into a pcicfgregs* . The Tekram AMD SCSI driver bogusly relied on the definition of pcici_t and has been converted to just call the PCI drivers functions to access configuration space register, instead of inventing its own ... This code is by no means complete, but assumed to be fully operational, and brings the official code base more in line with my development code. A new generic device descriptor data type has to be agreed on. The PCI code will then use that data type to provide new functionality: 1) userconfig support 2) "wired" PCI devices 3) conflicts checking against ISA/EISA 4) maps will depend on the command register enable bits 5) PCI to Anything bridges can be defined as devices, and are probed like any "standard" PCI device. The following features are currently missing, but will be added back, soon: 1) unknown device probe message 2) suppression of "mirrored" devices caused by ancient, broken chip-sets This code relies on generic shared interrupt support just commited to kern_intr.c (plus the modifications of isa.c and isa_device.h).
1997-05-26 15:08:43 +00:00
int ln2size;
Add heuristic to detect multi-function devices that don't announce this feature in the header type register, though it is required by the PCI spec. This should correctly probe both functions of the Intel 82371FB chip, without the need for a special case based on the device ID.
1996-01-30 01:14:29 +00:00
Completely replace the PCI bus driver code to make it better reflect reality. There will be a new call interface, but for now the file pci_compat.c (which is to be deleted, after all drivers are converted) provides an emulation of the old PCI bus driver functions. The only change that might be visible to drivers is, that the type pcici_t (which had been meant to be just a handle, whose exact definition should not be relied on), has been converted into a pcicfgregs* . The Tekram AMD SCSI driver bogusly relied on the definition of pcici_t and has been converted to just call the PCI drivers functions to access configuration space register, instead of inventing its own ... This code is by no means complete, but assumed to be fully operational, and brings the official code base more in line with my development code. A new generic device descriptor data type has to be agreed on. The PCI code will then use that data type to provide new functionality: 1) userconfig support 2) "wired" PCI devices 3) conflicts checking against ISA/EISA 4) maps will depend on the command register enable bits 5) PCI to Anything bridges can be defined as devices, and are probed like any "standard" PCI device. The following features are currently missing, but will be added back, soon: 1) unknown device probe message 2) suppression of "mirrored" devices caused by ancient, broken chip-sets This code relies on generic shared interrupt support just commited to kern_intr.c (plus the modifications of isa.c and isa_device.h).
1997-05-26 15:08:43 +00:00
testval = pci_mapbase(testval);
Two minor changes to the code that builds the pci map array: 1) Stop at the first map register that contains a zero value. 2) When testing for the map size work up from low values, since this works around a bug in some BusLogic SCSI card, which has the 16 upper port base address bits hardwired to zero. The config register dump printed in the bootverbose case has been slightly rearranged.
1997-05-28 10:01:03 +00:00
ln2size = 0;
if (testval != 0) {
while ((testval & 1) == 0)
{
ln2size++;
testval >>= 1;
}
Make mapping messages depend on bootverbose flag. Add PCI subclass to unknown device message.
1995-09-07 15:20:53 +00:00
}
Completely replace the PCI bus driver code to make it better reflect reality. There will be a new call interface, but for now the file pci_compat.c (which is to be deleted, after all drivers are converted) provides an emulation of the old PCI bus driver functions. The only change that might be visible to drivers is, that the type pcici_t (which had been meant to be just a handle, whose exact definition should not be relied on), has been converted into a pcicfgregs* . The Tekram AMD SCSI driver bogusly relied on the definition of pcici_t and has been converted to just call the PCI drivers functions to access configuration space register, instead of inventing its own ... This code is by no means complete, but assumed to be fully operational, and brings the official code base more in line with my development code. A new generic device descriptor data type has to be agreed on. The PCI code will then use that data type to provide new functionality: 1) userconfig support 2) "wired" PCI devices 3) conflicts checking against ISA/EISA 4) maps will depend on the command register enable bits 5) PCI to Anything bridges can be defined as devices, and are probed like any "standard" PCI device. The following features are currently missing, but will be added back, soon: 1) unknown device probe message 2) suppression of "mirrored" devices caused by ancient, broken chip-sets This code relies on generic shared interrupt support just commited to kern_intr.c (plus the modifications of isa.c and isa_device.h).
1997-05-26 15:08:43 +00:00
return (ln2size);
Completely new PCI code: 1) Supports PCI to PCI bridge devices (and tries to initialise them, even if the BIOS is brain dead). 2) Supports shared PCI interrupts. Interrupt handlers now MUST return '0' if they found nothing to do, '1' otherwise. New features tested with i486 systems based on the Intel Saturn and a DEC 4channel Ethernet card only, but expected to work on most systems. The option PCI_REMAP has been removed ! Submitted by: Wolfgang Stanglmeier <wolf@kintaro.cologne.de>
1995-03-21 23:01:06 +00:00
}
Completely replace the PCI bus driver code to make it better reflect reality. There will be a new call interface, but for now the file pci_compat.c (which is to be deleted, after all drivers are converted) provides an emulation of the old PCI bus driver functions. The only change that might be visible to drivers is, that the type pcici_t (which had been meant to be just a handle, whose exact definition should not be relied on), has been converted into a pcicfgregs* . The Tekram AMD SCSI driver bogusly relied on the definition of pcici_t and has been converted to just call the PCI drivers functions to access configuration space register, instead of inventing its own ... This code is by no means complete, but assumed to be fully operational, and brings the official code base more in line with my development code. A new generic device descriptor data type has to be agreed on. The PCI code will then use that data type to provide new functionality: 1) userconfig support 2) "wired" PCI devices 3) conflicts checking against ISA/EISA 4) maps will depend on the command register enable bits 5) PCI to Anything bridges can be defined as devices, and are probed like any "standard" PCI device. The following features are currently missing, but will be added back, soon: 1) unknown device probe message 2) suppression of "mirrored" devices caused by ancient, broken chip-sets This code relies on generic shared interrupt support just commited to kern_intr.c (plus the modifications of isa.c and isa_device.h).
1997-05-26 15:08:43 +00:00
/* return log2 of address range supported by map register */
Completely new PCI code: 1) Supports PCI to PCI bridge devices (and tries to initialise them, even if the BIOS is brain dead). 2) Supports shared PCI interrupts. Interrupt handlers now MUST return '0' if they found nothing to do, '1' otherwise. New features tested with i486 systems based on the Intel Saturn and a DEC 4channel Ethernet card only, but expected to work on most systems. The option PCI_REMAP has been removed ! Submitted by: Wolfgang Stanglmeier <wolf@kintaro.cologne.de>
1995-03-21 23:01:06 +00:00
Completely replace the PCI bus driver code to make it better reflect reality. There will be a new call interface, but for now the file pci_compat.c (which is to be deleted, after all drivers are converted) provides an emulation of the old PCI bus driver functions. The only change that might be visible to drivers is, that the type pcici_t (which had been meant to be just a handle, whose exact definition should not be relied on), has been converted into a pcicfgregs* . The Tekram AMD SCSI driver bogusly relied on the definition of pcici_t and has been converted to just call the PCI drivers functions to access configuration space register, instead of inventing its own ... This code is by no means complete, but assumed to be fully operational, and brings the official code base more in line with my development code. A new generic device descriptor data type has to be agreed on. The PCI code will then use that data type to provide new functionality: 1) userconfig support 2) "wired" PCI devices 3) conflicts checking against ISA/EISA 4) maps will depend on the command register enable bits 5) PCI to Anything bridges can be defined as devices, and are probed like any "standard" PCI device. The following features are currently missing, but will be added back, soon: 1) unknown device probe message 2) suppression of "mirrored" devices caused by ancient, broken chip-sets This code relies on generic shared interrupt support just commited to kern_intr.c (plus the modifications of isa.c and isa_device.h).
1997-05-26 15:08:43 +00:00
static int
pci_maprange(unsigned mapreg)
{
int ln2range = 0;
switch (mapreg & 0x07) {
case 0x00:
case 0x01:
case 0x05:
ln2range = 32;
break;
case 0x02:
ln2range = 20;
break;
case 0x04:
ln2range = 64;
break;
Update PCI bus code from my current sources: - always use pci_conf_read() and pci_conf_write(). (This is required to simulate non-existant devices in my system for PCI bridge code tests.) - reorder some functions (put the main functions at the end). - correct off by one bug in the code dealing with unitialized PCI to PCI bridge chips. (Bug found by ASAMI Satoshi.) - print function number for multi-function devices.
1996-04-14 20:14:36 +00:00
}
Completely replace the PCI bus driver code to make it better reflect reality. There will be a new call interface, but for now the file pci_compat.c (which is to be deleted, after all drivers are converted) provides an emulation of the old PCI bus driver functions. The only change that might be visible to drivers is, that the type pcici_t (which had been meant to be just a handle, whose exact definition should not be relied on), has been converted into a pcicfgregs* . The Tekram AMD SCSI driver bogusly relied on the definition of pcici_t and has been converted to just call the PCI drivers functions to access configuration space register, instead of inventing its own ... This code is by no means complete, but assumed to be fully operational, and brings the official code base more in line with my development code. A new generic device descriptor data type has to be agreed on. The PCI code will then use that data type to provide new functionality: 1) userconfig support 2) "wired" PCI devices 3) conflicts checking against ISA/EISA 4) maps will depend on the command register enable bits 5) PCI to Anything bridges can be defined as devices, and are probed like any "standard" PCI device. The following features are currently missing, but will be added back, soon: 1) unknown device probe message 2) suppression of "mirrored" devices caused by ancient, broken chip-sets This code relies on generic shared interrupt support just commited to kern_intr.c (plus the modifications of isa.c and isa_device.h).
1997-05-26 15:08:43 +00:00
return (ln2range);
Reapplied all of Stefan's changes. What a mess - the files were modified and moved at the same time. This made it *very* difficult to fix the revision log lossage that happend when the files were moved. SIGH.
1995-02-02 13:12:18 +00:00
}
Completely new PCI code: 1) Supports PCI to PCI bridge devices (and tries to initialise them, even if the BIOS is brain dead). 2) Supports shared PCI interrupts. Interrupt handlers now MUST return '0' if they found nothing to do, '1' otherwise. New features tested with i486 systems based on the Intel Saturn and a DEC 4channel Ethernet card only, but expected to work on most systems. The option PCI_REMAP has been removed ! Submitted by: Wolfgang Stanglmeier <wolf@kintaro.cologne.de>
1995-03-21 23:01:06 +00:00
Completely replace the PCI bus driver code to make it better reflect reality. There will be a new call interface, but for now the file pci_compat.c (which is to be deleted, after all drivers are converted) provides an emulation of the old PCI bus driver functions. The only change that might be visible to drivers is, that the type pcici_t (which had been meant to be just a handle, whose exact definition should not be relied on), has been converted into a pcicfgregs* . The Tekram AMD SCSI driver bogusly relied on the definition of pcici_t and has been converted to just call the PCI drivers functions to access configuration space register, instead of inventing its own ... This code is by no means complete, but assumed to be fully operational, and brings the official code base more in line with my development code. A new generic device descriptor data type has to be agreed on. The PCI code will then use that data type to provide new functionality: 1) userconfig support 2) "wired" PCI devices 3) conflicts checking against ISA/EISA 4) maps will depend on the command register enable bits 5) PCI to Anything bridges can be defined as devices, and are probed like any "standard" PCI device. The following features are currently missing, but will be added back, soon: 1) unknown device probe message 2) suppression of "mirrored" devices caused by ancient, broken chip-sets This code relies on generic shared interrupt support just commited to kern_intr.c (plus the modifications of isa.c and isa_device.h).
1997-05-26 15:08:43 +00:00
/* adjust some values from PCI 1.0 devices to match 2.0 standards ... */
Add PCI LKM support.
1997-01-21 23:23:40 +00:00
Completely replace the PCI bus driver code to make it better reflect reality. There will be a new call interface, but for now the file pci_compat.c (which is to be deleted, after all drivers are converted) provides an emulation of the old PCI bus driver functions. The only change that might be visible to drivers is, that the type pcici_t (which had been meant to be just a handle, whose exact definition should not be relied on), has been converted into a pcicfgregs* . The Tekram AMD SCSI driver bogusly relied on the definition of pcici_t and has been converted to just call the PCI drivers functions to access configuration space register, instead of inventing its own ... This code is by no means complete, but assumed to be fully operational, and brings the official code base more in line with my development code. A new generic device descriptor data type has to be agreed on. The PCI code will then use that data type to provide new functionality: 1) userconfig support 2) "wired" PCI devices 3) conflicts checking against ISA/EISA 4) maps will depend on the command register enable bits 5) PCI to Anything bridges can be defined as devices, and are probed like any "standard" PCI device. The following features are currently missing, but will be added back, soon: 1) unknown device probe message 2) suppression of "mirrored" devices caused by ancient, broken chip-sets This code relies on generic shared interrupt support just commited to kern_intr.c (plus the modifications of isa.c and isa_device.h).
1997-05-26 15:08:43 +00:00
static void
pci_fixancient(pcicfgregs *cfg)
Add PCI LKM support.
1997-01-21 23:23:40 +00:00
{
Completely replace the PCI bus driver code to make it better reflect reality. There will be a new call interface, but for now the file pci_compat.c (which is to be deleted, after all drivers are converted) provides an emulation of the old PCI bus driver functions. The only change that might be visible to drivers is, that the type pcici_t (which had been meant to be just a handle, whose exact definition should not be relied on), has been converted into a pcicfgregs* . The Tekram AMD SCSI driver bogusly relied on the definition of pcici_t and has been converted to just call the PCI drivers functions to access configuration space register, instead of inventing its own ... This code is by no means complete, but assumed to be fully operational, and brings the official code base more in line with my development code. A new generic device descriptor data type has to be agreed on. The PCI code will then use that data type to provide new functionality: 1) userconfig support 2) "wired" PCI devices 3) conflicts checking against ISA/EISA 4) maps will depend on the command register enable bits 5) PCI to Anything bridges can be defined as devices, and are probed like any "standard" PCI device. The following features are currently missing, but will be added back, soon: 1) unknown device probe message 2) suppression of "mirrored" devices caused by ancient, broken chip-sets This code relies on generic shared interrupt support just commited to kern_intr.c (plus the modifications of isa.c and isa_device.h).
1997-05-26 15:08:43 +00:00
if (cfg->hdrtype != 0)
return;
Add PCI LKM support.
1997-01-21 23:23:40 +00:00
Completely replace the PCI bus driver code to make it better reflect reality. There will be a new call interface, but for now the file pci_compat.c (which is to be deleted, after all drivers are converted) provides an emulation of the old PCI bus driver functions. The only change that might be visible to drivers is, that the type pcici_t (which had been meant to be just a handle, whose exact definition should not be relied on), has been converted into a pcicfgregs* . The Tekram AMD SCSI driver bogusly relied on the definition of pcici_t and has been converted to just call the PCI drivers functions to access configuration space register, instead of inventing its own ... This code is by no means complete, but assumed to be fully operational, and brings the official code base more in line with my development code. A new generic device descriptor data type has to be agreed on. The PCI code will then use that data type to provide new functionality: 1) userconfig support 2) "wired" PCI devices 3) conflicts checking against ISA/EISA 4) maps will depend on the command register enable bits 5) PCI to Anything bridges can be defined as devices, and are probed like any "standard" PCI device. The following features are currently missing, but will be added back, soon: 1) unknown device probe message 2) suppression of "mirrored" devices caused by ancient, broken chip-sets This code relies on generic shared interrupt support just commited to kern_intr.c (plus the modifications of isa.c and isa_device.h).
1997-05-26 15:08:43 +00:00
/* PCI to PCI bridges use header type 1 */
Use "baseclass" instead of "class" for storing the contents of PCI register 0xB so that C++ programs can use the PCI conf interface.
1998-08-13 19:12:20 +00:00
if (cfg->baseclass == PCIC_BRIDGE && cfg->subclass == PCIS_BRIDGE_PCI)
Completely replace the PCI bus driver code to make it better reflect reality. There will be a new call interface, but for now the file pci_compat.c (which is to be deleted, after all drivers are converted) provides an emulation of the old PCI bus driver functions. The only change that might be visible to drivers is, that the type pcici_t (which had been meant to be just a handle, whose exact definition should not be relied on), has been converted into a pcicfgregs* . The Tekram AMD SCSI driver bogusly relied on the definition of pcici_t and has been converted to just call the PCI drivers functions to access configuration space register, instead of inventing its own ... This code is by no means complete, but assumed to be fully operational, and brings the official code base more in line with my development code. A new generic device descriptor data type has to be agreed on. The PCI code will then use that data type to provide new functionality: 1) userconfig support 2) "wired" PCI devices 3) conflicts checking against ISA/EISA 4) maps will depend on the command register enable bits 5) PCI to Anything bridges can be defined as devices, and are probed like any "standard" PCI device. The following features are currently missing, but will be added back, soon: 1) unknown device probe message 2) suppression of "mirrored" devices caused by ancient, broken chip-sets This code relies on generic shared interrupt support just commited to kern_intr.c (plus the modifications of isa.c and isa_device.h).
1997-05-26 15:08:43 +00:00
cfg->hdrtype = 1;
Add PCI LKM support.
1997-01-21 23:23:40 +00:00
}
Completely replace the PCI bus driver code to make it better reflect reality. There will be a new call interface, but for now the file pci_compat.c (which is to be deleted, after all drivers are converted) provides an emulation of the old PCI bus driver functions. The only change that might be visible to drivers is, that the type pcici_t (which had been meant to be just a handle, whose exact definition should not be relied on), has been converted into a pcicfgregs* . The Tekram AMD SCSI driver bogusly relied on the definition of pcici_t and has been converted to just call the PCI drivers functions to access configuration space register, instead of inventing its own ... This code is by no means complete, but assumed to be fully operational, and brings the official code base more in line with my development code. A new generic device descriptor data type has to be agreed on. The PCI code will then use that data type to provide new functionality: 1) userconfig support 2) "wired" PCI devices 3) conflicts checking against ISA/EISA 4) maps will depend on the command register enable bits 5) PCI to Anything bridges can be defined as devices, and are probed like any "standard" PCI device. The following features are currently missing, but will be added back, soon: 1) unknown device probe message 2) suppression of "mirrored" devices caused by ancient, broken chip-sets This code relies on generic shared interrupt support just commited to kern_intr.c (plus the modifications of isa.c and isa_device.h).
1997-05-26 15:08:43 +00:00
/* extract header type specific config data */
Completely new PCI code: 1) Supports PCI to PCI bridge devices (and tries to initialise them, even if the BIOS is brain dead). 2) Supports shared PCI interrupts. Interrupt handlers now MUST return '0' if they found nothing to do, '1' otherwise. New features tested with i486 systems based on the Intel Saturn and a DEC 4channel Ethernet card only, but expected to work on most systems. The option PCI_REMAP has been removed ! Submitted by: Wolfgang Stanglmeier <wolf@kintaro.cologne.de>
1995-03-21 23:01:06 +00:00
These don't need to be semi-public after all.
2003-02-17 19:47:02 +00:00
static void
* Completely rewrite the alpha busspace to hide the implementation from the drivers. * Remove legacy inx/outx support from chipset and replace with macros which call busspace. * Rework pci config accesses to route through the pcib device instead of calling a MD function directly. With these changes it is possible to cleanly support machines which have more than one independantly numbered PCI busses. As a bonus, the new busspace implementation should be measurably faster than the old one.
2000-08-28 21:48:13 +00:00
pci_hdrtypedata(device_t pcib, int b, int s, int f, pcicfgregs *cfg)
Completely new PCI code: 1) Supports PCI to PCI bridge devices (and tries to initialise them, even if the BIOS is brain dead). 2) Supports shared PCI interrupts. Interrupt handlers now MUST return '0' if they found nothing to do, '1' otherwise. New features tested with i486 systems based on the Intel Saturn and a DEC 4channel Ethernet card only, but expected to work on most systems. The option PCI_REMAP has been removed ! Submitted by: Wolfgang Stanglmeier <wolf@kintaro.cologne.de>
1995-03-21 23:01:06 +00:00
{
* Completely rewrite the alpha busspace to hide the implementation from the drivers. * Remove legacy inx/outx support from chipset and replace with macros which call busspace. * Rework pci config accesses to route through the pcib device instead of calling a MD function directly. With these changes it is possible to cleanly support machines which have more than one independantly numbered PCI busses. As a bonus, the new busspace implementation should be measurably faster than the old one.
2000-08-28 21:48:13 +00:00
#define REG(n, w) PCIB_READ_CONFIG(pcib, b, s, f, n, w)
Completely replace the PCI bus driver code to make it better reflect reality. There will be a new call interface, but for now the file pci_compat.c (which is to be deleted, after all drivers are converted) provides an emulation of the old PCI bus driver functions. The only change that might be visible to drivers is, that the type pcici_t (which had been meant to be just a handle, whose exact definition should not be relied on), has been converted into a pcicfgregs* . The Tekram AMD SCSI driver bogusly relied on the definition of pcici_t and has been converted to just call the PCI drivers functions to access configuration space register, instead of inventing its own ... This code is by no means complete, but assumed to be fully operational, and brings the official code base more in line with my development code. A new generic device descriptor data type has to be agreed on. The PCI code will then use that data type to provide new functionality: 1) userconfig support 2) "wired" PCI devices 3) conflicts checking against ISA/EISA 4) maps will depend on the command register enable bits 5) PCI to Anything bridges can be defined as devices, and are probed like any "standard" PCI device. The following features are currently missing, but will be added back, soon: 1) unknown device probe message 2) suppression of "mirrored" devices caused by ancient, broken chip-sets This code relies on generic shared interrupt support just commited to kern_intr.c (plus the modifications of isa.c and isa_device.h).
1997-05-26 15:08:43 +00:00
switch (cfg->hdrtype) {
case 0:
* Completely rewrite the alpha busspace to hide the implementation from the drivers. * Remove legacy inx/outx support from chipset and replace with macros which call busspace. * Rework pci config accesses to route through the pcib device instead of calling a MD function directly. With these changes it is possible to cleanly support machines which have more than one independantly numbered PCI busses. As a bonus, the new busspace implementation should be measurably faster than the old one.
2000-08-28 21:48:13 +00:00
cfg->subvendor = REG(PCIR_SUBVEND_0, 2);
cfg->subdevice = REG(PCIR_SUBDEV_0, 2);
* Implement bus_set/get/delete_resource for pci. * Change the hack used on the alpha for mapping devices into DENSE or BWX memory spaces to a simpler one. Its still a hack and should be a seperate api to explicitly map the resource. * Add $FreeBSD$ as necessary.
1999-10-14 21:38:33 +00:00
cfg->nummaps = PCI_MAXMAPS_0;
Completely replace the PCI bus driver code to make it better reflect reality. There will be a new call interface, but for now the file pci_compat.c (which is to be deleted, after all drivers are converted) provides an emulation of the old PCI bus driver functions. The only change that might be visible to drivers is, that the type pcici_t (which had been meant to be just a handle, whose exact definition should not be relied on), has been converted into a pcicfgregs* . The Tekram AMD SCSI driver bogusly relied on the definition of pcici_t and has been converted to just call the PCI drivers functions to access configuration space register, instead of inventing its own ... This code is by no means complete, but assumed to be fully operational, and brings the official code base more in line with my development code. A new generic device descriptor data type has to be agreed on. The PCI code will then use that data type to provide new functionality: 1) userconfig support 2) "wired" PCI devices 3) conflicts checking against ISA/EISA 4) maps will depend on the command register enable bits 5) PCI to Anything bridges can be defined as devices, and are probed like any "standard" PCI device. The following features are currently missing, but will be added back, soon: 1) unknown device probe message 2) suppression of "mirrored" devices caused by ancient, broken chip-sets This code relies on generic shared interrupt support just commited to kern_intr.c (plus the modifications of isa.c and isa_device.h).
1997-05-26 15:08:43 +00:00
break;
case 1:
* Completely rewrite the alpha busspace to hide the implementation from the drivers. * Remove legacy inx/outx support from chipset and replace with macros which call busspace. * Rework pci config accesses to route through the pcib device instead of calling a MD function directly. With these changes it is possible to cleanly support machines which have more than one independantly numbered PCI busses. As a bonus, the new busspace implementation should be measurably faster than the old one.
2000-08-28 21:48:13 +00:00
cfg->subvendor = REG(PCIR_SUBVEND_1, 2);
cfg->subdevice = REG(PCIR_SUBDEV_1, 2);
* Implement bus_set/get/delete_resource for pci. * Change the hack used on the alpha for mapping devices into DENSE or BWX memory spaces to a simpler one. Its still a hack and should be a seperate api to explicitly map the resource. * Add $FreeBSD$ as necessary.
1999-10-14 21:38:33 +00:00
cfg->nummaps = PCI_MAXMAPS_1;
Completely replace the PCI bus driver code to make it better reflect reality. There will be a new call interface, but for now the file pci_compat.c (which is to be deleted, after all drivers are converted) provides an emulation of the old PCI bus driver functions. The only change that might be visible to drivers is, that the type pcici_t (which had been meant to be just a handle, whose exact definition should not be relied on), has been converted into a pcicfgregs* . The Tekram AMD SCSI driver bogusly relied on the definition of pcici_t and has been converted to just call the PCI drivers functions to access configuration space register, instead of inventing its own ... This code is by no means complete, but assumed to be fully operational, and brings the official code base more in line with my development code. A new generic device descriptor data type has to be agreed on. The PCI code will then use that data type to provide new functionality: 1) userconfig support 2) "wired" PCI devices 3) conflicts checking against ISA/EISA 4) maps will depend on the command register enable bits 5) PCI to Anything bridges can be defined as devices, and are probed like any "standard" PCI device. The following features are currently missing, but will be added back, soon: 1) unknown device probe message 2) suppression of "mirrored" devices caused by ancient, broken chip-sets This code relies on generic shared interrupt support just commited to kern_intr.c (plus the modifications of isa.c and isa_device.h).
1997-05-26 15:08:43 +00:00
break;
case 2:
* Completely rewrite the alpha busspace to hide the implementation from the drivers. * Remove legacy inx/outx support from chipset and replace with macros which call busspace. * Rework pci config accesses to route through the pcib device instead of calling a MD function directly. With these changes it is possible to cleanly support machines which have more than one independantly numbered PCI busses. As a bonus, the new busspace implementation should be measurably faster than the old one.
2000-08-28 21:48:13 +00:00
cfg->subvendor = REG(PCIR_SUBVEND_2, 2);
cfg->subdevice = REG(PCIR_SUBDEV_2, 2);
* Implement bus_set/get/delete_resource for pci. * Change the hack used on the alpha for mapping devices into DENSE or BWX memory spaces to a simpler one. Its still a hack and should be a seperate api to explicitly map the resource. * Add $FreeBSD$ as necessary.
1999-10-14 21:38:33 +00:00
cfg->nummaps = PCI_MAXMAPS_2;
Completely replace the PCI bus driver code to make it better reflect reality. There will be a new call interface, but for now the file pci_compat.c (which is to be deleted, after all drivers are converted) provides an emulation of the old PCI bus driver functions. The only change that might be visible to drivers is, that the type pcici_t (which had been meant to be just a handle, whose exact definition should not be relied on), has been converted into a pcicfgregs* . The Tekram AMD SCSI driver bogusly relied on the definition of pcici_t and has been converted to just call the PCI drivers functions to access configuration space register, instead of inventing its own ... This code is by no means complete, but assumed to be fully operational, and brings the official code base more in line with my development code. A new generic device descriptor data type has to be agreed on. The PCI code will then use that data type to provide new functionality: 1) userconfig support 2) "wired" PCI devices 3) conflicts checking against ISA/EISA 4) maps will depend on the command register enable bits 5) PCI to Anything bridges can be defined as devices, and are probed like any "standard" PCI device. The following features are currently missing, but will be added back, soon: 1) unknown device probe message 2) suppression of "mirrored" devices caused by ancient, broken chip-sets This code relies on generic shared interrupt support just commited to kern_intr.c (plus the modifications of isa.c and isa_device.h).
1997-05-26 15:08:43 +00:00
break;
Make mapping messages depend on bootverbose flag. Add PCI subclass to unknown device message.
1995-09-07 15:20:53 +00:00
}
* Completely rewrite the alpha busspace to hide the implementation from the drivers. * Remove legacy inx/outx support from chipset and replace with macros which call busspace. * Rework pci config accesses to route through the pcib device instead of calling a MD function directly. With these changes it is possible to cleanly support machines which have more than one independantly numbered PCI busses. As a bonus, the new busspace implementation should be measurably faster than the old one.
2000-08-28 21:48:13 +00:00
#undef REG
Completely replace the PCI bus driver code to make it better reflect reality. There will be a new call interface, but for now the file pci_compat.c (which is to be deleted, after all drivers are converted) provides an emulation of the old PCI bus driver functions. The only change that might be visible to drivers is, that the type pcici_t (which had been meant to be just a handle, whose exact definition should not be relied on), has been converted into a pcicfgregs* . The Tekram AMD SCSI driver bogusly relied on the definition of pcici_t and has been converted to just call the PCI drivers functions to access configuration space register, instead of inventing its own ... This code is by no means complete, but assumed to be fully operational, and brings the official code base more in line with my development code. A new generic device descriptor data type has to be agreed on. The PCI code will then use that data type to provide new functionality: 1) userconfig support 2) "wired" PCI devices 3) conflicts checking against ISA/EISA 4) maps will depend on the command register enable bits 5) PCI to Anything bridges can be defined as devices, and are probed like any "standard" PCI device. The following features are currently missing, but will be added back, soon: 1) unknown device probe message 2) suppression of "mirrored" devices caused by ancient, broken chip-sets This code relies on generic shared interrupt support just commited to kern_intr.c (plus the modifications of isa.c and isa_device.h).
1997-05-26 15:08:43 +00:00
}
Completely new PCI code: 1) Supports PCI to PCI bridge devices (and tries to initialise them, even if the BIOS is brain dead). 2) Supports shared PCI interrupts. Interrupt handlers now MUST return '0' if they found nothing to do, '1' otherwise. New features tested with i486 systems based on the Intel Saturn and a DEC 4channel Ethernet card only, but expected to work on most systems. The option PCI_REMAP has been removed ! Submitted by: Wolfgang Stanglmeier <wolf@kintaro.cologne.de>
1995-03-21 23:01:06 +00:00
Next round of PCI subsystem updates: - Break out the /dev/pci driver into a separate file. - Kill the COMPAT_OLDPCI support. - Make the EISA bridge attach a bit more like the old code; explicitly check for the existence of eisa0/isa0 and only attach if they don't already exist. Only make one bus_generic_attach() pass over the bridge, once both busses are attached. Note that the stupid Intel bridge's class is entirely unpredictable. - Add prototypes and re-layout the core PCI modules in line with current coding standards (not a major whitespace change, just moving the module data to the top of the file). - Remove redundant type-2 bridge support from the core PCI code; the PCI-CardBus code does this itself internally. Remove the now entirely redundant header-class-specific support, as well as the secondary and subordinate bus number fields. These are bridge attributes now. - Add support for PCI Extended Capabilities. - Add support for PCI Power Management. The interface currently allows a driver to query and set the power state of a device. - Add helper functions to allow drivers to enable/disable busmastering and the decoding of I/O and memory ranges. - Use PCI_SLOTMAX and PCI_FUNCMAX rather than magic numbers in some places. - Make the PCI-PCI bridge code a little more paranoid about valid I/O and memory decodes. - Add some more PCI register definitions for the command and status registers. Correct another bogus definition for type-1 bridges.
2000-12-13 01:25:11 +00:00
/* read configuration header into pcicfgregs structure */
Completely replace the PCI bus driver code to make it better reflect reality. There will be a new call interface, but for now the file pci_compat.c (which is to be deleted, after all drivers are converted) provides an emulation of the old PCI bus driver functions. The only change that might be visible to drivers is, that the type pcici_t (which had been meant to be just a handle, whose exact definition should not be relied on), has been converted into a pcicfgregs* . The Tekram AMD SCSI driver bogusly relied on the definition of pcici_t and has been converted to just call the PCI drivers functions to access configuration space register, instead of inventing its own ... This code is by no means complete, but assumed to be fully operational, and brings the official code base more in line with my development code. A new generic device descriptor data type has to be agreed on. The PCI code will then use that data type to provide new functionality: 1) userconfig support 2) "wired" PCI devices 3) conflicts checking against ISA/EISA 4) maps will depend on the command register enable bits 5) PCI to Anything bridges can be defined as devices, and are probed like any "standard" PCI device. The following features are currently missing, but will be added back, soon: 1) unknown device probe message 2) suppression of "mirrored" devices caused by ancient, broken chip-sets This code relies on generic shared interrupt support just commited to kern_intr.c (plus the modifications of isa.c and isa_device.h).
1997-05-26 15:08:43 +00:00
Use the pci.c code wherever possible, rather than copying all the pci code into cardbus and s/pci/cardbus. This exposes a few pci_* functions that are now static. This work is similar to work Justin posted to the mobile list about a year or two ago, which I have neglected since then. This is a subset of his current work with the multiple inheritance newbus architecutre. When completed, that will eliminate the need for pci/pci_private.h. Similar work is needed for the cardbus_cis and pccard_cis code as well.
2002-02-27 05:09:14 +00:00
struct pci_devinfo *
Add 5th parameter to pci_read_device specifying the size of the object to create.
2002-03-13 16:32:11 +00:00
pci_read_device(device_t pcib, int b, int s, int f, size_t size)
Completely replace the PCI bus driver code to make it better reflect reality. There will be a new call interface, but for now the file pci_compat.c (which is to be deleted, after all drivers are converted) provides an emulation of the old PCI bus driver functions. The only change that might be visible to drivers is, that the type pcici_t (which had been meant to be just a handle, whose exact definition should not be relied on), has been converted into a pcicfgregs* . The Tekram AMD SCSI driver bogusly relied on the definition of pcici_t and has been converted to just call the PCI drivers functions to access configuration space register, instead of inventing its own ... This code is by no means complete, but assumed to be fully operational, and brings the official code base more in line with my development code. A new generic device descriptor data type has to be agreed on. The PCI code will then use that data type to provide new functionality: 1) userconfig support 2) "wired" PCI devices 3) conflicts checking against ISA/EISA 4) maps will depend on the command register enable bits 5) PCI to Anything bridges can be defined as devices, and are probed like any "standard" PCI device. The following features are currently missing, but will be added back, soon: 1) unknown device probe message 2) suppression of "mirrored" devices caused by ancient, broken chip-sets This code relies on generic shared interrupt support just commited to kern_intr.c (plus the modifications of isa.c and isa_device.h).
1997-05-26 15:08:43 +00:00
{
* Completely rewrite the alpha busspace to hide the implementation from the drivers. * Remove legacy inx/outx support from chipset and replace with macros which call busspace. * Rework pci config accesses to route through the pcib device instead of calling a MD function directly. With these changes it is possible to cleanly support machines which have more than one independantly numbered PCI busses. As a bonus, the new busspace implementation should be measurably faster than the old one.
2000-08-28 21:48:13 +00:00
#define REG(n, w) PCIB_READ_CONFIG(pcib, b, s, f, n, w)
Completely replace the PCI bus driver code to make it better reflect reality. There will be a new call interface, but for now the file pci_compat.c (which is to be deleted, after all drivers are converted) provides an emulation of the old PCI bus driver functions. The only change that might be visible to drivers is, that the type pcici_t (which had been meant to be just a handle, whose exact definition should not be relied on), has been converted into a pcicfgregs* . The Tekram AMD SCSI driver bogusly relied on the definition of pcici_t and has been converted to just call the PCI drivers functions to access configuration space register, instead of inventing its own ... This code is by no means complete, but assumed to be fully operational, and brings the official code base more in line with my development code. A new generic device descriptor data type has to be agreed on. The PCI code will then use that data type to provide new functionality: 1) userconfig support 2) "wired" PCI devices 3) conflicts checking against ISA/EISA 4) maps will depend on the command register enable bits 5) PCI to Anything bridges can be defined as devices, and are probed like any "standard" PCI device. The following features are currently missing, but will be added back, soon: 1) unknown device probe message 2) suppression of "mirrored" devices caused by ancient, broken chip-sets This code relies on generic shared interrupt support just commited to kern_intr.c (plus the modifications of isa.c and isa_device.h).
1997-05-26 15:08:43 +00:00
pcicfgregs *cfg = NULL;
Revive PCIConf. Submitted by: "Kenneth D. Merry" <ken@plutotech.com>
1998-09-15 08:21:13 +00:00
struct pci_devinfo *devlist_entry;
struct devlist *devlist_head;
devlist_head = &pci_devq;
devlist_entry = NULL;
Completely replace the PCI bus driver code to make it better reflect reality. There will be a new call interface, but for now the file pci_compat.c (which is to be deleted, after all drivers are converted) provides an emulation of the old PCI bus driver functions. The only change that might be visible to drivers is, that the type pcici_t (which had been meant to be just a handle, whose exact definition should not be relied on), has been converted into a pcicfgregs* . The Tekram AMD SCSI driver bogusly relied on the definition of pcici_t and has been converted to just call the PCI drivers functions to access configuration space register, instead of inventing its own ... This code is by no means complete, but assumed to be fully operational, and brings the official code base more in line with my development code. A new generic device descriptor data type has to be agreed on. The PCI code will then use that data type to provide new functionality: 1) userconfig support 2) "wired" PCI devices 3) conflicts checking against ISA/EISA 4) maps will depend on the command register enable bits 5) PCI to Anything bridges can be defined as devices, and are probed like any "standard" PCI device. The following features are currently missing, but will be added back, soon: 1) unknown device probe message 2) suppression of "mirrored" devices caused by ancient, broken chip-sets This code relies on generic shared interrupt support just commited to kern_intr.c (plus the modifications of isa.c and isa_device.h).
1997-05-26 15:08:43 +00:00
* Completely rewrite the alpha busspace to hide the implementation from the drivers. * Remove legacy inx/outx support from chipset and replace with macros which call busspace. * Rework pci config accesses to route through the pcib device instead of calling a MD function directly. With these changes it is possible to cleanly support machines which have more than one independantly numbered PCI busses. As a bonus, the new busspace implementation should be measurably faster than the old one.
2000-08-28 21:48:13 +00:00
if (PCIB_READ_CONFIG(pcib, b, s, f, PCIR_DEVVENDOR, 4) != -1) {
Back out M_* changes, per decision of the TRB. Approved by: trb
2003-02-19 05:47:46 +00:00
devlist_entry = malloc(size, M_DEVBUF, M_WAITOK | M_ZERO);
Revive PCIConf. Submitted by: "Kenneth D. Merry" <ken@plutotech.com>
1998-09-15 08:21:13 +00:00
if (devlist_entry == NULL)
return (NULL);
cfg = &devlist_entry->cfg;
Add support for multiple PCI "hoses" used on various alpha platforms. The specific intent of this commit is to pave the way for importing Compaq XP1000 support. These changes should not affect the i386 port. Reviewed by: Doug Rabson <dfr@nlsystems.com> (actually, he walked me through most of it & deserves more than reviewd-by credit )
1999-05-20 15:33:33 +00:00
* Completely rewrite the alpha busspace to hide the implementation from the drivers. * Remove legacy inx/outx support from chipset and replace with macros which call busspace. * Rework pci config accesses to route through the pcib device instead of calling a MD function directly. With these changes it is possible to cleanly support machines which have more than one independantly numbered PCI busses. As a bonus, the new busspace implementation should be measurably faster than the old one.
2000-08-28 21:48:13 +00:00
cfg->bus = b;
cfg->slot = s;
cfg->func = f;
cfg->vendor = REG(PCIR_VENDOR, 2);
cfg->device = REG(PCIR_DEVICE, 2);
cfg->cmdreg = REG(PCIR_COMMAND, 2);
cfg->statreg = REG(PCIR_STATUS, 2);
cfg->baseclass = REG(PCIR_CLASS, 1);
cfg->subclass = REG(PCIR_SUBCLASS, 1);
cfg->progif = REG(PCIR_PROGIF, 1);
cfg->revid = REG(PCIR_REVID, 1);
cfg->hdrtype = REG(PCIR_HEADERTYPE, 1);
cfg->cachelnsz = REG(PCIR_CACHELNSZ, 1);
cfg->lattimer = REG(PCIR_LATTIMER, 1);
cfg->intpin = REG(PCIR_INTPIN, 1);
cfg->intline = REG(PCIR_INTLINE, 1);
Add support for APIC_IO to pci IRQ configuration. The support for APIC_IO was lost in the new set of pci modules. This patch restores the ability to build SMP/APIC_IO kernels.
1997-05-27 04:09:01 +00:00
* Completely rewrite the alpha busspace to hide the implementation from the drivers. * Remove legacy inx/outx support from chipset and replace with macros which call busspace. * Rework pci config accesses to route through the pcib device instead of calling a MD function directly. With these changes it is possible to cleanly support machines which have more than one independantly numbered PCI busses. As a bonus, the new busspace implementation should be measurably faster than the old one.
2000-08-28 21:48:13 +00:00
cfg->mingnt = REG(PCIR_MINGNT, 1);
cfg->maxlat = REG(PCIR_MAXLAT, 1);
Completely replace the PCI bus driver code to make it better reflect reality. There will be a new call interface, but for now the file pci_compat.c (which is to be deleted, after all drivers are converted) provides an emulation of the old PCI bus driver functions. The only change that might be visible to drivers is, that the type pcici_t (which had been meant to be just a handle, whose exact definition should not be relied on), has been converted into a pcicfgregs* . The Tekram AMD SCSI driver bogusly relied on the definition of pcici_t and has been converted to just call the PCI drivers functions to access configuration space register, instead of inventing its own ... This code is by no means complete, but assumed to be fully operational, and brings the official code base more in line with my development code. A new generic device descriptor data type has to be agreed on. The PCI code will then use that data type to provide new functionality: 1) userconfig support 2) "wired" PCI devices 3) conflicts checking against ISA/EISA 4) maps will depend on the command register enable bits 5) PCI to Anything bridges can be defined as devices, and are probed like any "standard" PCI device. The following features are currently missing, but will be added back, soon: 1) unknown device probe message 2) suppression of "mirrored" devices caused by ancient, broken chip-sets This code relies on generic shared interrupt support just commited to kern_intr.c (plus the modifications of isa.c and isa_device.h).
1997-05-26 15:08:43 +00:00
cfg->mfdev = (cfg->hdrtype & PCIM_MFDEV) != 0;
cfg->hdrtype &= ~PCIM_MFDEV;
pci_fixancient(cfg);
* Completely rewrite the alpha busspace to hide the implementation from the drivers. * Remove legacy inx/outx support from chipset and replace with macros which call busspace. * Rework pci config accesses to route through the pcib device instead of calling a MD function directly. With these changes it is possible to cleanly support machines which have more than one independantly numbered PCI busses. As a bonus, the new busspace implementation should be measurably faster than the old one.
2000-08-28 21:48:13 +00:00
pci_hdrtypedata(pcib, b, s, f, cfg);
Revive PCIConf. Submitted by: "Kenneth D. Merry" <ken@plutotech.com>
1998-09-15 08:21:13 +00:00
Next round of PCI subsystem updates: - Break out the /dev/pci driver into a separate file. - Kill the COMPAT_OLDPCI support. - Make the EISA bridge attach a bit more like the old code; explicitly check for the existence of eisa0/isa0 and only attach if they don't already exist. Only make one bus_generic_attach() pass over the bridge, once both busses are attached. Note that the stupid Intel bridge's class is entirely unpredictable. - Add prototypes and re-layout the core PCI modules in line with current coding standards (not a major whitespace change, just moving the module data to the top of the file). - Remove redundant type-2 bridge support from the core PCI code; the PCI-CardBus code does this itself internally. Remove the now entirely redundant header-class-specific support, as well as the secondary and subordinate bus number fields. These are bridge attributes now. - Add support for PCI Extended Capabilities. - Add support for PCI Power Management. The interface currently allows a driver to query and set the power state of a device. - Add helper functions to allow drivers to enable/disable busmastering and the decoding of I/O and memory ranges. - Use PCI_SLOTMAX and PCI_FUNCMAX rather than magic numbers in some places. - Make the PCI-PCI bridge code a little more paranoid about valid I/O and memory decodes. - Add some more PCI register definitions for the command and status registers. Correct another bogus definition for type-1 bridges.
2000-12-13 01:25:11 +00:00
if (REG(PCIR_STATUS, 2) & PCIM_STATUS_CAPPRESENT)
pci_read_extcap(pcib, cfg);
Revive PCIConf. Submitted by: "Kenneth D. Merry" <ken@plutotech.com>
1998-09-15 08:21:13 +00:00
STAILQ_INSERT_TAIL(devlist_head, devlist_entry, pci_links);
devlist_entry->conf.pc_sel.pc_bus = cfg->bus;
devlist_entry->conf.pc_sel.pc_dev = cfg->slot;
devlist_entry->conf.pc_sel.pc_func = cfg->func;
devlist_entry->conf.pc_hdr = cfg->hdrtype;
devlist_entry->conf.pc_subvendor = cfg->subvendor;
devlist_entry->conf.pc_subdevice = cfg->subdevice;
devlist_entry->conf.pc_vendor = cfg->vendor;
devlist_entry->conf.pc_device = cfg->device;
devlist_entry->conf.pc_class = cfg->baseclass;
devlist_entry->conf.pc_subclass = cfg->subclass;
devlist_entry->conf.pc_progif = cfg->progif;
devlist_entry->conf.pc_revid = cfg->revid;
pci_numdevs++;
pci_generation++;
Make mapping messages depend on bootverbose flag. Add PCI subclass to unknown device message.
1995-09-07 15:20:53 +00:00
}
Revive PCIConf. Submitted by: "Kenneth D. Merry" <ken@plutotech.com>
1998-09-15 08:21:13 +00:00
return (devlist_entry);
* Completely rewrite the alpha busspace to hide the implementation from the drivers. * Remove legacy inx/outx support from chipset and replace with macros which call busspace. * Rework pci config accesses to route through the pcib device instead of calling a MD function directly. With these changes it is possible to cleanly support machines which have more than one independantly numbered PCI busses. As a bonus, the new busspace implementation should be measurably faster than the old one.
2000-08-28 21:48:13 +00:00
#undef REG
Completely new PCI code: 1) Supports PCI to PCI bridge devices (and tries to initialise them, even if the BIOS is brain dead). 2) Supports shared PCI interrupts. Interrupt handlers now MUST return '0' if they found nothing to do, '1' otherwise. New features tested with i486 systems based on the Intel Saturn and a DEC 4channel Ethernet card only, but expected to work on most systems. The option PCI_REMAP has been removed ! Submitted by: Wolfgang Stanglmeier <wolf@kintaro.cologne.de>
1995-03-21 23:01:06 +00:00
}
These don't need to be semi-public after all.
2003-02-17 19:47:02 +00:00
static void
Next round of PCI subsystem updates: - Break out the /dev/pci driver into a separate file. - Kill the COMPAT_OLDPCI support. - Make the EISA bridge attach a bit more like the old code; explicitly check for the existence of eisa0/isa0 and only attach if they don't already exist. Only make one bus_generic_attach() pass over the bridge, once both busses are attached. Note that the stupid Intel bridge's class is entirely unpredictable. - Add prototypes and re-layout the core PCI modules in line with current coding standards (not a major whitespace change, just moving the module data to the top of the file). - Remove redundant type-2 bridge support from the core PCI code; the PCI-CardBus code does this itself internally. Remove the now entirely redundant header-class-specific support, as well as the secondary and subordinate bus number fields. These are bridge attributes now. - Add support for PCI Extended Capabilities. - Add support for PCI Power Management. The interface currently allows a driver to query and set the power state of a device. - Add helper functions to allow drivers to enable/disable busmastering and the decoding of I/O and memory ranges. - Use PCI_SLOTMAX and PCI_FUNCMAX rather than magic numbers in some places. - Make the PCI-PCI bridge code a little more paranoid about valid I/O and memory decodes. - Add some more PCI register definitions for the command and status registers. Correct another bogus definition for type-1 bridges.
2000-12-13 01:25:11 +00:00
pci_read_extcap(device_t pcib, pcicfgregs *cfg)
{
#define REG(n, w) PCIB_READ_CONFIG(pcib, cfg->bus, cfg->slot, cfg->func, n, w)
int ptr, nextptr, ptrptr;
switch (cfg->hdrtype) {
case 0:
ptrptr = 0x34;
break;
case 2:
ptrptr = 0x14;
break;
default:
return; /* no extended capabilities support */
}
nextptr = REG(ptrptr, 1); /* sanity check? */
/*
* Read capability entries.
*/
while (nextptr != 0) {
Sanity check ptr for legal values so it is less likely (but not impossible) to get stuck in an infinite loop. Obtained from: msmith@freebsd.org
2001-01-01 16:49:31 +00:00
/* Sanity check */
if (nextptr > 255) {
printf("illegal PCI extended capability offset %d\n",
nextptr);
return;
}
Next round of PCI subsystem updates: - Break out the /dev/pci driver into a separate file. - Kill the COMPAT_OLDPCI support. - Make the EISA bridge attach a bit more like the old code; explicitly check for the existence of eisa0/isa0 and only attach if they don't already exist. Only make one bus_generic_attach() pass over the bridge, once both busses are attached. Note that the stupid Intel bridge's class is entirely unpredictable. - Add prototypes and re-layout the core PCI modules in line with current coding standards (not a major whitespace change, just moving the module data to the top of the file). - Remove redundant type-2 bridge support from the core PCI code; the PCI-CardBus code does this itself internally. Remove the now entirely redundant header-class-specific support, as well as the secondary and subordinate bus number fields. These are bridge attributes now. - Add support for PCI Extended Capabilities. - Add support for PCI Power Management. The interface currently allows a driver to query and set the power state of a device. - Add helper functions to allow drivers to enable/disable busmastering and the decoding of I/O and memory ranges. - Use PCI_SLOTMAX and PCI_FUNCMAX rather than magic numbers in some places. - Make the PCI-PCI bridge code a little more paranoid about valid I/O and memory decodes. - Add some more PCI register definitions for the command and status registers. Correct another bogus definition for type-1 bridges.
2000-12-13 01:25:11 +00:00
/* Find the next entry */
ptr = nextptr;
nextptr = REG(ptr + 1, 1);
/* Process this entry */
switch (REG(ptr, 1)) {
case 0x01: /* PCI power management */
if (cfg->pp_cap == 0) {
cfg->pp_cap = REG(ptr + PCIR_POWER_CAP, 2);
cfg->pp_status = ptr + PCIR_POWER_STATUS;
cfg->pp_pmcsr = ptr + PCIR_POWER_PMCSR;
if ((nextptr - ptr) > PCIR_POWER_DATA)
cfg->pp_data = ptr + PCIR_POWER_DATA;
}
break;
default:
break;
}
}
#undef REG
}
Completely replace the PCI bus driver code to make it better reflect reality. There will be a new call interface, but for now the file pci_compat.c (which is to be deleted, after all drivers are converted) provides an emulation of the old PCI bus driver functions. The only change that might be visible to drivers is, that the type pcici_t (which had been meant to be just a handle, whose exact definition should not be relied on), has been converted into a pcicfgregs* . The Tekram AMD SCSI driver bogusly relied on the definition of pcici_t and has been converted to just call the PCI drivers functions to access configuration space register, instead of inventing its own ... This code is by no means complete, but assumed to be fully operational, and brings the official code base more in line with my development code. A new generic device descriptor data type has to be agreed on. The PCI code will then use that data type to provide new functionality: 1) userconfig support 2) "wired" PCI devices 3) conflicts checking against ISA/EISA 4) maps will depend on the command register enable bits 5) PCI to Anything bridges can be defined as devices, and are probed like any "standard" PCI device. The following features are currently missing, but will be added back, soon: 1) unknown device probe message 2) suppression of "mirrored" devices caused by ancient, broken chip-sets This code relies on generic shared interrupt support just commited to kern_intr.c (plus the modifications of isa.c and isa_device.h).
1997-05-26 15:08:43 +00:00
/* free pcicfgregs structure and all depending data structures */
Completely new PCI code: 1) Supports PCI to PCI bridge devices (and tries to initialise them, even if the BIOS is brain dead). 2) Supports shared PCI interrupts. Interrupt handlers now MUST return '0' if they found nothing to do, '1' otherwise. New features tested with i486 systems based on the Intel Saturn and a DEC 4channel Ethernet card only, but expected to work on most systems. The option PCI_REMAP has been removed ! Submitted by: Wolfgang Stanglmeier <wolf@kintaro.cologne.de>
1995-03-21 23:01:06 +00:00
Use the pci.c code wherever possible, rather than copying all the pci code into cardbus and s/pci/cardbus. This exposes a few pci_* functions that are now static. This work is similar to work Justin posted to the mobile list about a year or two ago, which I have neglected since then. This is a subset of his current work with the multiple inheritance newbus architecutre. When completed, that will eliminate the need for pci/pci_private.h. Similar work is needed for the cardbus_cis and pccard_cis code as well.
2002-02-27 05:09:14 +00:00
int
Revive PCIConf. Submitted by: "Kenneth D. Merry" <ken@plutotech.com>
1998-09-15 08:21:13 +00:00
pci_freecfg(struct pci_devinfo *dinfo)
Completely new PCI code: 1) Supports PCI to PCI bridge devices (and tries to initialise them, even if the BIOS is brain dead). 2) Supports shared PCI interrupts. Interrupt handlers now MUST return '0' if they found nothing to do, '1' otherwise. New features tested with i486 systems based on the Intel Saturn and a DEC 4channel Ethernet card only, but expected to work on most systems. The option PCI_REMAP has been removed ! Submitted by: Wolfgang Stanglmeier <wolf@kintaro.cologne.de>
1995-03-21 23:01:06 +00:00
{
Revive PCIConf. Submitted by: "Kenneth D. Merry" <ken@plutotech.com>
1998-09-15 08:21:13 +00:00
struct devlist *devlist_head;
devlist_head = &pci_devq;
Back out the previous change to the queue(3) interface. It was not discussed and should probably not happen. Requested by: msmith and others
2000-05-26 02:09:24 +00:00
STAILQ_REMOVE(devlist_head, dinfo, pci_devinfo, pci_links);
Revive PCIConf. Submitted by: "Kenneth D. Merry" <ken@plutotech.com>
1998-09-15 08:21:13 +00:00
free(dinfo, M_DEVBUF);
/* increment the generation count */
pci_generation++;
/* we're losing one device */
pci_numdevs--;
Completely replace the PCI bus driver code to make it better reflect reality. There will be a new call interface, but for now the file pci_compat.c (which is to be deleted, after all drivers are converted) provides an emulation of the old PCI bus driver functions. The only change that might be visible to drivers is, that the type pcici_t (which had been meant to be just a handle, whose exact definition should not be relied on), has been converted into a pcicfgregs* . The Tekram AMD SCSI driver bogusly relied on the definition of pcici_t and has been converted to just call the PCI drivers functions to access configuration space register, instead of inventing its own ... This code is by no means complete, but assumed to be fully operational, and brings the official code base more in line with my development code. A new generic device descriptor data type has to be agreed on. The PCI code will then use that data type to provide new functionality: 1) userconfig support 2) "wired" PCI devices 3) conflicts checking against ISA/EISA 4) maps will depend on the command register enable bits 5) PCI to Anything bridges can be defined as devices, and are probed like any "standard" PCI device. The following features are currently missing, but will be added back, soon: 1) unknown device probe message 2) suppression of "mirrored" devices caused by ancient, broken chip-sets This code relies on generic shared interrupt support just commited to kern_intr.c (plus the modifications of isa.c and isa_device.h).
1997-05-26 15:08:43 +00:00
return (0);
Completely new PCI code: 1) Supports PCI to PCI bridge devices (and tries to initialise them, even if the BIOS is brain dead). 2) Supports shared PCI interrupts. Interrupt handlers now MUST return '0' if they found nothing to do, '1' otherwise. New features tested with i486 systems based on the Intel Saturn and a DEC 4channel Ethernet card only, but expected to work on most systems. The option PCI_REMAP has been removed ! Submitted by: Wolfgang Stanglmeier <wolf@kintaro.cologne.de>
1995-03-21 23:01:06 +00:00
}
Add support for ioctl() accesses to PCI config space registers. Garrett Wollman sent me this code a few weeks ago for review, and I made some significant changes, which he in turn accepted ... In order to make use of these changes, a device entry has to added to /dev. Submitted by: wollman
1996-10-22 20:20:14 +00:00
/*
Next round of PCI subsystem updates: - Break out the /dev/pci driver into a separate file. - Kill the COMPAT_OLDPCI support. - Make the EISA bridge attach a bit more like the old code; explicitly check for the existence of eisa0/isa0 and only attach if they don't already exist. Only make one bus_generic_attach() pass over the bridge, once both busses are attached. Note that the stupid Intel bridge's class is entirely unpredictable. - Add prototypes and re-layout the core PCI modules in line with current coding standards (not a major whitespace change, just moving the module data to the top of the file). - Remove redundant type-2 bridge support from the core PCI code; the PCI-CardBus code does this itself internally. Remove the now entirely redundant header-class-specific support, as well as the secondary and subordinate bus number fields. These are bridge attributes now. - Add support for PCI Extended Capabilities. - Add support for PCI Power Management. The interface currently allows a driver to query and set the power state of a device. - Add helper functions to allow drivers to enable/disable busmastering and the decoding of I/O and memory ranges. - Use PCI_SLOTMAX and PCI_FUNCMAX rather than magic numbers in some places. - Make the PCI-PCI bridge code a little more paranoid about valid I/O and memory decodes. - Add some more PCI register definitions for the command and status registers. Correct another bogus definition for type-1 bridges.
2000-12-13 01:25:11 +00:00
* PCI power manangement
Add support for ioctl() accesses to PCI config space registers. Garrett Wollman sent me this code a few weeks ago for review, and I made some significant changes, which he in turn accepted ... In order to make use of these changes, a device entry has to added to /dev. Submitted by: wollman
1996-10-22 20:20:14 +00:00
*/
Use the pci.c code wherever possible, rather than copying all the pci code into cardbus and s/pci/cardbus. This exposes a few pci_* functions that are now static. This work is similar to work Justin posted to the mobile list about a year or two ago, which I have neglected since then. This is a subset of his current work with the multiple inheritance newbus architecutre. When completed, that will eliminate the need for pci/pci_private.h. Similar work is needed for the cardbus_cis and pccard_cis code as well.
2002-02-27 05:09:14 +00:00
int
Slightly reimplement some recently added helper functions as methods, so that drivers are not reaching into the internals of the pci bus. There are no driver changes, the public interface is the same.
2001-02-27 23:13:20 +00:00
pci_set_powerstate_method(device_t dev, device_t child, int state)
Add support for ioctl() accesses to PCI config space registers. Garrett Wollman sent me this code a few weeks ago for review, and I made some significant changes, which he in turn accepted ... In order to make use of these changes, a device entry has to added to /dev. Submitted by: wollman
1996-10-22 20:20:14 +00:00
{
Slightly reimplement some recently added helper functions as methods, so that drivers are not reaching into the internals of the pci bus. There are no driver changes, the public interface is the same.
2001-02-27 23:13:20 +00:00
struct pci_devinfo *dinfo = device_get_ivars(child);
Next round of PCI subsystem updates: - Break out the /dev/pci driver into a separate file. - Kill the COMPAT_OLDPCI support. - Make the EISA bridge attach a bit more like the old code; explicitly check for the existence of eisa0/isa0 and only attach if they don't already exist. Only make one bus_generic_attach() pass over the bridge, once both busses are attached. Note that the stupid Intel bridge's class is entirely unpredictable. - Add prototypes and re-layout the core PCI modules in line with current coding standards (not a major whitespace change, just moving the module data to the top of the file). - Remove redundant type-2 bridge support from the core PCI code; the PCI-CardBus code does this itself internally. Remove the now entirely redundant header-class-specific support, as well as the secondary and subordinate bus number fields. These are bridge attributes now. - Add support for PCI Extended Capabilities. - Add support for PCI Power Management. The interface currently allows a driver to query and set the power state of a device. - Add helper functions to allow drivers to enable/disable busmastering and the decoding of I/O and memory ranges. - Use PCI_SLOTMAX and PCI_FUNCMAX rather than magic numbers in some places. - Make the PCI-PCI bridge code a little more paranoid about valid I/O and memory decodes. - Add some more PCI register definitions for the command and status registers. Correct another bogus definition for type-1 bridges.
2000-12-13 01:25:11 +00:00
pcicfgregs *cfg = &dinfo->cfg;
u_int16_t status;
int result;
if (cfg->pp_cap != 0) {
Slightly reimplement some recently added helper functions as methods, so that drivers are not reaching into the internals of the pci bus. There are no driver changes, the public interface is the same.
2001-02-27 23:13:20 +00:00
status = PCI_READ_CONFIG(dev, child, cfg->pp_status, 2) & ~PCIM_PSTAT_DMASK;
Next round of PCI subsystem updates: - Break out the /dev/pci driver into a separate file. - Kill the COMPAT_OLDPCI support. - Make the EISA bridge attach a bit more like the old code; explicitly check for the existence of eisa0/isa0 and only attach if they don't already exist. Only make one bus_generic_attach() pass over the bridge, once both busses are attached. Note that the stupid Intel bridge's class is entirely unpredictable. - Add prototypes and re-layout the core PCI modules in line with current coding standards (not a major whitespace change, just moving the module data to the top of the file). - Remove redundant type-2 bridge support from the core PCI code; the PCI-CardBus code does this itself internally. Remove the now entirely redundant header-class-specific support, as well as the secondary and subordinate bus number fields. These are bridge attributes now. - Add support for PCI Extended Capabilities. - Add support for PCI Power Management. The interface currently allows a driver to query and set the power state of a device. - Add helper functions to allow drivers to enable/disable busmastering and the decoding of I/O and memory ranges. - Use PCI_SLOTMAX and PCI_FUNCMAX rather than magic numbers in some places. - Make the PCI-PCI bridge code a little more paranoid about valid I/O and memory decodes. - Add some more PCI register definitions for the command and status registers. Correct another bogus definition for type-1 bridges.
2000-12-13 01:25:11 +00:00
result = 0;
switch (state) {
case PCI_POWERSTATE_D0:
status |= PCIM_PSTAT_D0;
break;
case PCI_POWERSTATE_D1:
if (cfg->pp_cap & PCIM_PCAP_D1SUPP) {
status |= PCIM_PSTAT_D1;
} else {
result = EOPNOTSUPP;
On the new Meteor cards, the Philips SAA 7116 is connected to the PCI bus via an IBM PCI-PCI bridge (82351 or 82352 or 82353) The driver must identify if it is on a secondary PCI bus, which is created via the IBM PCI-PCI bridge. If it is, then it must initialise the IBM PCI-PCI bridge correctly. To do this, the following new functions are added. Because they use the pcici_t tag, they are considered 2.2 compatibility APIs pcici_t * pci_get_parent_from_tag(pcici_t tag); int pci_get_bus_from_tag(pcici_t tag); (The _from_tag suffix is used to prevent clashes with similarly named newbus PCI API functions) Submitted by: Anton Berezin <tobez@plab.ku.dk> Reviewed by: Doug Rabson <dfr@nlsystems.com> Reworked by: Me (roger)
1999-05-31 22:13:37 +00:00
}
Next round of PCI subsystem updates: - Break out the /dev/pci driver into a separate file. - Kill the COMPAT_OLDPCI support. - Make the EISA bridge attach a bit more like the old code; explicitly check for the existence of eisa0/isa0 and only attach if they don't already exist. Only make one bus_generic_attach() pass over the bridge, once both busses are attached. Note that the stupid Intel bridge's class is entirely unpredictable. - Add prototypes and re-layout the core PCI modules in line with current coding standards (not a major whitespace change, just moving the module data to the top of the file). - Remove redundant type-2 bridge support from the core PCI code; the PCI-CardBus code does this itself internally. Remove the now entirely redundant header-class-specific support, as well as the secondary and subordinate bus number fields. These are bridge attributes now. - Add support for PCI Extended Capabilities. - Add support for PCI Power Management. The interface currently allows a driver to query and set the power state of a device. - Add helper functions to allow drivers to enable/disable busmastering and the decoding of I/O and memory ranges. - Use PCI_SLOTMAX and PCI_FUNCMAX rather than magic numbers in some places. - Make the PCI-PCI bridge code a little more paranoid about valid I/O and memory decodes. - Add some more PCI register definitions for the command and status registers. Correct another bogus definition for type-1 bridges.
2000-12-13 01:25:11 +00:00
break;
case PCI_POWERSTATE_D2:
if (cfg->pp_cap & PCIM_PCAP_D2SUPP) {
status |= PCIM_PSTAT_D2;
} else {
result = EOPNOTSUPP;
On the new Meteor cards, the Philips SAA 7116 is connected to the PCI bus via an IBM PCI-PCI bridge (82351 or 82352 or 82353) The driver must identify if it is on a secondary PCI bus, which is created via the IBM PCI-PCI bridge. If it is, then it must initialise the IBM PCI-PCI bridge correctly. To do this, the following new functions are added. Because they use the pcici_t tag, they are considered 2.2 compatibility APIs pcici_t * pci_get_parent_from_tag(pcici_t tag); int pci_get_bus_from_tag(pcici_t tag); (The _from_tag suffix is used to prevent clashes with similarly named newbus PCI API functions) Submitted by: Anton Berezin <tobez@plab.ku.dk> Reviewed by: Doug Rabson <dfr@nlsystems.com> Reworked by: Me (roger)
1999-05-31 22:13:37 +00:00
}
Next round of PCI subsystem updates: - Break out the /dev/pci driver into a separate file. - Kill the COMPAT_OLDPCI support. - Make the EISA bridge attach a bit more like the old code; explicitly check for the existence of eisa0/isa0 and only attach if they don't already exist. Only make one bus_generic_attach() pass over the bridge, once both busses are attached. Note that the stupid Intel bridge's class is entirely unpredictable. - Add prototypes and re-layout the core PCI modules in line with current coding standards (not a major whitespace change, just moving the module data to the top of the file). - Remove redundant type-2 bridge support from the core PCI code; the PCI-CardBus code does this itself internally. Remove the now entirely redundant header-class-specific support, as well as the secondary and subordinate bus number fields. These are bridge attributes now. - Add support for PCI Extended Capabilities. - Add support for PCI Power Management. The interface currently allows a driver to query and set the power state of a device. - Add helper functions to allow drivers to enable/disable busmastering and the decoding of I/O and memory ranges. - Use PCI_SLOTMAX and PCI_FUNCMAX rather than magic numbers in some places. - Make the PCI-PCI bridge code a little more paranoid about valid I/O and memory decodes. - Add some more PCI register definitions for the command and status registers. Correct another bogus definition for type-1 bridges.
2000-12-13 01:25:11 +00:00
break;
case PCI_POWERSTATE_D3:
status |= PCIM_PSTAT_D3;
break;
default:
result = EINVAL;
On the new Meteor cards, the Philips SAA 7116 is connected to the PCI bus via an IBM PCI-PCI bridge (82351 or 82352 or 82353) The driver must identify if it is on a secondary PCI bus, which is created via the IBM PCI-PCI bridge. If it is, then it must initialise the IBM PCI-PCI bridge correctly. To do this, the following new functions are added. Because they use the pcici_t tag, they are considered 2.2 compatibility APIs pcici_t * pci_get_parent_from_tag(pcici_t tag); int pci_get_bus_from_tag(pcici_t tag); (The _from_tag suffix is used to prevent clashes with similarly named newbus PCI API functions) Submitted by: Anton Berezin <tobez@plab.ku.dk> Reviewed by: Doug Rabson <dfr@nlsystems.com> Reworked by: Me (roger)
1999-05-31 22:13:37 +00:00
}
Next round of PCI subsystem updates: - Break out the /dev/pci driver into a separate file. - Kill the COMPAT_OLDPCI support. - Make the EISA bridge attach a bit more like the old code; explicitly check for the existence of eisa0/isa0 and only attach if they don't already exist. Only make one bus_generic_attach() pass over the bridge, once both busses are attached. Note that the stupid Intel bridge's class is entirely unpredictable. - Add prototypes and re-layout the core PCI modules in line with current coding standards (not a major whitespace change, just moving the module data to the top of the file). - Remove redundant type-2 bridge support from the core PCI code; the PCI-CardBus code does this itself internally. Remove the now entirely redundant header-class-specific support, as well as the secondary and subordinate bus number fields. These are bridge attributes now. - Add support for PCI Extended Capabilities. - Add support for PCI Power Management. The interface currently allows a driver to query and set the power state of a device. - Add helper functions to allow drivers to enable/disable busmastering and the decoding of I/O and memory ranges. - Use PCI_SLOTMAX and PCI_FUNCMAX rather than magic numbers in some places. - Make the PCI-PCI bridge code a little more paranoid about valid I/O and memory decodes. - Add some more PCI register definitions for the command and status registers. Correct another bogus definition for type-1 bridges.
2000-12-13 01:25:11 +00:00
if (result == 0)
Slightly reimplement some recently added helper functions as methods, so that drivers are not reaching into the internals of the pci bus. There are no driver changes, the public interface is the same.
2001-02-27 23:13:20 +00:00
PCI_WRITE_CONFIG(dev, child, cfg->pp_status, status, 2);
Next round of PCI subsystem updates: - Break out the /dev/pci driver into a separate file. - Kill the COMPAT_OLDPCI support. - Make the EISA bridge attach a bit more like the old code; explicitly check for the existence of eisa0/isa0 and only attach if they don't already exist. Only make one bus_generic_attach() pass over the bridge, once both busses are attached. Note that the stupid Intel bridge's class is entirely unpredictable. - Add prototypes and re-layout the core PCI modules in line with current coding standards (not a major whitespace change, just moving the module data to the top of the file). - Remove redundant type-2 bridge support from the core PCI code; the PCI-CardBus code does this itself internally. Remove the now entirely redundant header-class-specific support, as well as the secondary and subordinate bus number fields. These are bridge attributes now. - Add support for PCI Extended Capabilities. - Add support for PCI Power Management. The interface currently allows a driver to query and set the power state of a device. - Add helper functions to allow drivers to enable/disable busmastering and the decoding of I/O and memory ranges. - Use PCI_SLOTMAX and PCI_FUNCMAX rather than magic numbers in some places. - Make the PCI-PCI bridge code a little more paranoid about valid I/O and memory decodes. - Add some more PCI register definitions for the command and status registers. Correct another bogus definition for type-1 bridges.
2000-12-13 01:25:11 +00:00
} else {
result = ENXIO;
On the new Meteor cards, the Philips SAA 7116 is connected to the PCI bus via an IBM PCI-PCI bridge (82351 or 82352 or 82353) The driver must identify if it is on a secondary PCI bus, which is created via the IBM PCI-PCI bridge. If it is, then it must initialise the IBM PCI-PCI bridge correctly. To do this, the following new functions are added. Because they use the pcici_t tag, they are considered 2.2 compatibility APIs pcici_t * pci_get_parent_from_tag(pcici_t tag); int pci_get_bus_from_tag(pcici_t tag); (The _from_tag suffix is used to prevent clashes with similarly named newbus PCI API functions) Submitted by: Anton Berezin <tobez@plab.ku.dk> Reviewed by: Doug Rabson <dfr@nlsystems.com> Reworked by: Me (roger)
1999-05-31 22:13:37 +00:00
}
Next round of PCI subsystem updates: - Break out the /dev/pci driver into a separate file. - Kill the COMPAT_OLDPCI support. - Make the EISA bridge attach a bit more like the old code; explicitly check for the existence of eisa0/isa0 and only attach if they don't already exist. Only make one bus_generic_attach() pass over the bridge, once both busses are attached. Note that the stupid Intel bridge's class is entirely unpredictable. - Add prototypes and re-layout the core PCI modules in line with current coding standards (not a major whitespace change, just moving the module data to the top of the file). - Remove redundant type-2 bridge support from the core PCI code; the PCI-CardBus code does this itself internally. Remove the now entirely redundant header-class-specific support, as well as the secondary and subordinate bus number fields. These are bridge attributes now. - Add support for PCI Extended Capabilities. - Add support for PCI Power Management. The interface currently allows a driver to query and set the power state of a device. - Add helper functions to allow drivers to enable/disable busmastering and the decoding of I/O and memory ranges. - Use PCI_SLOTMAX and PCI_FUNCMAX rather than magic numbers in some places. - Make the PCI-PCI bridge code a little more paranoid about valid I/O and memory decodes. - Add some more PCI register definitions for the command and status registers. Correct another bogus definition for type-1 bridges.
2000-12-13 01:25:11 +00:00
return(result);
On the new Meteor cards, the Philips SAA 7116 is connected to the PCI bus via an IBM PCI-PCI bridge (82351 or 82352 or 82353) The driver must identify if it is on a secondary PCI bus, which is created via the IBM PCI-PCI bridge. If it is, then it must initialise the IBM PCI-PCI bridge correctly. To do this, the following new functions are added. Because they use the pcici_t tag, they are considered 2.2 compatibility APIs pcici_t * pci_get_parent_from_tag(pcici_t tag); int pci_get_bus_from_tag(pcici_t tag); (The _from_tag suffix is used to prevent clashes with similarly named newbus PCI API functions) Submitted by: Anton Berezin <tobez@plab.ku.dk> Reviewed by: Doug Rabson <dfr@nlsystems.com> Reworked by: Me (roger)
1999-05-31 22:13:37 +00:00
}
Use the pci.c code wherever possible, rather than copying all the pci code into cardbus and s/pci/cardbus. This exposes a few pci_* functions that are now static. This work is similar to work Justin posted to the mobile list about a year or two ago, which I have neglected since then. This is a subset of his current work with the multiple inheritance newbus architecutre. When completed, that will eliminate the need for pci/pci_private.h. Similar work is needed for the cardbus_cis and pccard_cis code as well.
2002-02-27 05:09:14 +00:00
int
Slightly reimplement some recently added helper functions as methods, so that drivers are not reaching into the internals of the pci bus. There are no driver changes, the public interface is the same.
2001-02-27 23:13:20 +00:00
pci_get_powerstate_method(device_t dev, device_t child)
Add support for ioctl() accesses to PCI config space registers. Garrett Wollman sent me this code a few weeks ago for review, and I made some significant changes, which he in turn accepted ... In order to make use of these changes, a device entry has to added to /dev. Submitted by: wollman
1996-10-22 20:20:14 +00:00
{
Slightly reimplement some recently added helper functions as methods, so that drivers are not reaching into the internals of the pci bus. There are no driver changes, the public interface is the same.
2001-02-27 23:13:20 +00:00
struct pci_devinfo *dinfo = device_get_ivars(child);
Next round of PCI subsystem updates: - Break out the /dev/pci driver into a separate file. - Kill the COMPAT_OLDPCI support. - Make the EISA bridge attach a bit more like the old code; explicitly check for the existence of eisa0/isa0 and only attach if they don't already exist. Only make one bus_generic_attach() pass over the bridge, once both busses are attached. Note that the stupid Intel bridge's class is entirely unpredictable. - Add prototypes and re-layout the core PCI modules in line with current coding standards (not a major whitespace change, just moving the module data to the top of the file). - Remove redundant type-2 bridge support from the core PCI code; the PCI-CardBus code does this itself internally. Remove the now entirely redundant header-class-specific support, as well as the secondary and subordinate bus number fields. These are bridge attributes now. - Add support for PCI Extended Capabilities. - Add support for PCI Power Management. The interface currently allows a driver to query and set the power state of a device. - Add helper functions to allow drivers to enable/disable busmastering and the decoding of I/O and memory ranges. - Use PCI_SLOTMAX and PCI_FUNCMAX rather than magic numbers in some places. - Make the PCI-PCI bridge code a little more paranoid about valid I/O and memory decodes. - Add some more PCI register definitions for the command and status registers. Correct another bogus definition for type-1 bridges.
2000-12-13 01:25:11 +00:00
pcicfgregs *cfg = &dinfo->cfg;
u_int16_t status;
int result;
if (cfg->pp_cap != 0) {
Slightly reimplement some recently added helper functions as methods, so that drivers are not reaching into the internals of the pci bus. There are no driver changes, the public interface is the same.
2001-02-27 23:13:20 +00:00
status = PCI_READ_CONFIG(dev, child, cfg->pp_status, 2);
Next round of PCI subsystem updates: - Break out the /dev/pci driver into a separate file. - Kill the COMPAT_OLDPCI support. - Make the EISA bridge attach a bit more like the old code; explicitly check for the existence of eisa0/isa0 and only attach if they don't already exist. Only make one bus_generic_attach() pass over the bridge, once both busses are attached. Note that the stupid Intel bridge's class is entirely unpredictable. - Add prototypes and re-layout the core PCI modules in line with current coding standards (not a major whitespace change, just moving the module data to the top of the file). - Remove redundant type-2 bridge support from the core PCI code; the PCI-CardBus code does this itself internally. Remove the now entirely redundant header-class-specific support, as well as the secondary and subordinate bus number fields. These are bridge attributes now. - Add support for PCI Extended Capabilities. - Add support for PCI Power Management. The interface currently allows a driver to query and set the power state of a device. - Add helper functions to allow drivers to enable/disable busmastering and the decoding of I/O and memory ranges. - Use PCI_SLOTMAX and PCI_FUNCMAX rather than magic numbers in some places. - Make the PCI-PCI bridge code a little more paranoid about valid I/O and memory decodes. - Add some more PCI register definitions for the command and status registers. Correct another bogus definition for type-1 bridges.
2000-12-13 01:25:11 +00:00
switch (status & PCIM_PSTAT_DMASK) {
case PCIM_PSTAT_D0:
result = PCI_POWERSTATE_D0;
Revive PCIConf. Submitted by: "Kenneth D. Merry" <ken@plutotech.com>
1998-09-15 08:21:13 +00:00
break;
Next round of PCI subsystem updates: - Break out the /dev/pci driver into a separate file. - Kill the COMPAT_OLDPCI support. - Make the EISA bridge attach a bit more like the old code; explicitly check for the existence of eisa0/isa0 and only attach if they don't already exist. Only make one bus_generic_attach() pass over the bridge, once both busses are attached. Note that the stupid Intel bridge's class is entirely unpredictable. - Add prototypes and re-layout the core PCI modules in line with current coding standards (not a major whitespace change, just moving the module data to the top of the file). - Remove redundant type-2 bridge support from the core PCI code; the PCI-CardBus code does this itself internally. Remove the now entirely redundant header-class-specific support, as well as the secondary and subordinate bus number fields. These are bridge attributes now. - Add support for PCI Extended Capabilities. - Add support for PCI Power Management. The interface currently allows a driver to query and set the power state of a device. - Add helper functions to allow drivers to enable/disable busmastering and the decoding of I/O and memory ranges. - Use PCI_SLOTMAX and PCI_FUNCMAX rather than magic numbers in some places. - Make the PCI-PCI bridge code a little more paranoid about valid I/O and memory decodes. - Add some more PCI register definitions for the command and status registers. Correct another bogus definition for type-1 bridges.
2000-12-13 01:25:11 +00:00
case PCIM_PSTAT_D1:
result = PCI_POWERSTATE_D1;
Revive PCIConf. Submitted by: "Kenneth D. Merry" <ken@plutotech.com>
1998-09-15 08:21:13 +00:00
break;
Next round of PCI subsystem updates: - Break out the /dev/pci driver into a separate file. - Kill the COMPAT_OLDPCI support. - Make the EISA bridge attach a bit more like the old code; explicitly check for the existence of eisa0/isa0 and only attach if they don't already exist. Only make one bus_generic_attach() pass over the bridge, once both busses are attached. Note that the stupid Intel bridge's class is entirely unpredictable. - Add prototypes and re-layout the core PCI modules in line with current coding standards (not a major whitespace change, just moving the module data to the top of the file). - Remove redundant type-2 bridge support from the core PCI code; the PCI-CardBus code does this itself internally. Remove the now entirely redundant header-class-specific support, as well as the secondary and subordinate bus number fields. These are bridge attributes now. - Add support for PCI Extended Capabilities. - Add support for PCI Power Management. The interface currently allows a driver to query and set the power state of a device. - Add helper functions to allow drivers to enable/disable busmastering and the decoding of I/O and memory ranges. - Use PCI_SLOTMAX and PCI_FUNCMAX rather than magic numbers in some places. - Make the PCI-PCI bridge code a little more paranoid about valid I/O and memory decodes. - Add some more PCI register definitions for the command and status registers. Correct another bogus definition for type-1 bridges.
2000-12-13 01:25:11 +00:00
case PCIM_PSTAT_D2:
result = PCI_POWERSTATE_D2;
Revive PCIConf. Submitted by: "Kenneth D. Merry" <ken@plutotech.com>
1998-09-15 08:21:13 +00:00
break;
Next round of PCI subsystem updates: - Break out the /dev/pci driver into a separate file. - Kill the COMPAT_OLDPCI support. - Make the EISA bridge attach a bit more like the old code; explicitly check for the existence of eisa0/isa0 and only attach if they don't already exist. Only make one bus_generic_attach() pass over the bridge, once both busses are attached. Note that the stupid Intel bridge's class is entirely unpredictable. - Add prototypes and re-layout the core PCI modules in line with current coding standards (not a major whitespace change, just moving the module data to the top of the file). - Remove redundant type-2 bridge support from the core PCI code; the PCI-CardBus code does this itself internally. Remove the now entirely redundant header-class-specific support, as well as the secondary and subordinate bus number fields. These are bridge attributes now. - Add support for PCI Extended Capabilities. - Add support for PCI Power Management. The interface currently allows a driver to query and set the power state of a device. - Add helper functions to allow drivers to enable/disable busmastering and the decoding of I/O and memory ranges. - Use PCI_SLOTMAX and PCI_FUNCMAX rather than magic numbers in some places. - Make the PCI-PCI bridge code a little more paranoid about valid I/O and memory decodes. - Add some more PCI register definitions for the command and status registers. Correct another bogus definition for type-1 bridges.
2000-12-13 01:25:11 +00:00
case PCIM_PSTAT_D3:
result = PCI_POWERSTATE_D3;
Revive PCIConf. Submitted by: "Kenneth D. Merry" <ken@plutotech.com>
1998-09-15 08:21:13 +00:00
break;
Next round of PCI subsystem updates: - Break out the /dev/pci driver into a separate file. - Kill the COMPAT_OLDPCI support. - Make the EISA bridge attach a bit more like the old code; explicitly check for the existence of eisa0/isa0 and only attach if they don't already exist. Only make one bus_generic_attach() pass over the bridge, once both busses are attached. Note that the stupid Intel bridge's class is entirely unpredictable. - Add prototypes and re-layout the core PCI modules in line with current coding standards (not a major whitespace change, just moving the module data to the top of the file). - Remove redundant type-2 bridge support from the core PCI code; the PCI-CardBus code does this itself internally. Remove the now entirely redundant header-class-specific support, as well as the secondary and subordinate bus number fields. These are bridge attributes now. - Add support for PCI Extended Capabilities. - Add support for PCI Power Management. The interface currently allows a driver to query and set the power state of a device. - Add helper functions to allow drivers to enable/disable busmastering and the decoding of I/O and memory ranges. - Use PCI_SLOTMAX and PCI_FUNCMAX rather than magic numbers in some places. - Make the PCI-PCI bridge code a little more paranoid about valid I/O and memory decodes. - Add some more PCI register definitions for the command and status registers. Correct another bogus definition for type-1 bridges.
2000-12-13 01:25:11 +00:00
default:
result = PCI_POWERSTATE_UNKNOWN;
Revive PCIConf. Submitted by: "Kenneth D. Merry" <ken@plutotech.com>
1998-09-15 08:21:13 +00:00
break;
}
Next round of PCI subsystem updates: - Break out the /dev/pci driver into a separate file. - Kill the COMPAT_OLDPCI support. - Make the EISA bridge attach a bit more like the old code; explicitly check for the existence of eisa0/isa0 and only attach if they don't already exist. Only make one bus_generic_attach() pass over the bridge, once both busses are attached. Note that the stupid Intel bridge's class is entirely unpredictable. - Add prototypes and re-layout the core PCI modules in line with current coding standards (not a major whitespace change, just moving the module data to the top of the file). - Remove redundant type-2 bridge support from the core PCI code; the PCI-CardBus code does this itself internally. Remove the now entirely redundant header-class-specific support, as well as the secondary and subordinate bus number fields. These are bridge attributes now. - Add support for PCI Extended Capabilities. - Add support for PCI Power Management. The interface currently allows a driver to query and set the power state of a device. - Add helper functions to allow drivers to enable/disable busmastering and the decoding of I/O and memory ranges. - Use PCI_SLOTMAX and PCI_FUNCMAX rather than magic numbers in some places. - Make the PCI-PCI bridge code a little more paranoid about valid I/O and memory decodes. - Add some more PCI register definitions for the command and status registers. Correct another bogus definition for type-1 bridges.
2000-12-13 01:25:11 +00:00
} else {
/* No support, device is always at D0 */
result = PCI_POWERSTATE_D0;
}
return(result);
}
Revive PCIConf. Submitted by: "Kenneth D. Merry" <ken@plutotech.com>
1998-09-15 08:21:13 +00:00
Next round of PCI subsystem updates: - Break out the /dev/pci driver into a separate file. - Kill the COMPAT_OLDPCI support. - Make the EISA bridge attach a bit more like the old code; explicitly check for the existence of eisa0/isa0 and only attach if they don't already exist. Only make one bus_generic_attach() pass over the bridge, once both busses are attached. Note that the stupid Intel bridge's class is entirely unpredictable. - Add prototypes and re-layout the core PCI modules in line with current coding standards (not a major whitespace change, just moving the module data to the top of the file). - Remove redundant type-2 bridge support from the core PCI code; the PCI-CardBus code does this itself internally. Remove the now entirely redundant header-class-specific support, as well as the secondary and subordinate bus number fields. These are bridge attributes now. - Add support for PCI Extended Capabilities. - Add support for PCI Power Management. The interface currently allows a driver to query and set the power state of a device. - Add helper functions to allow drivers to enable/disable busmastering and the decoding of I/O and memory ranges. - Use PCI_SLOTMAX and PCI_FUNCMAX rather than magic numbers in some places. - Make the PCI-PCI bridge code a little more paranoid about valid I/O and memory decodes. - Add some more PCI register definitions for the command and status registers. Correct another bogus definition for type-1 bridges.
2000-12-13 01:25:11 +00:00
/*
* Some convenience functions for PCI device drivers.
*/
Revive PCIConf. Submitted by: "Kenneth D. Merry" <ken@plutotech.com>
1998-09-15 08:21:13 +00:00
Next round of PCI subsystem updates: - Break out the /dev/pci driver into a separate file. - Kill the COMPAT_OLDPCI support. - Make the EISA bridge attach a bit more like the old code; explicitly check for the existence of eisa0/isa0 and only attach if they don't already exist. Only make one bus_generic_attach() pass over the bridge, once both busses are attached. Note that the stupid Intel bridge's class is entirely unpredictable. - Add prototypes and re-layout the core PCI modules in line with current coding standards (not a major whitespace change, just moving the module data to the top of the file). - Remove redundant type-2 bridge support from the core PCI code; the PCI-CardBus code does this itself internally. Remove the now entirely redundant header-class-specific support, as well as the secondary and subordinate bus number fields. These are bridge attributes now. - Add support for PCI Extended Capabilities. - Add support for PCI Power Management. The interface currently allows a driver to query and set the power state of a device. - Add helper functions to allow drivers to enable/disable busmastering and the decoding of I/O and memory ranges. - Use PCI_SLOTMAX and PCI_FUNCMAX rather than magic numbers in some places. - Make the PCI-PCI bridge code a little more paranoid about valid I/O and memory decodes. - Add some more PCI register definitions for the command and status registers. Correct another bogus definition for type-1 bridges.
2000-12-13 01:25:11 +00:00
static __inline void
Slightly reimplement some recently added helper functions as methods, so that drivers are not reaching into the internals of the pci bus. There are no driver changes, the public interface is the same.
2001-02-27 23:13:20 +00:00
pci_set_command_bit(device_t dev, device_t child, u_int16_t bit)
Next round of PCI subsystem updates: - Break out the /dev/pci driver into a separate file. - Kill the COMPAT_OLDPCI support. - Make the EISA bridge attach a bit more like the old code; explicitly check for the existence of eisa0/isa0 and only attach if they don't already exist. Only make one bus_generic_attach() pass over the bridge, once both busses are attached. Note that the stupid Intel bridge's class is entirely unpredictable. - Add prototypes and re-layout the core PCI modules in line with current coding standards (not a major whitespace change, just moving the module data to the top of the file). - Remove redundant type-2 bridge support from the core PCI code; the PCI-CardBus code does this itself internally. Remove the now entirely redundant header-class-specific support, as well as the secondary and subordinate bus number fields. These are bridge attributes now. - Add support for PCI Extended Capabilities. - Add support for PCI Power Management. The interface currently allows a driver to query and set the power state of a device. - Add helper functions to allow drivers to enable/disable busmastering and the decoding of I/O and memory ranges. - Use PCI_SLOTMAX and PCI_FUNCMAX rather than magic numbers in some places. - Make the PCI-PCI bridge code a little more paranoid about valid I/O and memory decodes. - Add some more PCI register definitions for the command and status registers. Correct another bogus definition for type-1 bridges.
2000-12-13 01:25:11 +00:00
{
Make this file mostly conform to style(9). Approved by: msmith in principle before walkabout
2002-06-01 03:41:02 +00:00
u_int16_t command;
Revive PCIConf. Submitted by: "Kenneth D. Merry" <ken@plutotech.com>
1998-09-15 08:21:13 +00:00
Make this file mostly conform to style(9). Approved by: msmith in principle before walkabout
2002-06-01 03:41:02 +00:00
command = PCI_READ_CONFIG(dev, child, PCIR_COMMAND, 2);
command |= bit;
PCI_WRITE_CONFIG(dev, child, PCIR_COMMAND, command, 2);
Next round of PCI subsystem updates: - Break out the /dev/pci driver into a separate file. - Kill the COMPAT_OLDPCI support. - Make the EISA bridge attach a bit more like the old code; explicitly check for the existence of eisa0/isa0 and only attach if they don't already exist. Only make one bus_generic_attach() pass over the bridge, once both busses are attached. Note that the stupid Intel bridge's class is entirely unpredictable. - Add prototypes and re-layout the core PCI modules in line with current coding standards (not a major whitespace change, just moving the module data to the top of the file). - Remove redundant type-2 bridge support from the core PCI code; the PCI-CardBus code does this itself internally. Remove the now entirely redundant header-class-specific support, as well as the secondary and subordinate bus number fields. These are bridge attributes now. - Add support for PCI Extended Capabilities. - Add support for PCI Power Management. The interface currently allows a driver to query and set the power state of a device. - Add helper functions to allow drivers to enable/disable busmastering and the decoding of I/O and memory ranges. - Use PCI_SLOTMAX and PCI_FUNCMAX rather than magic numbers in some places. - Make the PCI-PCI bridge code a little more paranoid about valid I/O and memory decodes. - Add some more PCI register definitions for the command and status registers. Correct another bogus definition for type-1 bridges.
2000-12-13 01:25:11 +00:00
}
Revive PCIConf. Submitted by: "Kenneth D. Merry" <ken@plutotech.com>
1998-09-15 08:21:13 +00:00
Next round of PCI subsystem updates: - Break out the /dev/pci driver into a separate file. - Kill the COMPAT_OLDPCI support. - Make the EISA bridge attach a bit more like the old code; explicitly check for the existence of eisa0/isa0 and only attach if they don't already exist. Only make one bus_generic_attach() pass over the bridge, once both busses are attached. Note that the stupid Intel bridge's class is entirely unpredictable. - Add prototypes and re-layout the core PCI modules in line with current coding standards (not a major whitespace change, just moving the module data to the top of the file). - Remove redundant type-2 bridge support from the core PCI code; the PCI-CardBus code does this itself internally. Remove the now entirely redundant header-class-specific support, as well as the secondary and subordinate bus number fields. These are bridge attributes now. - Add support for PCI Extended Capabilities. - Add support for PCI Power Management. The interface currently allows a driver to query and set the power state of a device. - Add helper functions to allow drivers to enable/disable busmastering and the decoding of I/O and memory ranges. - Use PCI_SLOTMAX and PCI_FUNCMAX rather than magic numbers in some places. - Make the PCI-PCI bridge code a little more paranoid about valid I/O and memory decodes. - Add some more PCI register definitions for the command and status registers. Correct another bogus definition for type-1 bridges.
2000-12-13 01:25:11 +00:00
static __inline void
Slightly reimplement some recently added helper functions as methods, so that drivers are not reaching into the internals of the pci bus. There are no driver changes, the public interface is the same.
2001-02-27 23:13:20 +00:00
pci_clear_command_bit(device_t dev, device_t child, u_int16_t bit)
Next round of PCI subsystem updates: - Break out the /dev/pci driver into a separate file. - Kill the COMPAT_OLDPCI support. - Make the EISA bridge attach a bit more like the old code; explicitly check for the existence of eisa0/isa0 and only attach if they don't already exist. Only make one bus_generic_attach() pass over the bridge, once both busses are attached. Note that the stupid Intel bridge's class is entirely unpredictable. - Add prototypes and re-layout the core PCI modules in line with current coding standards (not a major whitespace change, just moving the module data to the top of the file). - Remove redundant type-2 bridge support from the core PCI code; the PCI-CardBus code does this itself internally. Remove the now entirely redundant header-class-specific support, as well as the secondary and subordinate bus number fields. These are bridge attributes now. - Add support for PCI Extended Capabilities. - Add support for PCI Power Management. The interface currently allows a driver to query and set the power state of a device. - Add helper functions to allow drivers to enable/disable busmastering and the decoding of I/O and memory ranges. - Use PCI_SLOTMAX and PCI_FUNCMAX rather than magic numbers in some places. - Make the PCI-PCI bridge code a little more paranoid about valid I/O and memory decodes. - Add some more PCI register definitions for the command and status registers. Correct another bogus definition for type-1 bridges.
2000-12-13 01:25:11 +00:00
{
Make this file mostly conform to style(9). Approved by: msmith in principle before walkabout
2002-06-01 03:41:02 +00:00
u_int16_t command;
Add support for ioctl() accesses to PCI config space registers. Garrett Wollman sent me this code a few weeks ago for review, and I made some significant changes, which he in turn accepted ... In order to make use of these changes, a device entry has to added to /dev. Submitted by: wollman
1996-10-22 20:20:14 +00:00
Make this file mostly conform to style(9). Approved by: msmith in principle before walkabout
2002-06-01 03:41:02 +00:00
command = PCI_READ_CONFIG(dev, child, PCIR_COMMAND, 2);
command &= ~bit;
PCI_WRITE_CONFIG(dev, child, PCIR_COMMAND, command, 2);
Next round of PCI subsystem updates: - Break out the /dev/pci driver into a separate file. - Kill the COMPAT_OLDPCI support. - Make the EISA bridge attach a bit more like the old code; explicitly check for the existence of eisa0/isa0 and only attach if they don't already exist. Only make one bus_generic_attach() pass over the bridge, once both busses are attached. Note that the stupid Intel bridge's class is entirely unpredictable. - Add prototypes and re-layout the core PCI modules in line with current coding standards (not a major whitespace change, just moving the module data to the top of the file). - Remove redundant type-2 bridge support from the core PCI code; the PCI-CardBus code does this itself internally. Remove the now entirely redundant header-class-specific support, as well as the secondary and subordinate bus number fields. These are bridge attributes now. - Add support for PCI Extended Capabilities. - Add support for PCI Power Management. The interface currently allows a driver to query and set the power state of a device. - Add helper functions to allow drivers to enable/disable busmastering and the decoding of I/O and memory ranges. - Use PCI_SLOTMAX and PCI_FUNCMAX rather than magic numbers in some places. - Make the PCI-PCI bridge code a little more paranoid about valid I/O and memory decodes. - Add some more PCI register definitions for the command and status registers. Correct another bogus definition for type-1 bridges.
2000-12-13 01:25:11 +00:00
}
Add PCI LKM support.
1997-01-21 23:23:40 +00:00
Return status for PCI methods '{enable,disable}_{io,busmaster}'. Reviewed by: imp
2003-04-16 03:15:08 +00:00
int
Slightly reimplement some recently added helper functions as methods, so that drivers are not reaching into the internals of the pci bus. There are no driver changes, the public interface is the same.
2001-02-27 23:13:20 +00:00
pci_enable_busmaster_method(device_t dev, device_t child)
Next round of PCI subsystem updates: - Break out the /dev/pci driver into a separate file. - Kill the COMPAT_OLDPCI support. - Make the EISA bridge attach a bit more like the old code; explicitly check for the existence of eisa0/isa0 and only attach if they don't already exist. Only make one bus_generic_attach() pass over the bridge, once both busses are attached. Note that the stupid Intel bridge's class is entirely unpredictable. - Add prototypes and re-layout the core PCI modules in line with current coding standards (not a major whitespace change, just moving the module data to the top of the file). - Remove redundant type-2 bridge support from the core PCI code; the PCI-CardBus code does this itself internally. Remove the now entirely redundant header-class-specific support, as well as the secondary and subordinate bus number fields. These are bridge attributes now. - Add support for PCI Extended Capabilities. - Add support for PCI Power Management. The interface currently allows a driver to query and set the power state of a device. - Add helper functions to allow drivers to enable/disable busmastering and the decoding of I/O and memory ranges. - Use PCI_SLOTMAX and PCI_FUNCMAX rather than magic numbers in some places. - Make the PCI-PCI bridge code a little more paranoid about valid I/O and memory decodes. - Add some more PCI register definitions for the command and status registers. Correct another bogus definition for type-1 bridges.
2000-12-13 01:25:11 +00:00
{
Make this file mostly conform to style(9). Approved by: msmith in principle before walkabout
2002-06-01 03:41:02 +00:00
pci_set_command_bit(dev, child, PCIM_CMD_BUSMASTEREN);
Return status for PCI methods '{enable,disable}_{io,busmaster}'. Reviewed by: imp
2003-04-16 03:15:08 +00:00
return (0);
Next round of PCI subsystem updates: - Break out the /dev/pci driver into a separate file. - Kill the COMPAT_OLDPCI support. - Make the EISA bridge attach a bit more like the old code; explicitly check for the existence of eisa0/isa0 and only attach if they don't already exist. Only make one bus_generic_attach() pass over the bridge, once both busses are attached. Note that the stupid Intel bridge's class is entirely unpredictable. - Add prototypes and re-layout the core PCI modules in line with current coding standards (not a major whitespace change, just moving the module data to the top of the file). - Remove redundant type-2 bridge support from the core PCI code; the PCI-CardBus code does this itself internally. Remove the now entirely redundant header-class-specific support, as well as the secondary and subordinate bus number fields. These are bridge attributes now. - Add support for PCI Extended Capabilities. - Add support for PCI Power Management. The interface currently allows a driver to query and set the power state of a device. - Add helper functions to allow drivers to enable/disable busmastering and the decoding of I/O and memory ranges. - Use PCI_SLOTMAX and PCI_FUNCMAX rather than magic numbers in some places. - Make the PCI-PCI bridge code a little more paranoid about valid I/O and memory decodes. - Add some more PCI register definitions for the command and status registers. Correct another bogus definition for type-1 bridges.
2000-12-13 01:25:11 +00:00
}
Add support for ioctl() accesses to PCI config space registers. Garrett Wollman sent me this code a few weeks ago for review, and I made some significant changes, which he in turn accepted ... In order to make use of these changes, a device entry has to added to /dev. Submitted by: wollman
1996-10-22 20:20:14 +00:00
Return status for PCI methods '{enable,disable}_{io,busmaster}'. Reviewed by: imp
2003-04-16 03:15:08 +00:00
int
Slightly reimplement some recently added helper functions as methods, so that drivers are not reaching into the internals of the pci bus. There are no driver changes, the public interface is the same.
2001-02-27 23:13:20 +00:00
pci_disable_busmaster_method(device_t dev, device_t child)
Next round of PCI subsystem updates: - Break out the /dev/pci driver into a separate file. - Kill the COMPAT_OLDPCI support. - Make the EISA bridge attach a bit more like the old code; explicitly check for the existence of eisa0/isa0 and only attach if they don't already exist. Only make one bus_generic_attach() pass over the bridge, once both busses are attached. Note that the stupid Intel bridge's class is entirely unpredictable. - Add prototypes and re-layout the core PCI modules in line with current coding standards (not a major whitespace change, just moving the module data to the top of the file). - Remove redundant type-2 bridge support from the core PCI code; the PCI-CardBus code does this itself internally. Remove the now entirely redundant header-class-specific support, as well as the secondary and subordinate bus number fields. These are bridge attributes now. - Add support for PCI Extended Capabilities. - Add support for PCI Power Management. The interface currently allows a driver to query and set the power state of a device. - Add helper functions to allow drivers to enable/disable busmastering and the decoding of I/O and memory ranges. - Use PCI_SLOTMAX and PCI_FUNCMAX rather than magic numbers in some places. - Make the PCI-PCI bridge code a little more paranoid about valid I/O and memory decodes. - Add some more PCI register definitions for the command and status registers. Correct another bogus definition for type-1 bridges.
2000-12-13 01:25:11 +00:00
{
Make this file mostly conform to style(9). Approved by: msmith in principle before walkabout
2002-06-01 03:41:02 +00:00
pci_clear_command_bit(dev, child, PCIM_CMD_BUSMASTEREN);
Return status for PCI methods '{enable,disable}_{io,busmaster}'. Reviewed by: imp
2003-04-16 03:15:08 +00:00
return (0);
Add support for ioctl() accesses to PCI config space registers. Garrett Wollman sent me this code a few weeks ago for review, and I made some significant changes, which he in turn accepted ... In order to make use of these changes, a device entry has to added to /dev. Submitted by: wollman
1996-10-22 20:20:14 +00:00
}
Return status for PCI methods '{enable,disable}_{io,busmaster}'. Reviewed by: imp
2003-04-16 03:15:08 +00:00
int
Slightly reimplement some recently added helper functions as methods, so that drivers are not reaching into the internals of the pci bus. There are no driver changes, the public interface is the same.
2001-02-27 23:13:20 +00:00
pci_enable_io_method(device_t dev, device_t child, int space)
Next round of PCI subsystem updates: - Break out the /dev/pci driver into a separate file. - Kill the COMPAT_OLDPCI support. - Make the EISA bridge attach a bit more like the old code; explicitly check for the existence of eisa0/isa0 and only attach if they don't already exist. Only make one bus_generic_attach() pass over the bridge, once both busses are attached. Note that the stupid Intel bridge's class is entirely unpredictable. - Add prototypes and re-layout the core PCI modules in line with current coding standards (not a major whitespace change, just moving the module data to the top of the file). - Remove redundant type-2 bridge support from the core PCI code; the PCI-CardBus code does this itself internally. Remove the now entirely redundant header-class-specific support, as well as the secondary and subordinate bus number fields. These are bridge attributes now. - Add support for PCI Extended Capabilities. - Add support for PCI Power Management. The interface currently allows a driver to query and set the power state of a device. - Add helper functions to allow drivers to enable/disable busmastering and the decoding of I/O and memory ranges. - Use PCI_SLOTMAX and PCI_FUNCMAX rather than magic numbers in some places. - Make the PCI-PCI bridge code a little more paranoid about valid I/O and memory decodes. - Add some more PCI register definitions for the command and status registers. Correct another bogus definition for type-1 bridges.
2000-12-13 01:25:11 +00:00
{
Return status for PCI methods '{enable,disable}_{io,busmaster}'. Reviewed by: imp
2003-04-16 03:15:08 +00:00
u_int16_t command;
u_int16_t bit;
char *error;
bit = 0;
error = NULL;
Make this file mostly conform to style(9). Approved by: msmith in principle before walkabout
2002-06-01 03:41:02 +00:00
switch(space) {
case SYS_RES_IOPORT:
Return status for PCI methods '{enable,disable}_{io,busmaster}'. Reviewed by: imp
2003-04-16 03:15:08 +00:00
bit = PCIM_CMD_PORTEN;
error = "port";
Make this file mostly conform to style(9). Approved by: msmith in principle before walkabout
2002-06-01 03:41:02 +00:00
break;
case SYS_RES_MEMORY:
Return status for PCI methods '{enable,disable}_{io,busmaster}'. Reviewed by: imp
2003-04-16 03:15:08 +00:00
bit = PCIM_CMD_MEMEN;
error = "memory";
break;
default:
return (EINVAL);
Make this file mostly conform to style(9). Approved by: msmith in principle before walkabout
2002-06-01 03:41:02 +00:00
break;
}
Return status for PCI methods '{enable,disable}_{io,busmaster}'. Reviewed by: imp
2003-04-16 03:15:08 +00:00
pci_set_command_bit(dev, child, bit);
command = PCI_READ_CONFIG(dev, child, PCIR_COMMAND, 2);
if (command & bit)
return (0);
device_printf(child, "failed to enable %s mapping!\n", error);
return (ENXIO);
Next round of PCI subsystem updates: - Break out the /dev/pci driver into a separate file. - Kill the COMPAT_OLDPCI support. - Make the EISA bridge attach a bit more like the old code; explicitly check for the existence of eisa0/isa0 and only attach if they don't already exist. Only make one bus_generic_attach() pass over the bridge, once both busses are attached. Note that the stupid Intel bridge's class is entirely unpredictable. - Add prototypes and re-layout the core PCI modules in line with current coding standards (not a major whitespace change, just moving the module data to the top of the file). - Remove redundant type-2 bridge support from the core PCI code; the PCI-CardBus code does this itself internally. Remove the now entirely redundant header-class-specific support, as well as the secondary and subordinate bus number fields. These are bridge attributes now. - Add support for PCI Extended Capabilities. - Add support for PCI Power Management. The interface currently allows a driver to query and set the power state of a device. - Add helper functions to allow drivers to enable/disable busmastering and the decoding of I/O and memory ranges. - Use PCI_SLOTMAX and PCI_FUNCMAX rather than magic numbers in some places. - Make the PCI-PCI bridge code a little more paranoid about valid I/O and memory decodes. - Add some more PCI register definitions for the command and status registers. Correct another bogus definition for type-1 bridges.
2000-12-13 01:25:11 +00:00
}
Add support for ioctl() accesses to PCI config space registers. Garrett Wollman sent me this code a few weeks ago for review, and I made some significant changes, which he in turn accepted ... In order to make use of these changes, a device entry has to added to /dev. Submitted by: wollman
1996-10-22 20:20:14 +00:00
Return status for PCI methods '{enable,disable}_{io,busmaster}'. Reviewed by: imp
2003-04-16 03:15:08 +00:00
int
Slightly reimplement some recently added helper functions as methods, so that drivers are not reaching into the internals of the pci bus. There are no driver changes, the public interface is the same.
2001-02-27 23:13:20 +00:00
pci_disable_io_method(device_t dev, device_t child, int space)
Next round of PCI subsystem updates: - Break out the /dev/pci driver into a separate file. - Kill the COMPAT_OLDPCI support. - Make the EISA bridge attach a bit more like the old code; explicitly check for the existence of eisa0/isa0 and only attach if they don't already exist. Only make one bus_generic_attach() pass over the bridge, once both busses are attached. Note that the stupid Intel bridge's class is entirely unpredictable. - Add prototypes and re-layout the core PCI modules in line with current coding standards (not a major whitespace change, just moving the module data to the top of the file). - Remove redundant type-2 bridge support from the core PCI code; the PCI-CardBus code does this itself internally. Remove the now entirely redundant header-class-specific support, as well as the secondary and subordinate bus number fields. These are bridge attributes now. - Add support for PCI Extended Capabilities. - Add support for PCI Power Management. The interface currently allows a driver to query and set the power state of a device. - Add helper functions to allow drivers to enable/disable busmastering and the decoding of I/O and memory ranges. - Use PCI_SLOTMAX and PCI_FUNCMAX rather than magic numbers in some places. - Make the PCI-PCI bridge code a little more paranoid about valid I/O and memory decodes. - Add some more PCI register definitions for the command and status registers. Correct another bogus definition for type-1 bridges.
2000-12-13 01:25:11 +00:00
{
Return status for PCI methods '{enable,disable}_{io,busmaster}'. Reviewed by: imp
2003-04-16 03:15:08 +00:00
u_int16_t command;
u_int16_t bit;
char *error;
bit = 0;
error = NULL;
Make this file mostly conform to style(9). Approved by: msmith in principle before walkabout
2002-06-01 03:41:02 +00:00
switch(space) {
case SYS_RES_IOPORT:
Return status for PCI methods '{enable,disable}_{io,busmaster}'. Reviewed by: imp
2003-04-16 03:15:08 +00:00
bit = PCIM_CMD_PORTEN;
error = "port";
Make this file mostly conform to style(9). Approved by: msmith in principle before walkabout
2002-06-01 03:41:02 +00:00
break;
case SYS_RES_MEMORY:
Return status for PCI methods '{enable,disable}_{io,busmaster}'. Reviewed by: imp
2003-04-16 03:15:08 +00:00
bit = PCIM_CMD_MEMEN;
error = "memory";
break;
default:
return (EINVAL);
Make this file mostly conform to style(9). Approved by: msmith in principle before walkabout
2002-06-01 03:41:02 +00:00
break;
}
Return status for PCI methods '{enable,disable}_{io,busmaster}'. Reviewed by: imp
2003-04-16 03:15:08 +00:00
pci_clear_command_bit(dev, child, bit);
command = PCI_READ_CONFIG(dev, child, PCIR_COMMAND, 2);
if (command & bit) {
device_printf(child, "failed to disable %s mapping!\n", error);
return (ENXIO);
}
return (0);
Next round of PCI subsystem updates: - Break out the /dev/pci driver into a separate file. - Kill the COMPAT_OLDPCI support. - Make the EISA bridge attach a bit more like the old code; explicitly check for the existence of eisa0/isa0 and only attach if they don't already exist. Only make one bus_generic_attach() pass over the bridge, once both busses are attached. Note that the stupid Intel bridge's class is entirely unpredictable. - Add prototypes and re-layout the core PCI modules in line with current coding standards (not a major whitespace change, just moving the module data to the top of the file). - Remove redundant type-2 bridge support from the core PCI code; the PCI-CardBus code does this itself internally. Remove the now entirely redundant header-class-specific support, as well as the secondary and subordinate bus number fields. These are bridge attributes now. - Add support for PCI Extended Capabilities. - Add support for PCI Power Management. The interface currently allows a driver to query and set the power state of a device. - Add helper functions to allow drivers to enable/disable busmastering and the decoding of I/O and memory ranges. - Use PCI_SLOTMAX and PCI_FUNCMAX rather than magic numbers in some places. - Make the PCI-PCI bridge code a little more paranoid about valid I/O and memory decodes. - Add some more PCI register definitions for the command and status registers. Correct another bogus definition for type-1 bridges.
2000-12-13 01:25:11 +00:00
}
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
/*
* New style pci driver. Parent device is either a pci-host-bridge or a
* pci-pci-bridge. Both kinds are represented by instances of pcib.
*/
Use the pci.c code wherever possible, rather than copying all the pci code into cardbus and s/pci/cardbus. This exposes a few pci_* functions that are now static. This work is similar to work Justin posted to the mobile list about a year or two ago, which I have neglected since then. This is a subset of his current work with the multiple inheritance newbus architecutre. When completed, that will eliminate the need for pci/pci_private.h. Similar work is needed for the cardbus_cis and pccard_cis code as well.
2002-02-27 05:09:14 +00:00
void
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
pci_print_verbose(struct pci_devinfo *dinfo)
{
if (bootverbose) {
pcicfgregs *cfg = &dinfo->cfg;
printf("found->\tvendor=0x%04x, dev=0x%04x, revid=0x%02x\n",
Make this file mostly conform to style(9). Approved by: msmith in principle before walkabout
2002-06-01 03:41:02 +00:00
cfg->vendor, cfg->device, cfg->revid);
When dumping the 'found devices' list in verbose mode, actually show the bus/slot/function numbers. The old PCI code used other markers or something, but without it here under the new pci code it is very hard to tell which device is which (this only affects bootverbose mode).
2000-09-05 00:32:19 +00:00
printf("\tbus=%d, slot=%d, func=%d\n",
Make this file mostly conform to style(9). Approved by: msmith in principle before walkabout
2002-06-01 03:41:02 +00:00
cfg->bus, cfg->slot, cfg->func);
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
printf("\tclass=%02x-%02x-%02x, hdrtype=0x%02x, mfdev=%d\n",
Make this file mostly conform to style(9). Approved by: msmith in principle before walkabout
2002-06-01 03:41:02 +00:00
cfg->baseclass, cfg->subclass, cfg->progif, cfg->hdrtype,
cfg->mfdev);
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
printf("\tcmdreg=0x%04x, statreg=0x%04x, cachelnsz=%d (dwords)\n",
Make this file mostly conform to style(9). Approved by: msmith in principle before walkabout
2002-06-01 03:41:02 +00:00
cfg->cmdreg, cfg->statreg, cfg->cachelnsz);
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
printf("\tlattimer=0x%02x (%d ns), mingnt=0x%02x (%d ns), maxlat=0x%02x (%d ns)\n",
Make this file mostly conform to style(9). Approved by: msmith in principle before walkabout
2002-06-01 03:41:02 +00:00
cfg->lattimer, cfg->lattimer * 30, cfg->mingnt,
cfg->mingnt * 250, cfg->maxlat, cfg->maxlat * 250);
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
if (cfg->intpin > 0)
Make this file mostly conform to style(9). Approved by: msmith in principle before walkabout
2002-06-01 03:41:02 +00:00
printf("\tintpin=%c, irq=%d\n",
cfg->intpin +'a' -1, cfg->intline);
Next round of PCI subsystem updates: - Break out the /dev/pci driver into a separate file. - Kill the COMPAT_OLDPCI support. - Make the EISA bridge attach a bit more like the old code; explicitly check for the existence of eisa0/isa0 and only attach if they don't already exist. Only make one bus_generic_attach() pass over the bridge, once both busses are attached. Note that the stupid Intel bridge's class is entirely unpredictable. - Add prototypes and re-layout the core PCI modules in line with current coding standards (not a major whitespace change, just moving the module data to the top of the file). - Remove redundant type-2 bridge support from the core PCI code; the PCI-CardBus code does this itself internally. Remove the now entirely redundant header-class-specific support, as well as the secondary and subordinate bus number fields. These are bridge attributes now. - Add support for PCI Extended Capabilities. - Add support for PCI Power Management. The interface currently allows a driver to query and set the power state of a device. - Add helper functions to allow drivers to enable/disable busmastering and the decoding of I/O and memory ranges. - Use PCI_SLOTMAX and PCI_FUNCMAX rather than magic numbers in some places. - Make the PCI-PCI bridge code a little more paranoid about valid I/O and memory decodes. - Add some more PCI register definitions for the command and status registers. Correct another bogus definition for type-1 bridges.
2000-12-13 01:25:11 +00:00
if (cfg->pp_cap) {
u_int16_t status;
status = pci_read_config(cfg->dev, cfg->pp_status, 2);
printf("\tpowerspec %d supports D0%s%s D3 current D%d\n",
Make this file mostly conform to style(9). Approved by: msmith in principle before walkabout
2002-06-01 03:41:02 +00:00
cfg->pp_cap & PCIM_PCAP_SPEC,
cfg->pp_cap & PCIM_PCAP_D1SUPP ? " D1" : "",
cfg->pp_cap & PCIM_PCAP_D2SUPP ? " D2" : "",
status & PCIM_PSTAT_DMASK);
Next round of PCI subsystem updates: - Break out the /dev/pci driver into a separate file. - Kill the COMPAT_OLDPCI support. - Make the EISA bridge attach a bit more like the old code; explicitly check for the existence of eisa0/isa0 and only attach if they don't already exist. Only make one bus_generic_attach() pass over the bridge, once both busses are attached. Note that the stupid Intel bridge's class is entirely unpredictable. - Add prototypes and re-layout the core PCI modules in line with current coding standards (not a major whitespace change, just moving the module data to the top of the file). - Remove redundant type-2 bridge support from the core PCI code; the PCI-CardBus code does this itself internally. Remove the now entirely redundant header-class-specific support, as well as the secondary and subordinate bus number fields. These are bridge attributes now. - Add support for PCI Extended Capabilities. - Add support for PCI Power Management. The interface currently allows a driver to query and set the power state of a device. - Add helper functions to allow drivers to enable/disable busmastering and the decoding of I/O and memory ranges. - Use PCI_SLOTMAX and PCI_FUNCMAX rather than magic numbers in some places. - Make the PCI-PCI bridge code a little more paranoid about valid I/O and memory decodes. - Add some more PCI register definitions for the command and status registers. Correct another bogus definition for type-1 bridges.
2000-12-13 01:25:11 +00:00
}
* Implement bus_set/get/delete_resource for pci. * Change the hack used on the alpha for mapping devices into DENSE or BWX memory spaces to a simpler one. Its still a hack and should be a seperate api to explicitly map the resource. * Add $FreeBSD$ as necessary.
1999-10-14 21:38:33 +00:00
}
}
static int
* Completely rewrite the alpha busspace to hide the implementation from the drivers. * Remove legacy inx/outx support from chipset and replace with macros which call busspace. * Rework pci config accesses to route through the pcib device instead of calling a MD function directly. With these changes it is possible to cleanly support machines which have more than one independantly numbered PCI busses. As a bonus, the new busspace implementation should be measurably faster than the old one.
2000-08-28 21:48:13 +00:00
pci_porten(device_t pcib, int b, int s, int f)
* Implement bus_set/get/delete_resource for pci. * Change the hack used on the alpha for mapping devices into DENSE or BWX memory spaces to a simpler one. Its still a hack and should be a seperate api to explicitly map the resource. * Add $FreeBSD$ as necessary.
1999-10-14 21:38:33 +00:00
{
* Completely rewrite the alpha busspace to hide the implementation from the drivers. * Remove legacy inx/outx support from chipset and replace with macros which call busspace. * Rework pci config accesses to route through the pcib device instead of calling a MD function directly. With these changes it is possible to cleanly support machines which have more than one independantly numbered PCI busses. As a bonus, the new busspace implementation should be measurably faster than the old one.
2000-08-28 21:48:13 +00:00
return (PCIB_READ_CONFIG(pcib, b, s, f, PCIR_COMMAND, 2)
& PCIM_CMD_PORTEN) != 0;
* Implement bus_set/get/delete_resource for pci. * Change the hack used on the alpha for mapping devices into DENSE or BWX memory spaces to a simpler one. Its still a hack and should be a seperate api to explicitly map the resource. * Add $FreeBSD$ as necessary.
1999-10-14 21:38:33 +00:00
}
static int
* Completely rewrite the alpha busspace to hide the implementation from the drivers. * Remove legacy inx/outx support from chipset and replace with macros which call busspace. * Rework pci config accesses to route through the pcib device instead of calling a MD function directly. With these changes it is possible to cleanly support machines which have more than one independantly numbered PCI busses. As a bonus, the new busspace implementation should be measurably faster than the old one.
2000-08-28 21:48:13 +00:00
pci_memen(device_t pcib, int b, int s, int f)
* Implement bus_set/get/delete_resource for pci. * Change the hack used on the alpha for mapping devices into DENSE or BWX memory spaces to a simpler one. Its still a hack and should be a seperate api to explicitly map the resource. * Add $FreeBSD$ as necessary.
1999-10-14 21:38:33 +00:00
{
* Completely rewrite the alpha busspace to hide the implementation from the drivers. * Remove legacy inx/outx support from chipset and replace with macros which call busspace. * Rework pci config accesses to route through the pcib device instead of calling a MD function directly. With these changes it is possible to cleanly support machines which have more than one independantly numbered PCI busses. As a bonus, the new busspace implementation should be measurably faster than the old one.
2000-08-28 21:48:13 +00:00
return (PCIB_READ_CONFIG(pcib, b, s, f, PCIR_COMMAND, 2)
& PCIM_CMD_MEMEN) != 0;
* Implement bus_set/get/delete_resource for pci. * Change the hack used on the alpha for mapping devices into DENSE or BWX memory spaces to a simpler one. Its still a hack and should be a seperate api to explicitly map the resource. * Add $FreeBSD$ as necessary.
1999-10-14 21:38:33 +00:00
}
Fix some resource allocation peculiarities of the intpm device.
1999-10-28 08:06:59 +00:00
/*
* Add a resource based on a pci map register. Return 1 if the map
* register is a 32bit map register or 2 if it is a 64bit register.
*/
static int
* Completely rewrite the alpha busspace to hide the implementation from the drivers. * Remove legacy inx/outx support from chipset and replace with macros which call busspace. * Rework pci config accesses to route through the pcib device instead of calling a MD function directly. With these changes it is possible to cleanly support machines which have more than one independantly numbered PCI busses. As a bonus, the new busspace implementation should be measurably faster than the old one.
2000-08-28 21:48:13 +00:00
pci_add_map(device_t pcib, int b, int s, int f, int reg,
struct resource_list *rl)
* Implement bus_set/get/delete_resource for pci. * Change the hack used on the alpha for mapping devices into DENSE or BWX memory spaces to a simpler one. Its still a hack and should be a seperate api to explicitly map the resource. * Add $FreeBSD$ as necessary.
1999-10-14 21:38:33 +00:00
{
Fix some resource allocation peculiarities of the intpm device.
1999-10-28 08:06:59 +00:00
u_int32_t map;
u_int64_t base;
u_int8_t ln2size;
u_int8_t ln2range;
u_int32_t testval;
If a base address register has been set up by the BIOS, but the relevant enable bit hasn't been set in the command register, set the bit and honour the register. It seems that quite a few lazy BIOS writers aren't bothering to do this, which upsets the existing code and causes us to miss out on properly-configured devices.
2000-09-01 23:09:02 +00:00
u_int16_t cmd;
Fix some resource allocation peculiarities of the intpm device.
1999-10-28 08:06:59 +00:00
int type;
* Completely rewrite the alpha busspace to hide the implementation from the drivers. * Remove legacy inx/outx support from chipset and replace with macros which call busspace. * Rework pci config accesses to route through the pcib device instead of calling a MD function directly. With these changes it is possible to cleanly support machines which have more than one independantly numbered PCI busses. As a bonus, the new busspace implementation should be measurably faster than the old one.
2000-08-28 21:48:13 +00:00
map = PCIB_READ_CONFIG(pcib, b, s, f, reg, 4);
Fix some resource allocation peculiarities of the intpm device.
1999-10-28 08:06:59 +00:00
if (map == 0 || map == 0xffffffff)
More style(9) nits
2002-06-01 05:44:45 +00:00
return (1); /* skip invalid entry */
Fix some resource allocation peculiarities of the intpm device.
1999-10-28 08:06:59 +00:00
* Completely rewrite the alpha busspace to hide the implementation from the drivers. * Remove legacy inx/outx support from chipset and replace with macros which call busspace. * Rework pci config accesses to route through the pcib device instead of calling a MD function directly. With these changes it is possible to cleanly support machines which have more than one independantly numbered PCI busses. As a bonus, the new busspace implementation should be measurably faster than the old one.
2000-08-28 21:48:13 +00:00
PCIB_WRITE_CONFIG(pcib, b, s, f, reg, 0xffffffff, 4);
testval = PCIB_READ_CONFIG(pcib, b, s, f, reg, 4);
PCIB_WRITE_CONFIG(pcib, b, s, f, reg, map, 4);
Fix some resource allocation peculiarities of the intpm device.
1999-10-28 08:06:59 +00:00
base = pci_mapbase(map);
if (pci_maptype(map) & PCI_MAPMEM)
type = SYS_RES_MEMORY;
else
type = SYS_RES_IOPORT;
ln2size = pci_mapsize(testval);
ln2range = pci_maprange(testval);
if (ln2range == 64) {
/* Read the other half of a 64bit map register */
* Completely rewrite the alpha busspace to hide the implementation from the drivers. * Remove legacy inx/outx support from chipset and replace with macros which call busspace. * Rework pci config accesses to route through the pcib device instead of calling a MD function directly. With these changes it is possible to cleanly support machines which have more than one independantly numbered PCI busses. As a bonus, the new busspace implementation should be measurably faster than the old one.
2000-08-28 21:48:13 +00:00
base |= (u_int64_t) PCIB_READ_CONFIG(pcib, b, s, f, reg + 4, 4) << 32;
Fix some resource allocation peculiarities of the intpm device.
1999-10-28 08:06:59 +00:00
}
* Implement bus_set/get/delete_resource for pci. * Change the hack used on the alpha for mapping devices into DENSE or BWX memory spaces to a simpler one. Its still a hack and should be a seperate api to explicitly map the resource. * Add $FreeBSD$ as necessary.
1999-10-14 21:38:33 +00:00
Print the PCI resources even if they are disabled. This shows more clearly when the BIOS is forgetful about initialising the USB controllers.
2000-03-18 19:18:36 +00:00
if (bootverbose) {
printf("\tmap[%02x]: type %x, range %2d, base %08x, size %2d",
Make this file mostly conform to style(9). Approved by: msmith in principle before walkabout
2002-06-01 03:41:02 +00:00
reg, pci_maptype(map), ln2range,
(unsigned int) base, ln2size);
* Completely rewrite the alpha busspace to hide the implementation from the drivers. * Remove legacy inx/outx support from chipset and replace with macros which call busspace. * Rework pci config accesses to route through the pcib device instead of calling a MD function directly. With these changes it is possible to cleanly support machines which have more than one independantly numbered PCI busses. As a bonus, the new busspace implementation should be measurably faster than the old one.
2000-08-28 21:48:13 +00:00
if (type == SYS_RES_IOPORT && !pci_porten(pcib, b, s, f))
Print the PCI resources even if they are disabled. This shows more clearly when the BIOS is forgetful about initialising the USB controllers.
2000-03-18 19:18:36 +00:00
printf(", port disabled\n");
* Completely rewrite the alpha busspace to hide the implementation from the drivers. * Remove legacy inx/outx support from chipset and replace with macros which call busspace. * Rework pci config accesses to route through the pcib device instead of calling a MD function directly. With these changes it is possible to cleanly support machines which have more than one independantly numbered PCI busses. As a bonus, the new busspace implementation should be measurably faster than the old one.
2000-08-28 21:48:13 +00:00
else if (type == SYS_RES_MEMORY && !pci_memen(pcib, b, s, f))
Print the PCI resources even if they are disabled. This shows more clearly when the BIOS is forgetful about initialising the USB controllers.
2000-03-18 19:18:36 +00:00
printf(", memory disabled\n");
else
printf(", enabled\n");
}
Unconditionally turning on the I/O and memory enable bits in the PCI command register is too aggressive. Revert to the previous behaviour, but leave the new behaviour available as an undocumented option. It's not clear what the Right, Right Thing is to do here, but the more conservative approach is safer.
2000-10-28 23:07:13 +00:00
/*
* This code theoretically does the right thing, but has
* undesirable side effects in some cases where
* peripherals respond oddly to having these bits
* enabled. Leave them alone by default.
*/
Make PCI_ENABLE_IO_MODES a sysctl hw.pci.enable_io_modes. It can also be set at boot time. It defaults to 1 now since it can be set in the boot loader. If this proves unwise, we can reset it to defaulting to 0.
2002-07-26 07:58:16 +00:00
if (pci_enable_io_modes) {
/* Turn on resources that have been left off by a lazy BIOS */
if (type == SYS_RES_IOPORT && !pci_porten(pcib, b, s, f)) {
cmd = PCIB_READ_CONFIG(pcib, b, s, f, PCIR_COMMAND, 2);
cmd |= PCIM_CMD_PORTEN;
PCIB_WRITE_CONFIG(pcib, b, s, f, PCIR_COMMAND, cmd, 2);
}
if (type == SYS_RES_MEMORY && !pci_memen(pcib, b, s, f)) {
cmd = PCIB_READ_CONFIG(pcib, b, s, f, PCIR_COMMAND, 2);
cmd |= PCIM_CMD_MEMEN;
PCIB_WRITE_CONFIG(pcib, b, s, f, PCIR_COMMAND, cmd, 2);
}
} else {
if (type == SYS_RES_IOPORT && !pci_porten(pcib, b, s, f))
return (1);
if (type == SYS_RES_MEMORY && !pci_memen(pcib, b, s, f))
return (1);
If a base address register has been set up by the BIOS, but the relevant enable bit hasn't been set in the command register, set the bit and honour the register. It seems that quite a few lazy BIOS writers aren't bothering to do this, which upsets the existing code and causes us to miss out on properly-configured devices.
2000-09-01 23:09:02 +00:00
}
Make this file mostly conform to style(9). Approved by: msmith in principle before walkabout
2002-06-01 03:41:02 +00:00
resource_list_add(rl, type, reg, base, base + (1 << ln2size) - 1,
(1 << ln2size));
* Implement bus_set/get/delete_resource for pci. * Change the hack used on the alpha for mapping devices into DENSE or BWX memory spaces to a simpler one. Its still a hack and should be a seperate api to explicitly map the resource. * Add $FreeBSD$ as necessary.
1999-10-14 21:38:33 +00:00
More style(9) nits
2002-06-01 05:44:45 +00:00
return ((ln2range == 64) ? 2 : 1);
Fix some resource allocation peculiarities of the intpm device.
1999-10-28 08:06:59 +00:00
}
static void
Various changes to make it easier to subclass the PCI bus device. - Make the pci devclass a global variable. - Add child devices in pci_attach() instead of pci_probe(). Change pci_probe() to just check for a valid bus number from the associated bridge and return -1000 if successful. This allows subclasses of the PCI bus driver to override the generic driver. - Move the code to load the vendor data into its own public function. Really though, doing this at attach is just plain wrong. This should really be done in the module load routine instead. As a side effect, the 'busno' variable in pci_attach() is now no longer static (minor bug that was harmless so far.) - Change pci_add_children() to take an extra argument that is the size of the device info structure passed to pci_read_device() and make it public so subclasses of the PCI bus can call it in their attach routines. - Move the bits to attach a probed PCI child to a PCI bus into a global pci_add_child() function. This will allow subclasses that can detect a PCI device not found in the normal PCI probe to add those devices in their own attach routine. (I have seen this in the ACPI tree on my laptop for example.) As a side effect, change the static function pci_add_resources() to get the busno, slot, and func from the passed in dinfo structure instead of requiring them as function arguments. Tested on: i386, alpha, ia64, sparc64
2002-08-26 15:23:52 +00:00
pci_add_resources(device_t pcib, device_t dev)
Fix some resource allocation peculiarities of the intpm device.
1999-10-28 08:06:59 +00:00
{
struct pci_devinfo *dinfo = device_get_ivars(dev);
* Completely rewrite the alpha busspace to hide the implementation from the drivers. * Remove legacy inx/outx support from chipset and replace with macros which call busspace. * Rework pci config accesses to route through the pcib device instead of calling a MD function directly. With these changes it is possible to cleanly support machines which have more than one independantly numbered PCI busses. As a bonus, the new busspace implementation should be measurably faster than the old one.
2000-08-28 21:48:13 +00:00
pcicfgregs *cfg = &dinfo->cfg;
Fix some resource allocation peculiarities of the intpm device.
1999-10-28 08:06:59 +00:00
struct resource_list *rl = &dinfo->resources;
struct pci_quirk *q;
Various changes to make it easier to subclass the PCI bus device. - Make the pci devclass a global variable. - Add child devices in pci_attach() instead of pci_probe(). Change pci_probe() to just check for a valid bus number from the associated bridge and return -1000 if successful. This allows subclasses of the PCI bus driver to override the generic driver. - Move the code to load the vendor data into its own public function. Really though, doing this at attach is just plain wrong. This should really be done in the module load routine instead. As a side effect, the 'busno' variable in pci_attach() is now no longer static (minor bug that was harmless so far.) - Change pci_add_children() to take an extra argument that is the size of the device info structure passed to pci_read_device() and make it public so subclasses of the PCI bus can call it in their attach routines. - Move the bits to attach a probed PCI child to a PCI bus into a global pci_add_child() function. This will allow subclasses that can detect a PCI device not found in the normal PCI probe to add those devices in their own attach routine. (I have seen this in the ACPI tree on my laptop for example.) As a side effect, change the static function pci_add_resources() to get the busno, slot, and func from the passed in dinfo structure instead of requiring them as function arguments. Tested on: i386, alpha, ia64, sparc64
2002-08-26 15:23:52 +00:00
int b, i, f, s;
Fix some resource allocation peculiarities of the intpm device.
1999-10-28 08:06:59 +00:00
Various changes to make it easier to subclass the PCI bus device. - Make the pci devclass a global variable. - Add child devices in pci_attach() instead of pci_probe(). Change pci_probe() to just check for a valid bus number from the associated bridge and return -1000 if successful. This allows subclasses of the PCI bus driver to override the generic driver. - Move the code to load the vendor data into its own public function. Really though, doing this at attach is just plain wrong. This should really be done in the module load routine instead. As a side effect, the 'busno' variable in pci_attach() is now no longer static (minor bug that was harmless so far.) - Change pci_add_children() to take an extra argument that is the size of the device info structure passed to pci_read_device() and make it public so subclasses of the PCI bus can call it in their attach routines. - Move the bits to attach a probed PCI child to a PCI bus into a global pci_add_child() function. This will allow subclasses that can detect a PCI device not found in the normal PCI probe to add those devices in their own attach routine. (I have seen this in the ACPI tree on my laptop for example.) As a side effect, change the static function pci_add_resources() to get the busno, slot, and func from the passed in dinfo structure instead of requiring them as function arguments. Tested on: i386, alpha, ia64, sparc64
2002-08-26 15:23:52 +00:00
b = cfg->bus;
s = cfg->slot;
f = cfg->func;
Fix some resource allocation peculiarities of the intpm device.
1999-10-28 08:06:59 +00:00
for (i = 0; i < cfg->nummaps;) {
* Completely rewrite the alpha busspace to hide the implementation from the drivers. * Remove legacy inx/outx support from chipset and replace with macros which call busspace. * Rework pci config accesses to route through the pcib device instead of calling a MD function directly. With these changes it is possible to cleanly support machines which have more than one independantly numbered PCI busses. As a bonus, the new busspace implementation should be measurably faster than the old one.
2000-08-28 21:48:13 +00:00
i += pci_add_map(pcib, b, s, f, PCIR_MAPS + i*4, rl);
Fix some resource allocation peculiarities of the intpm device.
1999-10-28 08:06:59 +00:00
}
for (q = &pci_quirks[0]; q->devid; q++) {
if (q->devid == ((cfg->device << 16) | cfg->vendor)
&& q->type == PCI_QUIRK_MAP_REG)
* Completely rewrite the alpha busspace to hide the implementation from the drivers. * Remove legacy inx/outx support from chipset and replace with macros which call busspace. * Rework pci config accesses to route through the pcib device instead of calling a MD function directly. With these changes it is possible to cleanly support machines which have more than one independantly numbered PCI busses. As a bonus, the new busspace implementation should be measurably faster than the old one.
2000-08-28 21:48:13 +00:00
pci_add_map(pcib, b, s, f, q->arg1, rl);
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
}
Fix some resource allocation peculiarities of the intpm device.
1999-10-28 08:06:59 +00:00
Use PCI_INTERRUPT_VALI in stead of hard coded 255
2002-06-01 05:48:58 +00:00
if (cfg->intpin > 0 && PCI_INTERRUPT_VALID(cfg->intline)) {
Re-route interrupts on ia64 so that we can get the I/O SAPIC interrupt numbers (the BIOS leaves legacy PIC interrupt numbers in the intline registers).
2001-10-05 10:33:42 +00:00
#ifdef __ia64__
/*
* Re-route interrupts on ia64 so that we can get the
* I/O SAPIC interrupt numbers (the BIOS leaves legacy
* PIC interrupt numbers in the intline registers).
*/
Make this file mostly conform to style(9). Approved by: msmith in principle before walkabout
2002-06-01 03:41:02 +00:00
cfg->intline = PCIB_ROUTE_INTERRUPT(pcib, dev, cfg->intpin);
Re-route interrupts on ia64 so that we can get the I/O SAPIC interrupt numbers (the BIOS leaves legacy PIC interrupt numbers in the intline registers).
2001-10-05 10:33:42 +00:00
#endif
Use PCI_INTERRUPT_VALI in stead of hard coded 255
2002-06-01 05:48:58 +00:00
resource_list_add(rl, SYS_RES_IRQ, 0, cfg->intline,
cfg->intline, 1);
Re-route interrupts on ia64 so that we can get the I/O SAPIC interrupt numbers (the BIOS leaves legacy PIC interrupt numbers in the intline registers).
2001-10-05 10:33:42 +00:00
}
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
}
Various changes to make it easier to subclass the PCI bus device. - Make the pci devclass a global variable. - Add child devices in pci_attach() instead of pci_probe(). Change pci_probe() to just check for a valid bus number from the associated bridge and return -1000 if successful. This allows subclasses of the PCI bus driver to override the generic driver. - Move the code to load the vendor data into its own public function. Really though, doing this at attach is just plain wrong. This should really be done in the module load routine instead. As a side effect, the 'busno' variable in pci_attach() is now no longer static (minor bug that was harmless so far.) - Change pci_add_children() to take an extra argument that is the size of the device info structure passed to pci_read_device() and make it public so subclasses of the PCI bus can call it in their attach routines. - Move the bits to attach a probed PCI child to a PCI bus into a global pci_add_child() function. This will allow subclasses that can detect a PCI device not found in the normal PCI probe to add those devices in their own attach routine. (I have seen this in the ACPI tree on my laptop for example.) As a side effect, change the static function pci_add_resources() to get the busno, slot, and func from the passed in dinfo structure instead of requiring them as function arguments. Tested on: i386, alpha, ia64, sparc64
2002-08-26 15:23:52 +00:00
void
pci_add_children(device_t dev, int busno, size_t dinfo_size)
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
{
* Completely rewrite the alpha busspace to hide the implementation from the drivers. * Remove legacy inx/outx support from chipset and replace with macros which call busspace. * Rework pci config accesses to route through the pcib device instead of calling a MD function directly. With these changes it is possible to cleanly support machines which have more than one independantly numbered PCI busses. As a bonus, the new busspace implementation should be measurably faster than the old one.
2000-08-28 21:48:13 +00:00
device_t pcib = device_get_parent(dev);
Various changes to make it easier to subclass the PCI bus device. - Make the pci devclass a global variable. - Add child devices in pci_attach() instead of pci_probe(). Change pci_probe() to just check for a valid bus number from the associated bridge and return -1000 if successful. This allows subclasses of the PCI bus driver to override the generic driver. - Move the code to load the vendor data into its own public function. Really though, doing this at attach is just plain wrong. This should really be done in the module load routine instead. As a side effect, the 'busno' variable in pci_attach() is now no longer static (minor bug that was harmless so far.) - Change pci_add_children() to take an extra argument that is the size of the device info structure passed to pci_read_device() and make it public so subclasses of the PCI bus can call it in their attach routines. - Move the bits to attach a probed PCI child to a PCI bus into a global pci_add_child() function. This will allow subclasses that can detect a PCI device not found in the normal PCI probe to add those devices in their own attach routine. (I have seen this in the ACPI tree on my laptop for example.) As a side effect, change the static function pci_add_resources() to get the busno, slot, and func from the passed in dinfo structure instead of requiring them as function arguments. Tested on: i386, alpha, ia64, sparc64
2002-08-26 15:23:52 +00:00
struct pci_devinfo *dinfo;
* Completely rewrite the alpha busspace to hide the implementation from the drivers. * Remove legacy inx/outx support from chipset and replace with macros which call busspace. * Rework pci config accesses to route through the pcib device instead of calling a MD function directly. With these changes it is possible to cleanly support machines which have more than one independantly numbered PCI busses. As a bonus, the new busspace implementation should be measurably faster than the old one.
2000-08-28 21:48:13 +00:00
int maxslots;
Various changes to make it easier to subclass the PCI bus device. - Make the pci devclass a global variable. - Add child devices in pci_attach() instead of pci_probe(). Change pci_probe() to just check for a valid bus number from the associated bridge and return -1000 if successful. This allows subclasses of the PCI bus driver to override the generic driver. - Move the code to load the vendor data into its own public function. Really though, doing this at attach is just plain wrong. This should really be done in the module load routine instead. As a side effect, the 'busno' variable in pci_attach() is now no longer static (minor bug that was harmless so far.) - Change pci_add_children() to take an extra argument that is the size of the device info structure passed to pci_read_device() and make it public so subclasses of the PCI bus can call it in their attach routines. - Move the bits to attach a probed PCI child to a PCI bus into a global pci_add_child() function. This will allow subclasses that can detect a PCI device not found in the normal PCI probe to add those devices in their own attach routine. (I have seen this in the ACPI tree on my laptop for example.) As a side effect, change the static function pci_add_resources() to get the busno, slot, and func from the passed in dinfo structure instead of requiring them as function arguments. Tested on: i386, alpha, ia64, sparc64
2002-08-26 15:23:52 +00:00
int s, f, pcifunchigh;
Add support for multiple PCI "hoses" used on various alpha platforms. The specific intent of this commit is to pave the way for importing Compaq XP1000 support. These changes should not affect the i386 port. Reviewed by: Doug Rabson <dfr@nlsystems.com> (actually, he walked me through most of it & deserves more than reviewd-by credit )
1999-05-20 15:33:33 +00:00
Various changes to make it easier to subclass the PCI bus device. - Make the pci devclass a global variable. - Add child devices in pci_attach() instead of pci_probe(). Change pci_probe() to just check for a valid bus number from the associated bridge and return -1000 if successful. This allows subclasses of the PCI bus driver to override the generic driver. - Move the code to load the vendor data into its own public function. Really though, doing this at attach is just plain wrong. This should really be done in the module load routine instead. As a side effect, the 'busno' variable in pci_attach() is now no longer static (minor bug that was harmless so far.) - Change pci_add_children() to take an extra argument that is the size of the device info structure passed to pci_read_device() and make it public so subclasses of the PCI bus can call it in their attach routines. - Move the bits to attach a probed PCI child to a PCI bus into a global pci_add_child() function. This will allow subclasses that can detect a PCI device not found in the normal PCI probe to add those devices in their own attach routine. (I have seen this in the ACPI tree on my laptop for example.) As a side effect, change the static function pci_add_resources() to get the busno, slot, and func from the passed in dinfo structure instead of requiring them as function arguments. Tested on: i386, alpha, ia64, sparc64
2002-08-26 15:23:52 +00:00
KASSERT(dinfo_size >= sizeof(struct pci_devinfo),
("dinfo_size too small"));
maxslots = PCIB_MAXSLOTS(pcib);
* Completely rewrite the alpha busspace to hide the implementation from the drivers. * Remove legacy inx/outx support from chipset and replace with macros which call busspace. * Rework pci config accesses to route through the pcib device instead of calling a MD function directly. With these changes it is possible to cleanly support machines which have more than one independantly numbered PCI busses. As a bonus, the new busspace implementation should be measurably faster than the old one.
2000-08-28 21:48:13 +00:00
for (s = 0; s <= maxslots; s++) {
Various changes to make it easier to subclass the PCI bus device. - Make the pci devclass a global variable. - Add child devices in pci_attach() instead of pci_probe(). Change pci_probe() to just check for a valid bus number from the associated bridge and return -1000 if successful. This allows subclasses of the PCI bus driver to override the generic driver. - Move the code to load the vendor data into its own public function. Really though, doing this at attach is just plain wrong. This should really be done in the module load routine instead. As a side effect, the 'busno' variable in pci_attach() is now no longer static (minor bug that was harmless so far.) - Change pci_add_children() to take an extra argument that is the size of the device info structure passed to pci_read_device() and make it public so subclasses of the PCI bus can call it in their attach routines. - Move the bits to attach a probed PCI child to a PCI bus into a global pci_add_child() function. This will allow subclasses that can detect a PCI device not found in the normal PCI probe to add those devices in their own attach routine. (I have seen this in the ACPI tree on my laptop for example.) As a side effect, change the static function pci_add_resources() to get the busno, slot, and func from the passed in dinfo structure instead of requiring them as function arguments. Tested on: i386, alpha, ia64, sparc64
2002-08-26 15:23:52 +00:00
pcifunchigh = 0;
* Completely rewrite the alpha busspace to hide the implementation from the drivers. * Remove legacy inx/outx support from chipset and replace with macros which call busspace. * Rework pci config accesses to route through the pcib device instead of calling a MD function directly. With these changes it is possible to cleanly support machines which have more than one independantly numbered PCI busses. As a bonus, the new busspace implementation should be measurably faster than the old one.
2000-08-28 21:48:13 +00:00
for (f = 0; f <= pcifunchigh; f++) {
Various changes to make it easier to subclass the PCI bus device. - Make the pci devclass a global variable. - Add child devices in pci_attach() instead of pci_probe(). Change pci_probe() to just check for a valid bus number from the associated bridge and return -1000 if successful. This allows subclasses of the PCI bus driver to override the generic driver. - Move the code to load the vendor data into its own public function. Really though, doing this at attach is just plain wrong. This should really be done in the module load routine instead. As a side effect, the 'busno' variable in pci_attach() is now no longer static (minor bug that was harmless so far.) - Change pci_add_children() to take an extra argument that is the size of the device info structure passed to pci_read_device() and make it public so subclasses of the PCI bus can call it in their attach routines. - Move the bits to attach a probed PCI child to a PCI bus into a global pci_add_child() function. This will allow subclasses that can detect a PCI device not found in the normal PCI probe to add those devices in their own attach routine. (I have seen this in the ACPI tree on my laptop for example.) As a side effect, change the static function pci_add_resources() to get the busno, slot, and func from the passed in dinfo structure instead of requiring them as function arguments. Tested on: i386, alpha, ia64, sparc64
2002-08-26 15:23:52 +00:00
dinfo = pci_read_device(pcib, busno, s, f, dinfo_size);
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
if (dinfo != NULL) {
if (dinfo->cfg.mfdev)
Next round of PCI subsystem updates: - Break out the /dev/pci driver into a separate file. - Kill the COMPAT_OLDPCI support. - Make the EISA bridge attach a bit more like the old code; explicitly check for the existence of eisa0/isa0 and only attach if they don't already exist. Only make one bus_generic_attach() pass over the bridge, once both busses are attached. Note that the stupid Intel bridge's class is entirely unpredictable. - Add prototypes and re-layout the core PCI modules in line with current coding standards (not a major whitespace change, just moving the module data to the top of the file). - Remove redundant type-2 bridge support from the core PCI code; the PCI-CardBus code does this itself internally. Remove the now entirely redundant header-class-specific support, as well as the secondary and subordinate bus number fields. These are bridge attributes now. - Add support for PCI Extended Capabilities. - Add support for PCI Power Management. The interface currently allows a driver to query and set the power state of a device. - Add helper functions to allow drivers to enable/disable busmastering and the decoding of I/O and memory ranges. - Use PCI_SLOTMAX and PCI_FUNCMAX rather than magic numbers in some places. - Make the PCI-PCI bridge code a little more paranoid about valid I/O and memory decodes. - Add some more PCI register definitions for the command and status registers. Correct another bogus definition for type-1 bridges.
2000-12-13 01:25:11 +00:00
pcifunchigh = PCI_FUNCMAX;
Various changes to make it easier to subclass the PCI bus device. - Make the pci devclass a global variable. - Add child devices in pci_attach() instead of pci_probe(). Change pci_probe() to just check for a valid bus number from the associated bridge and return -1000 if successful. This allows subclasses of the PCI bus driver to override the generic driver. - Move the code to load the vendor data into its own public function. Really though, doing this at attach is just plain wrong. This should really be done in the module load routine instead. As a side effect, the 'busno' variable in pci_attach() is now no longer static (minor bug that was harmless so far.) - Change pci_add_children() to take an extra argument that is the size of the device info structure passed to pci_read_device() and make it public so subclasses of the PCI bus can call it in their attach routines. - Move the bits to attach a probed PCI child to a PCI bus into a global pci_add_child() function. This will allow subclasses that can detect a PCI device not found in the normal PCI probe to add those devices in their own attach routine. (I have seen this in the ACPI tree on my laptop for example.) As a side effect, change the static function pci_add_resources() to get the busno, slot, and func from the passed in dinfo structure instead of requiring them as function arguments. Tested on: i386, alpha, ia64, sparc64
2002-08-26 15:23:52 +00:00
pci_add_child(dev, dinfo);
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
}
}
}
}
Various changes to make it easier to subclass the PCI bus device. - Make the pci devclass a global variable. - Add child devices in pci_attach() instead of pci_probe(). Change pci_probe() to just check for a valid bus number from the associated bridge and return -1000 if successful. This allows subclasses of the PCI bus driver to override the generic driver. - Move the code to load the vendor data into its own public function. Really though, doing this at attach is just plain wrong. This should really be done in the module load routine instead. As a side effect, the 'busno' variable in pci_attach() is now no longer static (minor bug that was harmless so far.) - Change pci_add_children() to take an extra argument that is the size of the device info structure passed to pci_read_device() and make it public so subclasses of the PCI bus can call it in their attach routines. - Move the bits to attach a probed PCI child to a PCI bus into a global pci_add_child() function. This will allow subclasses that can detect a PCI device not found in the normal PCI probe to add those devices in their own attach routine. (I have seen this in the ACPI tree on my laptop for example.) As a side effect, change the static function pci_add_resources() to get the busno, slot, and func from the passed in dinfo structure instead of requiring them as function arguments. Tested on: i386, alpha, ia64, sparc64
2002-08-26 15:23:52 +00:00
void
pci_add_child(device_t bus, struct pci_devinfo *dinfo)
{
device_t pcib;
pcib = device_get_parent(bus);
dinfo->cfg.dev = device_add_child(bus, NULL, -1);
device_set_ivars(dinfo->cfg.dev, dinfo);
pci_add_resources(pcib, dinfo->cfg.dev);
pci_print_verbose(dinfo);
}
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
static int
* Completely rewrite the alpha busspace to hide the implementation from the drivers. * Remove legacy inx/outx support from chipset and replace with macros which call busspace. * Rework pci config accesses to route through the pcib device instead of calling a MD function directly. With these changes it is possible to cleanly support machines which have more than one independantly numbered PCI busses. As a bonus, the new busspace implementation should be measurably faster than the old one.
2000-08-28 21:48:13 +00:00
pci_probe(device_t dev)
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
{
Convert DEVFS hooks in (most) drivers to make_dev(). Diskslice/label code not yet handled. Vinum, i4b, alpha, pc98 not dealt with (left to respective Maintainers) Add the correct hook for devfs to kern_conf.c The net result of this excercise is that a lot less files depends on DEVFS, and devtoname() gets more sensible output in many cases. A few drivers had minor additional cleanups performed relating to cdevsw registration. A few drivers don't register a cdevsw{} anymore, but only use make_dev().
1999-08-23 20:59:21 +00:00
device_set_desc(dev, "PCI bus");
* Completely rewrite the alpha busspace to hide the implementation from the drivers. * Remove legacy inx/outx support from chipset and replace with macros which call busspace. * Rework pci config accesses to route through the pcib device instead of calling a MD function directly. With these changes it is possible to cleanly support machines which have more than one independantly numbered PCI busses. As a bonus, the new busspace implementation should be measurably faster than the old one.
2000-08-28 21:48:13 +00:00
Various changes to make it easier to subclass the PCI bus device. - Make the pci devclass a global variable. - Add child devices in pci_attach() instead of pci_probe(). Change pci_probe() to just check for a valid bus number from the associated bridge and return -1000 if successful. This allows subclasses of the PCI bus driver to override the generic driver. - Move the code to load the vendor data into its own public function. Really though, doing this at attach is just plain wrong. This should really be done in the module load routine instead. As a side effect, the 'busno' variable in pci_attach() is now no longer static (minor bug that was harmless so far.) - Change pci_add_children() to take an extra argument that is the size of the device info structure passed to pci_read_device() and make it public so subclasses of the PCI bus can call it in their attach routines. - Move the bits to attach a probed PCI child to a PCI bus into a global pci_add_child() function. This will allow subclasses that can detect a PCI device not found in the normal PCI probe to add those devices in their own attach routine. (I have seen this in the ACPI tree on my laptop for example.) As a side effect, change the static function pci_add_resources() to get the busno, slot, and func from the passed in dinfo structure instead of requiring them as function arguments. Tested on: i386, alpha, ia64, sparc64
2002-08-26 15:23:52 +00:00
/* Allow other subclasses to override this driver. */
return (-1000);
}
static int
pci_attach(device_t dev)
{
int busno;
* Completely rewrite the alpha busspace to hide the implementation from the drivers. * Remove legacy inx/outx support from chipset and replace with macros which call busspace. * Rework pci config accesses to route through the pcib device instead of calling a MD function directly. With these changes it is possible to cleanly support machines which have more than one independantly numbered PCI busses. As a bonus, the new busspace implementation should be measurably faster than the old one.
2000-08-28 21:48:13 +00:00
/*
* Since there can be multiple independantly numbered PCI
* busses on some large alpha systems, we can't use the unit
* number to decide what bus we are probing. We ask the parent
* pcib what our bus number is.
*/
Validate the PCI bus number that we fetch from our parent, since there's no guarantee that everything attached to *it* is a PCI bus.
2000-10-09 00:43:45 +00:00
busno = pcib_get_bus(dev);
Various changes to make it easier to subclass the PCI bus device. - Make the pci devclass a global variable. - Add child devices in pci_attach() instead of pci_probe(). Change pci_probe() to just check for a valid bus number from the associated bridge and return -1000 if successful. This allows subclasses of the PCI bus driver to override the generic driver. - Move the code to load the vendor data into its own public function. Really though, doing this at attach is just plain wrong. This should really be done in the module load routine instead. As a side effect, the 'busno' variable in pci_attach() is now no longer static (minor bug that was harmless so far.) - Change pci_add_children() to take an extra argument that is the size of the device info structure passed to pci_read_device() and make it public so subclasses of the PCI bus can call it in their attach routines. - Move the bits to attach a probed PCI child to a PCI bus into a global pci_add_child() function. This will allow subclasses that can detect a PCI device not found in the normal PCI probe to add those devices in their own attach routine. (I have seen this in the ACPI tree on my laptop for example.) As a side effect, change the static function pci_add_resources() to get the busno, slot, and func from the passed in dinfo structure instead of requiring them as function arguments. Tested on: i386, alpha, ia64, sparc64
2002-08-26 15:23:52 +00:00
if (bootverbose)
device_printf(dev, "physical bus=%d\n", busno);
pci_add_children(dev, busno, sizeof(struct pci_devinfo));
return (bus_generic_attach(dev));
}
- Make pci_load_vendor_data() static and do it during MOD_LOAD instead of when the first PCI bus attaches. - Create /dev/pci during MOD_LOAD as well. - Destroy /dev/pci during MOD_UNLOAD (not that you can kldunload pci, but might as well get the code right)
2002-09-04 03:13:16 +00:00
static void
Various changes to make it easier to subclass the PCI bus device. - Make the pci devclass a global variable. - Add child devices in pci_attach() instead of pci_probe(). Change pci_probe() to just check for a valid bus number from the associated bridge and return -1000 if successful. This allows subclasses of the PCI bus driver to override the generic driver. - Move the code to load the vendor data into its own public function. Really though, doing this at attach is just plain wrong. This should really be done in the module load routine instead. As a side effect, the 'busno' variable in pci_attach() is now no longer static (minor bug that was harmless so far.) - Change pci_add_children() to take an extra argument that is the size of the device info structure passed to pci_read_device() and make it public so subclasses of the PCI bus can call it in their attach routines. - Move the bits to attach a probed PCI child to a PCI bus into a global pci_add_child() function. This will allow subclasses that can detect a PCI device not found in the normal PCI probe to add those devices in their own attach routine. (I have seen this in the ACPI tree on my laptop for example.) As a side effect, change the static function pci_add_resources() to get the busno, slot, and func from the passed in dinfo structure instead of requiring them as function arguments. Tested on: i386, alpha, ia64, sparc64
2002-08-26 15:23:52 +00:00
pci_load_vendor_data(void)
{
caddr_t vendordata, info;
- Make pci_load_vendor_data() static and do it during MOD_LOAD instead of when the first PCI bus attaches. - Create /dev/pci during MOD_LOAD as well. - Destroy /dev/pci during MOD_UNLOAD (not that you can kldunload pci, but might as well get the code right)
2002-09-04 03:13:16 +00:00
if ((vendordata = preload_search_by_type("pci_vendor_data")) != NULL) {
info = preload_search_info(vendordata, MODINFO_ADDR);
pci_vendordata = *(char **)info;
info = preload_search_info(vendordata, MODINFO_SIZE);
pci_vendordata_size = *(size_t *)info;
/* terminate the database */
pci_vendordata[pci_vendordata_size] = '\n';
Convert DEVFS hooks in (most) drivers to make_dev(). Diskslice/label code not yet handled. Vinum, i4b, alpha, pc98 not dealt with (left to respective Maintainers) Add the correct hook for devfs to kern_conf.c The net result of this excercise is that a lot less files depends on DEVFS, and devtoname() gets more sensible output in many cases. A few drivers had minor additional cleanups performed relating to cdevsw registration. A few drivers don't register a cdevsw{} anymore, but only use make_dev().
1999-08-23 20:59:21 +00:00
}
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
}
Use the pci.c code wherever possible, rather than copying all the pci code into cardbus and s/pci/cardbus. This exposes a few pci_* functions that are now static. This work is similar to work Justin posted to the mobile list about a year or two ago, which I have neglected since then. This is a subset of his current work with the multiple inheritance newbus architecutre. When completed, that will eliminate the need for pci/pci_private.h. Similar work is needed for the cardbus_cis and pccard_cis code as well.
2002-02-27 05:09:14 +00:00
int
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
pci_print_child(device_t dev, device_t child)
{
Print 'irq nn' on the device attach line like the old pci code did. However, we are not printing 'int a/b/c/d' yet, is it worth it on non-SMP systems? (It's useful when tracing PCI->IO-APIC routing on SMP systems)
1999-05-08 20:28:01 +00:00
struct pci_devinfo *dinfo;
Show the port/mem/irq of pci devices too.
2000-01-08 10:12:21 +00:00
struct resource_list *rl;
Print 'irq nn' on the device attach line like the old pci code did. However, we are not printing 'int a/b/c/d' yet, is it worth it on non-SMP systems? (It's useful when tracing PCI->IO-APIC routing on SMP systems)
1999-05-08 20:28:01 +00:00
pcicfgregs *cfg;
Alter the behavior of sys/kern/subr_bus.c:device_print_child() - device_print_child() either lets the BUS_PRINT_CHILD method produce the entire device announcement message or it prints "foo0: not found\n" Alter sys/kern/subr_bus.c:bus_generic_print_child() to take on the previous behavior of device_print_child() (printing the "foo0: <FooDevice 1.1>" bit of the announce message.) Provide bus_print_child_header() and bus_print_child_footer() to actually print the output for bus_generic_print_child(). These functions should be used whenever possible (unless you can just use bus_generic_print_child()) The BUS_PRINT_CHILD method now returns int instead of void. Modify everything else that defines or uses a BUS_PRINT_CHILD method to comply with the above changes. - Devices are 'on' a bus, not 'at' it. - If a custom BUS_PRINT_CHILD method does the same thing as bus_generic_print_child(), use bus_generic_print_child() - Use device_get_nameunit() instead of both device_get_name() and device_get_unit() - All BUS_PRINT_CHILD methods return the number of characters output. Reviewed by: dfr, peter
1999-07-29 01:03:04 +00:00
int retval = 0;
Print 'irq nn' on the device attach line like the old pci code did. However, we are not printing 'int a/b/c/d' yet, is it worth it on non-SMP systems? (It's useful when tracing PCI->IO-APIC routing on SMP systems)
1999-05-08 20:28:01 +00:00
dinfo = device_get_ivars(child);
cfg = &dinfo->cfg;
Show the port/mem/irq of pci devices too.
2000-01-08 10:12:21 +00:00
rl = &dinfo->resources;
Alter the behavior of sys/kern/subr_bus.c:device_print_child() - device_print_child() either lets the BUS_PRINT_CHILD method produce the entire device announcement message or it prints "foo0: not found\n" Alter sys/kern/subr_bus.c:bus_generic_print_child() to take on the previous behavior of device_print_child() (printing the "foo0: <FooDevice 1.1>" bit of the announce message.) Provide bus_print_child_header() and bus_print_child_footer() to actually print the output for bus_generic_print_child(). These functions should be used whenever possible (unless you can just use bus_generic_print_child()) The BUS_PRINT_CHILD method now returns int instead of void. Modify everything else that defines or uses a BUS_PRINT_CHILD method to comply with the above changes. - Devices are 'on' a bus, not 'at' it. - If a custom BUS_PRINT_CHILD method does the same thing as bus_generic_print_child(), use bus_generic_print_child() - Use device_get_nameunit() instead of both device_get_name() and device_get_unit() - All BUS_PRINT_CHILD methods return the number of characters output. Reviewed by: dfr, peter
1999-07-29 01:03:04 +00:00
retval += bus_print_child_header(dev, child);
Use the new resource_list_print_type() function to print resource list contents, and the new __BUS_ACCESSOR macro to construct the accessor functions.
2001-12-21 21:49:57 +00:00
retval += resource_list_print_type(rl, "port", SYS_RES_IOPORT, "%#lx");
retval += resource_list_print_type(rl, "mem", SYS_RES_MEMORY, "%#lx");
retval += resource_list_print_type(rl, "irq", SYS_RES_IRQ, "%ld");
Show the port/mem/irq of pci devices too.
2000-01-08 10:12:21 +00:00
if (device_get_flags(dev))
retval += printf(" flags %#x", device_get_flags(dev));
Alter the behavior of sys/kern/subr_bus.c:device_print_child() - device_print_child() either lets the BUS_PRINT_CHILD method produce the entire device announcement message or it prints "foo0: not found\n" Alter sys/kern/subr_bus.c:bus_generic_print_child() to take on the previous behavior of device_print_child() (printing the "foo0: <FooDevice 1.1>" bit of the announce message.) Provide bus_print_child_header() and bus_print_child_footer() to actually print the output for bus_generic_print_child(). These functions should be used whenever possible (unless you can just use bus_generic_print_child()) The BUS_PRINT_CHILD method now returns int instead of void. Modify everything else that defines or uses a BUS_PRINT_CHILD method to comply with the above changes. - Devices are 'on' a bus, not 'at' it. - If a custom BUS_PRINT_CHILD method does the same thing as bus_generic_print_child(), use bus_generic_print_child() - Use device_get_nameunit() instead of both device_get_name() and device_get_unit() - All BUS_PRINT_CHILD methods return the number of characters output. Reviewed by: dfr, peter
1999-07-29 01:03:04 +00:00
retval += printf(" at device %d.%d", pci_get_slot(child),
Make this file mostly conform to style(9). Approved by: msmith in principle before walkabout
2002-06-01 03:41:02 +00:00
pci_get_function(child));
Alter the behavior of sys/kern/subr_bus.c:device_print_child() - device_print_child() either lets the BUS_PRINT_CHILD method produce the entire device announcement message or it prints "foo0: not found\n" Alter sys/kern/subr_bus.c:bus_generic_print_child() to take on the previous behavior of device_print_child() (printing the "foo0: <FooDevice 1.1>" bit of the announce message.) Provide bus_print_child_header() and bus_print_child_footer() to actually print the output for bus_generic_print_child(). These functions should be used whenever possible (unless you can just use bus_generic_print_child()) The BUS_PRINT_CHILD method now returns int instead of void. Modify everything else that defines or uses a BUS_PRINT_CHILD method to comply with the above changes. - Devices are 'on' a bus, not 'at' it. - If a custom BUS_PRINT_CHILD method does the same thing as bus_generic_print_child(), use bus_generic_print_child() - Use device_get_nameunit() instead of both device_get_name() and device_get_unit() - All BUS_PRINT_CHILD methods return the number of characters output. Reviewed by: dfr, peter
1999-07-29 01:03:04 +00:00
retval += bus_print_child_footer(dev, child);
return (retval);
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
}
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
static struct
{
int class;
int subclass;
char *desc;
} pci_nomatch_tab[] = {
{PCIC_OLD, -1, "old"},
{PCIC_OLD, PCIS_OLD_NONVGA, "non-VGA display device"},
{PCIC_OLD, PCIS_OLD_VGA, "VGA-compatible display device"},
{PCIC_STORAGE, -1, "mass storage"},
{PCIC_STORAGE, PCIS_STORAGE_SCSI, "SCSI"},
{PCIC_STORAGE, PCIS_STORAGE_IDE, "ATA"},
{PCIC_STORAGE, PCIS_STORAGE_FLOPPY, "floppy disk"},
{PCIC_STORAGE, PCIS_STORAGE_IPI, "IPI"},
{PCIC_STORAGE, PCIS_STORAGE_RAID, "RAID"},
{PCIC_NETWORK, -1, "network"},
{PCIC_NETWORK, PCIS_NETWORK_ETHERNET, "ethernet"},
{PCIC_NETWORK, PCIS_NETWORK_TOKENRING, "token ring"},
{PCIC_NETWORK, PCIS_NETWORK_FDDI, "fddi"},
{PCIC_NETWORK, PCIS_NETWORK_ATM, "ATM"},
{PCIC_DISPLAY, -1, "display"},
{PCIC_DISPLAY, PCIS_DISPLAY_VGA, "VGA"},
{PCIC_DISPLAY, PCIS_DISPLAY_XGA, "XGA"},
{PCIC_MULTIMEDIA, -1, "multimedia"},
{PCIC_MULTIMEDIA, PCIS_MULTIMEDIA_VIDEO, "video"},
{PCIC_MULTIMEDIA, PCIS_MULTIMEDIA_AUDIO, "audio"},
{PCIC_MEMORY, -1, "memory"},
{PCIC_MEMORY, PCIS_MEMORY_RAM, "RAM"},
{PCIC_MEMORY, PCIS_MEMORY_FLASH, "flash"},
{PCIC_BRIDGE, -1, "bridge"},
{PCIC_BRIDGE, PCIS_BRIDGE_HOST, "HOST-PCI"},
{PCIC_BRIDGE, PCIS_BRIDGE_ISA, "PCI-ISA"},
{PCIC_BRIDGE, PCIS_BRIDGE_EISA, "PCI-EISA"},
{PCIC_BRIDGE, PCIS_BRIDGE_MCA, "PCI-MCA"},
{PCIC_BRIDGE, PCIS_BRIDGE_PCI, "PCI-PCI"},
{PCIC_BRIDGE, PCIS_BRIDGE_PCMCIA, "PCI-PCMCIA"},
{PCIC_BRIDGE, PCIS_BRIDGE_NUBUS, "PCI-NuBus"},
{PCIC_BRIDGE, PCIS_BRIDGE_CARDBUS, "PCI-CardBus"},
{PCIC_BRIDGE, PCIS_BRIDGE_OTHER, "PCI-unknown"},
{PCIC_SIMPLECOMM, -1, "simple comms"},
{PCIC_SIMPLECOMM, PCIS_SIMPLECOMM_UART, "UART"}, /* could detect 16550 */
{PCIC_SIMPLECOMM, PCIS_SIMPLECOMM_PAR, "parallel port"},
{PCIC_BASEPERIPH, -1, "base peripheral"},
{PCIC_BASEPERIPH, PCIS_BASEPERIPH_PIC, "interrupt controller"},
{PCIC_BASEPERIPH, PCIS_BASEPERIPH_DMA, "DMA controller"},
{PCIC_BASEPERIPH, PCIS_BASEPERIPH_TIMER, "timer"},
{PCIC_BASEPERIPH, PCIS_BASEPERIPH_RTC, "realtime clock"},
{PCIC_INPUTDEV, -1, "input device"},
{PCIC_INPUTDEV, PCIS_INPUTDEV_KEYBOARD, "keyboard"},
{PCIC_INPUTDEV, PCIS_INPUTDEV_DIGITIZER,"digitizer"},
{PCIC_INPUTDEV, PCIS_INPUTDEV_MOUSE, "mouse"},
{PCIC_DOCKING, -1, "docking station"},
{PCIC_PROCESSOR, -1, "processor"},
{PCIC_SERIALBUS, -1, "serial bus"},
{PCIC_SERIALBUS, PCIS_SERIALBUS_FW, "FireWire"},
{PCIC_SERIALBUS, PCIS_SERIALBUS_ACCESS, "AccessBus"},
{PCIC_SERIALBUS, PCIS_SERIALBUS_SSA, "SSA"},
{PCIC_SERIALBUS, PCIS_SERIALBUS_USB, "USB"},
{PCIC_SERIALBUS, PCIS_SERIALBUS_FC, "Fibre Channel"},
{PCIC_SERIALBUS, PCIS_SERIALBUS_SMBUS, "SMBus"},
{0, 0, NULL}
};
Use the pci.c code wherever possible, rather than copying all the pci code into cardbus and s/pci/cardbus. This exposes a few pci_* functions that are now static. This work is similar to work Justin posted to the mobile list about a year or two ago, which I have neglected since then. This is a subset of his current work with the multiple inheritance newbus architecutre. When completed, that will eliminate the need for pci/pci_private.h. Similar work is needed for the cardbus_cis and pccard_cis code as well.
2002-02-27 05:09:14 +00:00
void
Implement the BUS_PROBE_NOMATCH method for the PCI bus. This function is called for each device for which no driver was found. Output is similar to the eisa_probe_nomatch() function but with the added benefit of displaying the assigned IRQ (since PCI gives us this information up front.) Output is like so: pci0: unknown card CPQ0508 (vendor=0x0e11, dev=0x0508) at 11.0 irq 9 pci0: unknown card DFZ0508 (vendor=0x10da, dev=0x0508) at 11.0 irq 9 pci0: unknown card DBL0508 (vendor=0x104c, dev=0x0508) at 11.0 irq 9 pci0: unknown card DDM0011 (vendor=0x108d, dev=0x0011) at 11.0 irq 9 I'm not happy with the 3 lines of macro cruft that got added but I consider it a temporary annoyance as those bits will be moved to some place where PCI, EISA and ISAPNP code will be able to use them. (Not surprisingly, this message is longer than the code in question.) Reviewed by: peter, dfr
1999-07-27 04:28:14 +00:00
pci_probe_nomatch(device_t dev, device_t child)
{
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
int i;
char *cp, *scp, *device;
/*
* Look for a listing for this device in a loaded device database.
*/
if ((device = pci_describe_device(child)) != NULL) {
- Fix the device database parsing code so that it actually works. - Improve the formatting for devices identified by the database. - Fix the pcib_route_interrupt method definition, as an old version snuck in here somehow 8( - Remove a couple of the vendor/device IDs for PCI:ISA bridges which correctly identify themselves. Submitted by: peter
2000-12-09 09:15:38 +00:00
device_printf(dev, "<%s>", device);
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
free(device, M_DEVBUF);
} else {
Make this file mostly conform to style(9). Approved by: msmith in principle before walkabout
2002-06-01 03:41:02 +00:00
/*
* Scan the class/subclass descriptions for a general
* description.
*/
cp = "unknown";
scp = NULL;
for (i = 0; pci_nomatch_tab[i].desc != NULL; i++) {
if (pci_nomatch_tab[i].class == pci_get_class(child)) {
if (pci_nomatch_tab[i].subclass == -1) {
cp = pci_nomatch_tab[i].desc;
} else if (pci_nomatch_tab[i].subclass ==
pci_get_subclass(child)) {
scp = pci_nomatch_tab[i].desc;
}
}
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
}
Make this file mostly conform to style(9). Approved by: msmith in principle before walkabout
2002-06-01 03:41:02 +00:00
device_printf(dev, "<%s%s%s>",
Don't use GCC shorthand for ?: unless it really matters.
2002-09-28 17:47:51 +00:00
cp ? cp : "",
((cp != NULL) && (scp != NULL)) ? ", " : "",
scp ? scp : "");
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
}
Small nit: Make both prints use 'at device %d.%d'.
2001-09-01 23:06:14 +00:00
printf(" at device %d.%d (no driver attached)\n",
Make this file mostly conform to style(9). Approved by: msmith in principle before walkabout
2002-06-01 03:41:02 +00:00
pci_get_slot(child), pci_get_function(child));
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
return;
}
Move the pretty printing of the description for USB controllers to pci_probe_nomatch, so it won't be in the way when loading USB as a module. The reason for them being there in the first place is that every motherboard comes with USB kit and this way it looks more pretty (peter). The real solution will be to define some method of detaching a driver after it has attached.
1999-11-22 03:34:43 +00:00
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
/*
* Parse the PCI device database, if loaded, and return a pointer to a
* description of the device.
*
* The database is flat text formatted as follows:
*
* Any line not in a valid format is ignored.
* Lines are terminated with newline '\n' characters.
*
* A VENDOR line consists of the 4 digit (hex) vendor code, a TAB, then
* the vendor name.
*
* A DEVICE line is entered immediately below the corresponding VENDOR ID.
* - devices cannot be listed without a corresponding VENDOR line.
* A DEVICE line consists of a TAB, the 4 digit (hex) device code,
* another TAB, then the device name.
*/
/*
* Assuming (ptr) points to the beginning of a line in the database,
* return the vendor or device and description of the next entry.
* The value of (vendor) or (device) inappropriate for the entry type
* is set to -1. Returns nonzero at the end of the database.
*
* Note that this is slightly unrobust in the face of corrupt data;
* we attempt to safeguard against this by spamming the end of the
* database with a newline when we initialise.
*/
static int
pci_describe_parse_line(char **ptr, int *vendor, int *device, char **desc)
{
char *cp = *ptr;
- Fix the device database parsing code so that it actually works. - Improve the formatting for devices identified by the database. - Fix the pcib_route_interrupt method definition, as an old version snuck in here somehow 8( - Remove a couple of the vendor/device IDs for PCI:ISA bridges which correctly identify themselves. Submitted by: peter
2000-12-09 09:15:38 +00:00
int left;
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
*device = -1;
*vendor = -1;
- Fix the device database parsing code so that it actually works. - Improve the formatting for devices identified by the database. - Fix the pcib_route_interrupt method definition, as an old version snuck in here somehow 8( - Remove a couple of the vendor/device IDs for PCI:ISA bridges which correctly identify themselves. Submitted by: peter
2000-12-09 09:15:38 +00:00
**desc = '\0';
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
for (;;) {
- Fix the device database parsing code so that it actually works. - Improve the formatting for devices identified by the database. - Fix the pcib_route_interrupt method definition, as an old version snuck in here somehow 8( - Remove a couple of the vendor/device IDs for PCI:ISA bridges which correctly identify themselves. Submitted by: peter
2000-12-09 09:15:38 +00:00
left = pci_vendordata_size - (cp - pci_vendordata);
if (left <= 0) {
*ptr = cp;
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
return(1);
- Fix the device database parsing code so that it actually works. - Improve the formatting for devices identified by the database. - Fix the pcib_route_interrupt method definition, as an old version snuck in here somehow 8( - Remove a couple of the vendor/device IDs for PCI:ISA bridges which correctly identify themselves. Submitted by: peter
2000-12-09 09:15:38 +00:00
}
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
/* vendor entry? */
Make this file mostly conform to style(9). Approved by: msmith in principle before walkabout
2002-06-01 03:41:02 +00:00
if (*cp != '\t' &&
sscanf(cp, "%x\t%80[^\n]", vendor, *desc) == 2)
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
break;
/* device entry? */
Make this file mostly conform to style(9). Approved by: msmith in principle before walkabout
2002-06-01 03:41:02 +00:00
if (*cp == '\t' &&
sscanf(cp, "%x\t%80[^\n]", device, *desc) == 2)
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
break;
/* skip to next line */
- Fix the device database parsing code so that it actually works. - Improve the formatting for devices identified by the database. - Fix the pcib_route_interrupt method definition, as an old version snuck in here somehow 8( - Remove a couple of the vendor/device IDs for PCI:ISA bridges which correctly identify themselves. Submitted by: peter
2000-12-09 09:15:38 +00:00
while (*cp != '\n' && left > 0) {
cp++;
left--;
}
if (*cp == '\n') {
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
cp++;
- Fix the device database parsing code so that it actually works. - Improve the formatting for devices identified by the database. - Fix the pcib_route_interrupt method definition, as an old version snuck in here somehow 8( - Remove a couple of the vendor/device IDs for PCI:ISA bridges which correctly identify themselves. Submitted by: peter
2000-12-09 09:15:38 +00:00
left--;
}
}
/* skip to next line */
while (*cp != '\n' && left > 0) {
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
cp++;
- Fix the device database parsing code so that it actually works. - Improve the formatting for devices identified by the database. - Fix the pcib_route_interrupt method definition, as an old version snuck in here somehow 8( - Remove a couple of the vendor/device IDs for PCI:ISA bridges which correctly identify themselves. Submitted by: peter
2000-12-09 09:15:38 +00:00
left--;
o No need to print the vendor/device ID for things that matched succesfully. o ``<device name>'' versus ``device name'' for things that fall under nomatch. Reviewed by: dfr (in principle) Approved by: Baron von Hubbard
2000-02-22 21:44:39 +00:00
}
- Fix the device database parsing code so that it actually works. - Improve the formatting for devices identified by the database. - Fix the pcib_route_interrupt method definition, as an old version snuck in here somehow 8( - Remove a couple of the vendor/device IDs for PCI:ISA bridges which correctly identify themselves. Submitted by: peter
2000-12-09 09:15:38 +00:00
if (*cp == '\n' && left > 0)
cp++;
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
*ptr = cp;
return(0);
}
static char *
pci_describe_device(device_t dev)
{
int vendor, device;
char *desc, *vp, *dp, *line;
desc = vp = dp = NULL;
/*
* If we have no vendor data, we can't do anything.
*/
if (pci_vendordata == NULL)
goto out;
/*
* Scan the vendor data looking for this device
*/
line = pci_vendordata;
if ((vp = malloc(80, M_DEVBUF, M_NOWAIT)) == NULL)
goto out;
for (;;) {
if (pci_describe_parse_line(&line, &vendor, &device, &vp))
goto out;
if (vendor == pci_get_vendor(dev))
break;
o No need to print the vendor/device ID for things that matched succesfully. o ``<device name>'' versus ``device name'' for things that fall under nomatch. Reviewed by: dfr (in principle) Approved by: Baron von Hubbard
2000-02-22 21:44:39 +00:00
}
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
if ((dp = malloc(80, M_DEVBUF, M_NOWAIT)) == NULL)
goto out;
for (;;) {
- Fix the device database parsing code so that it actually works. - Improve the formatting for devices identified by the database. - Fix the pcib_route_interrupt method definition, as an old version snuck in here somehow 8( - Remove a couple of the vendor/device IDs for PCI:ISA bridges which correctly identify themselves. Submitted by: peter
2000-12-09 09:15:38 +00:00
if (pci_describe_parse_line(&line, &vendor, &device, &dp)) {
*dp = 0;
break;
}
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
if (vendor != -1) {
*dp = 0;
break;
}
if (device == pci_get_device(dev))
break;
Implement the BUS_PROBE_NOMATCH method for the PCI bus. This function is called for each device for which no driver was found. Output is similar to the eisa_probe_nomatch() function but with the added benefit of displaying the assigned IRQ (since PCI gives us this information up front.) Output is like so: pci0: unknown card CPQ0508 (vendor=0x0e11, dev=0x0508) at 11.0 irq 9 pci0: unknown card DFZ0508 (vendor=0x10da, dev=0x0508) at 11.0 irq 9 pci0: unknown card DBL0508 (vendor=0x104c, dev=0x0508) at 11.0 irq 9 pci0: unknown card DDM0011 (vendor=0x108d, dev=0x0011) at 11.0 irq 9 I'm not happy with the 3 lines of macro cruft that got added but I consider it a temporary annoyance as those bits will be moved to some place where PCI, EISA and ISAPNP code will be able to use them. (Not surprisingly, this message is longer than the code in question.) Reviewed by: peter, dfr
1999-07-27 04:28:14 +00:00
}
- Fix the device database parsing code so that it actually works. - Improve the formatting for devices identified by the database. - Fix the pcib_route_interrupt method definition, as an old version snuck in here somehow 8( - Remove a couple of the vendor/device IDs for PCI:ISA bridges which correctly identify themselves. Submitted by: peter
2000-12-09 09:15:38 +00:00
if (dp[0] == '\0')
snprintf(dp, 80, "0x%x", pci_get_device(dev));
Make this file mostly conform to style(9). Approved by: msmith in principle before walkabout
2002-06-01 03:41:02 +00:00
if ((desc = malloc(strlen(vp) + strlen(dp) + 3, M_DEVBUF, M_NOWAIT)) !=
NULL)
- Fix the device database parsing code so that it actually works. - Improve the formatting for devices identified by the database. - Fix the pcib_route_interrupt method definition, as an old version snuck in here somehow 8( - Remove a couple of the vendor/device IDs for PCI:ISA bridges which correctly identify themselves. Submitted by: peter
2000-12-09 09:15:38 +00:00
sprintf(desc, "%s, %s", vp, dp);
Next phase in the PCI subsystem cleanup. - Move PCI core code to dev/pci. - Split bridge code out into separate modules. - Remove the descriptive strings from the bridge drivers. If you want to know what a device is, use pciconf. Add support for broadly identifying devices based on class/subclass, and for parsing a preloaded device identification database so that if you want to waste the memory, you can identify *anything* we know about. - Remove machine-dependant code from the core PCI code. APIC interrupt mapping is performed by shadowing the intline register in machine- dependant code. - Bring interrupt routing support to the Alpha (although many platforms don't yet support routing or mapping interrupts entirely correctly). This resulted in spamming <sys/bus.h> into more places than it really should have gone. - Put sys/dev on the kernel/modules include path. This avoids having to change *all* the pci*.h includes.
2000-12-08 22:11:23 +00:00
out:
if (vp != NULL)
free(vp, M_DEVBUF);
if (dp != NULL)
free(dp, M_DEVBUF);
return(desc);
Implement the BUS_PROBE_NOMATCH method for the PCI bus. This function is called for each device for which no driver was found. Output is similar to the eisa_probe_nomatch() function but with the added benefit of displaying the assigned IRQ (since PCI gives us this information up front.) Output is like so: pci0: unknown card CPQ0508 (vendor=0x0e11, dev=0x0508) at 11.0 irq 9 pci0: unknown card DFZ0508 (vendor=0x10da, dev=0x0508) at 11.0 irq 9 pci0: unknown card DBL0508 (vendor=0x104c, dev=0x0508) at 11.0 irq 9 pci0: unknown card DDM0011 (vendor=0x108d, dev=0x0011) at 11.0 irq 9 I'm not happy with the 3 lines of macro cruft that got added but I consider it a temporary annoyance as those bits will be moved to some place where PCI, EISA and ISAPNP code will be able to use them. (Not surprisingly, this message is longer than the code in question.) Reviewed by: peter, dfr
1999-07-27 04:28:14 +00:00
}
Use the pci.c code wherever possible, rather than copying all the pci code into cardbus and s/pci/cardbus. This exposes a few pci_* functions that are now static. This work is similar to work Justin posted to the mobile list about a year or two ago, which I have neglected since then. This is a subset of his current work with the multiple inheritance newbus architecutre. When completed, that will eliminate the need for pci/pci_private.h. Similar work is needed for the cardbus_cis and pccard_cis code as well.
2002-02-27 05:09:14 +00:00
int
Fixed the type of some ivar access functions. Ivars have type uintptr_t, not u_long. On i386's with 64-bit longs, returning u_longs indirectly in (more than) the space reserved for uintptr_t's tended to corrupt the previous frame pointer in the stack frame, so it was not easy to debug. The type mismatches are hidden by the bogus cast in DEVMETHOD().
2000-04-30 10:01:56 +00:00
pci_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
{
struct pci_devinfo *dinfo;
pcicfgregs *cfg;
dinfo = device_get_ivars(child);
cfg = &dinfo->cfg;
switch (which) {
Add a new cardbus specific ivar: PCI_IVAR_ETHADDR. Some pci-like buses support querying the MAC address in a standard-for-that-bus way. The base pci bus returns NULL for this IVAR always. Submitted by: sam Approved by: re (blanket for NEWCARD)
2002-11-27 06:41:28 +00:00
case PCI_IVAR_ETHADDR:
/*
* The generic accessor doesn't deal with failure, so
* we set the return value, then return an error.
*/
*((u_int8_t **) result) = NULL;
return (EINVAL);
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
case PCI_IVAR_SUBVENDOR:
*result = cfg->subvendor;
break;
case PCI_IVAR_SUBDEVICE:
*result = cfg->subdevice;
break;
case PCI_IVAR_VENDOR:
*result = cfg->vendor;
break;
case PCI_IVAR_DEVICE:
*result = cfg->device;
break;
case PCI_IVAR_DEVID:
*result = (cfg->device << 16) | cfg->vendor;
break;
case PCI_IVAR_CLASS:
*result = cfg->baseclass;
break;
case PCI_IVAR_SUBCLASS:
*result = cfg->subclass;
break;
case PCI_IVAR_PROGIF:
*result = cfg->progif;
break;
case PCI_IVAR_REVID:
*result = cfg->revid;
break;
case PCI_IVAR_INTPIN:
*result = cfg->intpin;
break;
case PCI_IVAR_IRQ:
*result = cfg->intline;
break;
case PCI_IVAR_BUS:
*result = cfg->bus;
break;
case PCI_IVAR_SLOT:
*result = cfg->slot;
break;
case PCI_IVAR_FUNCTION:
*result = cfg->func;
break;
default:
More style(9) nits
2002-06-01 05:44:45 +00:00
return (ENOENT);
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
}
More style(9) nits
2002-06-01 05:44:45 +00:00
return (0);
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
}
Use the pci.c code wherever possible, rather than copying all the pci code into cardbus and s/pci/cardbus. This exposes a few pci_* functions that are now static. This work is similar to work Justin posted to the mobile list about a year or two ago, which I have neglected since then. This is a subset of his current work with the multiple inheritance newbus architecutre. When completed, that will eliminate the need for pci/pci_private.h. Similar work is needed for the cardbus_cis and pccard_cis code as well.
2002-02-27 05:09:14 +00:00
int
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
pci_write_ivar(device_t dev, device_t child, int which, uintptr_t value)
{
struct pci_devinfo *dinfo;
pcicfgregs *cfg;
dinfo = device_get_ivars(child);
cfg = &dinfo->cfg;
switch (which) {
Add a new cardbus specific ivar: PCI_IVAR_ETHADDR. Some pci-like buses support querying the MAC address in a standard-for-that-bus way. The base pci bus returns NULL for this IVAR always. Submitted by: sam Approved by: re (blanket for NEWCARD)
2002-11-27 06:41:28 +00:00
case PCI_IVAR_ETHADDR:
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
case PCI_IVAR_SUBVENDOR:
case PCI_IVAR_SUBDEVICE:
case PCI_IVAR_VENDOR:
case PCI_IVAR_DEVICE:
case PCI_IVAR_DEVID:
case PCI_IVAR_CLASS:
case PCI_IVAR_SUBCLASS:
case PCI_IVAR_PROGIF:
case PCI_IVAR_REVID:
case PCI_IVAR_INTPIN:
case PCI_IVAR_IRQ:
case PCI_IVAR_BUS:
case PCI_IVAR_SLOT:
case PCI_IVAR_FUNCTION:
More style(9) nits
2002-06-01 05:44:45 +00:00
return (EINVAL); /* disallow for now */
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
default:
More style(9) nits
2002-06-01 05:44:45 +00:00
return (ENOENT);
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
}
More style(9) nits
2002-06-01 05:44:45 +00:00
return (0);
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
}
Add a new command: show pciregs, equivalent to pciconf -l Reviewed by: Doug Rabson (quite some time ago) MFC after: 1 week
2002-08-28 10:02:59 +00:00
#include "opt_ddb.h"
#ifdef DDB
#include <ddb/ddb.h>
#include <sys/cons.h>
/*
* List resources based on pci map registers, used for within ddb
*/
DB_SHOW_COMMAND(pciregs, db_pci_dump)
{
struct pci_devinfo *dinfo;
struct devlist *devlist_head;
struct pci_conf *p;
const char *name;
int i, error, none_count, nl;
none_count = 0;
nl = 0;
/* get the head of the device queue */
devlist_head = &pci_devq;
/*
* Go through the list of devices and print out devices
*/
for (error = 0, i = 0,
dinfo = STAILQ_FIRST(devlist_head);
(dinfo != NULL) && (error == 0) && (i < pci_numdevs);
dinfo = STAILQ_NEXT(dinfo, pci_links), i++) {
/* Populate pd_name and pd_unit */
name = NULL;
if (dinfo->cfg.dev)
name = device_get_name(dinfo->cfg.dev);
p = &dinfo->conf;
/*
* XXX just take 20 for now...
*/
if (nl++ == 20) {
int c;
db_printf("--More--");
c = cngetc();
db_printf("\r");
/*
* A whole screenfull or just one line?
*/
switch (c) {
case '\n': /* just one line */
nl = 20;
break;
case ' ':
nl = 0; /* another screenfull */
break;
default: /* exit */
db_printf("\n");
return;
}
}
db_printf("%s%d@pci%d:%d:%d:\tclass=0x%06x card=0x%08x "
"chip=0x%08x rev=0x%02x hdr=0x%02x\n",
(name && *name) ? name : "none",
(name && *name) ? (int)device_get_unit(dinfo->cfg.dev) :
none_count++,
p->pc_sel.pc_bus, p->pc_sel.pc_dev,
p->pc_sel.pc_func, (p->pc_class << 16) |
(p->pc_subclass << 8) | p->pc_progif,
(p->pc_subdevice << 16) | p->pc_subvendor,
(p->pc_device << 16) | p->pc_vendor,
p->pc_revid, p->pc_hdr);
}
}
#endif /* DDB */
Use the pci.c code wherever possible, rather than copying all the pci code into cardbus and s/pci/cardbus. This exposes a few pci_* functions that are now static. This work is similar to work Justin posted to the mobile list about a year or two ago, which I have neglected since then. This is a subset of his current work with the multiple inheritance newbus architecutre. When completed, that will eliminate the need for pci/pci_private.h. Similar work is needed for the cardbus_cis and pccard_cis code as well.
2002-02-27 05:09:14 +00:00
struct resource *
* Implement bus_set/get/delete_resource for pci. * Change the hack used on the alpha for mapping devices into DENSE or BWX memory spaces to a simpler one. Its still a hack and should be a seperate api to explicitly map the resource. * Add $FreeBSD$ as necessary.
1999-10-14 21:38:33 +00:00
pci_alloc_resource(device_t dev, device_t child, int type, int *rid,
u_long start, u_long end, u_long count, u_int flags)
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
{
* Implement bus_set/get/delete_resource for pci. * Change the hack used on the alpha for mapping devices into DENSE or BWX memory spaces to a simpler one. Its still a hack and should be a seperate api to explicitly map the resource. * Add $FreeBSD$ as necessary.
1999-10-14 21:38:33 +00:00
struct pci_devinfo *dinfo = device_get_ivars(child);
struct resource_list *rl = &dinfo->resources;
When a pci device hasn't had an interrupt routed to it (signified by the intline of 255) go ahead and route the interrupt when we allocate an interrupt. Submitted by: msmith
2000-10-16 07:24:00 +00:00
pcicfgregs *cfg = &dinfo->cfg;
/*
* Perform lazy resource allocation
*
* XXX add support here for SYS_RES_IOPORT and SYS_RES_MEMORY
*/
if (device_get_parent(child) == dev) {
When the driver allocates memory or I/O ports, enable that bit in the command config register. At the present, this represents a nop because these bits should have been set earlier in the process. In the future, we'll only set these bits when the driver requests the resource, not when the bus code detects the resource. Reviewed by: mdodd
2003-04-15 19:38:18 +00:00
switch (type) {
case SYS_RES_IRQ:
/*
* If the child device doesn't have an
* interrupt routed and is deserving of an
* interrupt, try to assign it one.
*/
if (!PCI_INTERRUPT_VALID(cfg->intline) &&
(cfg->intpin != 0)) {
cfg->intline = PCIB_ROUTE_INTERRUPT(
device_get_parent(dev), child, cfg->intpin);
if (PCI_INTERRUPT_VALID(cfg->intline)) {
pci_write_config(child, PCIR_INTLINE,
cfg->intline, 1);
resource_list_add(rl, SYS_RES_IRQ, 0,
cfg->intline, cfg->intline, 1);
}
When a pci device hasn't had an interrupt routed to it (signified by the intline of 255) go ahead and route the interrupt when we allocate an interrupt. Submitted by: msmith
2000-10-16 07:24:00 +00:00
}
When the driver allocates memory or I/O ports, enable that bit in the command config register. At the present, this represents a nop because these bits should have been set earlier in the process. In the future, we'll only set these bits when the driver requests the resource, not when the bus code detects the resource. Reviewed by: mdodd
2003-04-15 19:38:18 +00:00
break;
case SYS_RES_IOPORT:
case SYS_RES_MEMORY:
/*
* Enable the I/O mode. We should also be allocating
* resources too. XXX
*/
Return status for PCI methods '{enable,disable}_{io,busmaster}'. Reviewed by: imp
2003-04-16 03:15:08 +00:00
if (PCI_ENABLE_IO(dev, child, type))
return (NULL);
When the driver allocates memory or I/O ports, enable that bit in the command config register. At the present, this represents a nop because these bits should have been set earlier in the process. In the future, we'll only set these bits when the driver requests the resource, not when the bus code detects the resource. Reviewed by: mdodd
2003-04-15 19:38:18 +00:00
break;
When a pci device hasn't had an interrupt routed to it (signified by the intline of 255) go ahead and route the interrupt when we allocate an interrupt. Submitted by: msmith
2000-10-16 07:24:00 +00:00
}
}
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
More style(9) nits
2002-06-01 05:44:45 +00:00
return (resource_list_alloc(rl, dev, child, type, rid,
start, end, count, flags));
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
}
Use the pci.c code wherever possible, rather than copying all the pci code into cardbus and s/pci/cardbus. This exposes a few pci_* functions that are now static. This work is similar to work Justin posted to the mobile list about a year or two ago, which I have neglected since then. This is a subset of his current work with the multiple inheritance newbus architecutre. When completed, that will eliminate the need for pci/pci_private.h. Similar work is needed for the cardbus_cis and pccard_cis code as well.
2002-02-27 05:09:14 +00:00
void
Reduce code duplication by using the GET_RESOURCE_LIST bus method and related generic resource_list management functions. I'll deal with the EISA bits later. Not objected to by: new-bus
2000-11-28 07:12:12 +00:00
pci_delete_resource(device_t dev, device_t child, int type, int rid)
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
{
Use the pci.c code wherever possible, rather than copying all the pci code into cardbus and s/pci/cardbus. This exposes a few pci_* functions that are now static. This work is similar to work Justin posted to the mobile list about a year or two ago, which I have neglected since then. This is a subset of his current work with the multiple inheritance newbus architecutre. When completed, that will eliminate the need for pci/pci_private.h. Similar work is needed for the cardbus_cis and pccard_cis code as well.
2002-02-27 05:09:14 +00:00
struct pci_devinfo *dinfo;
struct resource_list *rl;
struct resource_list_entry *rle;
if (device_get_parent(child) != dev)
return;
dinfo = device_get_ivars(child);
rl = &dinfo->resources;
rle = resource_list_find(rl, type, rid);
if (rle) {
if (rle->res) {
Use rman_get_device rather than rle->resl->r_dev. make pci_hdrtypedata and pci_read_extcap accessible (but maybe in the end we'll make them private again).
2003-02-16 02:02:44 +00:00
if (rman_get_device(rle->res) != dev ||
Use the pci.c code wherever possible, rather than copying all the pci code into cardbus and s/pci/cardbus. This exposes a few pci_* functions that are now static. This work is similar to work Justin posted to the mobile list about a year or two ago, which I have neglected since then. This is a subset of his current work with the multiple inheritance newbus architecutre. When completed, that will eliminate the need for pci/pci_private.h. Similar work is needed for the cardbus_cis and pccard_cis code as well.
2002-02-27 05:09:14 +00:00
rman_get_flags(rle->res) & RF_ACTIVE) {
device_printf(dev, "delete_resource: "
"Resource still owned by child, oops. "
"(type=%d, rid=%d, addr=%lx)\n",
rle->type, rle->rid,
rman_get_start(rle->res));
return;
}
bus_release_resource(dev, type, rid, rle->res);
}
resource_list_delete(rl, type, rid);
}
More style(9) nits
2002-06-01 05:44:45 +00:00
/*
* Why do we turn off the PCI configuration BAR when we delete a
* resource? -- imp
*/
Use the pci.c code wherever possible, rather than copying all the pci code into cardbus and s/pci/cardbus. This exposes a few pci_* functions that are now static. This work is similar to work Justin posted to the mobile list about a year or two ago, which I have neglected since then. This is a subset of his current work with the multiple inheritance newbus architecutre. When completed, that will eliminate the need for pci/pci_private.h. Similar work is needed for the cardbus_cis and pccard_cis code as well.
2002-02-27 05:09:14 +00:00
pci_write_config(child, rid, 0, 4);
BUS_DELETE_RESOURCE(device_get_parent(dev), child, type, rid);
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
}
Use the pci.c code wherever possible, rather than copying all the pci code into cardbus and s/pci/cardbus. This exposes a few pci_* functions that are now static. This work is similar to work Justin posted to the mobile list about a year or two ago, which I have neglected since then. This is a subset of his current work with the multiple inheritance newbus architecutre. When completed, that will eliminate the need for pci/pci_private.h. Similar work is needed for the cardbus_cis and pccard_cis code as well.
2002-02-27 05:09:14 +00:00
struct resource_list *
Reduce code duplication by using the GET_RESOURCE_LIST bus method and related generic resource_list management functions. I'll deal with the EISA bits later. Not objected to by: new-bus
2000-11-28 07:12:12 +00:00
pci_get_resource_list (device_t dev, device_t child)
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
{
Reduce code duplication by using the GET_RESOURCE_LIST bus method and related generic resource_list management functions. I'll deal with the EISA bits later. Not objected to by: new-bus
2000-11-28 07:12:12 +00:00
struct pci_devinfo * dinfo = device_get_ivars(child);
struct resource_list * rl = &dinfo->resources;
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
Reduce code duplication by using the GET_RESOURCE_LIST bus method and related generic resource_list management functions. I'll deal with the EISA bits later. Not objected to by: new-bus
2000-11-28 07:12:12 +00:00
if (!rl)
return (NULL);
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
Reduce code duplication by using the GET_RESOURCE_LIST bus method and related generic resource_list management functions. I'll deal with the EISA bits later. Not objected to by: new-bus
2000-11-28 07:12:12 +00:00
return (rl);
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
}
Use the pci.c code wherever possible, rather than copying all the pci code into cardbus and s/pci/cardbus. This exposes a few pci_* functions that are now static. This work is similar to work Justin posted to the mobile list about a year or two ago, which I have neglected since then. This is a subset of his current work with the multiple inheritance newbus architecutre. When completed, that will eliminate the need for pci/pci_private.h. Similar work is needed for the cardbus_cis and pccard_cis code as well.
2002-02-27 05:09:14 +00:00
u_int32_t
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
pci_read_config_method(device_t dev, device_t child, int reg, int width)
{
struct pci_devinfo *dinfo = device_get_ivars(child);
pcicfgregs *cfg = &dinfo->cfg;
* Completely rewrite the alpha busspace to hide the implementation from the drivers. * Remove legacy inx/outx support from chipset and replace with macros which call busspace. * Rework pci config accesses to route through the pcib device instead of calling a MD function directly. With these changes it is possible to cleanly support machines which have more than one independantly numbered PCI busses. As a bonus, the new busspace implementation should be measurably faster than the old one.
2000-08-28 21:48:13 +00:00
More style(9) nits
2002-06-01 05:44:45 +00:00
return (PCIB_READ_CONFIG(device_get_parent(dev),
cfg->bus, cfg->slot, cfg->func, reg, width));
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
}
Use the pci.c code wherever possible, rather than copying all the pci code into cardbus and s/pci/cardbus. This exposes a few pci_* functions that are now static. This work is similar to work Justin posted to the mobile list about a year or two ago, which I have neglected since then. This is a subset of his current work with the multiple inheritance newbus architecutre. When completed, that will eliminate the need for pci/pci_private.h. Similar work is needed for the cardbus_cis and pccard_cis code as well.
2002-02-27 05:09:14 +00:00
void
More style(9) nits
2002-06-01 05:44:45 +00:00
pci_write_config_method(device_t dev, device_t child, int reg,
u_int32_t val, int width)
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
{
struct pci_devinfo *dinfo = device_get_ivars(child);
pcicfgregs *cfg = &dinfo->cfg;
* Completely rewrite the alpha busspace to hide the implementation from the drivers. * Remove legacy inx/outx support from chipset and replace with macros which call busspace. * Rework pci config accesses to route through the pcib device instead of calling a MD function directly. With these changes it is possible to cleanly support machines which have more than one independantly numbered PCI busses. As a bonus, the new busspace implementation should be measurably faster than the old one.
2000-08-28 21:48:13 +00:00
PCIB_WRITE_CONFIG(device_get_parent(dev),
Make this file mostly conform to style(9). Approved by: msmith in principle before walkabout
2002-06-01 03:41:02 +00:00
cfg->bus, cfg->slot, cfg->func, reg, val, width);
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
}
Move the pnp and location info into the common pci bus. Make all known pci busses implement this. Also minor comment smithing in cardbus. Fix copyright to this year with my name on it since I've been doing a lot to this file. Reviewed by: jhb
2003-02-17 21:20:35 +00:00
int
pci_child_location_str_method(device_t cbdev, device_t child, char *buf,
size_t buflen)
{
struct pci_devinfo *dinfo;
pcicfgregs *cfg;
dinfo = device_get_ivars(child);
cfg = &dinfo->cfg;
snprintf(buf, buflen, "slot=%d function=%d", pci_get_slot(child),
pci_get_function(child));
return (0);
}
int
pci_child_pnpinfo_str_method(device_t cbdev, device_t child, char *buf,
size_t buflen)
{
struct pci_devinfo *dinfo;
pcicfgregs *cfg;
dinfo = device_get_ivars(child);
cfg = &dinfo->cfg;
snprintf(buf, buflen, "vendor=0x%04x device=0x%04x subvendor=0x%04x "
Include class designation in pnpinfo for generic driver loading
2003-02-18 03:25:57 +00:00
"subdevice=0x%04x class=0x%02x%02x%02x", cfg->vendor, cfg->device,
cfg->subvendor, cfg->subdevice, cfg->baseclass, cfg->subclass,
cfg->progif);
Move the pnp and location info into the common pci bus. Make all known pci busses implement this. Also minor comment smithing in cardbus. Fix copyright to this year with my name on it since I've been doing a lot to this file. Reviewed by: jhb
2003-02-17 21:20:35 +00:00
return (0);
}
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
static int
pci_modevent(module_t mod, int what, void *arg)
{
- Make pci_load_vendor_data() static and do it during MOD_LOAD instead of when the first PCI bus attaches. - Create /dev/pci during MOD_LOAD as well. - Destroy /dev/pci during MOD_UNLOAD (not that you can kldunload pci, but might as well get the code right)
2002-09-04 03:13:16 +00:00
static dev_t pci_cdev;
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
switch (what) {
case MOD_LOAD:
Argh, don't clobber the pci device list if there are multiple busses! (An AGP counts as a PCI bus, it seems...) This stopped 'pciconf -l' from working on AGP or PCI->PCI bridge systems.
1999-05-09 15:54:04 +00:00
STAILQ_INIT(&pci_devq);
Next round of PCI subsystem updates: - Break out the /dev/pci driver into a separate file. - Kill the COMPAT_OLDPCI support. - Make the EISA bridge attach a bit more like the old code; explicitly check for the existence of eisa0/isa0 and only attach if they don't already exist. Only make one bus_generic_attach() pass over the bridge, once both busses are attached. Note that the stupid Intel bridge's class is entirely unpredictable. - Add prototypes and re-layout the core PCI modules in line with current coding standards (not a major whitespace change, just moving the module data to the top of the file). - Remove redundant type-2 bridge support from the core PCI code; the PCI-CardBus code does this itself internally. Remove the now entirely redundant header-class-specific support, as well as the secondary and subordinate bus number fields. These are bridge attributes now. - Add support for PCI Extended Capabilities. - Add support for PCI Power Management. The interface currently allows a driver to query and set the power state of a device. - Add helper functions to allow drivers to enable/disable busmastering and the decoding of I/O and memory ranges. - Use PCI_SLOTMAX and PCI_FUNCMAX rather than magic numbers in some places. - Make the PCI-PCI bridge code a little more paranoid about valid I/O and memory decodes. - Add some more PCI register definitions for the command and status registers. Correct another bogus definition for type-1 bridges.
2000-12-13 01:25:11 +00:00
pci_generation = 0;
- Make pci_load_vendor_data() static and do it during MOD_LOAD instead of when the first PCI bus attaches. - Create /dev/pci during MOD_LOAD as well. - Destroy /dev/pci during MOD_UNLOAD (not that you can kldunload pci, but might as well get the code right)
2002-09-04 03:13:16 +00:00
pci_cdev = make_dev(&pcicdev, 0, UID_ROOT, GID_WHEEL, 0644,
"pci");
pci_load_vendor_data();
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
break;
case MOD_UNLOAD:
- Make pci_load_vendor_data() static and do it during MOD_LOAD instead of when the first PCI bus attaches. - Create /dev/pci during MOD_LOAD as well. - Destroy /dev/pci during MOD_UNLOAD (not that you can kldunload pci, but might as well get the code right)
2002-09-04 03:13:16 +00:00
destroy_dev(pci_cdev);
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
break;
}
More style(9) nits
2002-06-01 05:44:45 +00:00
return (0);
Bring the 'new-bus' to the i386. This extensively changes the way the i386 platform boots, it is no longer ISA-centric, and is fully dynamic. Most old drivers compile and run without modification via 'compatability shims' to enable a smoother transition. eisa, isapnp and pccard* are not yet using the new resource manager. Once fully converted, all drivers will be loadable, including PCI and ISA. (Some other changes appear to have snuck in, including a port of Soren's ATA driver to the Alpha. Soren, back this out if you need to.) This is a checkpoint of work-in-progress, but is quite functional. The bulk of the work was done over the last few years by Doug Rabson and Garrett Wollman. Approved by: core
1999-04-16 21:22:55 +00:00
}
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