Commit Graph

51 Commits

Author SHA1 Message Date
br
b47629d6fc Allow the use of soft-interrupts for sending IPIs.
This will be required for SMP support on MIPS Malta platform.

Reviewed by:	adrian
Sponsored by:	DARPA, AFRL
Sponsored by:	HEIF5
Differential Revision:	https://reviews.freebsd.org/D7835
2016-09-08 17:37:13 +00:00
pfg
729533413f sys: use our roundup2/rounddown2() macros when param.h is available.
rounddown2 tends to produce longer lines than the original code
and when the code has a high indentation level it was not really
advantageous to do the replacement.

This tries to strike a balance between readability using the macros
and flexibility of having the expressions, so not everything is
converted.
2016-04-21 19:57:40 +00:00
skra
f4b6499ab5 As <machine/pmap.h> is included from <vm/pmap.h>, there is no need to
include it explicitly when <vm/pmap.h> is already included.

Reviewed by:	alc, kib
Differential Revision:	https://reviews.freebsd.org/D5373
2016-02-22 09:02:20 +00:00
jhibbits
f8385663ee Introduce a RMAN_IS_DEFAULT_RANGE() macro, and use it.
This simplifies checking for default resource range for bus_alloc_resource(),
and improves readability.

This is part of, and related to, the migration of rman_res_t from u_long to
uintmax_t.

Discussed with:	jhb
Suggested by:	marcel
2016-02-20 01:32:58 +00:00
jhibbits
fbc9874dd0 Replace several bus_alloc_resource() calls using default arguments with bus_alloc_resource_any()
Since these calls only use default arguments, bus_alloc_resource_any() is the
right call.

Differential Revision: https://reviews.freebsd.org/D5306
2016-02-19 03:37:56 +00:00
jhibbits
31bb8ee5bd Convert rman to use rman_res_t instead of u_long
Summary:
Migrate to using the semi-opaque type rman_res_t to specify rman resources.  For
now, this is still compatible with u_long.

This is step one in migrating rman to use uintmax_t for resources instead of
u_long.

Going forward, this could feasibly be used to specify architecture-specific
definitions of resource ranges, rather than baking a specific integer type into
the API.

This change has been broken out to facilitate MFC'ing drivers back to 10 without
breaking ABI.

Reviewed By: jhb
Sponsored by:	Alex Perez/Inertial Computing
Differential Revision: https://reviews.freebsd.org/D5075
2016-01-27 02:23:54 +00:00
nwhitehorn
e0788b0985 Devices that rely on hints or identify routines for discovery need to
return BUS_PROBE_NOWILDCARD from their probe routines to avoid claiming
wildcard devices on their parent bus. Do a sweep through the MIPS tree.

MFC after: 2 weeks
2013-10-29 14:07:31 +00:00
jeff
de4ecca213 Replace kernel virtual address space allocation with vmem. This provides
transparent layering and better fragmentation.

 - Normalize functions that allocate memory to use kmem_*
 - Those that allocate address space are named kva_*
 - Those that operate on maps are named kmap_*
 - Implement recursive allocation handling for kmem_arena in vmem.

Reviewed by:	alc
Tested by:	pho
Sponsored by:	EMC / Isilon Storage Division
2013-08-07 06:21:20 +00:00
attilio
cb47f0509b Merge from vmobj-rwlock branch:
Remove unused inclusion of vm/vm_pager.h and vm/vnode_pager.h.

Sponsored by:	EMC / Isilon storage division
Tested by:	pho
Reviewed by:	alc
2013-02-26 01:00:11 +00:00
jmallett
ac2071063e Remove platform APIs which are not used by any code and which had only stub
implementations or no implementation on all platforms.

Some of these functions might be good ideas, but their semantics were unclear
given the lack of implementation, and an unlucky porter could be fooled into
trying to implement them or, worse, being baffled when something like
platform_trap_enter() failed to be called.
2012-03-12 07:34:15 +00:00
jmallett
ac880fa7c8 At the risk of reducing source compatibility with old NetBSD and Sprite:
o) Get rid of some unused macros related to features we don't intend to
   provide.
o) Get rid of macro definitions for MIPS-I CPUs.  We are not likely to
   support anything that predartes MIPS-III.
o) Respell MIPS3_* macros as MIPS_*, which is how most of them were being
   used already.
o) Eliminate a duplicate and mostly-unused set of exception vector macros.

There's still considerable duplication and lots more obsolete in our headers,
but this reduces one of the larger files to a size where one could reckon
about the correctness of its contents with a mere few hours of contemplation.

There is, of course, a question of whether we need definitions for fields,
registers and configurations that we are unlikely to ever use or implement,
even if they're not obsolete since 1991.  FreeBSD is not a processor
reference manual, and things that aren't used may be wrong, or may be
duplicated because nobody could possibly actually know whether they're
already defined.
2012-03-06 19:01:32 +00:00
kevlo
827f99272d Remove duplicate header includes 2011-06-26 10:07:48 +00:00
attilio
a79fdc81aa Fix a brain-o in platform_cpu_mask() by just specifying a possible
cpuset_t to be copied, rather than return the array.
I can't rely anymore on this being a simple int/long object.

Reported by:	art
2011-05-13 19:56:58 +00:00
attilio
dcae8c9626 Add the cpuset_t conversion for mips. 2011-05-13 16:42:05 +00:00
brucec
6d9b42b486 Fix typos - remove duplicate "the".
PR:	bin/154928
Submitted by:	Eitan Adler <lists at eitanadler.com>
MFC after: 	3 days
2011-02-21 09:01:34 +00:00
jmallett
43ee1f2df3 Allow the platform code to return a bitmask of running cores rather than just
a number of cores, this allows for a sparse set of CPUs.  Implement support
for sparse core masks on Octeon.

XXX jeff@ suggests that all_cpus should include cores that are offline or
    running other applications/OSes, so the platform API should be further
    extended to allow us to set all_cpus to include all cores that are
    physically-present as opposed to only those that are running FreeBSD.

Submitted by:	Bhanu Prakash (with modifications)
Reviewed by:	jchandra
Glanced at by:	kib, jeff, jhb
2011-02-12 02:08:24 +00:00
gonzo
f62cda7154 - dump_avail layout should be sequence of [start, end)
pairs, not <start, size>.

Spotted by: alc@
2010-12-09 07:47:40 +00:00
gonzo
8ae51d5a21 - Populate dump_avail with proper values from phys_avail 2010-12-09 07:01:03 +00:00
imp
5e46e69674 Remove the 'machine mips' from DEFAULTS. Put the proper 'machine mips
mipsel' or 'machine mips mipseb' into the config file (with a few 64's
tossed in for good measure).  This will let us build the proper
kernels with different worlds as part of make universe.
2010-11-13 22:34:12 +00:00
neel
f11ed3a236 Enforce that 'pmap_kenter()' is only used to establish cacheable mappings.
Mappings with other cacheability attributes can be established, if needed,
by using 'pmap_kenter_attr()'.

Suggested by:	jchandra, imp
2010-09-22 02:26:07 +00:00
neel
310427c33e Make the meaning of the 'mask' argument to 'set_intr_mask(mask)' consistent
with the meaning of IM bits in the status register.

Reviewed by:	jmallett, jchandra
2010-09-15 05:10:50 +00:00
avg
c9fe8ad7f0 bus_add_child: change type of order parameter to u_int
This reflects actual type used to store and compare child device orders.
Change is mostly done via a Coccinelle (soon to be devel/coccinelle)
semantic patch.
Verified by LINT+modules kernel builds.

Followup to:	r212213
MFC after:	10 days
2010-09-10 11:19:03 +00:00
neel
6639a8f4cb Remove redundant declaration of 'pcib_driver' class from sb_zbpci.c. This
causes a compilation error.

The declaration is provided by sys/dev/pci/pcib_private.h starting from r210864.
2010-08-06 07:03:22 +00:00
neel
ee46b45a72 Use a signed integer to hold the address of a register.
This does the right thing by sign extending the address when compiling for
the n64 abi.
2010-08-06 05:30:55 +00:00
neel
e786965646 uint64_t is 'unsigned long' in n64 build, so compiler is unhappy if the
format specifier in printf is "%llu".

Use "%ju" instead.
2010-08-06 05:24:41 +00:00
neel
cd9a29536a Fix a race between clock_intr() and tick_ticker() when updating
'counter_upper' and 'counter_lower_last'. The race exists because
interrupts are enabled even though tick_ticker() executes in a
critical section.

Fix a bug in clock_intr() in how it updates the cached values of
'counter_upper' and 'counter_lower_last'. They are updated only
when the COUNT register rolls over. More interestingly it will *never*
update the cached values if 'counter_lower_last' happens to be zero.

Get rid of superfluous critical section in clock_intr(). There is no
reason to do this because clock_intr() executes in hard interrupt
context.

Switch back to using 'tick_ticker()' as the cpu ticker for Sibyte.

Reviewed by:	jmallett, mav
2010-08-05 04:59:54 +00:00
imp
7d38251667 Remove redunant machine/cpuregs.h include.
Also, spell things like in machine/cpuregs.h instead of machine/cpu.h.
2010-07-13 22:30:27 +00:00
neel
3e50c01a7f Fix Sibyte SMP kernel breakage caused by r208249.
We need to include the header file that provides declaration of the
smp_topo_none() function.
2010-05-18 05:12:54 +00:00
rrs
18ee1164c8 Adds JC's cleanup patches that fix it so
we call an platform dependant topo function as
well as clean up all the XLR specific ifdefs around
smp platform init.

Obtained from:	JC
2010-05-18 04:02:34 +00:00
jmallett
d92d4020c1 o) Remove default MAXMEM on SWARM; pmap can readily use lmem for >512M
physical addresses.
o) Set a local maxmem in sb_machdep.c to avoid trying to use pages over 2^64
   under 32-bit ABIs.  Our pmap needs corrected to use vm_paddr_t consistently,
   then we can make vm_paddr_t 64-bit under 32-bit ABIs and add code in pmap
   to limit phys_avail by the maximum PFN that a 32-bit PTE can hold.
2010-04-23 19:20:56 +00:00
neel
8457716f88 Replace sb_store64()/sb_load64() with mips3_sd()/mips3_ld() respectively.
Obtained from NetBSD.

Suggested by: jmallett@
2010-03-26 07:15:27 +00:00
neel
e17e52b7e2 Sibyte provides a 64-bit read-only counter that counts at half the processor
frequency. This counter can be accessed coherently from both cores.

Use this as the preferred timecounter for the SWARM kernels.

The CP0 COUNT register is unusable as the timecounter on SMP platforms because
the COUNT registers on different CPUs are not guaranteed to be in sync.
2010-03-20 05:49:06 +00:00
neel
acca987bde Make sure that the registers 'v0' and 'v1' are properly sign-extended
when sb_load64() returns.

Some 32-bit arithmetic operations (e.g. subu) have unpredicatable results
when operating on 64-bit registers that are not properly sign-extended.
2010-03-20 05:21:14 +00:00
neel
78a2d25433 Add support for CPUs with cache coherent DMA. The two main changes are:
- We don't need to fall back to uncacheable memory to satisfy BUS_DMA_COHERENT
  requests on these CPUs.

- The bus_dmamap_sync() is a no-op for these CPUs.

A side-effect of this change is rename DMAMAP_COHERENT flag to
DMAMAP_UNCACHEABLE. This conveys the purpose of the flag more accurately.

Reviewed by: gonzo, imp
2010-03-04 05:23:08 +00:00
neel
35bb948988 Various fixes to get the SWARM config working on a big-endian Sibyte CPU.
Getting the little-endian PCI bus working on the big-endian CPU proved to be
quite challenging. We let the PCI devices be mapped in the "match byte lanes"
address window. This is where they are mapped by the CFE and DMA transfers
generated to or from addresses within this window are not subject to automatic
byte-swapping.

However any access by the driver to memory-mapped pci space is redirected
via the "match bit lanes" address window. We get the benefit of automatic
byte swapping through this address window and drivers don't need to change
to deal with CPU big-endianness.
2010-02-17 06:43:37 +00:00
neel
f2eeadb198 Remove the PCI_IOSPACE_SIZE and PCI_IOSPACE_ADDR hack from nexus.c. Implement
this in the Sibyte PCI hostbridge driver instead.

The nexus driver sees resource allocation requests for memory and irq
resources only. These are legitimate resources on all MIPS platforms.

Suggested by: imp
2010-02-12 02:59:49 +00:00
neel
91212ae23c SMP support for the mips port.
The platform that supports SMP currently is a SWARM with a dual-core Sibyte
processor. The kernel config file to use is SWARM_SMP.

Reviewed by: imp, rrs
2010-02-09 06:24:43 +00:00
neel
0178318026 Initialize interrupt controller early on. 2010-02-05 03:22:04 +00:00
neel
5b7a1d2513 Reimplement all functions to access the system control unit in C.
The only reason we need to have the sb_load64() and sb_store64()
functions in assembly is to cheat the compiler and generate the
'ld' and 'sd' instructions which it otherwise will not do when
compiling for a 32-bit architecture. There are some 64-bit
registers in the SCD unit that must be accessed using 64-bit
load and store instructions.
2010-02-05 03:20:47 +00:00
neel
39dbfe1f76 style: don't need to use braces for single line control statements. 2010-02-05 02:40:42 +00:00
neel
481c7be91d Install the XTLB exception handler for Sibyte processors.
This is a workaround for the fact that the CFE is compiled as a 64-bit
application and therefore sets the SR_KX bit every time we call into
it (for e.g. console).

A TLB miss for any address above 0xc0000000 with the SR_KX bit set will
end up at the XTLB exception vector. We workaround this by copying the
standard TLB handler at the XTLB exception vector.

Approved by: imp (mentor)
2010-01-26 03:39:10 +00:00
gonzo
8a360e9b89 - Call post-boot fixup function in order to get proper static
symbols resolving in DDB
- When zeroing .bss/.sbss do not round end address to page boundary,
    it's not neccessary and might destroy data pased by trampoline or
    boot loader
2010-01-25 00:44:05 +00:00
neel
bd8fb9e267 Remove Sibyte specific code from locore.S that sets the k0seg coherency.
Move it to platform_start() instead.

Approved by: imp (mentor)
2010-01-23 03:19:13 +00:00
imp
9c4467c6ab Remove redundant interrupt mapper code. We don't need to disable the
interrupt sources feeding into a hardintr anymore. The
mips_mask_hard_irq() function does that for us while an interrupt is
being processed.

Submitted by:	neel@
2010-01-11 17:14:46 +00:00
imp
c7ec83b0be Get sb_zbpci.c compiling again after the macros PCI_BUSMAX,
PCI_SLOTMAX and PCI_FUNCMAX were moved to pcireg.h.

Submitted by:	neel@
2010-01-11 17:14:10 +00:00
imp
687f1a7fca Rename mips_pcpu_init to mips_pcpu0_init since it applies only to the
BSP.  Provide a missing prototype.
2010-01-09 03:08:22 +00:00
imp
382bd114d4 Centralize initialization of pcpu, and set curthread early... 2010-01-08 22:48:21 +00:00
neel
2fa2f73b38 Remove all CFE-specific code from locore.S. The CFE entrypoint initialization
is now done in platform-specific code.

Approved by: imp (mentor)
2010-01-06 06:42:08 +00:00
rrs
dd29cc7161 With this commit our friend RMI will now compile. I have
not tested it and the chances of it running yet are about
ZERO.. but it will now compile. The hard part now begins,
 making it run ;-)
2009-10-30 08:53:11 +00:00
rrs
012846ec6c Does 4 things:
1) Adds future RMI directories
2) Places intr_machdep.c in specfic files.arch pointing to the generic
   intr_machdep.c.  This allows us to have an architecture dependant intr_machdep.c
   (which we will need for RMI) in the machine specific directory
3) removes intr_machdep.c from files.mips
4) Adds some TARGET_XLR_XLS ifdef's for the machine specific intra_machdep.h. We
   may need to look at finding a better place to put this. But first I want to
   get this thing compiling.
2009-10-15 21:03:32 +00:00