signalled when the attribute address for the CF is 0 in the octeon
sysinfo structure. In this mode, the DATA port is 16-bits, but the
other ports are 8-bits, but on a 16-bit bus (so you have to access it
a short at a time, but only believe the lower byte). See the code for
more details on this slightly odd arrangement. I'm still not 100%
happy with the abstractions here on many levels (starting with the
globals for these settings, on down to no bus_space use, etc), but the
driver had these problems before the change.
Also, clean up the code a bit to make this support easier, and the
code a bit easier to read. I tried to follow existing style, but may
have missed a few spots. Add some comments.
Fix probe/attach routine to return a proper error for the simulator.
With this change, my EBH5200 eval board now recognizes the CF well
enough to boot to the login prompt. Before it would say it never
became ready. My CN3010-EVB-HS5 still boots properly. My older
CN3860-based board won't load the 64-bit kernel, either before or
after the change, and I didn't chase that down.
(reporting IFM_LOOP based on BMCR_LOOP is left in place though as
it might provide useful for debugging). For most mii(4) drivers it
was unclear whether the PHYs driven by them actually support
loopback or not. Moreover, typically loopback mode also needs to
be activated on the MAC, which none of the Ethernet drivers using
mii(4) implements. Given that loopback media has no real use (and
obviously hardly had a chance to actually work) besides for driver
development (which just loopback mode should be sufficient for
though, i.e one doesn't necessary need support for loopback media)
support for it is just dropped as both NetBSD and OpenBSD already
did quite some time ago.
- Let mii_phy_add_media() also announce the support of IFM_NONE.
- Restructure the PHY entry points to use a structure of entry points
instead of discrete function pointers, and extend this to include
a "reset" entry point. Make sure any PHY-specific reset routine is
always used, and provide one for lxtphy(4) which disables MII
interrupts (as is done for a few other PHYs we have drivers for).
This includes changing NIC drivers which previously just called the
generic mii_phy_reset() to now actually call the PHY-specific reset
routine, which might be crucial in some cases. While at it, the
redundant checks in these NIC drivers for mii->mii_instance not being
zero before calling the reset routines were removed because as soon
as one PHY driver attaches mii->mii_instance is incremented and we
hardly can end up in their media change callbacks etc if no PHY driver
has attached as mii_attach() would have failed in that case and not
attach a miibus(4) instance.
Consequently, NIC drivers now no longer should call mii_phy_reset()
directly, so it was removed from EXPORT_SYMS.
- Add a mii_phy_dev_attach() as a companion helper to mii_phy_dev_probe().
The purpose of that function is to perform the common steps to attach
a PHY driver instance and to hook it up to the miibus(4) instance and to
optionally also handle the probing, addition and initialization of the
supported media. So all a PHY driver without any special requirements
has to do in its bus attach method is to call mii_phy_dev_attach()
along with PHY-specific MIIF_* flags, a pointer to its PHY functions
and the add_media set to one. All PHY drivers were updated to take
advantage of mii_phy_dev_attach() as appropriate. Along with these
changes the capability mask was added to the mii_softc structure so
PHY drivers taking advantage of mii_phy_dev_attach() but still
handling media on their own do not need to fiddle with the MII attach
arguments anyway.
- Keep track of the PHY offset in the mii_softc structure. This is done
for compatibility with NetBSD/OpenBSD.
- Keep track of the PHY's OUI, model and revision in the mii_softc
structure. Several PHY drivers require this information also after
attaching and previously had to wrap their own softc around mii_softc.
NetBSD/OpenBSD also keep track of the model and revision on their
mii_softc structure. All PHY drivers were updated to take advantage
as appropriate.
- Convert the mebers of the MII data structure to unsigned where
appropriate. This is partly inspired by NetBSD/OpenBSD.
- According to IEEE 802.3-2002 the bits actually have to be reversed
when mapping an OUI to the MII ID registers. All PHY drivers and
miidevs where changed as necessary. Actually this now again allows to
largely share miidevs with NetBSD, which fixed this problem already
9 years ago. Consequently miidevs was synced as far as possible.
- Add MIIF_NOMANPAUSE and mii_phy_flowstatus() calls to drivers that
weren't explicitly converted to support flow control before. It's
unclear whether flow control actually works with these but typically
it should and their net behavior should be more correct with these
changes in place than without if the MAC driver sets MIIF_DOPAUSE.
Obtained from: NetBSD (partially)
Reviewed by: yongari (earlier version), silence on arch@ and net@
a number of cores, this allows for a sparse set of CPUs. Implement support
for sparse core masks on Octeon.
XXX jeff@ suggests that all_cpus should include cores that are offline or
running other applications/OSes, so the platform API should be further
extended to allow us to set all_cpus to include all cores that are
physically-present as opposed to only those that are running FreeBSD.
Submitted by: Bhanu Prakash (with modifications)
Reviewed by: jchandra
Glanced at by: kib, jeff, jhb
o) Clear/acknowledge receive interrupt at end of thread. This gives the
management interfaces performance on the order of 100Mbps rather than
the previous level of 10Mbps on my MR-730.
o) Add 'octm', a trivial driver for the 10/100 management ports found on some
Octeon systems.
o) Make the Simple Executive's management port helper routines compile on
FreeBSD (namely by not doing math on void pointers.)
o) Add a cvmx_mgmt_port_sendm routine to the Simple Executive to send an mbuf
so there is only one copy in the transmit path, rather than having to first
copy the mbuf to an intermediate buffer and then copy that to the Simple
Executive's transmit ring.
o) Properly work out MII addresses of management ports on the Lanner MR-730.
XXX The MR-730 also needs some patches to the MII read/write routines, but
this is sufficient for now. Media detection will be fixed in the future
when I can spend more time reading the vendor-supplied patches.
quite awful, because e.g. 4 packets will come in and get processed on 4
different cores at the same time, really battling with the TCP stack quite
painfully. For now, just run one task at a time.
This gets performance up in most cases to where it was before the correctness
fixes that got interrupts to run on all cores (except in high-load TCP transmit
cases where all we're handling receive for is ACKs) and in some cases it's
better now. What would be ideal would be to use a more advanced interrupt
mitigation strategy and possibly to use different workqueue groups per port for
multi-port systems, and so on, but this is a fine stopgap.
o) Make the octeon_wdog driver work on multi-CPU systems and to also print more
information on NMI that may aid debugging. Simplify and clean up internal
API and structure.
o) There's no good reason to make the low bits of the ebase the core
number. While per-CPU exception bases would be nice, for now we just
need to make ebase the same on all cores.
2MB of memory in the bootmem allocator for the SDK to use internally at a later
point. It'd be nice if there were some functions we could call before
allocating memory to let various facilities reserve some memory, but for now
this seems sufficient. Previously some unfortunate systems could give up all
(or at least most) of their memory to the kernel from bootmem, and then
allocating command queues for packet output and the like would fail later in
the boot process (which in turn would lead to crashes even later.)
Reported by: kan
link state polling or media-specific ones, while avoidiing changing link state
on interfaces that use miibus; this substantially speeds up link time on
interface (re)initialization.
list on exit from the transmit path. The scatter-gather list itself can be
asynchronously DMAed to the transmit hardware, and we could actually lock up
the transmitter if any of a number of races around this were lost.
Instead, let the PKO free the scatter-gather list when it is done with it, and
use the "i" bit in each segment of the packet to avoid having them go into the
FPA.
This fixes an unrecoverable transmit stall under transmit load.
MFC after: 3 days
facilities as well as support for the Octeon 2 family of SoCs.
XXX Note that with our antediluvian assembler, we can't support some Octeon 2
instructions and fall back to using the old ones instead.
o) Remove some options that are configurable on Linux but not FreeBSD.
o) Centralize open/poll/stop routines for XAUI and SGMII and use the common
uninit routine directly rather than providing a wrapper for it. The init
functions for these interfaces are now identical and the common init routine
could merge in setting those function pointers except that some hardware
seems to use no open/poll/stop method?
mipsel' or 'machine mips mipseb' into the config file (with a few 64's
tossed in for good measure). This will let us build the proper
kernels with different worlds as part of make universe.
the NIC drivers as well as the PHY drivers to take advantage of the
mii_attach() introduced in r213878 to get rid of certain hacks. For
the most part these were:
- Artificially limiting miibus_{read,write}reg methods to certain PHY
addresses; we now let mii_attach() only probe the PHY at the desired
address(es) instead.
- PHY drivers setting MIIF_* flags based on the NIC driver they hang
off from, partly even based on grabbing and using the softc of the
parent; we now pass these flags down from the NIC to the PHY drivers
via mii_attach(). This got us rid of all such hacks except those of
brgphy() in combination with bce(4) and bge(4), which is way beyond
what can be expressed with simple flags.
While at it, I took the opportunity to change the NIC drivers to pass
up the error returned by mii_attach() (previously by mii_phy_probe())
and unify the error message used in this case where and as appropriate
as mii_attach() actually can fail for a number of reasons, not just
because of no PHY(s) being present at the expected address(es).
Reviewed by: jhb, yongari
using miibus, since for some devices that use multiple addresses on the bus,
going through miibus may be unclear, and for devices that are not standard
MII PHYs, miibus may throw a fit, necessitating complicated interfaces to
fake the interface that it expects during probe/attach.
o) Make the mv88e61xx SMI interface in octe attach a PHY directly and fix some
mistakes in the code that resulted from trying too hard to present a nice
interface to miibus.
o) Add a PHY driver for the mv88e61xx. If attached (it is optional in kernel
compiles so the default behavior of having a dumb switch is preserved) it
will place the switch in a VLAN-tagging mode such that each physical port
has a VLAN associated with it and interfaces for the VLANs can be created to
address or bridge between them.
XXX It would be nice for this to be part of a single module including the
SMI interface, and for it to fit into a generic switch configuration
framework and for it to use DSA rather than VLANs, but this is a start
and gives some sense of the parameters of such frameworks that are not
currently present in FreeBSD. In lieu of a switch configuration
interface, per-port media status and VLAN settings are in a sysctl tree.
XXX There may be some minor nits remaining in the handling of broadcast,
multicast and unknown destination traffic. It would also be nice to go
through and replace the few remaining magic numbers with macros at some
point in the future.
XXX This has only been tested with the MV88E6161, but it should work with
minimal or no modification on related switches, so support for probing
them was included.
Thanks to Pat Saavedra of TELoIP and Rafal Jaworowski of Semihalf for their
assistance in understanding the switch chipset.
the miibus attached to octe interfaces.
o) Add an SMI/MDIO interface to the MV88E61XX and use it for the switch PHY on
the Lanner MR-320. An actual driver for the switch PHY will come later.
Note that for now it intercepts and fakes MII_BMSR reads to prevent the
miibus from talking to anything but the switch itself.
bus interface does that's special here now is to use a 64-bit register size.
In theory, uart(4) ought to support a regsz as well as regshft and support
64-bit registers directly.
Also use the UART class's range rather than a hand-coded 1024 for the address
range.
o) Give a virtual address for I/O ports on n64.
o) On the Portwell CAM-0100, return the right IRQ for the on-board SATA.
o) Except on bridges, only set PORTEN and MEMEN on devices that have I/O or
memory BARs respectively.
o) Disable PORTEN and MEMEN while reprogramming BARs.
o) On the Lanner MR-955, set the Tx DMA power register for the on-board Promise
SATA controller.
