value that can't ever be in an inconsistant intermediate state even when
some other thread is in the middle of writing the value/register.
Locking of the hardware remains in the few places that do r-m-w operations.
Locking of metadata access is restricted to places using memcpy or sprintf
to modify the metadata.
oddly separated from related functionality. This just moves some blocks
of code around so that setup_intr and teardown_intr are near each other
again, and likewise for enable/disable_intr. No functional changes.
Previously, the ACPI PCI bus driver did a single pass over the devices in
the namespace that were a child of a given PCI bus to associate the
PCI bus-enumerated device_t devices with the corresponding ACPI handles.
However, this meant that handles were only established at runtime for devices
found during the initial PCI bus scan.
PCI_IOV adds devices that show up after the initial PCI bus scan, and coming
changes to add a bus rescan can also add devices after the initial scan.
This change adds a pci_child_added() callback to the ACPI PCI bus that walks
the namespace to find the ACPI handle for each device that is added. Using
a callback means that the handle is correctly set for any device no matter
how it is added (initial scan, IOV, or a bus rescan).
This matches with uudecode's -r option to decode raw data without initial and
final framing lines.
$ echo Test | uuencode -mr - | uudecode -mr
Test
Approved by: cognet
MFC after: 1 week
registered into global interrupt table. Thus, they must be filtered out
like per-cpu interrupts. Fortunately, it does not influence anything
on interrupt controllers which already use INTRNG.
GPIO controller drivers import.
As with other Ralink/Mediatek work, there are 2 versions of the GPIO
controller driver, depending on the type of SoC.
This revision introduces initial support for these.
Approved by: adrian (mentor)
Sponsored by: Smartcom - Bulgaria AD
Differential Revision: https://reviews.freebsd.org/D5877
This made impossible spare disk open by known path, which kind of worked
only because the same fix was applied to vdev_geom_attach_by_guids() in
r293708.
MFC after: 1 week
SPI drivers for the various Ralink/Mediatek SoCs. There are 2 versions of
the SPI controller (so far) present in the supported SoCs, hence v1 and v2
drivers.
Approved by: adrian (mentor)
Sponsored by: Smartcom - Bulgaria AD
Differential Revision: https://reviews.freebsd.org/D5842
USB support
This revision adds USB (EHCI/OHCI/OTG, depending on SoC type) support for
various Ralink/Mediatek SoCs.
Currently USB is not supported on MT7621, this will be a future addition.
A USB PHY driver is also included, so that we can properly initialize the
USB PHY (e.g., clocks, resets, registers where needed), before attempting
to initialize EHCI/OHCI/OTG functionality.
Approved by: adrian (mentor)
Sponsored by: Smartcom - Bulgaria AD
Differential Revision: https://reviews.freebsd.org/D5841
UART drivers.
- uart_dev_mtk.[ch] are the old-style Mediatek/Ralink-specific UART driver
as also found in sys/mips/rt305x/uart_dev_rt305x.c, with minor improvements
and FDT attachment enabled for the appropriate SoCs.
- uart_dev_mtk_ns8250.c is the new-style ns16550a-compatible UART driver
found in newer Mediatek SoCs. It uses the uart_dev_ns8250.c driver
indirectly and is basically just a wrapper around it and only overrides its
probe method.
The reason I am not using the uart_dev_ns8250.c driver directly is because
I have some code that does UART clock detection before initializing the
UART, so that we don't need to hard-code the UART clock frequency in the
dts files for each board.
Approved by: adrian (mentor)
Sponsored by: Smartcom - Bulgaria AD
Differential Revision: https://reviews.freebsd.org/D5840
Interrupt controllers found in various Mediatek/Ralink SoCs.
mtk_intr_v1 and mtk_intr_v2 are basically the same at the moment, with
just different register mappings.
However, v1 interrupt controller has a subset of the functionality of the
v2 interrupt controller, so in the future the v2 interrupt controller driver
may be enhanced, if needed, with things like level/edge interrupts and soft
interrupts. So, for the moment I suggest we keep them as 2 separate files.
mtk_intr_gic provides very basic (similar to v1 and v2) support for MIPS GIC
controllers, which currently maps all interrupts to a single core and sets
them to type level, active high. In the future this may be developed into a
generic GIC controller to support any new MIPS SoCs that include it. The GIC
is a standard MTI interrupt controller in their multi-core line-up (e.g.,
1004K, 1074K, etc.), rather than a SoC-specific controller.
Approved by: adrian (mentor)
Sponsored by: Smartcom - Bulgaria AD
Differential Revision: https://reviews.freebsd.org/D5839
This revision adds the following to the Mediatek/Ralink support:
- initial support for "clocks" FDT property, currently based on fdt_clock
- initial support for "resets" FDT property, currently based on the
fdt_reset interface from D5826
- initial support for "pinctrl,bits" functionality via FDT. May be extended
in the future to cover a better and fuller pinctrl implementation
Approved by: adrian (mentor)
Sponsored by: Smartcom - Bulgaria AD
Differential Revision: https://reviews.freebsd.org/D5827
- machine dependent low level init code
- SoC clocks detection and some utility functions
- Common interface to read/write/modify SoC system control registers, used
by some of the other drivers and utility functions
- simple FDT resets support, based on the fdt_clock implementation already
in the tree. For the moment resets and clocks are managed using these
implementations. I am planning to port those to the new extres framework
in the future, but currently I simply don't have time to do this part too.
Approved by: adrian (mentor)
Sponsored by: Smartcom - Bulgaria AD
Differential Revision: https://reviews.freebsd.org/D5826
SR-IOV devices usually use Alternative Routing ID (ARI).
In that case slot/device is always assumed to be 0 and
function/identifier is extended to 8 bits.
Fix interrupts delivery to VF IDs beyond 8 by using a correct
DevID if ARI is enabled.
Reviewed by: jhb, wma
Obtained from: Semihalf
Sponsored by: Cavium
Differential Revision: https://reviews.freebsd.org/D5855
adds the new I-Data (Interleaved Data) message. This allows a user
to be able to have complete freedom from Head Of Line blocking that
was previously there due to the in-ability to send multiple large
messages without the TSN's being in sequence. The code as been
tested with Michaels various packet drill scripts as well as
inter-networking between the IETF's location in Argentina and Germany.
The SoCs I've tried the driver with include the following:
RT3050, RT5350, RT3662, RT3883, MT7620, MT7621, MT7688.
On boards, based on the above SoCs traffic is passing through correctly
and the boards survive a flood ping with very little or no drops (drops
may be caused elsewhere in my test setup, however).
One issue still remains and needs to be fixed in the future: if_rt does
not survive an ifconfig rt0 down/ifconfig rt0 up cycle.
This issue existed before this commit as well, however.
Reviewed by: ray
Approved by: adrian (mentor)
Sponsored by: Smartcom - Bulgaria AD
Differential Revision: https://reviews.freebsd.org/D5864
Suggested by: jhb
Reviewed by: Dexuan Cui <decui microsoft com>, Jun Su <junsu microsoft com>
Sponsored by: Microsoft OSTC
Differential Revision: https://reviews.freebsd.org/D5850
It is needed by the hypervisor FreeBSD guest to allocate/free private
interrupt vectors.
Reviewed by: kib, jhb, Dexuan Cui <decui microsoft com>
Sponsored by: Microsoft OSTC
Differential Revision: https://reviews.freebsd.org/D5849
FreeBSD doesn't specifically list this as a supported error, and in some
configurations/versions of FreeBSD, this test will segfault as the memory
address might be evaluated in userspace, instead of in kernel space like
in NetBSD.
MFC after: 1 week
Sponsored by: EMC / Isilon Storage Division
First of all sema_post() can't be called w/ spinlock, and the channel
message queue processing is not on hot code path, i.e. spinlock is not
necessary.
Submitted by: Jun Su <junsu microsoft com>
Reviewed by: sephe, Dexuan Cui <decui microsoft com>
MFC after: 1 week
Sponsored by: Microsoft OSTC
Differential Revision: https://reviews.freebsd.org/D5812
Since atomic_thread_fence_seq_cst() will become compiler fence on UP kernel.
Reviewed by: kib, Dexuan Cui <decui microsoft com>
MFC after: 1 week
Sponsored by: Microsoft OSTC
Differential Revision: https://reviews.freebsd.org/D5852
for limiting disk (actually filesystem) IO.
Note that in some cases these limits are not quite precise. It's ok,
as long as it's within some reasonable bounds.
Testing - and review of the code, in particular the VFS and VM parts - is
very welcome.
MFC after: 1 month
Relnotes: yes
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D5080
for bad packets are named ipf_fi_bad_*. An example of its use might be:
dtrace -n 'sdt:::ipf_fi_bad_* { stack(); }'
Reviewed by: Darren Reed <darrenr@reed.wattle.id.au>
Add support for 4k sector GELI encrypted partitions to the bootloader
This is the default created by the installer
Because the IV is different for each sector, and the XTS tweak carries forward you can not decrypt a partial sector if the starting offset is not 0
Make boot2 and the loader read in 4k aligned chunks
Reviewed by: ed, oshogbo
Sponsored by: ScaleEngine Inc.
Differential Revision: https://reviews.freebsd.org/D5820
This fixes a major performance regression when reading db files such as
the pw database during a 'pkg install'.
MFC after: 1 week
Tested by: bapt
Reviewed by: bapt
Sponsored by: EMC / Isilon Storage Division
Differential Revision: https://reviews.freebsd.org/D5868
We're currently seeing how hard it would be to run CloudABI binaries on
operating systems cannot be modified easily (Windows, Mac OS X). The
idea is that we want to just run them without any sandboxing. Now
that CloudABI executables are PIE, this is already a bit easier, but TLS
is still problematic:
- CloudABI executables want to write to the %fs, which typically
requires extra system calls by the emulator every time it needs to
switch between CloudABI's and its own TLS.
- If CloudABI executables overwrite the %fs base unconditionally, it
also becomes harder for the emulator to store a backup of the old
value of %fs. To solve this, let's no longer overwrite %fs, but just
%fs:0.
As CloudABI's C library does not use a TCB, this space can now be used
by an emulator to keep track of its internal state. The executable can
now safely overwrite %fs:0, as long as it makes sure that the TCB is
copied over to the new TLS area.
Ensure that there is an initial TLS area set up when the process starts,
only containing a bogus TCB. We don't really care about its contents on
FreeBSD.
Reviewed by: kib
Differential Revision: https://reviews.freebsd.org/D5836
Allow using DTRACE for performance analysis of userspace
applications - the function call stack can be captured.
This is almost an exact copy of AMD64 solution.
Obtained from: Semihalf
Sponsored by: Cavium
Reviewed by: emaste, gnn, jhibbits
Differential Revision: https://reviews.freebsd.org/D5779
Instead of providing a wrapper around device_delete_child() that the PCI
bus and child bus drivers must call explicitly, move the bulk of the logic
from pci_delete_child() into a bus_child_deleted() method
(pci_child_deleted()). This allows PCI devices to be safely deleted via
device_delete_child().
- Add a bus_child_deleted method to the ACPI PCI bus which clears the
device_t associated with the corresponding ACPI handle in addition to
the normal PCI bus cleanup.
- Change cardbus_detach_card to call device_delete_children() and move
CardBus-specific delete logic into a new cardbus_child_deleted() method.
- Use device_delete_child() instead of pci_delete_child() in the SRIOV code.
- Add a bus_child_deleted method to the OpenFirmware PCI bus drivers which
frees the OpenFirmware device info for each PCI device.
Reviewed by: imp
Tested on: amd64 (CardBus and PCI-e hotplug)
Differential Revision: https://reviews.freebsd.org/D5831
