Add devargs to configure the platform specific getwork mode.
CN9K getwork mode by default is set to use dual workslot mode.
Add option to force single workslot mode.
Example:
--dev "0002:0e:00.0,single_ws=1"
CN10K supports multiple getwork prefetch modes, by default the
prefetch mode is set to none.
Add option to select getwork prefetch mode
Example:
--dev "0002:1e:00.0,gw_mode=1"
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
SSO HWGRPs i.e. queue uses DRAM & SRAM buffers to hold in-flight
events. By default the buffers are assigned to the SSO HWGRPs to
satisfy minimum HW requirements. SSO is free to assign the remaining
buffers to HWGRPs based on a preconfigured threshold.
We can control the QoS of SSO HWGRP by modifying the above mentioned
thresholds. HWGRPs that have higher importance can be assigned higher
thresholds than the rest.
Example:
--dev "0002:0e:00.0,qos=[1-50-50-50]" // [Qx-XAQ-TAQ-IAQ]
Qx -> Event queue Aka SSO GGRP.
XAQ -> DRAM In-flights.
TAQ & IAQ -> SRAM In-flights.
The values need to be expressed in terms of percentages, 0 represents
default.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
The number of events for a *open system* event device is specified
as -1 as per the eventdev specification.
Since, SSO inflight events are only limited by DRAM size, the
xae_cnt devargs parameter is introduced to provide upper limit for
in-flight events.
Example:
--dev "0002:0e:00.0,xae_cnt=8192"
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Allocate buffers in DRAM that hold inflight events.
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Add platform specific event device configuration that attaches the
requested number of SSO HWS(event ports) and HWGRP(event queues) LFs
to the RVU PF/VF.
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Add platform specific event device probe and remove, also add
event device info get function.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Add the info_get function to return details on the queues, flow,
prioritization capabilities, etc. which this device has.
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Add meson build infra structure along with the event device
SSO initialization and teardown functions.
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Ray Kinsella <mdr@ashroe.eu>
Convert code to use x86 vector instructions, thereby significantly
improving dequeue performance.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Signed-off-by: Harry van Haaren <harry.van.haaren@intel.com>
The new devarg names and their default values
are listed below. The defaults have not changed, and
none of these parameters are accessed in the fast path.
poll_interval=1000
sw_credit_quantai=32
default_depth_thresh=256
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
All references to the old register map have been removed,
so it is safe to rename the new combined file that supports
both DLB v2.0 and DLB v2.5. Also fixed all places where this
file is included.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
As support for DLB v2.5 was added, modifications were made to
dlb_hw_types_new.h, but the old file needed to be preserved during
the port in order to meet the requirement that individual patches in
a series each compile successfully. Since the DLB v2.5 support is
completely integrated, it is now safe to remove the old (original)
file, as well as the DLB2_USE_NEW_HEADERS define that was used to
control which version of the file was to be included in certain
source files.
It is now safe to rename the new file, and use it unconditionally
in all DLB source files.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
The file dlb_resource_new.c now contains all of the low level
functions required to support both DLB v2.0 and DLB v2.5, and
the original file (dlb_resource.c) was removed in the previous
commit, so rename dlb_resource_new.c to dlb_resource.c, and
update the meson build file so that the new file is built.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
A temporary version of dlb_resource.h (dlb_resource_new.h) was used
by the previous commits in this patch series. Merge the two files
now that DLB v2.5 support has been fully added to dlb_resource.c.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Update the low level HW functions that perform the sequence number
management functions. These include getting a groups number of
sequence numbers per queue, managing in-use slots, getting the
current occupancy, and setting sequence numbers for a group.
The logic is very similar to what was done for v2.0,
but the new combined register map for v2.0 and v2.5
uses new register names and bit names. Additionally,
new register access macros are used so that the code
can perform the correct action, based on the hardware.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Update the low level HW functions responsible for
configuring sparse CQ mode, where each cache line
contains just one QE instead of 4.
The logic is very similar to what was done for v2.0,
but the new combined register map for v2.0 and v2.5
uses new register names and bit names. Additionally,
new register access macros are used so that the code
can perform the correct action, based on the hardware.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Update the low level HW functions responsible for
finishing the queue map/unmap operation, which is an
asynchronous operation.
The logic is very similar to what was done for v2.0,
but the new combined register map for v2.0 and v2.5
uses new register names and bit names. Additionally,
new register access macros are used so that the code
can perform the correct action, based on the hardware.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Update the low level hardware functions responsible for
getting the queue depth. The command arguments are also
validated.
The logic is very similar to what was done for v2.0,
but the new combined register map for v2.0 and v2.5
uses new register names and bit names. Additionally,
new register access macros are used so that the code
can perform the correct action, based on the hardware.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
DLB v2.5 uses a different credit scheme than was used in DLB v2.0 .
Specifically, there is a single credit pool for both load balanced
and directed traffic, instead of a separate pool for each as is
found with DLB v2.0.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Update the low level HW functions responsible for
starting the scheduling domain. Once a domain is
started, its resources can no longer be configured,
except for QID remapping and port enable/disable.
The start domain arguments are validated, and an error
is returned if validation fails, or if the domain is
not configured or has already been started.
The logic is very similar to what was done for v2.0,
but the new combined register map for v2.0 and v2.5
uses new register names and bit names. Additionally,
new register access macros are used so that the code
can perform the correct action, based on the hardware.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Update the low level HW functions responsible for
removing the linkage between a queue and a load
balanced port. Runtime checks are performed on the
port and queue to make sure the state is appropriate
for the unmap operation, and the unmap arguments
are also validated.
The logic is very similar to what was done for v2.0,
but the new combined register map for v2.0 and v2.5
uses new register names and bit names. Additionally,
new register access macros are used so that the code
can perform the correct action, based on the hardware.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Update the low level HW functions responsible for
mapping queues to ports. These functions also validate
the map arguments and verify that the maximum number
of queues linked to a load balanced port does not
exceed the capabilities of the hardware.
The logic is very similar to what was done for v2.0,
but the new combined register map for v2.0 and v2.5
uses new register names and bit names. Additionally,
new register access macros are used so that the code
can perform the correct action, based on the hardware
version, v2.0 or v2.5.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Update the low level HW functions responsible for
creating directed queues. These functions configure
the depth threshold, configure queue depth, and
validate the queue creation arguments.
The logic is very similar to what was done for v2.0,
but the new combined register map for v2.0 and v2.5
uses new register names and bit names. Additionally,
new register access macros are used so that the code
can perform the correct action, based on the hardware
version, v2.0 or v2.5.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Update the low level HW functions responsible for
creating directed ports. These functions create the
producer port (PP), configure the consumer queue (CQ),
configure queue depth, and validate the port creation
arguments.
The logic is very similar to what was done for v2.0,
but the new combined register map for v2.0 and v2.5
uses new register names and bit names. Additionally,
new register access macros are used so that the code
can perform the correct action, based on the hardware
version, v2.0 or v2.5.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Update the low level HW functions responsible for
creating load balanced ports. These functions create the
producer port (PP), configure the consumer queue (CQ), and
validate the port creation arguments.
The logic is very similar to what was done for v2.0,
but the new combined register map for v2.0 and v2.5
uses new register names and bit names. Additionally,
new register access macros are used so that the code
can perform the correct action, based on the hardware
version, v2.0 or v2.5.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Updated low level hardware functions related to configuring
load balanced queues. These functions create the queues,
as well as attach related resources required by load
balanced queues, such as sequence numbers.
The logic is very similar to what was done for v2.0,
but the new combined register map for v2.0 and v2.5
uses new register names and bit names. Additionally,
new register access macros are used so that the code
can perform the correct action based on the hardware
version, v2.0 or v2.5.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reset hardware registers, consumer queues, ports,
interrupts and software. Queues must also be drained
as part of the reset process.
The logic is very similar to what was done for v2.0,
but the new combined register map for v2.0 and v2.5
uses new register names and bit names. Additionally,
new register access macros are used so that the code
can perform the correct action, based on the hardware
version, v2.0 or v2.5.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Update domain creation logic to account for DLB v2.5
credit scheme, new register map, and new register access
macros.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
DLB v2.5 uses a new credit scheme, where directed and load balanced
credits are unified, instead of having separate directed and load
balanced credit pools.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Add support for DLB v2.5 probe-time hardware init,
and sets up a framework for incorporating the remaining
changes required to support DLB v2.5.
DLB v2.0 and DLB v2.5 are similar in many respects, but their
register offsets and definitions are different. As a result of these,
differences, the low level hardware functions must take the device
version into consideration. This requires that the hardware version be
passed to many of the low level functions, so that the PMD can
take the appropriate action based on the device version.
To ease the transition and keep the individual patches small, three
temporary files are added in this commit. These files have "new"
in their names. The files with "new" contain changes specific to a
consolidated PMD that supports both DLB v2.0 and DLB 2.5. Their sister
files of the same name (minus "new") contain the old DLB v2.0 specific
code. The intent is to remove code from the original files as that code
is ported to the combined DLB 2.0/2.5 PMD model and added to the "new"
files in a series of commits. At end of the patch series, the old files
will be empty and the "new" files will have the logic needed
to implement a single PMD that supports both DLB v2.0 and DLB v2.5.
At that time, the original DLB v2.0 specific files will be deleted,
and the "new" files will be renamed and replace them.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Add auto-generated register definitions, updated to
support both DLB v2.0 and v2.5 devices.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
This commit adds dlb v2.5 probe support, and updates
parameter parsing.
The dlb v2.5 device differs from dlb v2, in that the
number of resources (ports, queues, ...) is different,
so macros have been added to take the device version
into account.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
- Remove references of FPGA.
- Do not include dlb2_mbox.h as it is not needed.
- Remove duplicate macros/defines that were
present in both dlb2_priv.h and dlb2_hw_types.h.
Update dlb2_resource.c to include dlb2_priv.h
so that it picks up the macros/defines that
have now been consolidated.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Configure xaq pool based on number of in-use crypto queues to avoid CPT
add work failure due to xaq buffer run out. This patch configures
OTX2_CPT_DEFAULT_CMD_QLEN number of xae entries per queue pair.
Fixes: 29768f78d5 ("event/octeontx2: add crypto adapter framework")
Cc: stable@dpdk.org
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Acked-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Parameter queue_pair_id of crypto adapter queue pair add/del operation
can be -1 to select all pre configured crypto queue pairs. Added support
for the same in driver. Also added a member in cpt qp structure to
indicate binding state of a queue pair to an event queue.
Fixes: 29768f78d5 ("event/octeontx2: add crypto adapter framework")
Cc: stable@dpdk.org
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Acked-by: Ankur Dwivedi <adwivedi@marvell.com>
Ensure all lists of drivers are standardized:
* one driver per line
* lists double-indented with spaces (as they are line continuations)
* elements in alphabetical order
* opening and closing list brackets "[" & "]" on own lines
* last element has trailing comma
Any code snippets in the list files is adjusted to single-indent using
whitespace to correspond to the new style also.
The lists of standard library dependencies per class, and other short
lists are not formatted one-per-line as these lists are not expected to
grow beyond 2 or 3 entries.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
These headers are used but not included explicitly, including them.
"arpa/inet.h" is included for 'htons' and friends.
"netinet/in.h" is included for 'IPPROTO_IP'.
Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Rasesh Mody <rmody@marvell.com>
When device is re-configured, memory allocated for work slot is freed
and new memory is allocated. Due to this we may loose some important
configurations/mappings done with initial work slot memory.
For example, whenever rte_event_eth_tx_adapter_queue_add is called
some important meta i.e. txq handle is stored in work slot structure.
If device gets reconfigured after this tx adaptor add, txq to work
slot mapping will be lost resulting in seg fault during packet
processing, as txq handle could not be retrieved from work slot.
Fixes: 67b5f46864 ("event/octeontx2: add port config functions")
Cc: stable@dpdk.org
Signed-off-by: Harman Kalra <hkalra@marvell.com>
Use virtual counter for estimating current bucket as PMU cannot be
reliably used to estimate time.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Reduce amount of memory used by chunk pool when the mempool used
is OCTEONTX2 NPA.
Previously, the number of chunks configured when NPA is used is
equal to the number of timers requested plus the number of buckets
and if the max timeout is long enough w.r.t. resolution requested
there will a large number of buckets which would cause high memory
usage.
Reduce the number of chunks when NPA is used to the number of timers
requested as buckets that are processed chunk lists are automatically
freed.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Simplify timer bucket estimation we need not align buckets to
power of 2 instead use reciprocal division to compute mod.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
When XAQ pool is being re-configured, and if the same memzone
is used for fc_mem when freeing the old mempool the fc_mem
will be incorrectly updated with the free count.
Fixes: ffa4ec0b60 ("event/octeontx2: allow adapters to resize inflight buffers")
Cc: stable@dpdk.org
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Remove event/dlb driver from DPDK code base.
Updated release note's removal section to reflect the same.
Also updated doc/guides/rel_notes/release_20_11.rst to fix the
the missing link issue due to removal of doc/guides/eventdevs/dlb.rst
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Today it is difficult to know if the SW Eventdev PMD is making
forward progress when it runs an iteration of its service. This
commit adds two xstats to give better visibility to the application.
The new xstats provide an application with which Eventdev ports
received work in the last iteration of scheduling, as well if
forward progress was made by the scheduler.
This patch implements an xstat for the SW PMD that exposes a
bitmask of ports that were scheduled to. In the unlikely case
that the SW PMD instance has 64 or more ports, return UINT64_MAX.
Signed-off-by: Harry van Haaren <harry.van.haaren@intel.com>
The header file fcntl.h should not be included from sys/ directory
as done in dlb drivers, it is an error with musl libc.
Fixes: 19980083fd ("event/dlb: add eventdev probe")
Fixes: 5433956d51 ("event/dlb2: add eventdev probe")
Cc: stable@dpdk.org
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Acked-by: David Marchand <david.marchand@redhat.com>
Acked-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
The page size is often retrieved from the macro PAGE_SIZE.
If PAGE_SIZE is not defined, it is either using hard coded default,
or getting the system value from the UNIX-only function sysconf().
Such definitions are replaced with the generic function
rte_mem_page_size() defined for each supported OS.
Removing PAGE_SIZE definitions will fix dlb drivers for musl libc,
because #ifdef checks were missing, causing redefinition errors.
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Andrew Boyer <aboyer@pensando.io>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Acked-by: David Marchand <david.marchand@redhat.com>
Acked-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Rename PKT_RX_EIP_CKSUM_BAD to PKT_RX_OUTER_IP_CKSUM_BAD and
deprecate the original name. The new name is better aligned
with existing PKT_RX_OUTER_* flags, which should help reduce
confusion about its use.
Suggested-by: Ferruh Yigit <ferruh.yigit@intel.com>
Signed-off-by: Lance Richardson <lance.richardson@broadcom.com>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
The rte_eventdev_pmd*.h files are for drivers only and should be private
to DPDK, and not installed for app use.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
The rte_ethdev_driver.h, rte_ethdev_vdev.h and rte_ethdev_pci.h files are
for drivers only and should be a private to DPDK and not installed.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Steven Webster <steven.webster@windriver.com>
Enhance Tx path cache locality, remove current tag type and group
stores from datapath to conserve store buffers.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
The `data_sz` name is fine, but it looks out of place because nothing
else has "data" prefix in that structure. Rename it to "size", as well
as add more clarity to the comments around each struct member.
Fixes: 6a17919b0e ("eal: change power intrinsics API")
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
As announced in the deprecation note, remove all compatibility build
defines from previous make/meson versions and use only the standardized
ones - RTE_LIB_<name> for libraries, and RTE_<CLASS>_<NAME> for drivers.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
CN98xx SoC comes up with two CPT blocks wrt
CN96xx, CN93xx, to achieve higher performance.
Adding support to allocate all LFs of VF with even BDF from CPT0
and all LFs of VF with odd BDF from CPT1.
If LFs are not available in one block then they will be allocated
from alternate block.
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
Instead of passing around pointers and integers, collect everything
into struct. This makes API design around these intrinsics much easier.
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Unlinking queues from port should be done during port release. Doing it
during device re-configuration could result in segfault as ports array
is re-allocated based on new number of ports.
Fixes: f7ac8b66b2 ("event/octeontx2: support linking queues to ports")
Cc: stable@dpdk.org
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Fix unconditional Tx flush, in case of Tx only we need to check if
work slot is non-empty before issuing flush.
Also, in packet retransmit cases added check for the reference
count and flush the work slot only for the last packet.
Fixes: cb7ee83b63 ("event/octeontx2: improve single flow performance")
Cc: stable@dpdk.org
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Since selftest now depends on dynamic mbuf fields it is not
feasible to run selftest on device probe.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Since selftest now depends on dynamic mbuf fields it is not
feasible to run selftest on device probe.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Reasons for building not supported generally start with lowercase
because printed as the second part of a line.
Other changes:
- "linux" should be "Linux" with a capital letter.
- ARCH_X86_64 may be simply x86_64.
- aarch64 is preferred over arm64.
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: David Marchand <david.marchand@redhat.com>
Use rte_pci_find_ext_capability instead of private version,
Remove unused PCI offsets and values
Use PCI definitions from rte_pci.h, where available.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Add missing returns so that the memzone free is not called if
port create is successful.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Mike Ximing Chen <mike.ximing.chen@intel.com>
Use rte_pci_find_ext_capability instead of private version,
Remove unused PCI offsets and values
Use PCI definitions from rte_pci.h, where available.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
The code contained in this commit was inadvertently omitted
when dissecting the dlb2 code base into discrete patches for
upstream.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Mike Ximing Chen <mike.ximing.chen@intel.com>
The drivers for OCTEON TX2 are not supported in 32-bit mode.
Suggested-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Jerin Jacob <jerinj@marvell.com>
These entry points are NO-OPS. DLB does not support
reconfiguring individual queues or ports. The entire device
must be reconfigured.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
Add a variety of self-tests for both ldb and directed
ports/queues, as well as configure, start, stop, link, etc...
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
The PMD uses a public interface to allow applications to
control the token pop mode. Supported token pop modes are
as follows, and they impact core scheduling affinity for
ldb ports.
AUTO_POP: Pop the CQ tokens immediately after dequeueing.
DELAYED_POP: Pop CQ tokens after (dequeue_depth - 1) events
are released. Supported on load-balanced ports
only.
DEFERRED_POP: Pop the CQ tokens during next dequeue operation.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
Add support for eventdev stop and close entry points.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
Add support for dequeue, dequeue_burst, ...
DLB does not currently support interrupts, but instead uses
umonitor/umwait if supported by the processor. This allows
the software to monitor and wait on writes to a cache-line.
DLB supports normal and sparse cq mode. In normal mode the
hardware will pack 4 QEs into each cache line. In sparse cq
mode, the hardware will only populate one QE per cache line.
Software must be aware of the cq mode, and take the appropriate
actions, based on the mode.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
Add support for the eventdev start entry point.
DLB delays setting up single link resources until
eventdev start, because it is only then that it can
ascertain which ports have just one linked queue.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
Add supports for the port unlink(s) eventdev entry points.
The unlink operation is an asynchronous operation executed by
a control thread, and the unlinks-in-progress function reads
a counter shared with the control thread. Port QE and memzone
memory is freed here.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
Add port link entry point. Directed queues are identified and created
at this stage. Their setup deferred until link-time, at which
point we know the directed port ID. Directed queue setup
will only fail if this queue is already setup or there are
no directed queues left to configure.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
Configure the load balanced (ldb) or directed (dir) port.
The consumer queue (CQ) and producer port (PP) are also
set up here.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
Load balanced (ldb) queues are setup here.
Directed queues are not set up until link time, at which
point we know the directed port ID. Directed queue setup
will only fail if this queue is already setup or there are
no directed queues left to configure.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
Add support for getting the queue and port default configuration.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
Add support for configuring the DLB hardware.
In particular, this patch configures the DLB
hardware's scheduling domain, such that it is provisioned with
the requested number of ports and queues, provided sufficient
resources are available. Individual queues and ports are
configured later in port setup and eventdev start.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
This commit adds probe-time low level hardware
initialization. It also adds probe-time init for both
primary and secondary DPDK processes.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
This commit introduces the flexible interface. This
interface allows the core code to operate in PF mode (direct
hardware access) or bifurcated mode (hardware configured via
kernel driver). This driver currently only supports PF modei,
but bifurcated mode will be added in a future patch-set.
Note that the flexible interface is not used for data path
operations, and thus there are no performance concerns
related to the use of function pointers.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
Add the eventdev portion of probe, and parse command line
options, but do not initialize hardware.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
Add miscellaneous inline functions that may be called
from multiple files. These functions include inline
assembly of new x86 instructions, such as movdir64b,
since they are not available as builtin functions in
the minimum supported GCC version.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
Add headers containing structs and constants shared between
the PMD and the shared code. The term shared code refers to
the code that implements the hardware interface. The shared code
is introduced in the probe patch, and then is extended as
additional eventdev PMD entry points are added to the patchset.
In the case of the bifurcated PMD (to be introduced in the
future), the shared code is contained in the Linux kernel
module itself.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
Add headers used internally by the PMD. They include constants,
macros for device resources, structure definitions for hardware interfaces
and software state, and various forward-declarations.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
This commit adds base support for dynamic logging.
The default log level is NOTICE. Dynamic logging
is used exclusively throughout this patchset.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
Note that config/rte_config.h contains several configuration
switches, providing for fine control of the PMD's
runtime behaviour.
The meson infrastructure is expanded as additional files are
added to this patchset.
Adds announcement of availability of the new driver
for Intel Dynamic Load Balancer 1.0 hardware.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
DLB does not support reconfiguring individual queues
or ports on the fly. The entire device must be reconfigured.
Previously allocated port QE and memzone memory
is freed in this patch.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
Add a variety of self-tests for both ldb and directed
ports/queues, as well as configure, start, stop, link, etc...
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
The PMD uses a public interface to allow applications to
control the token pop mode. Supported token pop modes are
as follows, and they impact core scheduling affinity for
ldb ports.
AUTO_POP: Pop the CQ tokens immediately after dequeueing.
DELAYED_POP: Pop CQ tokens after (dequeue_depth - 1) events
are released. Supported on load-balanced ports
only.
DEFERRED_POP: Pop the CQ tokens during next dequeue operation.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
Add support for eventdev stop and close entry points.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
Add support for dequeue, dequeue_burst, ...
DLB2 does not currently support interrupts, but instead use
umonitor/umwait if supported by the processor. This allows
the software to monitor and wait on writes to a cache-line.
DLB2 supports normal and sparse cq mode. In normal mode the
hardware will pack 4 QEs into each cache line. In sparse cq
mode, the hardware will only populate one QE per cache line.
Software must be aware of the cq mode, and take the appropriate
actions, based on the mode.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
Add support for the eventdev start entry point.
We delay initializing some resources until
eventdev start, since the number of linked queues can be
used to determine if we are dealing with a ldb or dir resource.
If this is a device restart, then the previous configuration
will be reapplied.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
Add supports for the port unlink(s) eventdev entry points.
The unlink operation is an asynchronous operation executed by
a control thread, and the unlinks-in-progress function reads
a counter shared with the control thread.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
Add port link entry point. Directed queues are identified and created
at this stage. Their setup deferred until link-time, at which
point we know the directed port ID. Directed queue setup
will only fail if this queue is already setup or there are
no directed queues left to configure.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
Configure the load balanced (ldb) or directed (dir) port.
The consumer queue (CQ) and producer port (PP) are also
set up here.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
Load balanced (ldb) queues are setup here.
Directed queues are not set up until link time, at which
point we know the directed port ID. Directed queue setup
will only fail if this queue is already setup or there are
no directed queues left to configure.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
Add support for getting the queue and port default configuration.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
Add support for configuring the DLB2 hardware.
In particular, this patch configures the DLB2
hardware's scheduling domain, such that it is provisioned with
the requested number of ports and queues, provided sufficient
resources are available. Individual queues and ports are
configured later in port setup and eventdev start.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
This commit adds probe-time low level hardware
initialization. It also adds probe-time init for both
primary and secondary DPDK processes.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
This commit introduces the flexible interface. This
interface allows the core code to operate in PF mode (direct
hardware access) or bifurcated mode (hardware configured via
kernel driver). This driver currently only supports PF mode
but bifurcated mode will be added in a future DPDK patch-set.
Note that the flexible interface is not used for data path
operations, and thus there are no performance concerns
related to the use of function pointers.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
Add the eventdev portion of probe, and parse command line
options, but do not initialize hardware.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
Add miscellaneous inline functions that may be called
from multiple files. These functions include inline
assembly of new x86 instructions, such as movdir64b,
since they are not available as builtin functions in
the minimum supported GCC version.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
Add headers containing structs and constants shared between
the PMD and the shared code. The term shared code refers to
the code that implements the hardware interface. The shared code
is introduced in the probe patch, and then is extended as
additional eventdev PMD entry points are added to the patchset.
In the case of the bifurcated PMD (to be introduced in the
future), the shared code is contained in the Linux kernel
module itself.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
The header file dlb2_priv.h is used internally by the PMD.
It include constants, macros for device resources,
structure definitions for hardware interfaces and
software state, and various forward-declarations.
The header file rte_pmd_dlb2.h will be exported in a
subsequent patch, but is included here due to a data
structure dependency.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
This commit adds base support for dynamic logging.
The default log level is NOTICE. Dynamic logging
is used exclusively throughout this patchset.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
Adds the meson build infrastructure, which includes
compile-time constants in rte_config.h. DLB2 is
only supported on Linux 64 bit X86 platforms at this time.
Adds announcement of availability for the new driver
for Intel Dynamic Load Balancer 2.0 hardware.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Reviewed-by: Gage Eads <gage.eads@intel.com>
The eventdev drivers have been hacking the deprecated field seqn for
internal test usage.
It is moved to a dynamic mbuf field in order to allow removal of seqn.
Signed-off-by: David Marchand <david.marchand@redhat.com>
The dpaa2 drivers have been hacking the deprecated field seqn for
internal features.
It is moved to a dynamic mbuf field in order to allow removal of seqn.
Signed-off-by: David Marchand <david.marchand@redhat.com>
The dpaa drivers have been hacking the deprecated field seqn for
internal features.
It is moved to a dynamic mbuf field in order to allow removal of seqn.
Signed-off-by: David Marchand <david.marchand@redhat.com>
This code has never been used since introduction.
Fixes: 653242c337 ("event/dpaa2: add self test")
Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Nipun Gupta <nipun.gupta@nxp.com>
The test worker_loopback used the deprecated mbuf field udata64.
It is moved to a dynamic field in order to allow removal of udata64.
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Reviewed-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
Replace master lcore with main lcore and
replace slave lcore with worker lcore.
Keep the old functions and macros but mark them as deprecated
for this release.
The "--master-lcore" command line option is also deprecated
and any usage will print a warning and use "--main-lcore"
as replacement.
Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
As discussed on the dpdk-dev mailing list[1], we can make some easy
improvements in standardizing the naming of the various components in DPDK,
and their associated feature-enabled macros.
Following this patch, each library will have the name in format,
'librte_<name>.so', and the macro indicating that library is enabled in the
build will have the form 'RTE_LIB_<NAME>'.
Similarly, for libraries, the equivalent name formats and macros are:
'librte_<class>_<name>.so' and 'RTE_<CLASS>_<NAME>', where class is the
device type taken from the relevant driver subdirectory name, i.e. 'net',
'crypto' etc.
To avoid too many changes at once for end applications, the old macro names
will still be provided in the build in this release, but will be removed
subsequently.
[1] http://inbox.dpdk.org/dev/ef7c1a87-79ab-e405-4202-39b7ad6b0c71@solarflare.com/t/#u
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Luca Boccassi <bluca@debian.org>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Acked-by: Rosen Xu <rosen.xu@intel.com>
Since each version map file is contained in the subdirectory of the library
it refers to, there is no need to include the library name in the filename.
This makes things simpler in case of library renaming.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Luca Boccassi <bluca@debian.org>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Acked-by: Rosen Xu <rosen.xu@intel.com>
The defines used to indicate what crypto, compression and eventdev drivers
were being built were different to those used in the make build, with meson
defining them with "_PMD" at the end, while make defined them with "_PMD"
in the middle and the specific driver name at the end. This might cause
compatibility issues for applications which used the older defines, which
switching to build against new DPDK releases.
As well as changing the default to match that of make, meson also
special-cases the crypto/compression/event drivers to have both defines
provided. This ensures compatibility for these macros with both meson and
make from older versions.
For a selection of other libraries and drivers, there were other
incompatibilities between the meson and make-defined macros which were not
previously highlighted in a deprecation notice, so we add per-macro
compatibility defines for these to ease the transition from make to meson.
Fixes: 5b9656b157 ("lib: build with meson")
Fixes: 9314afb68a ("drivers: add infrastructure for meson build")
Fixes: dcadbbde8e ("crypto/null: build with meson")
Fixes: 3c32e89f68 ("compress/isal: add skeleton ISA-L compression PMD")
Fixes: eca504f318 ("drivers/event: build skeleton and SW drivers with meson")
Cc: stable@dpdk.org
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Luca Boccassi <bluca@debian.org>
This commit implements the eventdev ABI changes required by
the DLB/DLB2 PMDs. Several data structures and constants are modified
or added in this patch, thereby requiring modifications to the
dependent apps and examples.
The DLB/DLB2 hardware does not conform exactly to the eventdev interface.
1) It has a limit on the number of queues that may be linked to a port.
2) Some ports a further restricted to a maximum of 1 linked queue.
3) DLB does not have the ability to carry the flow_id as part
of the event (QE) payload. Note that the DLB2 hardware is capable of
carrying the flow_id.
Following is a detailed description of the changes that have been made.
1) Add new fields to the rte_event_dev_info struct. These fields allow
the device to advertise its capabilities so that applications can take
the appropriate actions based on those capabilities.
struct rte_event_dev_info {
uint32_t max_event_port_links;
/**< Maximum number of queues that can be linked to a single event
* port by this device.
*/
uint8_t max_single_link_event_port_queue_pairs;
/**< Maximum number of event ports and queues that are optimized for
* (and only capable of) single-link configurations supported by this
* device. These ports and queues are not accounted for in
* max_event_ports or max_event_queues.
*/
}
2) Add a new field to the rte_event_dev_config struct. This field allows
the application to specify how many of its ports are limited to a single
link, or will be used in single link mode.
/** Event device configuration structure */
struct rte_event_dev_config {
uint8_t nb_single_link_event_port_queues;
/**< Number of event ports and queues that will be singly-linked to
* each other. These are a subset of the overall event ports and
* queues; this value cannot exceed *nb_event_ports* or
* *nb_event_queues*. If the device has ports and queues that are
* optimized for single-link usage, this field is a hint for how many
* to allocate; otherwise, regular event ports and queues can be used.
*/
}
3) Replace the dedicated implicit_release_disabled field with a bit field
of explicit port capabilities. The implicit_release_disable functionality
is assigned to one bit, and a port-is-single-link-only attribute is
assigned to other, with the remaining bits available for future assignment.
* Event port configuration bitmap flags */
#define RTE_EVENT_PORT_CFG_DISABLE_IMPL_REL (1ULL << 0)
/**< Configure the port not to release outstanding events in
* rte_event_dev_dequeue_burst(). If set, all events received through
* the port must be explicitly released with RTE_EVENT_OP_RELEASE or
* RTE_EVENT_OP_FORWARD. Must be unset if the device is not
* RTE_EVENT_DEV_CAP_IMPLICIT_RELEASE_DISABLE capable.
*/
#define RTE_EVENT_PORT_CFG_SINGLE_LINK (1ULL << 1)
/**< This event port links only to a single event queue.
*
* @see rte_event_port_setup(), rte_event_port_link()
*/
#define RTE_EVENT_PORT_ATTR_IMPLICIT_RELEASE_DISABLE 3
/**
* The implicit release disable attribute of the port
*/
struct rte_event_port_conf {
uint32_t event_port_cfg;
/**< Port cfg flags(EVENT_PORT_CFG_) */
}
This patch also removes the depreciation notice and announce
the new eventdev ABI changes in release note.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
Acked-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Add minimum burst throughout the scheduler pipeline and a flush counter.
Use a single threaded ring implementation for the reorder buffer free list.
Signed-off-by: Radu Nicolau <radu.nicolau@intel.com>
Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
Issue has been observed in case of multi segments where mbuf
data gets corrupted due to missing barriers. Changes made to
mbuf just before LMTST by one core gets updatded when the
same mbuf is in use by another core, leading to corruption.
It should be ensured that all changes made to mbuf should be
written before LMTST.
Fixes: cbd5710db4 ("net/octeontx2: add Tx multi segment version")
Cc: stable@dpdk.org
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Harman Kalra <hkalra@marvell.com>
Improve single flow performance by moving the point of coherence
to the end of transmit sequence.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Add SWTAG flush operation at the end of transmit sequence to
immediately release the tag held by the core.
Reuse Tag address to check SWTAG completion status.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
In the op new mode of crypto adapter, the completed crypto operation
is submitted to the event device by the OCTEON TX2 crypto PMD.
During event device dequeue the result of crypto operation is checked.
Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Acked-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
The crypto adapter callback functions and associated data structures
are added.
Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Acked-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Coverity flags that 'portal' variable is used before
it's checked for NULL. This patch fixes this issue.
Coverity issue: 323516
Fixes: 4ab57b042e ("event/dpaa2: affine portal at runtime during I/O")
Cc: stable@dpdk.org
Signed-off-by: Yunjian Wang <wangyunjian@huawei.com>
Acked-by: Nipun Gupta <nipun.gupta@nxp.com>
Validate events configured in ssopf against the total number of
events configured across all the RX/TIM event adapters.
Events available to ssopf can be reconfigured by passing the required
amount to kernel bootargs and are only limited by DRAM size.
Example:
ssopf.max_events= 2097152
Cc: stable@dpdk.org
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Since the 20.08 release deprecated rte_cio_*mb APIs because these APIs
provide the same functionality as rte_io_*mb APIs on all platforms, so
remove them and use rte_io_*mb instead.
Signed-off-by: Phil Yang <phil.yang@arm.com>
Signed-off-by: Joyce Kong <joyce.kong@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Acked-by: David Marchand <david.marchand@redhat.com>
A decision was made [1] to no longer support Make in DPDK, this patch
removes all Makefiles that do not make use of pkg-config, along with
the mk directory previously used by make.
[1] https://mails.dpdk.org/archives/dev/2020-April/162839.html
Signed-off-by: Ciara Power <ciara.power@intel.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Start a new release cycle with empty release notes.
The ABI version becomes 21.0.
The ABI major is back to normal, having only one number (21 vs 20.0).
The map files are updated to the new ABI major number (21).
The ABI exceptions are dropped.
Travis ABI check is disabled because compatibility is not preserved.
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Ray Kinsella <mdr@ashroe.eu>
DPAA2 eventdev device is capable of all type queue feature.
Fix the capability flag to reflect the same.
Fixes: 8f4a294c23 ("event/dpaa2: apply new capability flags")
Cc: stable@dpdk.org
Signed-off-by: Apeksha Gupta <apeksha.gupta@nxp.com>
Acked-by: Nipun Gupta <nipun.gupta@nxp.com>
Minimize the number of different thread variables
Add all the thread specific variables in dpaa_portal
structure to optimize TLS Usage.
Signed-off-by: Rohit Raj <rohit.raj@nxp.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
When event device is transmitting packet on OCTEONTX2 it needs to access
the destined ethernet device TXq data.
Currently, we get the TXq data through rte_eth_devices global array.
Instead save the TXq address inside event port memory.
Cc: stable@dpdk.org
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
In OCTEONTX2 event device we use sub_event_type to store the ethernet
port identifier when we receive work from OCTEONTX2 ethernet device.
This violates the event device spec as sub_event_type should be 0 in
the initial receive stage.
Set sub_event_type to 0 after copying the port id.
Fixes: 0fe4accd8e ("event/octeontx2: add Rx adapter fastpath ops")
Cc: stable@dpdk.org
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
When event device is re-configured maintain the event queue to event port
links and event port status instead of resetting them.
Fixes: cd24e70258 ("event/octeontx2: add device configure function")
Cc: stable@dpdk.org
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Since PMD enqueues a single event at a time, fixing the issue by
passing 1 rather than nb_events to avoid any out of bound access as
reported by coverity.
Coverity issue: 358447
Fixes: 56a96aa424 ("event/octeontx: add framework for Rx/Tx offloads")
Cc: stable@dpdk.org
Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Introduce the RTE_LOG_REGISTER macro to avoid the code duplication
in the logtype registration process.
It is a wrapper macro for declaring the logtype, registering it and
setting its level in the constructor context.
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Adam Dybkowski <adamx.dybkowski@intel.com>
Acked-by: Sachin Saxena <sachin.saxena@nxp.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
Add device arguments to lock NPA aura and pool contexts in NDC cache.
The device args take hexadecimal bitmask where each bit represent the
corresponding aura/pool id.
Example:
-w 0002:02:00.0,npa_lock_mask=0xf // Lock first 4 aura/pool ctx
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Currently rte_mcp_ptr_list is being shared as a variable
across libs. This is only used in control path.
This patch change it to a exported function based access.
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Ray Kinsella <mdr@ashroe.eu>
This is to reduce the number of variables getting exposed
from the dpaa bus. They are not required to be in bus.
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
The returned number from rte_event_enqueue_*()
wouldn't include events marked with RTE_EVENT_OP_RELEASE.
Fixes: 1c8e3caa3 ("event/dsw: add event scheduling and device start/stop")
Cc: stable@dpdk.org
Signed-off-by: Yuri Chipchev <yuric@marvell.com>
Reviewed-by: Liron Himi <lironh@marvell.com>
Acked-by: Mattias Rönnblom <mattias.ronnblom@ericsson.com>
Update the portal allocation failure log to print the thread id
as well.
Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Can be reproduced with "make EXTRA_CFLAGS='-O1'" command using
gcc 7.3.0
Build error
In file included from .../drivers/event/octeontx2/ot
x2_evdev.c:15:0:
.../drivers/event/octeontx2/otx2_evdev_stats.h:
In function ‘otx2_sso_xstats_get’:
.../drivers/event/octeontx2/otx2_evdev_stats.h:124:9:
error: ‘xstats’ may be used uninitialized in this function
[-Werror=maybe-uninitialized]
xstat = &xstats[ids[i] - start_offset];
~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
This is false positive, 'xstats_mode_count' should be preventing taking
the loop and accessing 'xstats'.
Returning in that case to silence the compiler warning.
Reported-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
Tested-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Avoid reusing recorded events when performing a migration, since this
may make the migration selection logic pick an already-moved flow.
Fixes: f6257b22e7 ("event/dsw: add load balancing")
Cc: stable@dpdk.org
Reported-by: Venky Venkatesh <vvenkatesh@paloaltonetworks.com>
Signed-off-by: Mattias Rönnblom <mattias.ronnblom@ericsson.com>
Adding support for rx checksum offload. In case of wrong
checksum received (inner/outer l3/l4) it reports the
corresponding layer which has bad checksum. It also adds
rx burst function pointer hook for rx checksum offload to
event PMD.
Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Adding macro based framework to hook dequeue/enqueue function
pointers to the appropriate function based on rx/tx offloads.
Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
When eth port queue is removed from Rx adapter using
rte_event_eth_rx_adapter_queue_del() it incorrectly
initializes CQ context instead of modifying it. This
might lead to a crash when CQ context is modified
as a part of rte_eth_dev_stop() sequence as CQ will
hold invalid entries. This is responsibility of an
application to call rte_event_eth_rx_adapter_queue_del()
to remove eth port queue from Rx adapter in tear down
sequence.
Fixes: 37720fc1fb ("event/octeontx2: add Rx adapter")
Cc: stable@dpdk.org
Signed-off-by: Lukasz Bartosik <lbartosik@marvell.com>
Acked-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Adding macro based framework to hook rx/tx burst function
pointers to the appropriate function based on rx/tx offloads.
Signed-off-by: Harman Kalra <hkalra@marvell.com>
Adding multi segment support to the octeontx PMD. Also
adding the logic to share rx/tx ofloads with the eventdev
code.
Signed-off-by: Harman Kalra <hkalra@marvell.com>
Add libatomic as a global dependency when compiling for 32-bit using
clang. As we need libatomic for 64-bit atomic ops.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Add redundant stack variable initialization to work around
false-positive warnings in older versions of GCC.
Fixes: 1f2b99e8d9 ("event/dsw: improve migration mechanism")
Signed-off-by: Mattias Rönnblom <mattias.ronnblom@ericsson.com>
Use c11 atomics with RELAXED ordering instead of rte_atomic ops which
enforce unnessary barriers on arm64.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Reviewed-by: Phil Yang <phil.yang@arm.com>
DSW keeps an internal port load estimate, used by the load balancing
mechanism. As a side effect, it keeps track of the total number of
busy cycles since startup. This metric is indirectly exposed in the
form of DSW xstats' "port_<n>_event_proc_latency", which is the total
number of busy cycles divided by the total number of events processed
on a particular port.
An external application can take (event_latency * dequeued) to go back
to busy_cycles. One reason for doing this is to measure the port's
load during a longer time period, without resorting to sampling
"port_<n>_load". However, as the number dequeued events grows, a
rounding error in event_latency renders the application-calculated
busy_cycles inaccurate.
Thus, it makes sense to directly expose the number of busy cycles as a
DSW xstats, even though it might seem redundant.
Signed-off-by: Mattias Rönnblom <mattias.ronnblom@ericsson.com>
On dequeue, polling the control ring once is enough.
Fixes: f6257b22e7 ("event/dsw: add load balancing")
Cc: stable@dpdk.org
Suggested-by: Ola Liljedahl <ola.liljedahl@arm.com>
Signed-off-by: Mattias Rönnblom <mattias.ronnblom@ericsson.com>
DSW limits the rate of migrations on a per-port basis. Hence, as the
number of cores grows, so does the total migration capacity.
In high core-count systems, this allows for a situation where flows
are migrated to a lightly loaded port which recently already received
a number of new flows (from other ports). The processing load
generated by these new flows may not yet be reflected in the lightly
loaded port's load estimate. The result is that the previously lightly
loaded port is now overloaded.
This patch adds a rough estimate of the size of the inbound migrations
to a particular port, which can be factored into the migration logic,
avoiding the above problem.
Signed-off-by: Mattias Rönnblom <mattias.ronnblom@ericsson.com>
Allowing moving multiple flows in one migration transaction, to
rebalance load more quickly.
Introduce a threshold to avoid migrating flows between ports with very
similar load.
Simplify logic for selecting which flow to migrate. The aim is now to
move flows in such a way that the receiving port is as lightly-loaded
as possible (after receiving the flow), while still migrating enough
flows from the source port to reduce its load. This is essentially how
legacy strategy work as well, but the code is more readable.
Signed-off-by: Mattias Rönnblom <mattias.ronnblom@ericsson.com>
To allow visualization of migrations, track the number flow
immigrations in "port_<N>_immigrations". The "port_<N>_migrations"
retains legacy semantics, but is renamed "port_<N>_emigrations".
Expose the number of events currently undergoing processing
(i.e. pending releases) at a particular port.
Signed-off-by: Mattias Rönnblom <mattias.ronnblom@ericsson.com>
Reduce the maximum number of DSW flows from 32k to 8k, to be able
rebalance load faster.
Signed-off-by: Mattias Rönnblom <mattias.ronnblom@ericsson.com>
In DSW, in case a port can't produce any events for the application to
consume, the port is considered idle.
To slightly reduce wall-time latency, flush the port's output buffer
in case of such an empty dequeue.
Signed-off-by: Mattias Rönnblom <mattias.ronnblom@ericsson.com>
Each workslot is always bound to a specific lcore there is no multi-core
contention to cause cache trashing as a result it is safe to remove the
WFE. Also, in dual workslot dequeue work will mostlikely be available on
the pair workslot making WFE impractical.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Reviewed-by: Gavin Hu <gavin.hu@arm.com>
Remove setting ALLOW_EXPERIMENTAL_API individually for each Makefile and
meson.build. Instead, enable ALLOW_EXPERIMENTAL_API flag across app, lib
and drivers.
This changes reduces the clutter across the project while still
maintaining the functionality of ALLOW_EXPERIMENTAL_API i.e. warning
external applications about experimental API usage.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Signed-off-by: David Marchand <david.marchand@redhat.com>
The EAL API (with doxygen documentation) is moved from
common/include/ to include/, which makes more clear that
it is the global API for all environments and architectures.
Note that the arch-specific and OS-specific include files are not
in this global include directory, but include/generic/ should
cover the doxygen documentation for them.
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: David Marchand <david.marchand@redhat.com>
This patch sets the number of atomic ordered sequences
supported by the driver.
Fixes: dbf63bd43a ("event/dpaa2: support ordered queue")
Cc: stable@dpdk.org
Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Three warnings are commonly disabled in DPDK with make and meson:
* address-of-packed-member
always disabled
* missing-field-initializers
disabled with meson
disabled with make + clang or make + gcc < 4.7
disabled with make + gcc <= 5 for test files and event drivers
* packed-not-aligned
disabled with meson
This change is removing exceptions for missing-field-initializers.
As it is always disabled, some redundant configs are cleaned up.
Now the situation is:
* address-of-packed-member
always disabled
* missing-field-initializers
always disabled
* packed-not-aligned
disabled with meson
It could alternatively be decided to disable missing-field-initializers
only for old gcc (< 6).
The warning packed-not-aligned is not modified in this change.
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
Added new flag for SECURITY in compiler optimized Tx fastpath
framework. With this, compiler autogenerates functions which
have security enabled.
Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Replace DSW's use of regular DPDK rings (and code for
packing/unpacking control messages into void pointers) with custom
size rings.
In addition to cleaner code, this change allows DSW to support up to
the eventdev API's maximum of 255 ports by tweaking DSW_MAX_PORTS.
Signed-off-by: Mattias Rönnblom <mattias.ronnblom@ericsson.com>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Use the new API to wait in low power state instead of continuous
polling to save CPU cycles and power.
Signed-off-by: Gavin Hu <gavin.hu@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Relax memory requirement for event timers when internal mempool used is
octeontx2 mempool.
Add debug log to print the memory used.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
If an application issues rte_event_enqueue_new_burst() or
rte_event_enqueue_forward_burst() call with a burst of events longer
than the configured max enqueue burst size, DSW allocates credits not
only for events actually enqueued, but for the complete burst. If this
process is repeated, enough credits will have leaked to cause the
event device to backpressure (i.e. disallow) any new enqueue
operations.
In addition, the port-level enqueue xstats will log the wrong number
of events enqueued for oversized enqueues.
This patch makes DSW gracefully handle oversized enqueue bursts.
Fixes: 1c8e3caa3b ("event/dsw: add event scheduling and device start/stop")
Cc: stable@dpdk.org
Signed-off-by: Mattias Rönnblom <mattias.ronnblom@ericsson.com>
Fix DSW's rte_event_enqueue_burst(), so that a call with a zero-sized
event array immediately flushes the port's output buffers. Prior to
this patch, the flush operation would be deferred to the next enqueue
or dequeue call, which is inconsistent with DSW documentation.
Fixes: 1c8e3caa3b ("event/dsw: add event scheduling and device start/stop")
Cc: stable@dpdk.org
Signed-off-by: Mattias Rönnblom <mattias.ronnblom@ericsson.com>
When net/octeontx is connected to event/octeontx as an event Rx adapter,
PKI aka 'net/octeontx' can forward packets directly to SSO aka
'event/octeontx'.
When pumping traffic to PKI if flow control is disabled internal FIFOs
might be overrun causing partial l2 packets to be enqueued.
SSO receives <31:0> TAG tag calculated by PKI, in normal cases <31:28>
is always 0 which signifies RTE_EVENT_TYPE_ETHDEV. But in case of
partial received packets PKI sets the <31:0> TAG as 0xFFFFFFFF which
is an invalid event type.
Add a check to see if TAG is 0xFFFFFFFF and free the partial receive
packet.
Fixes: d0d6549860 ("net/octeontx: support event Rx adapter")
Cc: stable@dpdk.org
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Since TIM buckets are always aligned to 32B and our cache line size being
128B, we will always have a cache miss when reading current_chunk pointer.
Avoid the cache miss by storing the current_chunk pointer in the bucket
opposite to the current bucket.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Fix HW race condition observed when timeout resolution is low (<5us).
When HW traverses a given TIM bucket it will clear chunk_remainder,
but since SW always decreases the chunk_remainder at the start of the
arm routine it might cause a race where SW updates chunk_remainder
after HW has cleared it that lead to nasty side effects.
Fixes: 95e4e4ec74 ("event/octeontx2: add timer arm timeout burst")
Cc: stable@dpdk.org
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Sync mail box data structures to version 1.1.3.
Add mail box version verification and defer initializing octeontx
devices if mail box version mismatches.
Update OCTEON TX limitaion with max mempool size used.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Merge all versions in linker version script files to DPDK_20.0.
This commit was generated by running the following command:
:~/DPDK$ buildtools/update-abi.sh 20.0
Signed-off-by: Pawel Modrak <pawelx.modrak@intel.com>
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
Since the library versioning for both stable and experimental ABI's is
now managed globally, the LIBABIVER and version variables no longer
serve any useful purpose, and can be removed.
The replacement in Makefiles was done using the following regex:
^(#.*\n)?LIBABIVER\s*:=\s*\d+\n(\s*\n)?
(LIBABIVER := numbers, optionally preceded by a comment and optionally
succeeded by an empty line)
The replacement for meson files was done using the following regex:
^(#.*\n)?version\s*=\s*\d+\n(\s*\n)?
(version = numbers, optionally preceded by a comment and optionally
succeeded by an empty line)
[David]: those variables are manually removed for the files:
- drivers/common/qat/Makefile
- lib/librte_eal/meson.build
[David]: the LIBABIVER is restored for the external ethtool example
library.
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
Some variables are commented out. Remove them.
Fixes: d548ef513c ("event/opdl: add unit tests")
Cc: stable@dpdk.org
Signed-off-by: Kevin Traynor <ktraynor@redhat.com>
Acked-by: Liang Ma <liang.j.ma@intel.com>
During LTO build compiler reports some 'false positive' warnings about
variables being possibly used uninitialized. This patch silences these
warnings.
Exemplary compiler warning to suppress (with LTO enabled):
error: ‘chunk’ may be used uninitialized in this function
[-Werror=maybe-uninitialized]
bkt->current_chunk = (uintptr_t)chunk;
Signed-off-by: Andrzej Ostruszka <aostruszka@marvell.com>
Use WFE to save power while waiting for tag to become head.
SSO signals EVENTI to allow cores to exit from wfe when they
are waiting for specific operations in which one of them is
setting HEAD bit in GWS_TAG.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Reviewed-by: Gavin Hu <gavin.hu@arm.com>
This code is being shared by more than 1 type of driver.
Common is most appropriate place for it.
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
While meson always adds -Wall flag to C compiles, the make build adds extra
warning flags that are not present in the meson build. This addresses that
shortcoming by adding additional warning flags to our builds. The one
omission is the -Wcast-align flag, which though present in make gcc builds,
gives a lot of warnings/errors when used with clang.
The removed warning "-Wunused-parameter" is covered by the "-Wextra"
parameter so is unnecessary.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Luca Boccassi <bluca@debian.org>
This patch adds the support of Tx adapter for DPAA2 platform
Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
This patch sets the priority of the dpcon dev, such that it is
within the supported range of dpcon
Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
This patch adds the support of Tx adapter for DPAA1 platform
Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
The number of atomic flows supported was not returned correctly for
DPAA driver. This patch fixes the same.
Fixes: b08dc6430a ("event/dpaa: add queue config get/set")
Cc: stable@dpdk.org
Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
This patch introduces a `flag` in the Eth TX adapter enqueue API.
Some drivers may support burst functionality only with the packets
having same destination device and queue.
The flag `RTE_EVENT_ETH_TX_ADAPTER_ENQUEUE_SAME_DEST` can be used
to indicate this so the underlying driver, for drivers to utilize
burst functionality appropriately.
Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
This patch add support for testing dpaa2 eventdev self test
for basic sanity for parallel and atomic queues.
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
The patch adds the break in the TX function, if it is failing
to send the packets out. Previously the system was trying
infinitely to send packet out.
Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
This patch removes the conditional compilation for
cryptodev event support from RTE_LIBRTE_SECURITY flag.
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Test vector expect only one type of scheduling as default.
The old code is provide support scheduling types instead of default.
Fixes: 13370a3877 ("eventdev: fix inconsistency in queue config")
Cc: stable@dpdk.org
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Octeontx2 SSO co-processor allows multiple ethernet device Rx queues
connected to a single Event device queue.
Fix the Rx adapter capabilities to allow application to configure
Rx queueus in n:1 ratio to event queues by adding
`RTE_EVENT_ETH_RX_ADAPTER_CAP_MULTI_EVENTQ` as a capability.
Fixes: 37720fc1fb ("event/octeontx2: add Rx adapter")
Cc: stable@dpdk.org
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
The sw PMD implements xstats reset by having the xstat get operations
return a value to the statistic's value at the last reset. The value at the
last reset is maintained in the per-xstat reset_value field, but the PMD
was setting reset_value = current - reset_value instead of reset_value =
current.
Fixes: c1ad03df7a ("event/sw: support xstats")
Cc: stable@dpdk.org
Signed-off-by: Gage Eads <gage.eads@intel.com>
Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
Add support to below TCP segmentation offloads for
96XX A1 onwards and 95xx B0 onwards.
- TCPv4, TCPv6
- VXLAN[v4 | v6][v4 | v6]
- GENEVE[v4 | v6][v4 | v6]
This patch also modifies a fastpath function to be forced
inline due to performance reasons for multi-seg mode.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
event dpaa device support both ethernet as well as
crypto queues to be attached to it. eth_rx_adapter
provide infrastructure to attach ethernet queues and
crypto_adapter provide support for crypto queues.
This patch add support for dpaa_eventdev to attach
dpaa_sec queues.
Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
Restrict this header inclusion to its real users.
Fixes: 028669bc9f ("eal: hide shared memory config")
Cc: stable@dpdk.org
Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
A huge drop in per core MPPS value was observed when PTP stack is
enabled. The reason behind the bottleneck is HW serialises the
transfer of all SQEs, which seeks timestamp capture, on the same
send DMA path. Hence only those packets which requires timestamp
capture should set SETTSTAMP in send mem alg.
With this patch timestamping would be done only for those packets
with PKT_TX_IEEE1588_TMST set.
Fixes: fb3ae0951a ("net/octeontx2: support Tx")
Fixes: 8980a15300 ("event/octeontx2: support PTP for SSO")
Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
In order to align name with other PCI driver flag such as
RTE_PCI_DRV_NEED_MAPPING and to reflect its purpose, change
RTE_PCI_DRV_IOVA_AS_VA flag name as RTE_PCI_DRV_NEED_IOVA_AS_VA.
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: David Marchand <david.marchand@redhat.com>
Add PTP support for SSO based on rx_offloads of the queue connected to
it.
Signed-off-by: Harman Kalra <hkalra@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Fixes: 371a688fc1 ("event/sw: support linking queues to ports")
Cc: stable@dpdk.org
Signed-off-by: Dilshod Urazov <dilshod.urazov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
The functions rte_service_may_be_active(), rte_service_lcore_attr_get(),
and rte_service_attr_reset_all() were introduced nearly a year ago in DPDK
18.08. They can be considered non-experimental for the 19.08 release.
rte_service_may_be_active() is used by the sw PMD, and this commit allows
it to not need any experimental API.
Signed-off-by: Gage Eads <gage.eads@intel.com>
When compiling with clang on 32-bit platforms, we are missing
copies of 64-bit atomic functions. We can solve this by linking
against libatomic for the drivers and libs which need those
atomic ops.
Fixes: f0b9982cb3 ("event/octeontx2: add TIM bucket operations")
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Add devargs to control each event timer adapter i.e. TIM rings internal
parameters uniquely. The following dict format is expected
[ring-chnk_slots-disable_npa-stats_ena]. 0 represents default values.
Example:
--dev "0002:0e:00.0,tim_ring_ctl=[2-1023-1-0]"
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Add devargs to limit the max number of TIM rings reserved on probe.
Since, TIM rings are HW resources we can avoid starving other
applications by not grabbing all the rings.
Example:
--dev "0002:0e:00.0,tim_rings_lmt=2"
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
