With symbols going though experimental/stable stages, we accumulated
a lot of discrepancies about inclusion of the rte_compat.h header.
Some headers are including it where unneeded, while others rely on
implicit inclusion.
Fix unneeded inclusions:
$ git grep -l include..rte_compat.h |
xargs grep -LE '__rte_(internal|experimental)' |
xargs sed -i -e '/#include..rte_compat.h/d'
Fix missing inclusion, by inserting rte_compat.h before the first
inclusion of a DPDK header:
$ git grep -lE '__rte_(internal|experimental)' |
xargs grep -L include..rte_compat.h |
xargs sed -i -e \
'0,/#include..\(rte_\|.*pmd.h.$\)/{
s/\(#include..\(rte_\|.*pmd.h.$\)\)/#include <rte_compat.h>\n\1/
}'
Fix missing inclusion, by inserting rte_compat.h after the last
inclusion of a non DPDK header:
$ for file in $(git grep -lE '__rte_(internal|experimental)' |
xargs grep -L include..rte_compat.h); do
tac $file > $file.$$
sed -i -e \
'0,/#include../{
s/\(#include..*$\)/#include <rte_compat.h>\n\n\1/
}' $file.$$
tac $file.$$ > $file
rm $file.$$
done
Fix missing inclusion, by inserting rte_compat.h after the header guard:
$ git grep -lE '__rte_(internal|experimental)' |
xargs grep -L include..rte_compat.h |
xargs sed -i -e \
'0,/#define/{
s/\(#define .*$\)/\1\n\n#include <rte_compat.h>/
}'
And finally, exclude rte_compat.h itself.
$ git checkout lib/eal/include/rte_compat.h
At the end of all this, we have a clean tree:
$ git grep -lE '__rte_(internal|experimental)' |
xargs grep -L include..rte_compat.h
buildtools/check-symbols.sh
devtools/checkpatches.sh
doc/guides/contributing/abi_policy.rst
doc/guides/rel_notes/release_20_11.rst
lib/eal/include/rte_compat.h
Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Mark chunks mempool objects as "put" as they are freed to NPA
automatically when they are parsed by TIM HW.
Fixes: 300b796262 ("event/cnxk: add timer arm routine")
Cc: stable@dpdk.org
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
"meson setup" fails when '-Werror' compiler flag is enabled [1].
This is not a build error in the driver but a build error in meson
during "meson setup" stage.
This issue exists for a while but meson takes it as a warning and
ignores it unless '-Werror' compiler flag is provided.
Although it doesn't cause build error without '-Werror', relevant code
should be broken functionally, this patch fixes that too.
Build file using a variable to detect if macro defined, but that
variable is not set, looks like copy/paste error.
Replacing variable with hardcoded macro name.
[1]
Reproduced via `meson -Dc_args='-Werror' build`
in file 'build/meson-logs/meson-log.txt'
``
Running compile:
Working directory: /tmp/tmpfrnw2x8z
Command line: ccache cc /tmp/tmpfrnw2x8z/testfile.c -pipe -E -P
-Werror -D_FILE_OFFSET_BITS=64 -P -O0 -march=native
Code:
#ifndef dev/qat_crypto_pmd_gen4.c
# define dev/qat_crypto_pmd_gen4.c
#endif
"MESON_GET_DEFINE_DELIMITER"
dev/qat_crypto_pmd_gen4.c
Compiler stdout:
"MESON_GET_DEFINE_DELIMITER"
/qat_crypto_pmd_gen4.c/qat_crypto_pmd_gen4.c
Compiler stderr:
/tmp/tmpfrnw2x8z/testfile.c:3:20:
error: extra tokens at end of #ifndef directive [-Werror]
3 | #ifndef dev/qat_crypto_pmd_gen4.c
| ^
/tmp/tmpfrnw2x8z/testfile.c:4:18:
error: ISO C99 requires whitespace after the macro name [-Werror]
4 | # define dev/qat_crypto_pmd_gen4.c
| ^~~
cc1: all warnings being treated as errors
drivers/event/dlb2/meson.build:41:10:
ERROR: Could not get define 'dev/qat_crypto_pmd_gen4.c'
``
Fixes: d0ce87e41c ("event/dlb2: support single 512B write of 4 QEs")
Cc: stable@dpdk.org
Reported-by: Luca Boccassi <bluca@debian.org>
Signed-off-by: Ferruh Yigit <ferruh.yigit@amd.com>
In this patch, we removed the necessity of the version files and
you don't need to update these files for each release, you can just
remove them.
Suggested-by: Ferruh Yigit <ferruh.yigit@amd.com>
Signed-off-by: Abdullah Ömer Yamaç <omer.yamac@ceng.metu.edu.tr>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Tested-by: Ferruh Yigit <ferruh.yigit@amd.com>
Removed unnecessary datapointer(DPTR) update and remove ESN update
from microcode command word 0 based on the latest microcode.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Vidya Sagar Velumuri <vvelumuri@marvell.com>
In outbound inline case, use NIX Tx offset instead of
NIX Tx address for cn10kb as per new instruction format.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Fix the allocation of port COS when the application requested port
COS exceeds (e.g. beyond 0-15) the number of LDB ports for
the domain.
Driver limits application specified ports from a COS to the
max ports allocated for the COS so that the rest of the
ports can be allocated from default(best) COS.
Fixes: bec8901bfe ("event/dlb2: support ldb port specific COS")
Cc: stable@dpdk.org
Signed-off-by: Abdullah Sevincer <abdullah.sevincer@intel.com>
The log should display the value, not the ID.
Fixes: e21df4b062 ("test/eventdev: add SW xstats tests")
Cc: stable@dpdk.org
Signed-off-by: Olivier Matz <olivier.matz@6wind.com>
The issue is seen by unit tests:
MALLOC_PERTURB_=204 \
DPDK_TEST=eventdev_selftest_sw \
/root/dpdk/x86_64-native-linuxapp-gcc/app/test/dpdk-test -c 0xff
(...)
*** Running XStats ID Reset test...
12: 1761: qid_0_port_2_pinned_flows value , expected 1 got 7
1778: qid_0_port_2_pinned_flows value incorrect, expected 1 got 7
ERROR - XStats ID Reset test FAILED.
SW Eventdev Selftest Failed.
Test Failed
The flow ID is not set in the event, which results in an undefined
flow, whose value depends on what was previously in stack. Having
different flows for the packets makes the test to fail, since only one
flow is expected.
This only happens in -O3, where the same stack area is shared by the
event object and the address of the mbuf allocated in rte_gen_arp().
Fix this by properly initializing the flow id.
Bugzilla ID: 1101
Fixes: e21df4b062 ("test/eventdev: add SW xstats tests")
Cc: stable@dpdk.org
Signed-off-by: Olivier Matz <olivier.matz@6wind.com>
Reviewed-by: David Marchand <david.marchand@redhat.com>
Increase xstats ID width from 32 to 64 bits. This also
fixes the xstats ID datatype discrepancy between reset and
rest of the xstats family.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
Reviewed-by: Mattias Rönnblom <mattias.ronnblom@ericsson.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Fix the calculation error of the total number of LDB ports
during port COS override from dlb2 event structure.
Fixes: bec8901bfe ("event/dlb2: support ldb port specific COS")
Cc: stable@dpdk.org
Signed-off-by: Abdullah Sevincer <abdullah.sevincer@intel.com>
Since COS is now per port specific only and supported through
port_cos in dev_args, there is no need to have a COS
argument in dev_args.
Signed-off-by: Abdullah Sevincer <abdullah.sevincer@intel.com>
Add checks during port probing for validating producer
core masks if they are a subset of EAL coremask.
Error is returned if producer coremask is not a subset
of EAL coremask.
Signed-off-by: Abdullah Sevincer <abdullah.sevincer@intel.com>
Remove COS (class of service) from port probing criteria and
apply enhancements for selection of ports from best
COS when default COS (255) is used.
Signed-off-by: Abdullah Sevincer <abdullah.sevincer@intel.com>
Enabled software PMDs in IOVA as PA disabled build
as they work with IOVA as VA.
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
Enabled the flag pmd_supports_disable_iova_as_pa in cnxk driver build
files as they work with IOVA as VA. Updated cn9k and cn10k soc build
configurations to disable the IOVA as PA build by default.
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
Check if there exists free enqueue descriptors before enqueuing Tx
packet. Also try to free enqueue descriptors in case they are not
free.
Fixes: ed1cdbed6a ("net/dpaa2: support multiple Tx queues enqueue for ordered")
Cc: stable@dpdk.org
Signed-off-by: Brick Yang <brick.yang@nxp.com>
Signed-off-by: Rohit Raj <rohit.raj@nxp.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Have the SW event device conform to the service core convention, where
-EAGAIN is return in case no work was performed.
Prior to this patch, for an idle SW event device, a service lcore load
estimate based on RTE_SERVICE_ATTR_CYCLES would suggest 48% core
load.
At 7% of its maximum capacity, the SW event device needs about 15% of
the available CPU cycles* to perform its duties, but
RTE_SERVICE_ATTR_CYCLES would suggest the SW service used 48% of the
service core.
After this change, load deduced from RTE_SERVICE_ATTR_CYCLES will only
be a minor overestimation of the actual cycles used.
* The SW scheduler becomes more efficient at higher loads.
Signed-off-by: Mattias Rönnblom <mattias.ronnblom@ericsson.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
Add support for vector aggregation of crypto operations for cn10k.
Crypto operations will be grouped by sub event type, flow id, scheduler
type and queue id fields from rte_event_crypto_metadata::response_info.
Signed-off-by: Volodymyr Fialko <vfialko@marvell.com>
Introduce ability to aggregate crypto operations processed by event
crypto adapter into single event containing rte_event_vector whose event
type is RTE_EVENT_TYPE_CRYPTODEV_VECTOR.
Application should set RTE_EVENT_CRYPTO_ADAPTER_EVENT_VECTOR in
rte_event_crypto_adapter_queue_conf::flag and provide vector configuration
with respect of rte_event_crypto_adapter_vector_limits, which could be
obtained by calling rte_event_crypto_adapter_vector_limits_get, to enable
vectorization.
The event crypto adapter would be responsible for vectorizing the crypto
operations based on provided response information in
rte_event_crypto_metadata::response_info.
Updated drivers and tests accordingly to new API.
Signed-off-by: Volodymyr Fialko <vfialko@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
This patch addresses an issue of enqueuing more than
max_enq_depth and not able to dequeuing events equal
to max_cq_depth in a single call of rte_event_enqueue_burst
and rte_event_dequeue_burst.
Apply fix for restricting enqueue of events to max_enq_depth
so that in a single rte_event_enqueue_burst() call at most
max_enq_depth events are enqueued.
Also set per port and domain history list sizes based on
cq_depth. This results in dequeuing correct number of
events as set by max_cq_depth.
Fixes: f3cad285bb ("event/dlb2: add infos get and configure")
Cc: stable@dpdk.org
Signed-off-by: Abdullah Sevincer <abdullah.sevincer@intel.com>
This commit implements the changes required for using suggested
port type hint feature. Each port uses different credit quanta
based on port type specified using port configuration flags.
Each port has separate quanta defined in dlb2_priv.h
Producer and consumer ports will need larger quanta value to reduce number
of credit calls they make. Workers can use small quanta as they mostly
work out of locally cached credits and don't request/return credits often.
Signed-off-by: Abdullah Sevincer <abdullah.sevincer@intel.com>
If producer thread is only acting as a bridge between NIC and DLB, then
performance can be greatly improved by bypassing the fence instruction.
DLB enqueue API calls memory fence once per enqueue burst. If producer
thread is just reading from NIC and sending to DLB without updating
the read buffers or buffer headers OR producer is not writing
to data structures with dependencies on the enqueue write order, then
fencing can be safely disabled.
Signed-off-by: Abdullah Sevincer <abdullah.sevincer@intel.com>
For best performance, applications running on certain cores should use
the DLB device locally available on the same tile along with other
resources. To allocate optimal resources, probing is done for each
producer port (PP) for a given CPU and the best performing ports are
allocated to producers. The CPU used for probing is either the first
core of producer coremask (if present) or the second core of EAL
coremask. This will be extended later to probe for all CPUs in the
producer coremask or EAL coremask.
Producer coremask can be passed along with the BDF of the DLB devices.
"-a xx:y.z,producer_coremask=<core_mask>"
Applications also need to pass RTE_EVENT_PORT_CFG_HINT_PRODUCER during
rte_event_port_setup() for producer ports for optimal port allocation.
For optimal load balancing ports that map to one or more QIDs in common
should not be in numerical sequence. The port->QID mapping is application
dependent, but the driver interleaves port IDs as much as possible to
reduce the likelihood of sequential ports mapping to the same QID(s).
Hence, DLB uses an initial allocation of Port IDs to maximize the
average distance between an ID and its immediate neighbors. Using
the initialport allocation option can be passed through devarg
"default_port_allocation=y(or Y)".
When events are dropped by workers or consumers that use LDB ports,
completions are sent which are just ENQs and may impact the latency.
To address this, probing is done for LDB ports as well. Probing is
done on ports per 'cos'. When default cos is used, ports will be
allocated from best ports from the best 'cos', else from best ports of
the specific cos.
Signed-off-by: Abdullah Sevincer <abdullah.sevincer@intel.com>
Update event vector transmit routine to honor elem_offset.
Use ``rte_event_vector::elem_offset`` to report partial
vector transmission to the application when there is not
enough space in the SQ.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Disable timer resolution estimation, read TIM LF clock registers
to get the current running clock counter as estimating causes
time drift.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Avoid reading non-cached registers in fastpath.
PENDSTATE need not be read before tag flush in Tx enqueue
context as we have additional checks prior to check for
pending flushes.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Removed support to limit XAQ from devargs. If XAQ is limited, new add
works could run out of XAQ entries and disable the queue.
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Added support for burst enqueue for cn10k event crypto adapter.
Instructions will be grouped based on the queue pair and sent in a burst.
Signed-off-by: Volodymyr Fialko <vfialko@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Fix stale XAQ depth check pointers in workslot memory after
XAQ pool resize.
Fixes: bd64a963d2 ("event/cnxk: use common XAQ pool functions")
Cc: stable@dpdk.org
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Added new fields to represent event queue weight and affinity in
rte_event_queue_conf structure. Internal op to get queue attribute is
removed as it is no longer needed. Updated driver to use the new field.
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Add support to configure and use periodic event timers in
software timer adapter.
The structure ``rte_event_timer_adapter_stats`` is extended
by adding a new field, ``evtim_drop_count``. This stat
represents the number of times an event_timer expiry event
is dropped by the event timer adapter.
Updated the software eventdev pmd timer_adapter_caps_get
callback function to report the support of periodic
event timer capability.
Signed-off-by: Naga Harish K S V <s.v.naga.harish.k@intel.com>
Acked-by: Erik Gabriel Carrillo <erik.g.carrillo@intel.com>
Add the support of reassembly functions callback
assignment to eventdev dequeue and dequeue_burst.
Fixes: c062f5726f ("net/cnxk: support IP reassembly")
Cc: stable@dpdk.org
Signed-off-by: Rahul Bhansali <rbhansali@marvell.com>
Add preliminary Tx queue depth check and return on failure.
Once the check passes, tx_adapter_enqueue() function becomes
a blocking call till it succeeds.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
The software eventdev PMD reports todo-fix-name as the
device name.
Fixes: c66baa68e4 ("event/sw: add dump function for easier debugging")
Cc: stable@dpdk.org
Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
Fix bug in flow migration, which under certain conditions causes
reordering and violation of atomicity guarantees.
The issue occurs when the processing of a flow (on an atomic queue)
has resulted in events enqueued to a flow currently being migrated,
and the former (producer) flow is also selected for migration. The
events are buffered ("paused") on the originating port, and released
(forwarded) when the migration has completed. However, at the time of
"unpausing" the latter (consumer) flow, processing of the producer
flow on the port to which it was migrated may have already produced
events, for the same paused flow. This constitutes a race condition,
and depending on which port wins, reordering may have been introduced.
This patch forbids migration when a port has paused events, since
those events may have been the result of processing a to-be-migrated
flow.
This patch also disallows processing events pertaining to a flow under
migration, for the same reason. A new buffer is introduced, which
holds such not-yet-processed events dequeued from the port's input
ring. Such events are forwarded to the target port as a part of the
migration process.
The 'forwarding' migration state is eliminated, and instead background
processing is only performed if there are no unreleased events on the
port.
The bug is primarily triggered in situations where multiple flows are
migrated as one transaction, but may occur even if only a single flow
is migrated (e.g., with older DSW versions, which does not support
multi-flow migration).
Fixes: f6257b22e7 ("event/dsw: add load balancing")
Cc: stable@dpdk.org
Signed-off-by: Mattias Rönnblom <mattias.ronnblom@ericsson.com>
Use the Full context SA structures and command in IPsec fast path.
For inline outbound, populate CPT instruction as per full context.
Added new macros and functions with respect to full context.
Populate WQE ptr in CPT instruction with proper offset from mbuf.
Also add option to override outbound inline SA IV for debug
Update mbuf length based on IP version in Rx post process purposes
via environment variable.
User can set env variable as:
export ETH_SEC_IV_OVR="0x0, 0x0,..."
Signed-off-by: Vidya Sagar Velumuri <vvelumuri@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Add support for zero aura for inline meta packets and register
callback to ROC to create meta pool via mempool. Also
add devargs to override meta buffer count and size.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Add FC check in vector event Tx path, the check needs to be
performed after head wait right before LMTST is issued.
Since, SQB pool FC updates are delayed w.r.t the actual
utilization of pool add sufficient slack to avoid overflow.
Added a new device argument to override the default SQB slack
configured, can be used as follows:
-a 0002:02:00.0,sqb_slack=32
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Add support to enable PTP per ethernet device when that
specific ethernet device is connected to event device via
Rx adapter.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Make rte_driver opaque for non internal users.
This will make extending this object possible without breaking the ABI.
Introduce a new driver header and move rte_driver definition.
Update drivers and library to use the internal header.
Some applications may have been dereferencing rte_driver objects, mark
this object's accessors as stable.
Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Jay Jayatheerthan <jay.jayatheerthan@intel.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Acked-by: Abhinandan Gujjar <abhinandan.gujjar@intel.com>
The vdev bus interface is for drivers only.
Mark as internal and move the header in the driver headers list.
While at it, cleanup the code:
- fix indentation,
- remove unneeded reference to bus specific singleton object,
- remove unneeded list head structure type,
- reorder the definitions and macro manipulating the bus singleton object,
- remove inclusion of rte_bus.h and fix the code that relied on implicit
inclusion,
Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Rosen Xu <rosen.xu@intel.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
The pci bus interface is for drivers only.
Mark as internal and move the header in the driver headers list.
While at it, cleanup the code:
- fix indentation,
- remove unneeded reference to bus specific singleton object,
- remove unneeded list head structure type,
- reorder the definitions and macro manipulating the bus singleton object,
- remove inclusion of rte_bus.h and fix the code that relied on implicit
inclusion,
Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Acked-by: Rosen Xu <rosen.xu@intel.com>
The fslmc bus interface is for drivers only.
Mark as internal and move the header in the driver headers list.
While at it, cleanup internal structures:
- remove unneeded reference to bus specific singleton object,
- remove unneeded list head structure type,
- reorder the definitions and macro manipulating the bus singleton object,
- remove inclusion of rte_bus.h and update code that relied on it,
Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
The dpaa bus interface is for drivers only.
Mark as internal and move the header in the driver headers list.
While at it, cleanup internal structures:
- remove unneeded reference to bus specific singleton object,
- remove unneeded list head structure type,
- reorder the definitions and macro manipulating the bus singleton object,
- remove inclusion of rte_bus.h and update code that relied on it,
Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Do not include <ctype.h>, <errno.h>, and <stdlib.h> from <rte_common.h>,
because they are not used by this file.
Include the needed headers directly from the files that need them.
Signed-off-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
