Start a new release cycle with empty release notes.
The ABI version becomes 23.0.
The map files are updated to the new ABI major number (23).
The ABI exceptions are dropped and CI ABI checks are disabled because
compatibility is not preserved.
Special handling of removed drivers is also dropped in check-abi.sh and
a note has been added in libabigail.abignore as a reminder.
Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
This commit changes 2 error messages to better
describe cq_weight related errors, should one occur.
Fixes: ffa46fc4a2 ("event/dlb2: support CQ weight")
Cc: stable@dpdk.org
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
The cq_weight array must be sized for the maximum number
of eventdev ports, not the maximum number of DLB2
load balanced ports.
This commit fixes the above array sizing bug and resultant
coverity warning.
Coverity issue: 379234
Fixes: ffa46fc4a2 ("event/dlb2: support CQ weight")
Cc: stable@dpdk.org
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Fix cos initialization, handling the default case too.
Substitute the semicolon for the comma
that was expected in the cos_bw command line override.
Commas are not allowed within a multi field option.
The new format is cos_bw=%d:%d:%d:%d, where the sum of
the 4 decimal values must be less than or equal to 100.
Corrected probe-time initialization order.
Fixes: bec8901bfe ("event/dlb2: support ldb port specific COS")
Cc: stable@dpdk.org
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
This commit fixes a bug, where we could encounter a credit
deadlock due to changing the CQ depth. To remedy this situation,
the commit reduces the maximum CQ depth from 1024 to 128,
and also allows configuring the maximum enqueue depth. Maximum
enqueue depth must be tuned to the CQ depth, if the CQ depth
is increased.
Fixes: 86fe66d456 ("event/dlb2: allow CQ depths up to 1024")
Cc: stable@dpdk.org
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
This commit fixes a bug, where we could assign a CQ depth
of zero, leading to a subsequent divide-by-zero fault.
It also fixes an issue where the original default CQ depth
was returned on a query, instead of the overridden value.
Fixes: 86fe66d456 ("event/dlb2: allow CQ depths up to 1024")
Cc: stable@dpdk.org
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
This commit fixes a typo and resultant bug that triggered a
coverity warning.
Coverity issue: 4607286
Fixes: bec8901bfe ("event/dlb2: support ldb port specific COS")
Cc: stable@dpdk.org
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
This commit fixes a segfault that resulted from reading
beyond the end of the port_cos array. The root cause was using
the DLB num ports define instead of the eventdev num ports define.
Fixes: bec8901bfe ("event/dlb2: support ldb port specific COS")
Cc: stable@dpdk.org
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Found by nullfree.cocci.
Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
[David: for lpm parts:]
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Acked-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
[David: for vdpa/mlx5 parts:]
Acked-by: Matan Azrad <matan@nvidia.com>
[David: for dma/dpaa2, raw/ifpga, vdpa/mlx5:]
Acked-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
Reviewed-by: Chengwen Feng <fengchengwen@huawei.com>
[David: reran cocci.sh and updated common/mlx5 and cryptodev asym test]
Signed-off-by: David Marchand <david.marchand@redhat.com>
Current PFC implementation does not support VFs.
This patch enables PFC on VFs too.
Also fix the config of aura.bp to be based on number
of buffers(aura.limit) and corresponding shift
value(aura.shift).
Fixes: cb4bfd6e7b ("event/cnxk: support Rx adapter")
Cc: stable@dpdk.org
Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
Use computed value for WQE skip instead of a hard-coded value.
WQE skip needs to be number of 128B lines to accommodate rte_mbuf.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Initialize gw_rdata with tag type EMPTY. Leaving tag type as
zero(ATOMIC) may cause some unnecessary head wait, if cache will be used
before the first update in dequeue/get_work functions.
Signed-off-by: Volodymyr Fialko <vfialko@marvell.com>
DLB supports 4 class of service domains, to aid in managing the
device bandwidth across ldb ports. This commit allows specifying
which ldb ports will participate in the COS scheme, which class
they are a part of, and the specific bandwidth percentage
associated with each class. The cumulative bandwidth associated
with the 4 classes must not exceed 100%. This feature is enabled
on the command line, and will be documented in the DLB2 programmers
guide.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Enabling the weight limit on a CQ allows the enqueued QEs' 2-bit weight
value (representing weights of 1, 2, 4, and 8) to factor into whether a
CQ is full. If the sum of the weights of the QEs in the CQ meet or exceed
its weight limit, DLB will stop scheduling QEs to it (until software pops
enough QEs from the CQ to reverse that).
CQ weight support is enabled via the command line, and applies to
DLB 2.5 (and above) load balanced ports. The DLB2 documentation will
be updated with further details.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
On Xeon, 512b accesses are available, so movdir64 instruction is able to
perform 512b read and write to DLB producer port. In order for movdir64
to be able to pull its data from store buffers (store-buffer-forwarding)
(before actual write), data should be in single 512b write format.
This commit add change when code is built for Xeon with 512b AVX support
to make single 512b write of all 4 QEs instead of 4x64b writes.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Acked-by: Kent Wires <kent.wires@intel.com>
This commit corrects the advertized capabilities reported by the DLB2 PMD.
Previously DLB2 reported supporting RTE_EVENT_DEV_CAP_QUEUE_QOS, but the
DLB2 hardware does not support such capability. This commit removes that
feature from the reported capabilities feature set.
Additionally, two capabilities that DLB2 does support were not being
reported in the capabilities feature set. This commit adds those.
RTE_EVENT_DEV_CAP_MULTIPLE_QUEUE_PORT = Event device is capable of
setting up the link between multiple queues and a single port. If the
flag is not set, the eventdev can only map a single queue to each
port or map a single queue to many port
RTE_EVENT_DEV_CAP_RUNTIME_PORT_LINK = Event device is capable of
configuring the queue/port link at runtime. If the flag is not set,
the eventdev queue/port link is only can be configured during
initialization
Finally, the file doc/guides/eventdevs/features/dlb2.ini has been updated
to match the capabilities actually reported by the PMD.
Fixes: e7c9971a85 ("event/dlb2: add probe-time hardware init")
Cc: stable@dpdk.org
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Tx adapter allocate data during eth_tx_adapter_queue_add() call and
it's only cleaned but not freed during eth_tx_adapter_queue_del().
Implemented eth_tx_adapter_free() callback to free adapter data.
Signed-off-by: Volodymyr Fialko <vfialko@marvell.com>
The `rte_event_eth_tx_adapter_enqueue()` function expects driver layer
to return the total number of events successfully transmitted.
Fix cn10k driver returning the number of packets transmitted in a
event vector instead of number of events.
Fixes: 761a321acf ("event/cnxk: support vectorized Tx event fast path")
Cc: stable@dpdk.org
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
If QID inflights is set to an invalid value, it can cause the
PMD to hang. This commit adds checks to make sure that the
value is valid before programming the hardware.
Fixes: 1857f1922c ("event/dlb2: use new implementation of resource file")
Cc: stable@dpdk.org
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Previously, anything that prevented the CQs from being drained
would hang the PMD for an unacceptably long time. This commit updates
the drain logic to be resource and time based, thus eliminating
the potential for a long hang when draining the queues in preparation
for a reset.
Fixes: 1857f1922c ("event/dlb2: use new implementation of resource file")
Cc: stable@dpdk.org
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
If user tried to send 64 events, it will take 64 credits. Enqueue API
only gets 32 credits each time. If it does not have sufficient credits,
it just fails and returns. Enqueue API does not retry. On next enqueue,
it will get 32 more and send will work. This results in alternate
enqueues failing.
Add check to make sure DLB2_MAX_ENQUEUE_DEPTH <=
both DLB2_SW_CREDIT_QUANTA_DEFAULT and DLB2_SW_CREDIT_BATCH_SZ.
Add enough retires in the driver to satisfy max enqueue depth credits
based on set quanta. Note the credit quanta size is different for each
port. Retry count = Max enqueue depth / credit quanta in driver before
returning no credit.
Fixes: 3a6d0c04e7 ("event/dlb2: add port setup")
Cc: stable@dpdk.org
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Segmentation fault is observed as soon as any application
with ethdev event is launched as ev->mbuf was not set properly.
Fixing sub event type violation as in OCTEONTX event device
sub_event_type is used to store the ethernet port identifier
when work is received from OCTEONTX ethernet device. This violates
the event device spec as sub_event_type should be 0 in the initial
receive stage. Setting sub_event_type to 0 after copying the port id
in single workslot mode.
Fixes: 44a2cebbd4 ("crypto/octeontx: add crypto adapter data path")
Cc: stable@dpdk.org
Signed-off-by: Harman Kalra <hkalra@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Add hardware supported flow control checks before enqueueing to CPT.
Since both poll mode and event mode can be used at the same time, add
hardware flow control checks to make sure s/w doesn't over submit to
hardware queues. For cn9k, queue depth usage is not high and so FC check
is omitted for poll mode.
To allow for more accurate updates, flow control hardware setting is
updated to give an update per 32 packets. In case of crypto adapter,
multiple cores can enqueue to the same CPT LF at the same time. To
allow such a case, flow control threshold is updated when the adapter
is configured.
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Allow building generic arm64 target using config/arm/arm64_armv8_linux_*
config which works on both cn9k and cn10k by relaxing cache line size
requirements a bit.
While at it move cache line checks to common place.
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
If an event queue flush does not complete after a fixed number of tries,
remaining queues are flushed before retrying the one with incomplete
flush.
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Added API to set queue attributes at runtime and API to get weight and
affinity.
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Move event post-processing to a separate function.
Do complete event post-processing in tear-down functions to prevent
incorrect memory free.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Add additional checks while performing RTE_EVENT_OP_RELEASE to
ensure that there are no pending SWTAGs and FLUSHEs in flight.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Updated to allow overriding the default CQ depth of 32. Since there are
only 2048 DLB history list entries, increasing the CQ depth decreases
the number of available LDB ports to 2048/max_cq_depth. Resource query
will take this into account and return the correct maximum number of
LDB ports.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Function roc_sso_hws_head_wait() expects a base as input pointer, and it
will itself get tag_op from the base. By passing tag_op instead of base
pointer to this function will add SSOW_LF_GWS_TAG register offset twice,
which will lead to accessing wrong register.
Fixes: 1f5b3d55c0 ("event/cnxk: store and reuse workslot status")
Cc: stable@dpdk.org
Signed-off-by: Volodymyr Fialko <vfialko@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Add a check to ensure that all shift counts are valid.
Shifting by more than 63 bits may result in undefined behavior, as
noted during coverity scan.
Coverity issue: 376527
Fixes: e697f35dbd ("event/dlb2: update rolling mask used for dequeue")
Cc: stable@dpdk.org
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
The rx_queue_flags should be checked against
RTE_EVENT_ETH_RX_ADAPTER_QUEUE_FLOW_ID_VALID flag.
Fixes: cb4bfd6e7b ("event/cnxk: support Rx adapter")
Cc: stable@dpdk.org
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Currently inline inbound device usage is not default for eventdev,
patch renames force_inl_dev dev arg to no_inl_dev and enables inline
inbound device by default.
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
cnxk platform supports red/yellow packet marking based on TM
configuration. This patch set hooks to enable/disable packet
marking for VLAN DEI, IP DSCP and IP ECN. Marking enabled only
in scalar mode.
Signed-off-by: Satha Rao <skoteshwar@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Added capability and support for inline inbound IP reassembly
in cnxk driver. The IP reassembly offload is supported only
when the inline IPSec security offload is enabled.
In case of IP reassembly incomplete, the mbufs are attached
in the mbuf dynamic field and a dynamic flag is set accordingly.
Signed-off-by: Vidya Sagar Velumuri <vvelumuri@marvell.com>
Signed-off-by: Akhil Goyal <gakhil@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Align prefetches for CN10K cache model for vWQE in Rx and Tx.
Move mbuf->next NULL assignment to Tx path and enabled it only
when multi segments offload is enabled to reduce L1 pressure.
Add macros to detect corrupted mbuf->next values when
MEMPOOL_DEBUG is set.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Timestamp resolution for an incoming and outgoing packets
is different for CN10k and CN9K. Added SoC specific
callback to retrieve timestamp in correct format
when read by application.
Signed-off-by: Rakesh Kudurumalla <rkudurumalla@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Currently meta buffers are freed in bursts of one LMT line
i.e 15 pointers. Instead free them in bursts of 16 LMTlines
which is 240 ptrs for better perf.
Also mark mempool objects as get and put in missing places.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
If multi-segment is enabled and single segment/packet
is received, then mbuf data_len is not updated in
cn9k_nix_cqe_to_mbuf() function.
Also, in case of timestamp is enabled, mbuf data_len
and pkt_len will be updated for all packets including
multi segmented packets.
Fixes: 7c6bee3406 ("net/cnxk: enable PTP processing in vector Rx")
Cc: stable@dpdk.org
Signed-off-by: Rahul Bhansali <rbhansali@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Using deschedule cmd might incorrectly ignore updates
to WQE, GGRP on CN9K.
Use addwork to pipeline work instead.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
When attempting to link a port and queue immediately after unlinking,
the CQ inflights may not all be processed. Poll the h/w register for
outstanding inflights instead of reading once, in case the inflights
are still being processed. Also return EBUSY if the inflight
processing is not completed in a suitable amount of time.
Fixes: 1857f1922c ("event/dlb2: use new implementation of resource file")
Cc: stable@dpdk.org
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Update the rolling mask used in dequeue operations to
fix the vector optimized dequeue.
Fixes: 000a7b8e75 ("event/dlb2: optimize dequeue operation")
Cc: stable@dpdk.org
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Improve vWQE and CQ Rx performance by tuning perfetches to 64B
cacheline size.
Also, prefetch the vWQE array offsets at cacheline boundaries.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Setting WAITW bit enables default min dequeue timeout of 1us.
Avoid the min dequeue timeout by setting WAITW only when dequeue_timeout
is configured.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Store and reuse workslot status for TT, GRP and HEAD status
instead of reading from GWC as reading from GWC imposes
additional latency.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Tx command is prepared based on offloads enabled and stored in
Tx queue structure at tx_queue_setup phase.
In fastpath the command is copied from Tx queue to LMT line for
all the packets.
Since, the command contents are mostly constants we can move the
command preparation to fastpath and avoid accessing Tx queue
memory.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Functions like free, rte_free, and rte_mempool_free
already handle NULL pointer so the checks here are not necessary.
Remove redundant NULL pointer checks before free functions
found by nullfree.cocci
Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Add cn10k segregated Rx and event Tx enqueue template functions,
these help in parallelizing the build.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Add cn10k segregated Rx and event dequeue functions to build,
add macros to make future modifications simpler.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Add cn10k segregated Rx and event dequeue template functions,
these help in parallelizing the build.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Add cn9k segregated Tx and event Tx functions to build,
add macros to make future modifications simpler.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Add cn9k segregated Rx and event Tx enqueue template functions,
these help in parallelizing the build.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Add cn9k segregated Rx and event dequeue functions to build,
add macros to make future modifications simpler.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Split template functions to multiple files based on the range
of offloads. This allows them to be built in parallel reducing
time spent on compiling single files containing all the template
functions.
The files are added to the build system in later patches modifying
the existing scheme of selecting template lookup with a simple
flat array based lookup.
Add cn9k segregated Rx and event dequeue template functions,
these help in parallelizing the build.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Support the tx enqueue in order queue mode, where queue id
for each event may be different.
Signed-off-by: Jun Yang <jun.yang@nxp.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Add external clock support for cnxk timer adapter.
External clock mapping is as follows:
RTE_EVENT_TIMER_ADAPTER_EXT_CLK0 = TIM_CLK_SRC_10NS,
RTE_EVENT_TIMER_ADAPTER_EXT_CLK1 = TIM_CLK_SRC_GPIO,
RTE_EVENT_TIMER_ADAPTER_EXT_CLK2 = TIM_CLK_SRC_PTP,
RTE_EVENT_TIMER_ADAPTER_EXT_CLK3 = TIM_CLK_SRC_SYNCE,
TIM supports clock input from external GPIO, PTP, SYNCE clocks.
Input resolution is adjusted based on CNTVCT frequency for better
estimation.
Since TIM is unaware of input clock frequency, application is
expected to pass the frequency.
Example:
-a 0002:0e:00.0,tim_eclk_freq=122880000-0-0
The order of frequencies above is GPIO-PTP-SYNCE.
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Minimum supported interval should now be retrieved from
mailbox based on the clock source and clock frequency.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
As per the deprecation notice, In the view of enabling unified driver
for octeontx2(cn9k)/octeontx3(cn10k), removing drivers/octeontx2
drivers and replace with drivers/cnxk/ which
supports both octeontx2(cn9k) and octeontx3(cn10k) SoCs.
This patch does the following
- Replace drivers/common/octeontx2/ with drivers/common/cnxk/
- Replace drivers/mempool/octeontx2/ with drivers/mempool/cnxk/
- Replace drivers/net/octeontx2/ with drivers/net/cnxk/
- Replace drivers/event/octeontx2/ with drivers/event/cnxk/
- Replace drivers/crypto/octeontx2/ with drivers/crypto/cnxk/
- Rename config/arm/arm64_octeontx2_linux_gcc as
config/arm/arm64_cn9k_linux_gcc
- Update the documentation and MAINTAINERS to reflect the same.
- Change the reference to OCTEONTX2 as OCTEON 9. Old release notes and
the kernel related documentation is not accounted for this change.
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Acked-by: Ruifeng Wang <ruifeng.wang@arm.com>
Number of events scheduled and available for dequeue
after token pop was set to dequeue_depth-1 instead of
dequeue_depth in test_delayed_pop. The expectation is
that all dequeue_depth number of events can be dequeued
once the last event is released.
Fixes: 07d55c418d ("event/dlb2: add delayed token pop logic")
Cc: stable@dpdk.org
Signed-off-by: Rashmi Shetty <rashmi.shetty@intel.com>
Reviewed-by: Mike Ximing Chen <mike.ximing.chen@intel.com>
Replace RTE_EVENT_DEV_CAP_REQUIRES_MAINT, which signaled the need
for the application to call rte_event_maintain(), with
RTE_EVENT_DEV_CAP_MAINTENANCE_FREE, which does the opposite (i.e.,
signifies that the event device does not require maintenance).
This approach is more in line with how other eventdev hardware and/or
software limitations are handled in the Eventdev API.
Signed-off-by: Mattias Rönnblom <mattias.ronnblom@ericsson.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Reported by clang 13.
This patch removes the inflights variable from the sw_dump function
within the software section of the event driver as it is an unused but
set variable.
Bugzilla ID: 881
Fixes: c66baa68e4 ("event/sw: add dump function for easier debugging")
Cc: stable@dpdk.org
Reported-by: Liang Longfeng <longfengx.liang@intel.com>
Signed-off-by: Conor Walsh <conor.walsh@intel.com>
Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
Reviewed-by: David Marchand <david.marchand@redhat.com>
Set the RTE_EVENT_DEV_CAP_REQUIRES_MAINT flag, and perform DSW
background tasks on rte_event_maintain() calls.
Signed-off-by: Mattias Rönnblom <mattias.ronnblom@ericsson.com>
Tested-by: Richard Eklycke <richard.eklycke@ericsson.com>
Tested-by: Liron Himi <lironh@marvell.com>
SSO group base addresses are always are always contiguous we
need not store all the base addresses in workslot memory, instead
just store the base address and compute the group address offset
when required.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
The transmit loop incorrectly assumes that nb_mbufs is always
a multiple of 4 when transmitting an event vector. The max
size of the vector might not be reached and pushed out early
due to timeout.
Fixes: 761a321acf ("event/cnxk: support vectorized Tx event fast path")
Cc: stable@dpdk.org
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Disable drop_re i.e dropping packets with receive errors on
vector enable for few cn10k revisions due to HW errata.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Removing direct access to interrupt handle structure fields,
rather use respective get set APIs for the same.
Making changes to all the drivers access the interrupt handle fields.
Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Hyong Youb Kim <hyonkim@cisco.com>
Signed-off-by: David Marchand <david.marchand@redhat.com>
Tested-by: Raslan Darawsheh <rasland@nvidia.com>
FINISHED state seems to be used to indicate that the worker's update
of the 'state' is not visible to other threads. There seems to be no
requirement to have such a state.
Since the FINISHED state is removed, the API rte_eal_wait_lcore
is updated to always return the status of the last function that
ran in the worker core.
Signed-off-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Reviewed-by: Ola Liljedahl <ola.liljedahl@arm.com>
Reviewed-by: Feifei Wang <feifei.wang2@arm.com>
Fix the mbuf offload flags namespace by adding an RTE_ prefix to the
name. The old flags remain usable, but a deprecation warning is issued
at compilation.
Signed-off-by: Olivier Matz <olivier.matz@6wind.com>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Acked-by: Somnath Kotur <somnath.kotur@broadcom.com>
The device specific structures - rte_cryptodev
and rte_cryptodev_data are moved to cryptodev_pmd.h
to hide it from the applications.
Signed-off-by: Akhil Goyal <gakhil@marvell.com>
Tested-by: Rebecca Troy <rebecca.troy@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
CNF10KA does not differ it terms of RVU resources from
CN10KA platform hence add it to list of devices respective
drivers support.
Otherwise devices on CNF10KA are not probed even though
compatible drivers exist.
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
This commit implements the changes required for using suggested
port type hint feature. Each port uses different credit quanta
based on port type specified using port configuration flags.
Each port has separate quanta defined in dlb2_priv.h
Producer and consumer ports will need larger quanta value to reduce number
of credit calls they make. Workers can use small quanta as they mostly
work out of locally cached credits and don't request/return credits often.
Signed-off-by: Pravin Pathak <pravin.pathak@intel.com>
Hide rte_event_timer_adapter_pmd.h file as it is an internal file.
Remove rte_ prefix from rte_event_timer_adapter_ops structure.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Invoke event_dev_probing_finish() function at the end of probing,
this function sets the function pointers in the fp_ops flat array.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Mark all the driver specific functions as internal, remove
`rte` prefix from `struct rte_eventdev_ops`.
Remove experimental tag from internal functions.
Remove `eventdev_pmd.h` from non-internal header files.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Include vector configuration into the structure
``rte_event_eth_rx_adapter_queue_conf`` that is used to configure
Rx adapter ethernet device Rx queue parameters.
This simplifies event vector configuration as it avoids splitting
configuration per Rx queue.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jay Jayatheerthan <jay.jayatheerthan@intel.com>
Acked-by: Ray Kinsella <mdr@ashroe.eu>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Reduced max chunk pool cache size from RTE_MEMPOOL_CACHE_MAX_SIZE(512)
to 128.
If chunk pool cache is empty, it gets filled during arm. Filling 512
entries at a time will fail arm if timeout is shorter, hence
reduce the pool cache size.
Fixes: 0e792433d0 ("event/cnxk: create and free timer adapter")
Cc: stable@dpdk.org
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Type of kvargs value and handler function argument should match to avoid
spilling memory.
Fixes: 7ffa737996 ("event/cnxk: add option to configure getwork mode")
Cc: stable@dpdk.org
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Since AARCH32 extension is not implemented on octeontx2 family, only
enable build for 64bit.
Due to Linux kernel AF(Admin Function) driver dependency, only enable
build for 64-bit Linux.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Since AARCH32 extension is not implemented on octeontx family, only
enable build for 64bit.
Due to Linux kernel AF(Admin function) driver dependency, only enable
build for 64-bit Linux.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Add RTE_ prefix to internal API defined in public header.
Use the prefix instead of double underscore.
Use uppercase for macros in the case of name conflict.
Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
Fix the mempool flags namespace by adding an RTE_ prefix to the name.
The old flags remain usable, to be deprecated in the future.
Flag MEMPOOL_F_NON_IO added in the release is just renamed to have RTE_
prefix.
Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
