66 Commits

Author SHA1 Message Date
Ciara Power
3cc6ecfdfe build: remove makefiles
A decision was made [1] to no longer support Make in DPDK, this patch
removes all Makefiles that do not make use of pkg-config, along with
the mk directory previously used by make.

[1] https://mails.dpdk.org/archives/dev/2020-April/162839.html

Signed-off-by: Ciara Power <ciara.power@intel.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2020-09-08 00:09:50 +02:00
Nithin Dabilpuram
ff46ba7385 common/octeontx2: retry interrupt callback unregister
Interrupt callback unregister can fail with -EAGAIN
when interrupt handler is active in interrupt thread.
Hence retry before reporting a failure or proceeding further.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2020-07-11 06:18:52 +02:00
Harman Kalra
43330c4de3 common/octeontx2: fix crash on running procinfo
Segmentation fault has been observed while running procinfo
with reset options i.e. --stats-reset and --xstats-reset.
Reason is procinfo runs as a secondary process and tries to
hold a lock which is part of struct mdev, which was not
allocated as part of shared memory.

Fixes: 5ca59711f771 ("common/octeontx2: add mailbox base support infra")
Cc: stable@dpdk.org

Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2020-07-07 23:38:26 +02:00
Tejasree Kondoj
a0645ed0d6 crypto/octeontx2: discover capabilities
Populate capabilities based on device features.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
2020-07-08 18:16:17 +02:00
David Marchand
1022ff0c33 drivers: drop workaround for internal libraries version
Now that all libraries have a single version, we can drop the empty
stable blocks that had been added when moving symbols from stable to
internal ABI.

Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
2020-07-07 12:48:59 +02:00
Jerin Jacob
9c99878aa1 log: introduce logtype register macro
Introduce the RTE_LOG_REGISTER macro to avoid the code duplication
in the logtype registration process.

It is a wrapper macro for declaring the logtype, registering it and
setting its level in the constructor context.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Adam Dybkowski <adamx.dybkowski@intel.com>
Acked-by: Sachin Saxena <sachin.saxena@nxp.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2020-07-03 15:52:51 +02:00
Harman Kalra
9311beeea4 net/octeontx2: support CN98xx
New cn98xx SOC comes up with two NIX blocks wrt
cn96xx, cn93xx, to achieve higher performance.
Also the no of cores increased to 36 from 24.

Adding support for cn98xx where need a logic to
detect if the LF is attached to NIX0 or NIX1 and
then accordingly use the respective NIX block.

Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2020-06-30 14:52:30 +02:00
Pavan Nikhilesh
31246a328f mempool/octeontx2: add devargs to lock context in cache
Add device arguments to lock NPA aura and pool contexts in NDC cache.
The device args take hexadecimal bitmask where each bit represent the
corresponding aura/pool id.
Example:
	-w 0002:02:00.0,npa_lock_mask=0xf // Lock first 4 aura/pool ctx

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2020-05-19 18:28:58 +02:00
Pavan Nikhilesh
8614cb6afd common/octeontx2: mark internal symbols
Move the internal symbols to INTERNAL sections so that any
change in them is not reported as ABI breakage.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Ray Kinsella <mdr@ashroe.eu>
Signed-off-by: David Marchand <david.marchand@redhat.com>
2020-05-18 17:29:20 +02:00
Anoob Joseph
18839177b8 common/octeontx2: fix port ID bound check
Fix out of bounds access.

Coverity issue: 354230, 354231
Fixes: f44e71637755 ("net/octeontx2: add security session operations")
Fixes: 3fe4d07d1678 ("crypto/octeontx2: enable CPT to share QP with ethdev")
Cc: stable@dpdk.org

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
2020-05-17 16:10:44 +02:00
Jerin Jacob
251dab27d5 common/octeontx2: upgrade mbox definition to version 7
Upgrade mailbox definitions to version 0x0007 of kernel AF driver.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
2020-05-11 22:27:39 +02:00
Ray Kinsella
105f3039c7 version: reference next ABI 21 for recent additions
Change references to ABI 20.0.1 to use ABI v21, see
https://doc.dpdk.org/guides/contributing/abi_policy.html#general-guidelines

"Major ABI versions are declared no more frequently than yearly.
Compatibility with the major ABI version is mandatory in subsequent
releases until a new major ABI version is declared."

Combined ABI policy and versioning in maintainers, add map files to the
filter to more closely monitor future ABI changes.

Signed-off-by: Ray Kinsella <mdr@ashroe.eu>
2020-05-05 00:25:34 +02:00
Luca Boccassi
611faa5f46 fix various typos found by Lintian
Cc: stable@dpdk.org

Signed-off-by: Luca Boccassi <bluca@debian.org>
2020-04-25 19:53:47 +02:00
Satheesh Paul
0342232aa4 net/octeontx2: support custom L2 header
This patch adds SDP packet parsing support with custom L2 header,
adds support to include a field from custom header for flow tag
generation.

Signed-off-by: Satheesh Paul <psatheesh@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2020-04-21 13:57:06 +02:00
Nithin Dabilpuram
43f3f05fb6 net/octeontx2: support dynamic topology update
Modify resource allocation and freeing logic to support
dynamic topology commit while to traffic is flowing.
This patch also modifies SQ flush to timeout based on minimum shaper
rate configured. SQ flush is further split to pre/post
functions to adhere to HW spec of 96XX C0.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Krzysztof Kanas <kkanas@marvell.com>
2020-04-21 13:57:06 +02:00
Nithin Dabilpuram
5094a436c6 common/octeontx2: upgrade mbox definition to version 5
Sync mail box data structures to version 0x0005 to
that of kernel AF driver.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2020-04-21 13:57:06 +02:00
Thomas Monjalon
e3866e7355 replace hot attributes
The new macro __rte_hot, for compiler hinting,
is now used where appropriate for consistency.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2020-04-16 18:30:58 +02:00
Pavan Nikhilesh
acec04c4b2 build: disable experimental API check internally
Remove setting ALLOW_EXPERIMENTAL_API individually for each Makefile and
meson.build. Instead, enable ALLOW_EXPERIMENTAL_API flag across app, lib
and drivers.
This changes reduces the clutter across the project while still
maintaining the functionality of ALLOW_EXPERIMENTAL_API i.e. warning
external applications about experimental API usage.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Signed-off-by: David Marchand <david.marchand@redhat.com>
2020-04-14 16:22:34 +02:00
Harman Kalra
93a9afdb4b net/octeontx2: fix PTP
PTP functionality has been broken after a change in kernel
where enum npc_kpu_lc_ltype is change to allow adjustment of
LTYPE_MASK to detect all types of IP headers.
Syncing the required changes in DPDK to fix the issue.

The kernel side changes available in marvell SDK version SDK-10.3.2.x.

Fixes: b5dc3140448e ("net/octeontx2: support base PTP")
Cc: stable@dpdk.org

Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2020-02-19 13:51:06 +01:00
Anoob Joseph
44158b523b common/octeontx2: fix 20.02 new symbols ABI version
Move symbols added in 20.02 release to DPDK_20.0.1 ABI.

Fixes: d06551535a09 ("common/octeontx2: add security capability routine")
Fixes: 3fe4d07d1678 ("crypto/octeontx2: enable CPT to share QP with ethdev")
Fixes: f44e71637755 ("net/octeontx2: add security session operations")

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: David Marchand <david.marchand@redhat.com>
2020-02-11 14:28:55 +01:00
Sunil Kumar Kori
f1ae60d696 common/octeontx2: add polling based response mbox message
Currently otx2_mbox_get_rsp_xxx get response once AF driver
interrupts after completion. But this function will get into
deadlock if called in another interrupt context.

To avoid it, implemented another version of this function which polls
on dedicated memory for a given timeout.

Also after clearing interrupt, there could UP messages available for
processing. So irq handler must check mbox messages.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2020-02-06 16:35:40 +01:00
Archana Muniganti
d7fa8f2a8f net/octeontx2: add lookup mem changes to hold SA indices
lookup_mem provides fast accessing of data path fields.
Storing sa indices in lookup_mem which are required in
inline rx data path.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2020-02-05 15:20:51 +01:00
Anoob Joseph
f44e716377 net/octeontx2: add security session operations
Adding security session operations in eth security ctx.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2020-02-05 15:20:51 +01:00
Anoob Joseph
3fe4d07d16 crypto/octeontx2: enable CPT to share QP with ethdev
Adding the infrastructure to save one opaque pointer in idev and
implement the consumer-producer in the PMDs which uses it accordingly.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2020-02-05 15:20:51 +01:00
Vamsi Attunuru
d06551535a common/octeontx2: add security capability routine
This routine returns true if given rte_eth_dev is security offload
capable and belongs to octeontx2.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2020-02-05 15:20:51 +01:00
Anoob Joseph
b4988b4479 common/octeontx2: add CPT LF mbox for inline inbound
Adding the new mbox introduced to configure CPT LF to be used for inline
inbound.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2020-02-05 15:20:51 +01:00
Jerin Jacob
b4bf22d173 net/octeontx2: change default RSS hash calculation
Before C0 HW revision, The RSS adder was computed based the following
static formula.

rss_adder<7:0> = flow_tag<7:0> ^ flow_tag<15:8> ^
flow_tag<23:16> ^ flow_tag<31:24>

The above scheme has the following drawbacks:
1) It is not in line with other standard NIC behavior.
2) There can be an SW use case where SW can compute the hash
upfront using Toeplitz function and predict the queue selection
to optimize some packet lookup function. The nonstandard
way of doing XOR makes the consumer to not predict the queue selection.

C0 HW revision onward, The HW can configure the
rss_adder<7:0> as flow_tag<7:0> to align with standard NICs.

This patch adds an option to select legacy RSS adder mode
using tag_as_xor=1 devargs option while keeping the standard NIC
behavior as default.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
2020-02-05 09:51:21 +01:00
Kiran Kumar K
919d01d330 net/octeontx2: extend RSS supported offload types
Extend RSS offload types for octeontx2. Add support to select
L3 SRC, L3 DST, L4 SRC and L4 DST for RSS calculation.

Add support to select L3 SRC or DST only, L4 SRC or DST only for RSS
calculation.

With this requirement there will be following combinations,
IPV[4,6]_SRC_ONLY, IPV[4,6]_DST_ONLY, [TCP,UDP,SCTP]_SRC_ONLY,
[TCP,UDP,SCTP]_DST_ONLY. So, instead of creating a bit for each
combination, we are using upper 4 bits (31:28) in the flow_key_cfg
to represent the SRC, DST selection. 31 => L3_SRC, 30 => L3_DST,
29 => L4_SRC, 28 => L4_DST. These won't be part of flow_cfg, so that
we don't need to change the existing ABI.

Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2020-02-05 09:51:20 +01:00
Mahipal Challa
81fd15a2ac raw/octeontx2_ep: add device configuration
Register "dev_configure" API to configure/initialize the SDP
VF PCIe devices.

Signed-off-by: Mahipal Challa <mchalla@marvell.com>
Reviewed-by: Gavin Hu <gavin.hu@arm.com>
2020-01-20 09:40:48 +01:00
Nithin Dabilpuram
89fc6763b1 common/octeontx2: support C0 silicon version
Avoid using PCI subsystem device id for SoC revision
identification and just use PCI revision id to support C0 silicon.
This patch also reduces SQB threshold to 70% to have
sufficient buffer before we overflow SQ.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2020-01-17 19:46:26 +01:00
Sunil Kumar Kori
9a6dde4cd5 common/octeontx2: reduce wait time for mbox messages
After each mbox send operation, context waits for minimum 1ms to get
corresponding response although response can come earlier.
So reducing wait time to lower granularity.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2020-01-17 19:46:26 +01:00
Pawel Modrak
85ff364f3b build: align symbols with global ABI version
Merge all versions in linker version script files to DPDK_20.0.

This commit was generated by running the following command:

:~/DPDK$ buildtools/update-abi.sh 20.0

Signed-off-by: Pawel Modrak <pawelx.modrak@intel.com>
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
2019-11-20 23:05:39 +01:00
Anatoly Burakov
fbaf943887 build: remove individual library versions
Since the library versioning for both stable and experimental ABI's is
now managed globally, the LIBABIVER and version variables no longer
serve any useful purpose, and can be removed.

The replacement in Makefiles was done using the following regex:

	^(#.*\n)?LIBABIVER\s*:=\s*\d+\n(\s*\n)?

(LIBABIVER := numbers, optionally preceded by a comment and optionally
succeeded by an empty line)

The replacement for meson files was done using the following regex:

	^(#.*\n)?version\s*=\s*\d+\n(\s*\n)?

(version = numbers, optionally preceded by a comment and optionally
succeeded by an empty line)

[David]: those variables are manually removed for the files:
- drivers/common/qat/Makefile
- lib/librte_eal/meson.build
[David]: the LIBABIVER is restored for the external ethtool example
library.

Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
2019-11-20 23:05:39 +01:00
Harman Kalra
35867a370f net/octeontx2: fix PTP configurations for VF
Issue has been observed if PTP is already enabled on PF and
later VFs are configured. Since PTP requires mbuf data off
to be shifted by 8 bytes, due to this l3fwd/l2fwd was not
working with VFs.
Also some extra garbage bytes were observed in packet data
when ptp was enabled.

Fixes: b5dc3140448e ("net/octeontx2: support base PTP")
Cc: stable@dpdk.org

Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2019-11-20 17:36:05 +01:00
Subrahmanyam Nilla
c261680cdb net/octeontx2: support SDP interface
System DPI Packet Interface Unit (SDP) is a co-processor
of OCTEON TX2 which provides PCIe endpoint support for a
remote host to DMA packets into and out of the OCTEON TX2 SoC.
SDP interface comes in to live only when it is connected in
EP mode. It exposes input and output queue pairs to remote host
for instruction input and packet output. It can be used as
a communication channel between remote host and OCTEON TX2.
Host machine needs to use corresponding user/kernel mode
driver to communicate with SDP interface on OCTEON TX2 SoC.

SDP interface support is limited to SDP PF device now.
No SDP VF support.

Signed-off-by: Subrahmanyam Nilla <snilla@marvell.com>
Signed-off-by: Venkateshwarlu Nalla <venkatn@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2019-11-08 23:15:05 +01:00
Kiran Kumar K
602009ee2d net/octeontx2: support HIGIG2
Adding support to parse higig2 header in RTE flow for octeontx2.
And added devargs to configure port for higig2.

Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2019-11-08 23:15:04 +01:00
Kiran Kumar K
87195879a0 net/octeontx2: support enabling switch type
Adding support to configure specific switch types like high2 and dsa
on a port. When this switch type is configured, it is expected that
all the traffic on that port should be of specific type only.

Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2019-11-08 23:15:04 +01:00
Nithin Dabilpuram
85ba9749f1 common/octeontx2: upgrade mbox definition to version 2
Sync mail box data structures to version 0x0002.
This patch checks for mismatch in mail box revision and
avoids initializing octeontx2 pci device if
there is a mismatch.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2019-10-23 16:43:10 +02:00
Nithin Dabilpuram
3b635472a9 net/octeontx2: support TSO offload
Add support to below TCP segmentation offloads for
96XX A1 onwards and 95xx B0 onwards.
- TCPv4, TCPv6
- VXLAN[v4 | v6][v4 | v6]
- GENEVE[v4 | v6][v4 | v6]

This patch also modifies a fastpath function to be forced
inline due to performance reasons for multi-seg mode.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2019-10-08 12:14:31 +02:00
Vivek Sharma
2e0061dbb4 net/octeontx2: update KPU parser profile
Update LB ltypes and use the updated ones so as replace
LB_STAG and LB_QINQ by single LB_STAG_QINQ ltype.

Signed-off-by: Vivek Sharma <viveksharma@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2019-10-08 12:14:31 +02:00
Sunil Kumar Kori
dba99cd6f8 net/octeontx2: fix checksum flag translation
NPC errors were incorrectly translated to ol_flag as
error code enum was not in sync with NPC profile.

Fixes: 371d3212cbed ("common/octeontx2: add build infrastructure and HW definition")
Cc: stable@dpdk.org

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2019-10-08 12:14:31 +02:00
Vamsi Attunuru
195981133a common/octeontx2: fix mbox memory access
Octeontx2 PMD's mailbox client uses device memory to send messages
to mailbox server in the admin function Linux kernel driver.
The device memory used for the mailbox communication needs to
be qualified as volatile memory type to avoid unaligned device
memory accesses because of compiler's memory access coalescing.

This patch modifies the mailbox request and responses as volatile
type which were non-volatile earlier and accessed from unaligned
memory addresses which resulted in bus errors on Fedora 30 with
gcc 9.1.1.

Fixes: 2b71657c8660 ("common/octeontx2: add mbox request and response definition")

Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2019-08-05 23:18:27 +02:00
Harman Kalra
e359e3b796 drivers/octeontx2: fix Coverity warnings
Addressed issues reported by coverity: NULL pointer dereferencing
issues, unchecked return value, uinitialized scalar value,
probable deadcode cases, unintended sign extension, bad bit
shift operation, Wrong sizeof argument (SIZEOF_MISMATCH)

Coverity issue: 343396, 345028, 344977, 345015, 345025, 344969
Coverity issue: 345014, 344966, 343437, 344993, 345007, 344988
Coverity issue: 343405, 344999, 345003

Fixes: 58f6f93c34c1 ("net/octeontx2: add module EEPROM dump")
Fixes: 38f566280abb ("net/octeontx2: add link stats operations")
Fixes: b5dc3140448e ("net/octeontx2: support base PTP")
Fixes: ba1b3b081edf ("net/octeontx2: support VLAN offloads")
Fixes: 092b38341859 ("net/octeontx2: add flow init and fini")
Fixes: 3da1b85b6d06 ("common/octeontx2: add FLR IRQ handler")
Fixes: 2548ab774f92 ("mempool/octeontx2: add context dump support")
Fixes: 2b71657c8660 ("common/octeontx2: add mbox request and response definition")

Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2019-08-05 18:42:19 +02:00
Nithin Dabilpuram
8d0715f054 net/octeontx2: support 96xx A1 silicon revision
Update workaround changes for erratas that are fixed on 96xx A1.
This patch also enables cq drop for all the passes for
maintaining performance along with updating a default
Rx ring size in dev_info.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2019-08-05 18:36:25 +02:00
Jerin Jacob
01b3da69ef common/octeontx2: update ready message response
The kernel mbox server driver(AF) updated the ready
message response. Sync with AF driver.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
2019-08-05 18:11:51 +02:00
Jerin Jacob
5077d88879 common/octeontx2: prevent STP instruction fissure
OTX2 AP core can sometimes fissure STP instructions when it is more
optimal to send such writes into the pipeline as 2 separate
instructions. However registers should be excluded from such
optimization. This commit ensures that no CSR write is ever fissured
by introducing zero cost workaround by setting STP pre-index by zero to
make sure OTX2 AP core prevent fissure.

Fixes: 8a4f835971f5 ("common/octeontx2: add IO handling APIs")

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-29 22:18:41 +02:00
Harman Kalra
122135e73c net/octeontx2: support read clock
This patch implements read clock api whose purpose is to return
raw clock ticks. Using this API real time ticks spent in
processing a packet can be known:
    <read_clock val at any time> - mbuf->timestamp

Calling mbox for reading raw clock ticks in fastpath is very
expensive so its value is derived from time stamp counter(tsc)
using freq multiplier (ratio of raw clock ticks and tsc) and clock
delta (by how much tsc is lagging from raw clock value).

Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2019-07-29 12:24:39 +02:00
Stephen Hemminger
2d10a3fbab common/octeontx2: remove escape sequences in log
Putting color escape sequences in the log look pretty for the
developer but fails in real world DPDK usage. A real application
will put DPDK log to syslog, and syslog does not handle escape
sequences.

Fixes: dd543124cd93 ("common/octeontx2: add runtime log infra")

Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2019-07-16 00:12:04 +02:00
Nithin Dabilpuram
d1d823e7a8 common/octeontx2: support CNF95xx SoC
Update platform support of CNF95xx in documentation and
also, update the HW cap based on PCI subsystem id and revision id.
This patch also changes HW capability handling to be based on
PCI Revision ID. PCI Revision ID contains a unique identifier
to identify chip, major and minor revisions.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2019-07-14 15:39:49 +02:00
Krzysztof Kanas
6670c8cbfe common/octeontx2: cleanup void returns
mbox_unregister_vf_irq and mbox_unregister_pf_irq returns void value.
mbox_unregister_irq also returns void.

Clang with flags '-Wall -Wextra -pedantic' complains about:
void function should not return void expression

Signed-off-by: Krzysztof Kanas <kkanas@marvell.com>
2019-07-08 15:29:25 +02:00