Enabled the flag pmd_supports_disable_iova_as_pa in cnxk driver build
files as they work with IOVA as VA. Updated cn9k and cn10k soc build
configurations to disable the IOVA as PA build by default.
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
This patch adds a capability to place hairpin Rx queue in locked device
memory. This capability is equivalent to storing hairpin RQ's data
buffers in locked internal device memory.
Hairpin Rx queue creation is extended with requesting that RQ is
allocated in locked internal device memory. If allocation fails and
force_memory hairpin configuration is set, then hairpin queue creation
(and, as a result, device start) fails. If force_memory is unset, then
PMD will fallback to allocating memory for hairpin RQ in unlocked
internal device memory.
To allow such allocation, the user must set HAIRPIN_DATA_BUFFER_LOCK
flag in FW using mlxconfig tool.
Signed-off-by: Dariusz Sosnowski <dsosnowski@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
NVIDIA acquired Mellanox Technologies in 2020.
The DPDK documentation and code might still include instances
of or references to Mellanox trademarks (like BlueField and ConnectX)
that are now NVIDIA trademarks.
The PCI IDs and copyrights are unchanged.
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Gal Cohen <galco@nvidia.com>
This updates the doc to include new supported devices like ConnectX-7,
and updates the description of older ones.
Signed-off-by: Raslan Darawsheh <rasland@nvidia.com>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Reference the common guide for generic setup.
Remove excessive capabilities from the recommended list.
Cc: stable@dpdk.org
Signed-off-by: Dmitry Kozlyuk <dkozlyuk@nvidia.com>
Update cnxk platform documentation to use
-Dplatform meson option for native builds.
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
The DPAA2 DMA driver is an implementation of the dmadev APIs,
that provide means to initiate a DMA transaction from CPU.
Earlier this was part of RAW driver, but with DMA drivers
added as separate flavor of drivers, this driver is being
moved to DMA drivers.
Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
With DMA devices supported as a separate flavor of devices,
the DPAA2 QDMA driver is moved in the DMA devices.
This change removes the DPAA2 QDMA driver from raw devices.
Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Add option to probe common device using import CTX/PD functions instead
of create functions.
This option requires accepting the context FD and the PD handle as
devargs.
This sharing can be useful for applications that use PMD for only some
operations. For example, an app that generates queues itself and uses
PMD just to configure flow rules.
Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
The "tx_db_nc" devarg forces doorbell register mapping to non-cached
region eliminating the extra write memory barrier. This argument was
used in creating the UAR for Tx and thus affected its performance.
Recently [1] its use has been extended to all UAR creation in all mlx5
drivers, and now its name is no longer so accurate.
This patch changes its name to "sq_db_nc" to suit any send queue that
uses it. The old name will still work for backward compatibility.
[1] commit 5dfa003db5 ("common/mlx5: fix post doorbell barrier")
Signed-off-by: Michael Baum <michaelba@nvidia.com>
Reviewed-by: Raslan Darawsheh <rasland@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Adds new documentation for MLX5 common driver that contains:
- Its features list (doesn't exist for now).
- Its devargs description.
- Device configuration information and tutorial.
- Quick Start Guide for Mellanox OFED/EN.
Move into this doc all shared information from other MLX5 PMD docs and
add them reference to new common doc.
Signed-off-by: Michael Baum <michaelba@nvidia.com>
Reviewed-by: Raslan Darawsheh <rasland@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Add initial support for PMD that allows to control particular pins form
userspace. Moreover PMD allows to attach custom interrupt handlers to
controllable GPIOs.
Main users of this PMD are dataplain applications requiring fast and low
latency access to pin state.
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
As per the deprecation notice, In the view of enabling unified driver
for octeontx2(cn9k)/octeontx3(cn10k), removing drivers/octeontx2
drivers and replace with drivers/cnxk/ which
supports both octeontx2(cn9k) and octeontx3(cn10k) SoCs.
This patch does the following
- Replace drivers/common/octeontx2/ with drivers/common/cnxk/
- Replace drivers/mempool/octeontx2/ with drivers/mempool/cnxk/
- Replace drivers/net/octeontx2/ with drivers/net/cnxk/
- Replace drivers/event/octeontx2/ with drivers/event/cnxk/
- Replace drivers/crypto/octeontx2/ with drivers/crypto/cnxk/
- Rename config/arm/arm64_octeontx2_linux_gcc as
config/arm/arm64_cn9k_linux_gcc
- Update the documentation and MAINTAINERS to reflect the same.
- Change the reference to OCTEONTX2 as OCTEON 9. Old release notes and
the kernel related documentation is not accounted for this change.
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Acked-by: Ruifeng Wang <ruifeng.wang@arm.com>
update driver to use the REE cnxk code
replace octeontx2/otx2 with cn9k
Signed-off-by: Liron Himi <lironh@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Add BPHY to the list of platform hardware accelerator blocks.
Fixes: 3d27e49e07 ("raw/cnxk_bphy: add BPHY CGX/RPM skeleton driver")
Cc: stable@dpdk.org
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Removing the rawdev based octeontx2-dma driver as the dependent
common/octeontx2 will be soon be going away. Also a new DMA driver will
be coming in this place once the rte_dmadev library is in.
Signed-off-by: Radha Mohan Chintakuntla <radhac@marvell.com>
Spell checked and corrected documentation.
If there are any errors, or I have changed something that wasn't an error
please reach out to me so I can update the dictionary.
Cc: stable@dpdk.org
Signed-off-by: Henry Nadeau <hnadeau@iol.unh.edu>
Add build infrastructure and common probe and remove for cnxk driver
which is used by both CN10K and CN9K SoC.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Add baseband PHY CGX/RPM skeleton driver which merely probes a matching
device. CGX/RPM are Ethernet MACs hardwired to baseband subsystem.
Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Signed-off-by: Jakub Palider <jpalider@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Add the meson based build infrastructure for Marvell
CNXK mempool driver along with stub implementations
for mempool device probe.
Also add Marvell CNXK mempool base documentation.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>
Platform specific guide for Marvell OCTEON CN9K/CN10K SoC is added.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
When removing the label "arm_cross_build_getting_the_prerequisite_library"
in the rework of cross_build_dpdk_for_arm64.rst,
the reference to this section got broken.
It went unnoticed because "ninja -C doc" does not regenerate the file
which is referencing the changed file.
The fix is a reword not mentioning the "not so relevant" example
from cross_build_dpdk_for_arm64.rst.
Fixes: eb0e12c0c2 ("doc: add clang to aarch64 cross build guide")
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Reviewed-by: David Marchand <david.marchand@redhat.com>
The documentation file contains some broken links to Mellanox's site.
Also now BlueField-2 platform is supported.
This patch provides new links and adds documentation for
BlueField-2 platform.
Signed-off-by: Asaf Penso <asafp@nvidia.com>
Make is no longer supported for compiling DPDK, references are now
removed in the documentation.
Signed-off-by: Ciara Power <ciara.power@intel.com>
Signed-off-by: Harman Kalra <hkalra@marvell.com>
Reviewed-by: Kevin Laatz <kevin.laatz@intel.com>
Add meson based build infrastructure along with the
OTX2 regexdev (REE) device functions.
Add Marvell OCTEON TX2 regex guide.
Signed-off-by: Guy Kaneti <guyk@marvell.com>
DPAA platorm MAC interface is known as FMAN i.e. Frame Manager.
There are two ways to control it.
1. Statically configure the queues and classification rules before the
start of the application using FMC tool.
2. Dynamically configure it within application by making API calls of
fmlib.
The fmlib or Frame Manager library provides an API on top of the
Frame Manager driver ioctl calls, that provides a user space application
with a simple way to configure driver parameters and PCD
(parse - classify - distribute) rules.
This patch integrates the base fmlib so that various queue config, RSS
and classification related features can be supported on DPAA platform.
Signed-off-by: Sachin Saxena <sachin.saxena@nxp.com>
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
New cn98xx SOC comes up with two NIX blocks wrt
cn96xx, cn93xx, to achieve higher performance.
Also the no of cores increased to 36 from 24.
Adding support for cn98xx where need a logic to
detect if the LF is attached to NIX0 or NIX1 and
then accordingly use the respective NIX block.
Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
System DPI Packet Interface Unit (SDP) is a co-processor
of OCTEON TX2 which provides PCIe endpoint support for a
remote host to DMA packets into and out of the OCTEON TX2 SoC.
SDP interface comes in to live only when it is connected in
EP mode. It exposes input and output queue pairs to remote host
for instruction input and packet output. It can be used as
a communication channel between remote host and OCTEON TX2.
Host machine needs to use corresponding user/kernel mode
driver to communicate with SDP interface on OCTEON TX2 SoC.
SDP interface support is limited to SDP PF device now.
No SDP VF support.
Signed-off-by: Subrahmanyam Nilla <snilla@marvell.com>
Signed-off-by: Venkateshwarlu Nalla <venkatn@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
This patch bump the supported SDK and MC firmware version
to the latest.
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Reviewed-by: David Marchand <david.marchand@redhat.com>
CNF95XX SoC part is not available for general availability.
Update the documentation to reflect the status.
Cc: stable@dpdk.org
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Add LBK HW block abstraction details and the application
usage models.
This patch also updates missing DPI HW block to DPDK
subsystem mapping as well.
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Update platform support of CNF95xx in documentation and
also, update the HW cap based on PCI subsystem id and revision id.
This patch also changes HW capability handling to be based on
PCI Revision ID. PCI Revision ID contains a unique identifier
to identify chip, major and minor revisions.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
The unicode characters to draw the debugfs tree
may fail with some Latex distributions.
These characters are replaced with some ASCII equivalents.
Fixes: 14ad4f0184 ("doc: add Marvell OCTEON TX2 platform guide")
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Jerin Jacob <jerinj@marvell.com>
This commit removes the support of configuring the device E-switch
using TCF since it is now possible to configure it via DR (direct
verbs rules), and by that to also remove the PMD dependency in libmnl.
Signed-off-by: Moti Haimovsky <motih@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Adding bare minimum PMD library and doc build infrastructure
and claim the maintainership for octeontx2 PMD.
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Add the make and meson based build infrastructure along
with the DMA device probe with documentation infrastructure.
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Satha Rao <skoteshwar@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Add the make and meson based build infrastructure along with the
eventdev(SSO) device probe.
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Since linuxapp in build configs has been changed to linux, change it
in the bluefield doc.
Fixes: 22d1d1ccc3 ("doc: add Mellanox BlueField platform guide")
Cc: stable@dpdk.org
Signed-off-by: Yong Wang <wang.yong19@zte.com.cn>
Platform specific guide for Mellanox BlueField SoC is added.
Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
Acked-by: John McNamara <john.mcnamara@intel.com>
Rather than using linuxapp and bsdapp everywhere, we can change things to
use the, more readable, terms "linux" and "freebsd" in our build configs.
Rather than renaming the configs we can just duplicate the existing ones
with the new names using symlinks, and use the new names exclusively
internally. ["make showconfigs" also only shows the new names to keep the
list short] The result is that backward compatibility is kept fully but any
new builds or development can be done using the newer names, i.e. both
"make config T=x86_64-native-linuxapp-gcc" and "T=x86_64-native-linux-gcc"
work.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
