28039 Commits

Author SHA1 Message Date
Timothy McDaniel
0d65f8f9e3 event/dlb2: add v2.5 HW init
Add support for DLB v2.5 probe-time hardware init,
and sets up a framework for incorporating the remaining
changes required to support DLB v2.5.

DLB v2.0 and DLB v2.5 are similar in many respects, but their
register offsets and definitions are different. As a result of these,
differences, the low level hardware functions must take the device
version into consideration. This requires that the hardware version be
passed to many of the low level functions, so that the PMD can
take the appropriate action based on the device version.

To ease the transition and keep the individual patches small, three
temporary files are added in this commit. These files have "new"
in their names.  The files with "new" contain changes specific to a
consolidated PMD that supports both DLB v2.0 and DLB 2.5. Their sister
files of the same name (minus "new") contain the old DLB v2.0 specific
code. The intent is to remove code from the original files as that code
is ported to the combined DLB 2.0/2.5 PMD model and added to the "new"
files in a series of commits. At end of the patch series, the old files
will be empty and the "new" files will have the logic needed
to implement a single PMD that supports both DLB v2.0 and DLB v2.5.
At that time, the original DLB v2.0 specific files will be deleted,
and the "new" files will be renamed and replace them.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2021-05-03 11:46:30 +02:00
Timothy McDaniel
7da19335cf event/dlb2: add v2.5 HW register definitions
Add auto-generated register definitions, updated to
support both DLB v2.0 and v2.5 devices.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2021-05-03 11:46:30 +02:00
Timothy McDaniel
b66a418d2a event/dlb2: add v2.5 probe
This commit adds dlb v2.5 probe support, and updates
parameter parsing.

The dlb v2.5 device differs from dlb v2, in that the
number of resources (ports, queues, ...) is different,
so macros have been added to take the device version
into account.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2021-05-03 11:46:30 +02:00
Timothy McDaniel
a3c8a44634 event/dlb2: remove useless code
- Remove references of FPGA.
- Do not include dlb2_mbox.h as it is not needed.
- Remove duplicate macros/defines that were
present in both dlb2_priv.h and dlb2_hw_types.h.
Update dlb2_resource.c to include dlb2_priv.h
so that it picks up the macros/defines that
have now been consolidated.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2021-05-03 11:46:30 +02:00
Chengwen Feng
f6681ab76b eventdev: fix memory leakage on thread creation failure
This patch fixes the issue that epoll_events memory is not released
after the intr thread created fail.

Fixes: 3810ae435783 ("eventdev: add interrupt driven queues to Rx adapter")
Cc: stable@dpdk.org

Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-05-03 11:46:26 +02:00
Chengwen Feng
0bac9fc791 eventdev: remove redundant thread name setting
The thread name already set by rte_ctrl_thread_create() API, so remove
the call of rte_thread_setname() API.

Fixes: 3810ae435783 ("eventdev: add interrupt driven queues to Rx adapter")
Cc: stable@dpdk.org

Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-05-03 11:46:26 +02:00
Shijith Thotton
849111aec7 event/octeontx2: configure crypto adapter xaq pool
Configure xaq pool based on number of in-use crypto queues to avoid CPT
add work failure due to xaq buffer run out. This patch configures
OTX2_CPT_DEFAULT_CMD_QLEN number of xae entries per queue pair.

Fixes: 29768f78d5a7 ("event/octeontx2: add crypto adapter framework")
Cc: stable@dpdk.org

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Acked-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2021-04-29 10:48:22 +02:00
Shijith Thotton
3841fc3581 event/octeontx2: fix crypto adapter queue pair operations
Parameter queue_pair_id of crypto adapter queue pair add/del operation
can be -1 to select all pre configured crypto queue pairs. Added support
for the same in driver. Also added a member in cpt qp structure to
indicate binding state of a queue pair to an event queue.

Fixes: 29768f78d5a7 ("event/octeontx2: add crypto adapter framework")
Cc: stable@dpdk.org

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Acked-by: Ankur Dwivedi <adwivedi@marvell.com>
2021-04-29 10:47:49 +02:00
Min Hu (Connor)
32d7dbf269 app/eventdev: fix overflow in lcore list parsing
Tainted and unvalidated integer 'idx' used as an index, which may
lead to buffer overflow.

This patch fixed it.

Fixes: 89e5eb118017 ("app/testeventdev: add string parsing helpers")
Cc: stable@dpdk.org

Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Acked-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2021-04-29 09:23:20 +02:00
Suanming Mou
caec80f92a common/mlx5: add UMR and RDMA write WQE definitions
This patch adds the struct defining UMR and RDMA write WQEs.

Signed-off-by: Suanming Mou <suanmingm@nvidia.com>
Signed-off-by: Matan Azrad <matan@nvidia.com>
2021-05-04 22:51:18 +02:00
Dekel Peled
1a2d8c3ffe common/mlx5: support DevX register write access
This patch adds support of write operation to NIC registers.

Signed-off-by: Dekel Peled <dekelp@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-05-04 22:49:37 +02:00
Dekel Peled
f85e9a395d common/mlx5: add crypto register structs and definitions
Encryption key management requires use of several related registers.
This patch adds the relevant structs and values, according to PRM
definitions.

Signed-off-by: Dekel Peled <dekelp@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-05-04 22:49:37 +02:00
Dekel Peled
abda4fd9bb common/mlx5: support general object credential
CREDENTIAL object is used for any crypto operation in wrapped mode.

This patch add support of CREDENTIAL object create operation.
Add reading of CREDENTIAL support capability.
Add function to create general object type CREDENTIAL, using DevX API.

Signed-off-by: Dekel Peled <dekelp@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-05-04 22:49:37 +02:00
Shiri Kuzin
c31f3f7f7b common/mlx5: share Verbs device match function
The get_ib_device_match function iterates over the list of ib devices
returned by the get_device_list glue function and returns the ib device
matching the provided address.

Since this function is in use by several drivers, in this patch we
share the function in common part.

Signed-off-by: Shiri Kuzin <shirik@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-05-04 22:49:37 +02:00
Shiri Kuzin
25245d5dc9 common/mlx5: share hash list tool
In order to use the hash list defined in net in other drivers, the
hash list is moved to common utilities.

In addition, the log definition was moved from the common utilities to
a dedicated new log file in common in order to prevent a conflict.

Signed-off-by: Shiri Kuzin <shirik@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-05-04 22:49:37 +02:00
Dekel Peled
d5ee804d04 common/mlx5: add crypto BSF struct and definitions
This patch adds the struct defining crypto BSF segment of UMR WQE,
and the related value definitions and offsets.

Signed-off-by: Dekel Peled <dekelp@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-05-04 22:49:31 +02:00
Dekel Peled
38e4780b25 common/mlx5: support general object crypto login
CRYPTO_LOGIN Object is used to login to the device as crypto user
or crypto officer.
Required in order to perform any crypto related control operations.

This patch adds support of CRYPTO_LOGIN object create operation.
Add reading of CRYPTO_LOGIN support capability.
Add function to create general object type CRYPTO_LOGIN, using DevX API.

Signed-off-by: Dekel Peled <dekelp@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-05-04 22:42:24 +02:00
Dekel Peled
21ca2494ac common/mlx5: support general object KEK import
IMPORT_KEK object is used to wrap (encrypt) critical security
parameters, such as other keys and credentials, when those need
to be passed between the device and the software.

This patch add support of IMPORT_KEK object create operation.
Add reading of IMPORT_KEK support capability.
Add function to create general object type IMPORT_KEK, using DevX API.

Signed-off-by: Dekel Peled <dekelp@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-05-04 22:41:47 +02:00
Dekel Peled
0111a74e13 common/mlx5: adjust DevX mkey fields for crypto
MKEY that will be used for crypto purposes must be created with
crypto_en and remote access attributes.
This patch adds support for them in the DevX MKEY context.

Signed-off-by: Dekel Peled <dekelp@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-05-04 22:41:45 +02:00
Dekel Peled
178d8c506e common/mlx5: support general object DEK
Data Encryption Keys (DEKs) are the keys used for data
encryption/decryption operations.

Add reading of DEK support capability.
Add function to create general object type DEK, using DevX API.

Arrange common version.map file in alphabetical order.

Signed-off-by: Dekel Peled <dekelp@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-05-04 22:41:41 +02:00
Dekel Peled
f7d1f11ced common/mlx5: add HCA capabilities for AES-XTS crypto
Update the PRM structure and HCA capabilities reading, to include
relevant capabilities for AES-XTS crypto.

Signed-off-by: Dekel Peled <dekelp@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-05-04 22:41:39 +02:00
Dekel Peled
876d4702b1 common/mlx5: optimize read of general capabilities
General object types support is indicated in bitmap general_obj_types,
which is part of HCA capabilities list.
Currently this bitmap is read multiple times, and each time a different
bit is extracted.

This patch optimizes the code, reading the bitmap once into a local
variable, and then extracting the required bits.

Signed-off-by: Dekel Peled <dekelp@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-05-04 22:41:38 +02:00
Dekel Peled
753a7c08e2 common/mlx5: rename GENEVE TLV option object
Rename MLX5_OBJ_TYPE_GENEVE_TLV_OPT as
MLX5_GENERAL_OBJ_TYPE_GENEVE_TLV_OPT, to align with other general
objects names.

Signed-off-by: Dekel Peled <dekelp@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-05-04 22:41:34 +02:00
Dekel Peled
97dcf0567e common/mlx5: remove redundant spaces in PRM header
File drivers/common/mlx5/mlx5_prm.h includes structs representing
data items as defined in PRM document.
Some of these structs were copied as-is from kernel file mlx5_ifc.h.
As result the structs are not all aligned with the same spacing.

This patch removes redundant spaces and new lines from several structs,
to align all structs in mlx5_prm.h to the same format.

Signed-off-by: Dekel Peled <dekelp@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-05-04 22:41:32 +02:00
Olivier Matz
bd6113858f mbuf: clarify usage of packet pool initializers
Clarify that the mempool private initializer and object initializer used
for packet pools require that the mempool private size is large enough.

Also add an assert (only enabled when -DRTE_ENABLE_ASSERT is passed) to
check this constraint.

Signed-off-by: Olivier Matz <olivier.matz@6wind.com>
Acked-by: Aaron Conole <aconole@redhat.com>
2021-05-04 22:41:32 +02:00
Olivier Matz
e1064f80b6 test/mempool: fix object initializer
The function rte_pktmbuf_init() expects that the mempool private area is
large enough and was previously initialized by rte_pktmbuf_pool_init(),
which is not the case.

This causes the function rte_pktmbuf_priv_size() to return an
unpredictable value, and this value is used as a size in a memset.

Replace the mempool object initializer by my_obj_init(), which does not
have this constraint, and fits the needs for this test.

Fixes: 923ceaeac140 ("test/mempool: add unit test cases")
Cc: stable@dpdk.org

Reported-by: Wenwu Ma <wenwux.ma@intel.com>
Signed-off-by: Olivier Matz <olivier.matz@6wind.com>
2021-05-04 22:41:31 +02:00
Chengwen Feng
d4902ed31c mbuf: check shared memory before dumping dynamic space
Because mbuf dyn shared memory was allocated runtime, so it's
necessary to check validity when dump mbuf dyn info.

Also this patch adds an error logging when init shared memory fail.

Fixes: 4958ca3a443a ("mbuf: support dynamic fields and flags")
Cc: stable@dpdk.org

Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
2021-05-04 19:49:44 +02:00
Tal Shnaiderman
2231388f21 eal/windows: fix MinGW build
the strncasecmp macro defined in rte_os_shim.h is already
defined in MinGW-w64, as a result the compiler prints out
the warning below on function redefinition whenever compiling
a file including the header in debug mode.

lib/eal/windows/include/rte_os_shim.h:21:
warning: "strncasecmp" redefined

Fixed by defining the macro only to the clang compiler.

Fixes: 45d62067c237 ("eal: make OS shims internal")

Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
2021-05-04 19:32:28 +02:00
Juraj Linkeš
20c7744f8d eal/arm64: fix platform register bit
REG_PLATFORM only uses bit 0 to indicate whether the value retrieved
from hardware matches PLATFORM_STR.

Fixes: 97523f822ba9 ("eal/arm: add CPU flags for ARMv8")
Cc: stable@dpdk.org

Signed-off-by: Juraj Linkeš <juraj.linkes@pantheon.tech>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
2021-05-04 18:55:09 +02:00
Bruce Richardson
245efe544d raw/ioat: report status of completed jobs
Add improved error handling to rte_ioat_completed_ops(). This patch adds
new parameters to the function to enable the user to track the completion
status of each individual operation in a batch. With this addition, the
function can help the user to determine firstly, how many operations may
have failed or been skipped and then secondly, which specific operations
did not complete successfully.

Signed-off-by: Kevin Laatz <kevin.laatz@intel.com>
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2021-05-04 17:43:50 +02:00
Kevin Laatz
29cf9c1194 raw/ioat: add API to query remaining ring space
Add a new API to query remaining descriptor ring capacity. This API is
useful, for example, when an application needs to enqueue a fragmented
packet and wants to ensure that all segments of the packet will be enqueued
together.

Signed-off-by: Kevin Laatz <kevin.laatz@intel.com>
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2021-05-04 17:40:50 +02:00
Bruce Richardson
74464005a2 raw/ioat: rework SW ring layout
The ring management in the idxd part of the driver is more complex than
it needs to be, tracking individual batches in a ring and having null
descriptors as padding to avoid having single-operation batches. This can
be simplified by using a regular ring-based layout, with additional
overflow at the end to ensure that the one does not need to wrap within a
batch.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2021-05-04 17:37:47 +02:00
Bruce Richardson
f82c87eb14 raw/ioat: move idxd functions to separate file
Split the rte_ioat_rawdev_fns.h file into two separate headers, so that
the data structures for the original ioat devices and the newer idxd
ones can be kept separate from each other. This makes code management
and rework easier.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2021-05-04 17:33:09 +02:00
Bruce Richardson
b7aaf417f9 raw/ioat: add bus driver for device scanning automatically
Rather than using a vdev with args, DPDK can scan and initialize the
devices automatically using a bus-type driver. This bus does not need to
worry about registering device drivers, rather it can initialize the
devices directly on probe.

The device instances (queues) to use are detected from /dev with the
additional info about them got from /sys.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2021-05-04 17:29:06 +02:00
Kevin Laatz
d38b62cd6c raw/ioat: allow perform operations function to return error
Change the return type for the rte_ioat_perform_ops() function from void to
int to allow the possibility of returning an error code in future, should
it be necessary.

Signed-off-by: Kevin Laatz <kevin.laatz@intel.com>
2021-05-04 17:26:38 +02:00
Bruce Richardson
c982132144 raw/ioat: make workqueue name configurable in script
Add a "--name-prefix" parameter to the quick configuration script for
DSA. This allows the queues configured on a DSA instance to be made
available to only one DPDK process in a setup with multiple DPDK process
instances.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2021-05-04 17:13:55 +02:00
Bruce Richardson
cfb286ab2b raw/ioat: fix script for configuring small number of queues
The dpdk_idxd_cfg.py script included with the driver for convenience did
not work properly where the number of queues to be configured was
less than the number of groups or engines. This was because there would
be configured groups/engines not assigned to queues. Fix this by
limiting the engine and group counts to be no bigger than the number of
queues.

Fixes: 01863b9d2354 ("raw/ioat: include example configuration script")
Cc: stable@dpdk.org

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2021-05-04 17:12:25 +02:00
Bruce Richardson
a2bc5d7bcc raw/ioat: expand descriptor struct to full 64 bytes
Although it's unused by the driver, add the interrupt handle field in
the descriptor to the descriptor structure for completeness, and
explicitly add the reserved padding field on the end of the structure
too. This means that when a descriptor is defined on the stack, or
initialized by the compiler, the unused/reserved space will be zeroed
appropriately.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2021-05-04 17:09:47 +02:00
Bruce Richardson
cb235af84d raw/ioat: add component prefix to log messages
Add the driver prefix "IOAT" to log messages for the driver.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2021-05-04 17:07:19 +02:00
Bruce Richardson
2ef79bea8f raw/ioat: support limiting queues for idxd PCI device
When using a full device instance via vfio, allow the user to specify a
maximum number of queues to configure rather than always using the max
number of supported queues.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2021-05-04 17:04:46 +02:00
Bruce Richardson
55918bff36 raw/ioat: add unit tests for completion batching
Add in additional unit tests to verify that we can get completion reports
of multiple batches in a single completed_ops() call. Also verify we can
get smaller number of completions if that is requested too.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2021-05-04 16:06:35 +02:00
David Christensen
5f760b7dcc config/ppc: reduce number of cores and NUMA nodes
When setting RTE_MAX_LCORES to the maximum value supported by ppc
hardware (1536), the lcores_autotest may timeout after 30 seconds
because the test takes nearly 60 seconds to complete. Set max_lcores to
a lower value because the maximum value is unlikely to be seen in any
production systems and to eliminate the quick test timeout error.

Bugzilla ID: 684
Fixes: db1f2f8a9fe5 ("config: increase maximum lcores for ppc")
Cc: stable@dpdk.org

Signed-off-by: David Christensen <drc@linux.vnet.ibm.com>
Acked-by: Luca Boccassi <bluca@debian.org>
2021-05-04 16:00:31 +02:00
Bruce Richardson
7d5cfaa750 build: fix formatting of Meson lists
Running "./devtools/check-meson.py --fix" on the DPDK repo fixes a
number of issues with whitespace and formatting of files:

* indentation of lists
* missing trailing commas on final list element
* multiple list entries per line when list is not all single-line

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2021-05-04 15:01:47 +02:00
Bruce Richardson
1ba12b7509 devtools: add script to check indentation of Meson lists
This is a script to fix up minor formatting issues in meson files.
It scans for, and can optionally fix, indentation issues and missing
trailing commas in the lists in meson.build files. It also detects,
and can fix, multi-line lists where more than one entry appears on a
line.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Reviewed-by: Anatoly Burakov <anatoly.burakov@intel.com>
2021-05-04 15:01:47 +02:00
Joyce Kong
cee151b41b mempool: distinguish cache and pool debug counters
If cache is enabled, objects will be retrieved/put from/to cache,
subsequently from/to the common pool. Now the debug stats calculate
the objects retrieved/put from/to cache and pool together, it is
better to distinguish them.

Signed-off-by: Joyce Kong <joyce.kong@arm.com>
Signed-off-by: Dharmik Thakkar <dharmik.thakkar@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
2021-05-04 09:44:55 +02:00
Dharmik Thakkar
5648704065 mempool: make stats macro generic
Make __MEMPOOL_STAT_ADD macro more generic and delete
__MEMPOOL_CONTIG_BLOCKS_STAT_ADD macro.

Suggested-by: Olivier Matz <olivier.matz@6wind.com>
Signed-off-by: Dharmik Thakkar <dharmik.thakkar@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
2021-05-04 09:34:28 +02:00
Stanislaw Kardach
1abb185d6c stack: allow lock-free only on relevant architectures
Since commit 7911ba0473e0 ("stack: enable lock-free implementation for
aarch64"), lock-free stack is supported on arm64 but this description was
missing from the doxygen for the flag.

Currently it is impossible to detect programmatically whether lock-free
implementation of rte_stack is supported. One could check whether the
header guard for lock-free stubs is defined (_RTE_STACK_LF_STUBS_H_) but
that's an unstable implementation detail. Because of that currently all
lock-free ring creations silently succeed (as long as the stack header
is 16B long) which later leads to push and pop operations being NOPs.
The observable effect is that stack_lf_autotest fails on platforms not
supporting the lock-free. Instead it should just skip the lock-free test
altogether.

This commit adds a new errno value (ENOTSUP) that may be returned by
rte_stack_create() to indicate that a given combination of flags is not
supported on a current platform.
This is detected by checking a compile-time flag in the include logic in
rte_stack_lf.h which may be used by applications to check the lock-free
support at compile time.

Use the added RTE_STACK_LF_SUPPORTED flag to disable the lock-free stack
tests at the compile time.
Perf test doesn't fail because rte_ring_create() succeeds, however
marking this test as skipped gives a better indication of what actually
was tested.

Fixes: 7911ba0473e0 ("stack: enable lock-free implementation for aarch64")

Signed-off-by: Stanislaw Kardach <kda@semihalf.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
2021-05-03 18:46:15 +02:00
David Marchand
7ddb625c3d mbuf: mark offload flag as deprecated
PKT_RX_EIP_CKSUM_BAD has been declared deprecated but there was no
warning to applications still using it.
Fix this by marking as deprecated with the newly introduced
RTE_DEPRECATED.

Fixes: e8a419d6de4b ("mbuf: rename outer IP checksum macro")

Signed-off-by: David Marchand <david.marchand@redhat.com>
Reviewed-by: Flavio Leitner <fbl@sysclose.org>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
Acked-by: Lance Richardson <lance.richardson@broadcom.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2021-05-03 16:12:49 +02:00
Thomas Monjalon
1b593b9c83 version: 21.05-rc1
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
v21.05-rc1
2021-04-22 00:28:57 +02:00
Thomas Monjalon
c6bd9f4b28 doc: announce support of Alpine Linux
After many patches in several releases to make DPDK buildable with musl,
and few adjustments for busybox, it is time to show the support of DPDK
built in Alpine Linux.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2021-04-22 00:14:11 +02:00