17128 Commits

Author SHA1 Message Date
Jiawei Wang
a9b6ea45be net/mlx5: fix tag ID conflict with sample action
For the flows containing sample action, the tag action was added
implicitly to store the unique flow index into metadata register in the
split prefix subflow, and then match on this index in the split suffix
subflow. The metadata register for flow index of sample split subflows
was also used to store application metadata TAG 0 item, this might cause
TAG 0 corruption in the flows with sample actions.

This patch uses the same metadata register C index as used for
ASO action since it's reserved and not used directly by the application,
and adds the checking in validation to make sure not to conflict
with ASO CT in the same flow.

Fixes: b4c0ddbfcc58 ("net/mlx5: split sample flow into two sub-flows")
Cc: stable@dpdk.org

Signed-off-by: Jiawei Wang <jiaweiw@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-11-10 15:44:43 +01:00
Gregory Etelson
aaa6a7ec0f net/mlx5: fix tunnel offload validation
Tunnel offload API allows the application to restore packet to
its original form if the chain of flows is missed after DECAP action.

MLX5 PMD provides tunnel offload support only if DV API was enabled.

The patch verifies DV availability before processing with
tunnel offload tasks.

Fixes: 4ec6360de37d ("net/mlx5: implement tunnel offload")
Cc: stable@dpdk.org

Signed-off-by: Gregory Etelson <getelson@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-11-10 15:44:43 +01:00
Dmitry Kozlyuk
7297d2cdec common/mlx5: fix external memory pool registration
Registration of packet mempools with RTE_PKTMBUF_POOL_PINNED_EXT_MEM
was performed incorrectly: after population of such mempool chunks
only contain memory for rte_mbuf structures, while pointers to actual
external memory are not yet filled. MR LKeys could not be obtained
for external memory addresses of such mempools. Rx datapath assumes
all used mempools are registered and does not fallback to dynamic
MR creation in such case, so no packets could be received.

Skip registration of extmem pools on population because it is useless.
If used for Rx, they are registered at port start.
During registration, recognize such pools, inspect their mbufs
and recover the pages they reside in.

While MRs for these pages may already be created by rte_dev_dma_map(),
they are not reused to avoid synchronization on Rx datapath
in case these MRs are changed in the database.

Fixes: 690b2a88c2f7 ("common/mlx5: add mempool registration facilities")

Signed-off-by: Dmitry Kozlyuk <dkozlyuk@nvidia.com>
Reviewed-by: Matan Azrad <matan@nvidia.com>
Reviewed-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-11-10 15:44:42 +01:00
Rongwei Liu
0888c011d5 net/mlx5: fix meter policy validation
When a user specifies meter policy like "g_actions queue / end
y_actions queue / r_action drop / end", validation logic missed
to set meter policy mode and it took a random value from the stack.

Define ALL policy modes for the mentioned cases.

Fixes: 4b7bf3ffb473 ("net/mlx5: support yellow in meter policy validation")
Cc: stable@dpdk.org

Signed-off-by: Rongwei Liu <rongweil@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Reviewed-by: Bing Zhao <bingz@nvidia.com>
2021-11-10 15:44:42 +01:00
Bing Zhao
0ad28e873c net/mlx5: fix RSS consistency check of meter policy
After yellow color actions in the metering policy were supported,
the RSS could be used for both green and yellow colors and only the
queues attribute could be different.

When specifying the attributes of a RSS, some fields can be ignored
and some default values will be used in PMD. For example, there is a
default RSS key in the PMD and it will be used to create the TIR if
nothing is provided by the application.

The default value cases were missed in the current implementation
and it would cause some false positives or crashes.

The comparison function should be adjusted to take all cases into
consideration when RSS is used for both green and yellow colors.

Fixes: 4b7bf3ffb473 ("net/mlx5: support yellow in meter policy validation")
Cc: stable@dpdk.org

Signed-off-by: Bing Zhao <bingz@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-11-10 15:44:39 +01:00
Michael Baum
8451e165b8 net/mlx5: workaround MR creation for flow counter
Due to kernel driver / FW issues in direct MKEY creation using the DevX
API, this patch replaces the counter MR creation to use wrapped mkey
API.

Fixes: 5382d28c2110 ("net/mlx5: accelerate DV flow counter transactions")
Cc: stable@dpdk.org

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Signed-off-by: Matan Azrad <matan@nvidia.com>
2021-11-10 15:50:44 +01:00
Michael Baum
04b4e4cbc0 vdpa/mlx5: workaround guest MR registrations
Due to kernel issue in direct MKEY creation using the DevX API, this
patch replaces the virtio MR creation to use Verbs API.

Fixes: cc07a42da250 ("vdpa/mlx5: prepare memory regions")
Cc: stable@dpdk.org

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Signed-off-by: Matan Azrad <matan@nvidia.com>
2021-11-10 15:50:35 +01:00
Matan Azrad
398ea8450c vdpa/mlx5: workaround dirty bitmap MR creation
Due to kernel driver/FW issues in direct MKEY creation using the DevX
API, this patch replaces the dirty bitmap MR creation to use wrapped
mkey instead.

Fixes: 9d39e57f21ac ("vdpa/mlx5: support live migration")
Cc: stable@dpdk.org

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Signed-off-by: Matan Azrad <matan@nvidia.com>
2021-11-10 15:50:26 +01:00
Matan Azrad
76b5bdf828 common/mlx5: create wrapped MR
The mlx5 PMD uses the kernel mlx5 driver to map physical memory to the
HW.

Using the Verbs API ibv_reg_mr, a mkey can be created for that.
In this case, the mkey is signed on the user ID of the kernel driver.

Using the DevX API, a mkey also can be created, but it should point an
umem object (represents the specific buffer mapping) created by the
kernel. In this case, the mkey is signed on the user ID of the process
DevX context.

In FW DevX control commands which get mkey as a parameter, there is
a security check on the user ID and Verbs mkeys are rejected.

Unfortunately, also when using DevX mkey, there is an error in the FW
command on umem validation because the umem is not designed to be used
for any mkey parameters.

As a workaround to the kernel driver/FW issue, it is needed to use a
wrapped MR, which is an indirect mkey(created by the DevX API) pointing to
direct mkey created by the kernel for any DevX command uses an MR.

Add an API to create and destroy this wrapped MR.

Fixes: 5382d28c2110 ("net/mlx5: accelerate DV flow counter transactions")
Fixes: 9d39e57f21ac ("vdpa/mlx5: support live migration")
Cc: stable@dpdk.org

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Signed-off-by: Matan Azrad <matan@nvidia.com>
2021-11-10 15:48:56 +01:00
Michael Baum
6ebd062e06 common/mlx5: glue MR registration with IOVA
Add support for rdma-core API to register IOVA MR.
The API gets the process VA, size, and IOVA and returns a memory region
with space pointed by a specific IOVA.

So any access in this MR should come with an address that is relative to
the IOVA specified in the API.

Fixes: cc07a42da250 ("vdpa/mlx5: prepare memory regions")
Cc: stable@dpdk.org

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Signed-off-by: Matan Azrad <matan@nvidia.com>
2021-11-10 15:48:53 +01:00
Gagandeep Singh
3344172698 dma/dpaa: support statistics
This patch support DMA read and reset statistics operations.

Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
2021-11-10 13:48:38 +01:00
Gagandeep Singh
7da29a644c dma/dpaa: support DMA operations
This patch support copy, submit, completed and
completed status functionality of DMA driver.

Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
2021-11-10 13:48:38 +01:00
Gagandeep Singh
453d8273d4 dma/dpaa: support basic operations
This patch support basic DMA operations which includes
device capability and channel setup.

Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
2021-11-10 13:48:38 +01:00
Gagandeep Singh
cc166b51c3 dma/dpaa: add device probing
This patch add device initialisation functionality.

Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
2021-11-10 13:48:38 +01:00
Gagandeep Singh
583f373297 dma/dpaa: introduce DPAA DMA driver skeleton
The DPAA DMA  driver is an implementation of the dmadev APIs,
that provide means to initiate a DMA transaction from CPU.
The initiated DMA is performed without CPU being involved
in the actual DMA transaction. This is achieved via using
the QDMA controller of DPAA SoC.

Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
2021-11-10 13:48:38 +01:00
David Marchand
d6024c0a67 build: cleanup libpcap dependent components
The RTE_PORT_PCAP variable is used to signal libpcap availability,
though its name seems to refer to pcap support in the port library.
Prefer a generic name and add explicit link dependencies where needed.

Fixes: 7a944656b33f ("test/pcapng: test pcapng library")
Fixes: 2eccf6afbea9 ("bpf: add function to convert classic BPF to DPDK BPF")
Fixes: cbb44143be74 ("app/dumpcap: add new packet capture application")

Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Stephen Hemminger <stephen@networkplumber.org>
2021-11-10 11:42:34 +01:00
Ivan Malov
60e53c078d net/sfc: support decrement IP TTL actions in transfer flows
These actions map to MAE action DECR_IP_TTL. It affects
the outermost header in the current processing state of
the packet, which might have been decapsulated by prior
action DECAP. It also updates IPv4 checksum accordingly.

Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru>
Reviewed-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
2021-11-08 16:25:51 +01:00
Ivan Malov
c6e3e6c42a common/sfc_efx/base: add API to decrement TTL action to set
Affects the outermost header, taking prior action DECAP into
account. Takes care to also update IPv4 checksum accordingly.

Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru>
Reviewed-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
2021-11-08 16:25:51 +01:00
Ivan Malov
ecf2cb283e common/sfc_efx/base: factor out no-op helper functions
When an action gets added to an action set, a special helper is
used to handle its arguments. There are actions which have no
arguments, and the corresponding helpers are duplicates in
fact. Use a unified no-op helper instead of them.

Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru>
Reviewed-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
2021-11-08 16:25:51 +01:00
Ivan Malov
e8745b5412 common/sfc_efx/base: refine adding count action to set
1) Invalid counter ID is always set by default.
   Do not set it again when adding the action.

2) Counter ID validity check is missing in the
   action set allocation helper. Introduce it.

Fixes: 238306cf9aff ("common/sfc_efx/base: support counter in action set")
Cc: stable@dpdk.org

Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru>
Reviewed-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
2021-11-08 16:25:50 +01:00
Ivan Malov
97df7281c9 common/sfc_efx/base: refine adding encap action to set
1) Invalid encap. header ID is always set by default.
   Do not set it again when adding the action.

2) Encap. header ID validity check is missing in the
   action set allocation helper. Introduce it.

Fixes: 3907defa5bf0 ("common/sfc_efx/base: support adding encap action to a set")
Cc: stable@dpdk.org

Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru>
Reviewed-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
2021-11-08 16:25:50 +01:00
Chengwen Feng
247f0ce2a4 net/hns3: remove PF/VF duplicate code
This patch remove PF/VF duplicate code of:
1. get firmware version.
2. get device info.
3. rx interrupt related functions.

Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
2021-11-08 15:59:14 +01:00
Huisong Li
f2d91cfbb5 net/hns3: mark unchecked return of snprintf
Fixing the return value of the function to clear static warning.

Fixes: 1181500b2fc5 ("net/hns3: adjust MAC address logging")
Cc: stable@dpdk.org

Signed-off-by: Huisong Li <lihuisong@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
2021-11-08 15:59:14 +01:00
Huisong Li
e6a27020e6 net/hns3: remove magic numbers
Removing magic numbers with macros.

Signed-off-by: Huisong Li <lihuisong@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
2021-11-08 15:59:14 +01:00
Min Hu (Connor)
3600ffc9de net/hns3: move declarations in flow header file
This patch adds a hns3_flow.h to make the code easier to maintain.

Signed-off-by: Huisong Li <lihuisong@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
2021-11-08 15:59:14 +01:00
Huisong Li
a4c7152d05 net/hns3: extract common code to its own file
This patch extracts a common file to store the common code for PF and VF
driver.

Signed-off-by: Huisong Li <lihuisong@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
2021-11-08 15:59:14 +01:00
Huisong Li
72ec1486e9 net/hns3: use unsigned integer for bitwise operations
Bitwise operations should be used only with unsigned integer. This patch
modifies some code that does not meet this rule.

Signed-off-by: Huisong Li <lihuisong@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
2021-11-08 15:59:14 +01:00
Huisong Li
cf31e4a7bb net/hns3: modify an indent alignment
This patch modifies some code alignment issues to make the code style
more consistent.

Signed-off-by: Huisong Li <lihuisong@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
2021-11-08 15:59:14 +01:00
Huisong Li
dc153889d5 net/hns3: remove redundant function declaration
This patch removes a redundant function declaration for
hns3_rx_check_vec_support().

Signed-off-by: Huisong Li <lihuisong@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
2021-11-08 15:59:14 +01:00
Huisong Li
f658f41581 net/hns3: simplify queue DMA address arithmetic
The patch obtains the upper 32 bits of the Rx/Tx queue DMA address in one
step instead of two steps.

Fixes: bba636698316 ("net/hns3: support Rx/Tx and related operations")
Cc: stable@dpdk.org

Signed-off-by: Huisong Li <lihuisong@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
2021-11-08 15:59:14 +01:00
Dmitry Kozlyuk
077be91dd7 net/mlx5: fix split buffer Rx
Routine to lookup LKey on Rx was assuming that the mbuf address
always belongs to a single mempool: the one associated with an RxQ
or the MPRQ mempool. This assumption is false for split buffers case.
A wrong LKey was looked up, resulting in completion errors.
Modify lookup routines to lookup LKey in the mbuf->pool
for non-MPRQ cases both on Rx datapath and on queue initialization.

Fixes: fec28ca0e3a9 ("net/mlx5: support mempool registration")

Signed-off-by: Dmitry Kozlyuk <dkozlyuk@nvidia.com>
Reviewed-by: Matan Azrad <matan@nvidia.com>
Reviewed-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-11-08 13:56:29 +01:00
Raja Zidane
bba8281d2e common/mlx5: fix queue size in DevX queue pair creation
The number of WQEBBs was provided to QP create, and QP size was calculated
by multiplying the number of WQEBBs by 64, which is the send WQE size.
When creating RQ in the QP (i.e., vdpa driver), the queue size was bigger
because the receive WQE size is 16.
Provide queue size to QP create instead of the number of WQEBBs.

Fixes: f9213ab12cf9 ("common/mlx5: share DevX queue pair operations")

Signed-off-by: Raja Zidane <rzidane@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-11-08 19:46:28 +01:00
Raja Zidane
ba707cdb6d crypto/mlx5: fix queue size configuration
The DevX interface for QP creation expects the number of WQEBBs.
Wrongly, the number of descriptors was provided to the QP creation.
In addition, the QP size must be a power of 2 what was not guaranteed.
Provide the number of WQEBBs to the QP creation API.
Round up the SQ size to a power of 2.
Rename (sq/rq)_size to num_of_(send/receive)_wqes.

Fixes: 6152534e211e ("crypto/mlx5: support queue pairs operations")
Cc: stable@dpdk.org

Signed-off-by: Raja Zidane <rzidane@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Acked-by: Tal Shnaiderman <talshn@nvidia.com>
2021-11-08 19:46:28 +01:00
Raja Zidane
56faca3bc1 crypto/mlx5: fix freeing on probing failure
When calling device close, unset dek is called which destroys a hash list.
In case of error during dev probe, close is called when dek hlist is not
initialized.
Ensure non null list destroy.

Fixes: 90646d6c6e22 ("crypto/mlx5: support basic operations")
Cc: stable@dpdk.org

Signed-off-by: Raja Zidane <rzidane@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-11-08 19:46:28 +01:00
Raja Zidane
54feeab1c0 common/mlx5: fix DevX queue size overflow
The HW QP/SQ/RQ/CQ queue sizes may be bigger than 64KB.
The width of the variable handled the queue size is 16 bits
which cannot contain the maximum queue size.
Replace the size type to be uint32_t.

Fixes: 9dab4d62b4dc ("common/mlx5: share DevX CQ creation")
Fixes: 38f537635c15 ("common/mlx5: share DevX SQ creation")
Fixes: f9213ab12cf9 ("common/mlx5: share DevX queue pair operations")
Cc: stable@dpdk.org

Signed-off-by: Raja Zidane <rzidane@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-11-08 19:46:28 +01:00
Harman Kalra
49fdb0ae0d net/mlx4: fix crash on allocation failure
This patch fixes coverity issue by adding a NULL check.

Coverity issue: 373687
Fixes: d61138d4f0e2 ("drivers: remove direct access to interrupt handle")

Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Acked-by: David Marchand <david.marchand@redhat.com>
2021-11-08 17:32:42 +01:00
Harman Kalra
aedd054c5c drivers: check interrupt file descriptor validity
This patch fixes coverity issue by adding a check for negative value to
avoid bad bit shift operation and other invalid use of file descriptors.

Coverity issue: 373717, 373697, 373685
Coverity issue: 373723, 373720, 373719, 373718, 373715, 373714, 373713
Coverity issue: 373710, 373707, 373706, 373705, 373704, 373701, 373700
Coverity issue: 373698, 373695, 373692, 373690, 373689
Coverity issue: 373722, 373721, 373709, 373702, 373696
Fixes: d61138d4f0e2 ("drivers: remove direct access to interrupt handle")

Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: David Marchand <david.marchand@redhat.com>
2021-11-08 17:32:42 +01:00
Elena Agostini
8b8036a66e gpudev: introduce GPU device class library
In heterogeneous computing system, processing is not only in the CPU.
Some tasks can be delegated to devices working in parallel.

The new library gpudev is for dealing with GPGPU computing devices
from a DPDK application running on the CPU.

The infrastructure is prepared to welcome drivers in drivers/gpu/.

Signed-off-by: Elena Agostini <eagostini@nvidia.com>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2021-11-08 17:20:52 +01:00
Raja Zidane
f66898ebd0 common/mlx5: fix MMO configuration in DevX queue pair
The QP extension valid bit was not set in the QP creation for MMO
configuration.
That caused the QP not to be connected to the GGA MMO engines,
and any MMO WQE job got CQE with an error.
Set the QP ext bit when MMO is configured.

Fixes: ddda0006188a ("common/mlx5: add MMO configuration for DevX queue pair")

Signed-off-by: Raja Zidane <rzidane@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-11-08 09:36:27 +01:00
Raja Zidane
4b99fe0577 common/mlx5: fix HCA capabilities PRM alignment
0x20 reserved bytes were missed in the HCA cap PRM structure before the
newly added fields for MMO QP capabilities.
That caused reading MMO QP caps incorrectly.
Add the reserved fields in the HCA cap structure.

Fixes: cbc4c13a255e ("common/mlx5: update MMO HCA capabilities")

Signed-off-by: Raja Zidane <rzidane@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-11-08 09:29:36 +01:00
Radha Mohan Chintakuntla
ebc539271e dma/cnxk: add statistics
Add the stats function to get the DMA statistics.

Signed-off-by: Radha Mohan Chintakuntla <radhac@marvell.com>
2021-11-08 00:08:45 +01:00
Radha Mohan Chintakuntla
3340c3e227 dma/cnxk: add scatter-gather copy
Add the copy_sg function that will do the multiple DMA transfers of
different sizes and different source/destination as well.

Signed-off-by: Radha Mohan Chintakuntla <radhac@marvell.com>
2021-11-08 00:08:45 +01:00
Radha Mohan Chintakuntla
b56f1e2dad dma/cnxk: add channel operations
Add functions for the dmadev vchan setup and DMA operations.

Signed-off-by: Radha Mohan Chintakuntla <radhac@marvell.com>
2021-11-08 00:08:45 +01:00
Radha Mohan Chintakuntla
53f6d7328b dma/cnxk: create and initialize device on PCI probing
This patch creates and initializes a dmadev device on pci probe.

Signed-off-by: Radha Mohan Chintakuntla <radhac@marvell.com>
2021-11-08 00:08:45 +01:00
Radha Mohan Chintakuntla
b6e395692b common/cnxk: add DPI DMA support
Add base support as ROC(Rest of Chip) API which will be used by PMD
dmadev driver.

This patch adds routines to init, fini, configure the DPI DMA device
found in Marvell's CN9k or CN10k SoC families.

Signed-off-by: Radha Mohan Chintakuntla <radhac@marvell.com>
2021-11-07 23:29:58 +01:00
Chengwen Feng
569e850b4b dma/hisilicon: support multi-process
This patch add multi-process support for Kunpeng DMA devices.

Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
2021-11-07 20:02:27 +01:00
Chengwen Feng
2db4f0b823 dma/hisilicon: add data path
This patch add data path functions for Kunpeng DMA devices.

Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
2021-11-07 20:02:27 +01:00
Chengwen Feng
3c5f5f03a0 dma/hisilicon: add control path
This patch add control path functions for Kunpeng DMA devices.

Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
2021-11-07 20:02:24 +01:00
Chengwen Feng
9e16317a38 dma/hisilicon: add probing
This patch add dmadev instances create during the PCI probe, and
destroy them during the PCI remove. Internal structures and HW
definitions was also included.

Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
2021-11-07 20:01:52 +01:00
Chengwen Feng
4d0d4cf327 dma/hisilicon: introduce driver skeleton
Add the basic device probe and remove functions and initial
documentation for new hisilicon DMA drivers.

Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
2021-11-07 19:54:19 +01:00