Commit Graph

247 Commits

Author SHA1 Message Date
Or Ami
2f636ae565 mlx5: fix possible crash during initialization
RSS configuration should not be freed when priv is NULL.

Fixes: 2f97422e77 ("mlx5: support RSS hash update and get")

Signed-off-by: Or Ami <ora@mellanox.com>
2016-03-16 18:52:17 +01:00
Yaacov Hazan
f3db948918 mlx5: support Rx VLAN stripping
Allows HW to strip the 802.1Q header from incoming frames and report it
through the mbuf structure.

This feature requires MLNX_OFED >= 3.2.

Signed-off-by: Yaacov Hazan <yaacovh@mellanox.com>
Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
2016-03-16 18:52:17 +01:00
Yaacov Hazan
76f5c99e68 mlx5: support flow director
Add support for flow director filters (RTE_FDIR_MODE_PERFECT and
RTE_FDIR_MODE_PERFECT_MAC_VLAN modes).

This feature requires MLNX_OFED >= 3.2.

Signed-off-by: Yaacov Hazan <yaacovh@mellanox.com>
Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Signed-off-by: Raslan Darawsheh <rdarawsheh@asaltech.com>
2016-03-16 18:52:17 +01:00
Xiao Wang
7958b1310d fm10k: enable FTAG based forwarding
This patch enables reading sglort (global resource tag) info into the
mbuf for RX and inserting an FTAG (Fabric Tag) at the beginning of the
packet for TX. The vlan_tci_outer field selected from rte_mbuf structure
for sglort is not used in fm10k now.
In FTAG based forwarding mode, the switch will forward packets according
to glort info in FTAG rather than mac and vlan table.

To activate this feature, user needs to pass a devargs parameter to eal
for fm10k device like "-w 0000:84:00.0,enable_ftag=1". Currently this
feature is supported only on PF, because FM10K_PFVTCTL register is
read-only for VF.

Signed-off-by: Wang Xiao W <xiao.w.wang@intel.com>
Acked-by: Jing Chen <jing.d.chen@intel.com>
Acked-by: John McNamara <john.mcnamara@intel.com>
2016-03-16 18:51:44 +01:00
Chen Jing D(Mark)
d51be739c3 fm10k: handle error flags in vector Rx
Using SSE instructions to parse error flags in HW Rx descriptor,
then set corresponding bits of mbuf.

Signed-off-by: Chen Jing D(Mark) <jing.d.chen@intel.com>
Acked-by: Cunming Liang <cunming.liang@intel.com>
2016-03-16 18:51:43 +01:00
Chen Jing D(Mark)
d06e6bb248 fm10k: optimize mbuf freeing in non-vector Tx
When the TX function tries to free a bunch of mbufs, it will free
them one by one. This change will scan the free list and merge the
requests in case they belongs to same pool, then free once, which
will reduce cycles on freeing mbufs.

Signed-off-by: Chen Jing D(Mark) <jing.d.chen@intel.com>
Acked-by: Shaopeng He <shaopeng.he@intel.com>
2016-03-16 18:51:43 +01:00
Shaopeng He
bec2f7df9c examples/l3fwd-power: fix memory leak for non-IP packets
Previous l3fwd-power only processes IP and IPv6 packets, other
packets' mbufs are not freed, and this causes a memory leak.
This patch fixes this issue.

Fixes: 3c0184cc0c ("examples: replace some offload flags with packet type")

Signed-off-by: Shaopeng He <shaopeng.he@intel.com>
Acked-by: Jing Chen <jing.d.chen@intel.com>
Acked-by: Michael Qiu <michael.qiu@intel.com>
2016-03-16 18:51:43 +01:00
Shaopeng He
eb57d9b750 fm10k: setup Rx interrupt for PF and VF
In interrupt mode, each rx queue can have one interrupt to notify the
application when packets are available in that queue. Some queues
also can share one interrupt.
Currently, fm10k needs one separate interrupt for mailbox. So, only those
drivers which support multiple interrupt vectors e.g. vfio-pci can work
in fm10k interrupt mode.
This patch uses the RXINT/INT_MAP registers to map interrupt causes
(rx queue and other events) to vectors, and enable these interrupts
through kernel drivers like vfio-pci.

Signed-off-by: Shaopeng He <shaopeng.he@intel.com>
Acked-by: Jing Chen <jing.d.chen@intel.com>
Acked-by: Michael Qiu <michael.qiu@intel.com>
2016-03-16 18:51:35 +01:00
Remy Horton
e18e01e92c i40e: support default MAC address setting
Signed-off-by: Remy Horton <remy.horton@intel.com>
Acked-by: John McNamara <john.mcnamara@intel.com>
2016-03-16 17:48:51 +01:00
Remy Horton
d9efd0136a i40e: add EEPROM and registers dumping
Signed-off-by: Remy Horton <remy.horton@intel.com>
Acked-by: John McNamara <john.mcnamara@intel.com>
2016-03-16 17:48:48 +01:00
Jingjing Wu
97ac72aa71 i40e: support setting VF MAC address
This patch implemented the ops of adding and removing mac
address in i40evf driver. Functions are assigned like:
  .mac_addr_add    =  i40evf_add_mac_addr,
  .mac_addr_remove = i40evf_del_mac_addr,
To support multiple mac addresses setting, this patch also
extended the mac addresses adding and deletion when device
start and stop. Each VF can have a maximum of 64 mac
addresses.

Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>
Acked-by: Zhe Tao <zhe.tao@intel.com>
2016-03-16 17:47:55 +01:00
Zhe Tao
689bba3327 i40e: add VEB switching support
VEB switching feature for i40e is used to enable the switching between the
VSIs connect to the virtual bridge. The old implementation is setting the
virtual bridge mode as VEPA which is port aggregation. Enable the switching
ability by setting the loop back mode for the specific VSIs which connect
to PF or VFs.

VEB/VSI/VEPA are concepts not specific to the i40e HW, the concepts are
from 802.1qbg spec
IEEE EVB tutorial:
http://www.ieee802.org/802_tutorials/2009-11/evb-tutorial-draft-20091116_v09.pdf

VEB: a virtual switch can forward the packet based on the specific match
field.
VSI: a virtual interface connect between the VEB/VEPA and virtual machine.
VEPA: a virtual Ethernet port aggregator will upstream the packets from
VSI to the LAN port.

Signed-off-by: Zhe Tao <zhe.tao@intel.com>
Acked-by: Jingjing Wu <jingjing.wu@intel.com>
2016-03-16 17:47:52 +01:00
Jingjing Wu
5135f3ca49 i40e: enable DCB in VMDQ VSIs
Previously, DCB(Data Center Bridging) is only enabled on PF,
queue mapping and BW configuration is only done on PF.
This patch enables DCB for VMDQ VSIs(Virtual Station Interfaces)
by following steps:
  1. Take BW and ETS(Enhanced Transmission Selection)
     configuration on VEB(Virtual Ethernet Bridge).
  2. Take BW and ETS configuration on VMDQ VSIs.
  3. Update TC(Traffic Class) and queues mapping on VMDQ VSIs.
To enable DCB on VMDQ, the number of TCs should not be larger than
the number of queues in VMDQ pools, and the number of queues per
VMDQ pool is specified by CONFIG_RTE_LIBRTE_I40E_QUEUE_NUM_PER_VM
in config/common_* file.

Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
2016-03-16 17:47:03 +01:00
Helin Zhang
b054176460 i40e/base: update AQ command structures and macros
Several structures and macros are added or updated, such
as 'struct i40e_aqc_get_link_status',
'struct i40e_aqc_run_phy_activity' and
'struct i40e_aqc_lldp_set_local_mib_resp'.

Signed-off-by: Helin Zhang <helin.zhang@intel.com>
Acked-by: Jingjing Wu <jingjing.wu@intel.com>
Acked-by: Remy Horton <remy.horton@intel.com>
2016-03-16 17:44:49 +01:00
Helin Zhang
b6a0ec4182 i40e: use AQ for Rx control register read/write
RX control register read/write functions are added, as directly
read/write may fail when under stress small traffic. After the
adminq is ready, all rx control registers should be read/written
by dedicated functions.

Signed-off-by: Helin Zhang <helin.zhang@intel.com>
Acked-by: Jingjing Wu <jingjing.wu@intel.com>
Acked-by: Remy Horton <remy.horton@intel.com>
2016-03-16 17:36:10 +01:00
Helin Zhang
488ecf6271 i40e: generate MAC address for VF
Generate a MAC address for each VF during PF host
initialization.

Signed-off-by: Helin Zhang <helin.zhang@intel.com>
Acked-by: Zhe Tao <zhe.tao@intel.com>
2016-03-16 17:20:10 +01:00
Wenzhuo Lu
6be3dfec31 ixgbe: support link speed auto-negotiation on X550em_x
Normally the auto-negotiation is supported by FW. SW need not care about
that. But on x550em_x, FW doesn't support auto-neg. As the x550em_x ports
are 10G, if we connect the port will a peer which is 1G, the link will
always be down.
We need support auto-neg by SW to avoid this link down issue. As we already
have the code to handle the link speed setting, what we need is a trigger.
When the advertised link speed changes, a PHY interruption will be
triggered. So, we should handle this interrupt and call ixgbe_handle_lasi
to set the link speed correctly.

Please be aware it's working when auto-neg is on. If the auto-neg of the
peer port is turned off and its speed is indicated manually, we should also
set the speed of our own port manually.

Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Acked-by: Shaopeng He <shaopeng.he@intel.com>
2016-03-16 17:10:46 +01:00
Wenzhuo Lu
72dec9e37a ixgbe: support multicast promiscuous mode on VF
Add multicast promiscuous mode support on ixgbe VF driver.

Please note if we want to use this promiscuous mode, we need both PF
and VF driver to support it. The reason is this VF feature is
configged on PF.
If use kernel PF driver + dpdk VF driver, make sure kernel PF driver
support VF multicast promiscuous mode. If use dpdk PF + dpdk VF,
better make sure PF driver is the same version as VF.

Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Acked-by: Shaopeng He <shaopeng.he@intel.com>
Acked-by: Xiao Wang <xiao.w.wang@intel.com>
2016-03-16 17:10:26 +01:00
Wenzhuo Lu
0cf7c6a6f3 ixgbe/base: set MDIO speed after MAC reset
The MDIO clock speed must be reconfigured after the MAC reset.
The MDIO clock speed becomes invalid, therefore the driver reads
invalid PHY register values. The driver now set the MDIO clock
speed prior to initializing PHY ops and again after the MAC reset.

As now the MDIO speed gets set in more than one place, make a
function for it so it will always be done correctly.

Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
2016-03-16 17:08:33 +01:00
Wenzhuo Lu
e2f368a4bf ixgbe/base: fix setting flow director flag twice
Do not set FDIRCTRL.DROP_NO_MATCH in ixgbe_init_fdir_perfect_82599(),
this bit is already set in ixgbe_set_fdir_drop_queue_82599() which
makes more sense for drivers that call that function.

This resolves an issue where packets were being dropped when switching
to perfect filters mode.

Setting this bit makes no sense in perfect filters mode for the
driver as we do not want to route all packets that don't match an FDIR
rule to a single queue and instead fall back to RSS.
Drivers that need this bit set can call ixgbe_set_fdir_drop_queue_82599()
and the ones that don't, can preserve the old behavior.

Fixes: 2241ce2816 ("ixgbe/base: add flow director drop queue")
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
2016-03-16 17:08:23 +01:00
Wenzhuo Lu
ce7a410081 ixgbe/base: set VF MAC address only when acked by PF
This patch resolves an issue where VF mac address is zeroed out
in cases where the VF driver is loaded while the PF interface
is down.
The solution is to only set it when we get an ACK from the PF.

Fixes: 6202266e56 ("ixgbe/base: vf changes")
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
2016-03-16 17:06:53 +01:00
Wenzhuo Lu
86b8fb293f ixgbe/base: add sw-firmware sync for resource sharing on X550em_a
Use a PHY token, shared between sw-fw for PHY access on X550EM_a.

Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
2016-03-16 17:05:29 +01:00
Wenzhuo Lu
e44844ce1c ixgbe/base: support X550em_x V2 device
Only x550em_x V1 was supported before. Now V2 is supported.
A mask for V1 and V2 is defined and used to support both.

Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
2016-03-16 17:05:12 +01:00
Wenzhuo Lu
0790adeb56 ixgbe/base: support X550em_a device
Add new X550EM_a devices and their mac types, X550EM_a
and X550EM_a_vf.
Update the code to use the new devices and mac types.

Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
2016-03-16 17:04:49 +01:00
Rahul Lakkireddy
5a9e303a38 cxgbe: fix setting wrong MTU
max_rx_pkt_len already includes ETHER_HDR_LEN and ETHER_CRC_LEN for the
mtu. But, the firmware also adds ETHER_HDR_LEN and ETHER_CRC_LEN to the
mtu specified. Fix by subtracting these values from the mtu before
passing it to firmware.

Fixes: 4b2eff452d ("cxgbe: enable jumbo frames")

Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com>
2016-03-16 16:52:42 +01:00
Rahul Lakkireddy
8dca8cc5c6 cxgbe: fix allocated size for RSS table
The size of each entry in the port's rss table is actually 2 bytes
and not 1 byte. A segfault occurs when accessing part of port 0's rss
table because it gets overwritten by subsequent port 1's part of the
rss table. Fix by setting the size of each entry appropriately.

Fixes: 92c8a63223 ("cxgbe: add device configuration and Rx support")

Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com>
2016-03-16 16:51:19 +01:00
Thomas Monjalon
39fee04fc0 doc: fix IPsec entry in the release notes
It was inserted in the "Resolved Issues" section.
Move the entry with the new features.

Signed-off-by: Thomas Monjalon <thomas.monjalon@6wind.com>
2016-03-15 19:51:07 +01:00
Stephen Hemminger
4d51afb5cd sched: keep track of RED drops
Add new statistic to keep track of drops due to RED.

Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
2016-03-13 23:28:00 +01:00
Xutao Sun
dd76f93c2d ethdev: rework tunnel filtering structure
Change the fields of outer_mac and inner_mac in struct
rte_eth_tunnel_filter_conf from pointer to struct in order to
keep the code's readability.

Signed-off-by: Xutao Sun <xutao.sun@intel.com>
Signed-off-by: Jijiang Liu <jijiang.liu@intel.com>
Signed-off-by: Thomas Monjalon <thomas.monjalon@6wind.com>
2016-03-13 15:26:55 +01:00
Wenzhuo Lu
d87c3058bb ixgbe: offload VxLAN and NVGRE Tx checksum on X550
The patch add VxLAN & NVGRE TX checksum off-load. When the flag of
outer IP header checksum offload is set, we'll set the context
descriptor to enable this checksum off-load.

Also update release notes for VxLAN & NVGRE checksum off-load support.

Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
2016-03-13 11:52:58 +01:00
Wenzhuo Lu
1cbe755fef ethdev: rename UDP tunnel port functions
The names of function for tunnel port configuration are not
accurate. They're tunnel_add/del, better change them to
tunnel_port_add/del.
The old functions are directly replaced because the API and ABI
compatibility of ethdev are already broken in 16.04.

Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
2016-03-13 11:44:33 +01:00
Wenzhuo Lu
22e77d4501 ixgbe: support L2 tunnel operations
Add support of l2 tunnel configuration and operations.
1, Support modifying ether type of a type of l2 tunnel.
2, Support enabling and disabling the support of a type of l2 tunnel.
3, Support enabling/disabling l2 tunnel tag insertion/stripping.
4, Support enabling/disabling l2 tunnel packets forwarding.
5, Support adding/deleting forwarding rules for l2 tunnel packets.
Only support E-tag now.

Also update the release note.

Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Acked-by: Shaopeng He <shaopeng.he@intel.com>
Acked-by: Jingjing Wu <jingjing.wu@intel.com>
Tested-by: Yong Liu <yong.liu@intel.com>
2016-03-11 23:25:58 +01:00
Helin Zhang
19b16e2f64 ethdev: add vlan type when setting ether type
In order to set ether type of VLAN for single VLAN, inner
and outer VLAN, the VLAN type as an input parameter is added
to 'rte_eth_dev_set_vlan_ether_type()'.
In addition, corresponding changes in e1000, ixgbe and i40e
are also added.

It is an ABI break but ethdev library is already bumped for 16.04.

Signed-off-by: Helin Zhang <helin.zhang@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
2016-03-11 22:21:06 +01:00
Sergio Gonzalez Monroy
d299106e8e examples/ipsec-secgw: add IPsec sample application
Sample app implementing an IPsec Security Geteway.
The main goal of this app is to show the use of cryptodev framework
in a "real world" application.

Currently only supported static IPv4 ESP IPsec tunnels for the following
algorithms:
- Cipher: AES-CBC, NULL
- Authentication: HMAC-SHA1, NULL

Not supported:
- SA auto negotiation (No IKE implementation)
- chained mbufs

Signed-off-by: Sergio Gonzalez Monroy <sergio.gonzalez.monroy@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2016-03-11 11:06:29 +01:00
Declan Doherty
94b0ad8e0a null_crypto: add driver for null crypto operations
This patch provides the implementation of a NULL crypto PMD, which supports
NULL cipher and NULL authentication operations, which can be chained together
as follows:

- Authentication Only
- Cipher Only
- Authentication then Cipher
- Cipher then Authentication

As this is a NULL operation device the crypto operations which are submitted for
processing are not actually modified and are stored in a queue pairs processed
packets ring ready for collection when rte_cryptodev_burst_dequeue() is called.

The patch also contains the related unit tests function to test the PMDs
supported operations.

Signed-off-by: Declan Doherty <declan.doherty@intel.com>
Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
2016-03-11 02:16:18 +01:00
John Griffin
53d8971cbe qat: fix AES-GCM decryption
AES GCM on the cryptodev API was giving invalid results
in some cases, due to an incorrect IV setting.

Added AES GCM in the QAT supported algorithms,
as encryption/decryption is fully functional.

Fixes: 1703e94ac5 ("qat: add driver for QuickAssist devices")

Signed-off-by: John Griffin <john.griffin@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2016-03-11 01:31:55 +01:00
Declan Doherty
eec136f3c5 aesni_gcm: add driver for AES-GCM crypto operations
This patch provides the implementation of an AES-NI accelerated crypto PMD
which is dependent on Intel's multi-buffer library, see the white paper
"Fast Multi-buffer IPsec Implementations on Intel®  Architecture  Processors"

This PMD supports AES_GCM authenticated encryption and authenticated
decryption using 128-bit AES keys

The patch also contains the related unit tests functions

Signed-off-by: Declan Doherty <declan.doherty@intel.com>
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: John Griffin <john.griffin@intel.com>
2016-03-11 01:01:42 +01:00
Pablo de Lara
3aafc423cf snow3g: add driver for SNOW 3G library
Added new SW PMD which makes use of the libsso SW library,
which provides wireless algorithms SNOW 3G UEA2 and UIA2
in software.

This PMD supports cipher-only, hash-only and chained operations
("cipher then hash" and "hash then cipher") of the following
algorithms:
- RTE_CRYPTO_SYM_CIPHER_SNOW3G_UEA2
- RTE_CRYPTO_SYM_AUTH_SNOW3G_UIA2

The SNOW 3G hash and cipher algorithms, which are enabled
by this crypto PMD are implemented by Intel's libsso software
library. For library download and build instructions,
see the documentation included (doc/guides/cryptodevs/snow3g.rst)

The patch also contains the related unit tests function to test the PMD
supported operations.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
2016-03-11 00:14:47 +01:00
Deepak Kumar Jain
a38dfe974b qat: add SNOW 3G
Signed-off-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2016-03-10 23:04:56 +01:00
Jasvinder Singh
88ac2fd99f pipeline: support packet redirection at action handlers
Currently, there is no mechanism that allows the pipeline ports (in/out)
and table action handlers to override the default forwarding decision
(as previously configured per input port or in the table entry). The port
(in/out) and table action handler prototypes have been changed to allow
pipeline action handlers (port in/out, table) to remove the selected
packets from the further pipeline processing and to take full ownership
for these packets. This feature will be helpful to implement functions
such as exception handling (e.g. TTL =0), load balancing etc.

Signed-off-by: Jasvinder Singh <jasvinder.singh@intel.com>
Acked-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
2016-03-10 01:28:29 +01:00
Michal Kobylinski
f1f7261838 lpm: add a new config structure for IPv4
A new rte_lpm_config structure is used so LPM library will allocate
exactly the amount of memory which is necessary to hold application’s
rules.

Signed-off-by: Michal Kobylinski <michalx.kobylinski@intel.com>
Acked-by: David Hunt <david.hunt@intel.com>
2016-03-09 23:05:05 +01:00
Michal Kobylinski
dc81ebbaca lpm: extend IPv4 next hop field
This patch extend next_hop field from 8-bits to 24-bits in LPM library
for IPv4.

Added versioning symbols to functions and updated
library and applications that have a dependency on LPM library.

Signed-off-by: Michal Kobylinski <michalx.kobylinski@intel.com>
Acked-by: David Hunt <david.hunt@intel.com>
2016-03-09 22:57:43 +01:00
Jingjing Wu
173cd7910f doc: fix API change in release notes
Move the structure ``rte_eth_fdir_masks`` change announcement from ABI
to API in release notes.

Fixes: 1409f127d7 (ethdev: fix byte order consistency of flow director)

Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>
2016-03-09 18:00:06 +01:00
Thomas Monjalon
9f9a35bfe6 cmdline: bump library version
There was an ABI change in the release 16.04.

Fixes: fb76dd26a3 ("cmdline: increase command line buffer")

Signed-off-by: Thomas Monjalon <thomas.monjalon@6wind.com>
Acked-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
2016-03-09 16:13:14 +01:00
Thomas Monjalon
cfd2279ea6 ethdev: bump library version
There was an ABI change and more are coming in the release 16.04.

Fixes: a9963a86b2 ("ethdev: increase RETA entry size")

Signed-off-by: Thomas Monjalon <thomas.monjalon@6wind.com>
Acked-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
2016-03-09 16:13:09 +01:00
Harry van Haaren
dd3e00138d eal: check if primary process is alive
This patch adds a new function to the EAL API:
int rte_eal_primary_proc_alive(const char *path);

The function indicates if a primary process is alive right now.
This functionality is implemented by testing for a write-
lock on the config file, and the function tests for a lock.

The use case for this functionality is that a secondary
process can wait until a primary process starts by polling
the function and waiting. When the primary is running, the
secondary continues to poll to detect if the primary process
has quit unexpectedly, the secondary process can detect this.

Signed-off-by: Harry van Haaren <harry.van.haaren@intel.com>
Acked-by: Maryam Tahhan <maryam.tahhan@intel.com>
2016-03-09 16:13:09 +01:00
Helin Zhang
b7cf8e1559 igb_uio: deprecate extended tag
It deprecates sys files of 'extended_tag' and
'max_read_request_size' which was not documented.

Signed-off-by: Helin Zhang <helin.zhang@intel.com>
Acked-by: Jingjing Wu <jingjing.wu@intel.com>
2016-03-09 01:51:01 +01:00
Helin Zhang
68f7759382 pci: remove config of extended tag
Remove pci configuration of 'extended tag' and 'max read request
size', as they are not required by all devices and it lets PMD to
configure them if necessary.
In addition, 'pci_config_space_set()' is deprecated.

Signed-off-by: Helin Zhang <helin.zhang@intel.com>
Acked-by: Jingjing Wu <jingjing.wu@intel.com>
Signed-off-by: Thomas Monjalon <thomas.monjalon@6wind.com>
2016-03-09 01:51:00 +01:00
Helin Zhang
56465cfaf9 i40e: enable extended tag
PCIe feature of 'Extended Tag' is important for 40G performance.
It adds its enabling during each port initialization, to ensure
the high performance.

Signed-off-by: Helin Zhang <helin.zhang@intel.com>
Acked-by: Jingjing Wu <jingjing.wu@intel.com>
2016-03-09 01:51:00 +01:00
Pablo de Lara
6e5794d008 doc: add known clang compilation issue
Add known issue about DPDK not compiling on some CPUs
with clang versions older than 3.7.0.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: John McNamara <john.mcnamara@intel.com>
2016-03-07 22:28:00 +01:00