Commit Graph

16206 Commits

Author SHA1 Message Date
Satha Rao
457d077495 common/cnxk: set appropriate max frame size for SDP and LBK
For SDP interface all platforms supports up to 65535 frame size.
Updated API with new check for SDP interface.

Signed-off-by: Satha Rao <skoteshwar@marvell.com>
Acked-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2021-09-28 12:06:39 +02:00
Jie Zhou
09e4eceacb mempool/stack: build on Windows
Enable build of mempool/stack on Windows.

Signed-off-by: Jie Zhou <jizh@linux.microsoft.com>
Acked-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
2021-10-01 16:46:05 +02:00
William Tu
f1f6ebc0ea eal: remove sys/queue.h from public headers
Currently there are some public headers that include 'sys/queue.h', which
is not POSIX, but usually provided by the Linux/BSD system library.
(Not in POSIX.1, POSIX.1-2001, or POSIX.1-2008. Present on the BSDs.)
The file is missing on Windows. During the Windows build, DPDK uses a
bundled copy, so building a DPDK library works fine.  But when OVS or other
applications use DPDK as a library, because some DPDK public headers
include 'sys/queue.h', on Windows, it triggers an error due to no such
file.

One solution is to install the 'lib/eal/windows/include/sys/queue.h' into
Windows environment, such as [1]. However, this means DPDK exports the
functionalities of 'sys/queue.h' into the environment, which might cause
symbols, macros, headers clashing with other applications.

The patch fixes it by removing the "#include <sys/queue.h>" from
DPDK public headers, so programs including DPDK headers don't depend
on the system to provide 'sys/queue.h'. When these public headers use
macros such as TAILQ_xxx, we replace it by the ones with RTE_ prefix.
For Windows, we copy the definitions from <sys/queue.h> to rte_os.h
in Windows EAL. Note that these RTE_ macros are compatible with
<sys/queue.h>, both at the level of API (to use with <sys/queue.h>
macros in C files) and ABI (to avoid breaking it).

Additionally, the TAILQ_FOREACH_SAFE is not part of <sys/queue.h>,
the patch replaces it with RTE_TAILQ_FOREACH_SAFE.

[1] http://mails.dpdk.org/archives/dev/2021-August/216304.html

Suggested-by: Nick Connolly <nick.connolly@mayadata.io>
Suggested-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
Signed-off-by: William Tu <u9012063@gmail.com>
Acked-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
Acked-by: Narcisa Vasile <navasile@linux.microsoft.com>
2021-10-01 13:09:43 +02:00
Pallavi Kadam
4feddcfc6c net/iavf: build on Windows
- Enable IAVF PMD build on Windows
- Replace x86intrin.h with rte_vect.h to avoid __m_prefetchw conflicting
  types
- Fix for pointer and integer sign warnings using Clang compiler on
  Windows
- Add extra cflags '-fno-asynchronous-unwind-tables'
  to avoid MinGW build error:
  Error: invalid register for .seh_savexmm

Signed-off-by: Pallavi Kadam <pallavi.kadam@intel.com>
Reviewed-by: Ranjit Menon <ranjit.menon@intel.com>
Acked-by: Shivanshu Shukla <shivanshu.shukla@intel.com>
2021-09-30 22:09:49 +02:00
Pallavi Kadam
3c6e581025 bus/pci: fix unknown NUMA node value on Windows
Based on the rte_eth_dev_socket_id() documentation,
set the default numa_node to -1. When the API is unsuccessful,
set numa_node to 0.
This change more correctly resembles the Linux code.

Fixes: bf7cf1f947 ("bus/pci: fix unknown NUMA node value on Windows")
Cc: stable@dpdk.org

Reported-by: Vipin Varghese <vipin.varghese@intel.com>
Signed-off-by: Pallavi Kadam <pallavi.kadam@intel.com>
Acked-by: Ranjit Menon <ranjit.menon@intel.com>
2021-09-30 18:30:27 +02:00
Olivier Matz
6aebb94290 kvargs: add function to get from key and value
A quite common scenario with kvargs is to lookup for a <key>=<value> in
a kvlist. For instance, check if name=foo is present in
name=toto,name=foo,name=bar. This is currently done in drivers/bus with
rte_kvargs_process() + the rte_kvargs_strcmp() handler.

This approach is not straightforward, and can be replaced by this new
function.

rte_kvargs_strcmp() is then removed.

Signed-off-by: Olivier Matz <olivier.matz@6wind.com>
Reviewed-by: Xueming Li <xuemingl@nvidia.com>
Reviewed-by: David Marchand <david.marchand@redhat.com>
Acked-by: Ray Kinsella <mdr@ashroe.eu>
2021-09-30 17:38:02 +02:00
Tudor Cornea
84b3e4555a net/af_packet: remove timestamp from packet status
We should eliminate the timestamp status from the packet
status. This should only matter if timestamping is enabled
on the socket, but we might hit a kernel bug, which is fixed
in newer releases.

For interfaces of type 'veth', the sent skb is forwarded
to the peer and back into the network stack which timestamps
it on the RX path if timestamping is enabled globally
(which happens if any socket enables timestamping).

When the skb is destructed, tpacket_destruct_skb() is called
and it calls __packet_set_timestamp() which doesn't check
the flags on the socket and returns the timestamp if it is
set in the skb (and for veth it is, as mentioned above).

See the following kernel commit for reference [1]:

net: packetmmap: fix only tx timestamp on request

The packetmmap tx ring should only return timestamps if requested
via setsockopt PACKET_TIMESTAMP, as documented. This allows
compatibility with non-timestamp aware user-space code which checks
tp_status == TP_STATUS_AVAILABLE; not expecting additional timestamp
flags to be set in tp_status.

[1] https://www.spinics.net/lists/kernel/msg3959391.html

Signed-off-by: Mihai Pogonaru <pogonarumihai@gmail.com>
Signed-off-by: Tudor Cornea <tudor.cornea@gmail.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2021-09-28 14:59:28 +02:00
Raslan Darawsheh
16b8e92d49 ethdev: use extension header for GTP PSC item
This updates the gtp_psc flow item to use the net header
definition of the gtp_psc to be based on RFC 38415-g30

Signed-off-by: Raslan Darawsheh <rasland@nvidia.com>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
2021-09-28 12:34:58 +02:00
Junxiao Shi
3e3f736e50 net/memif: fix chained mbuf determination
Previously, TX functions call rte_pktmbuf_is_contiguous to determine
whether an mbuf is chained. However, rte_pktmbuf_is_contiguous is
designed to work on the first mbuf of a packet only. In case a packet
contains three or more segment mbufs in a chain, it may cause truncated
packets or rte_mbuf_sanity_check panics.

This patch updates TX functions to determine chained mbufs using
mbuf_head->nb_segs field, which works in all cases. Moreover, it
maintains that the second cacheline is only accessed when chained mbuf
is actually present.

Fixes: 09c7e63a71 ("net/memif: introduce memory interface PMD")
Fixes: 43b815d881 ("net/memif: support zero-copy slave")
Cc: stable@dpdk.org

Signed-off-by: Junxiao Shi <git@mail1.yoursunny.com>
Reviewed-by: Jakub Grajciar <jgrajcia@cisco.com>
2021-09-27 17:25:21 +02:00
Dmitry Kozlyuk
f2f5879efb net/mlx5: fix shared RSS destruction
Shared RSS resources were released before checking that the shared RSS
has no more references. If it had, the destruction was aborted, leaving
the shared RSS in an invalid state where it could no longer be used.
Move reference counter check before resource release.

Fixes: d2046c09aa ("net/mlx5: support shared action for RSS")
Cc: stable@dpdk.org

Signed-off-by: Dmitry Kozlyuk <dkozlyuk@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-09-21 10:06:11 +02:00
Dmitry Kozlyuk
b09c65fa4f net/mlx5: fix flow indirect action reference counting
When an indirect action is used in a flow rule with a pattern that
causes RSS expansion, each device flow generated by the expansion
incremented the reference counter of the action. When such a flow was
destroyed, its action reference counter had been decremented only once.
The action remained marked as being used and could not be destroyed.
COUNT, AGE, and CONNTRACK indirect actions have been affected
(for AGE the error was not immediately observable).
Increment action counter only once for the original flow rule.

Fixes: 81073e1f8c ("net/mlx5: support shared age action")
Fixes: 2d084f69aa ("net/mlx5: add translation of connection tracking action")
Fixes: f3191849f2 ("net/mlx5: support flow count action handle")
Cc: stable@dpdk.org

Signed-off-by: Dmitry Kozlyuk <dkozlyuk@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-09-21 09:57:02 +02:00
Dmitry Kozlyuk
4ec1f971cd net/mlx5: report error on indirect CT action destroy
When an indirect CT action of mlx5 PMD could not be destroyed,
rte_action_handle_destroy() was returning (-1), but the error
structure was not filled. This lead to a segfault in testpmd
on an attempt to print it. Fill the details for each possible
cause of this error.

Fixes: c5a49265fc ("net/mlx5: add ASO connection tracking destroy")
Cc: stable@dpdk.org

Signed-off-by: Dmitry Kozlyuk <dkozlyuk@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-09-21 09:56:12 +02:00
Michael Baum
dffae63d3c common/mlx5: fix resource cleaning in device removal
The common remove function call in a loop to remove function for each
driver which have been registered.

If all removes are succeeded, it return 0 without to free the device
which allocated in probe function. Otherwise, it free the device.
In fact we expect exactly the opposite behavior. If all removes are
failed, it returns error without freeing the device which allocated in
probe function. Otherwise, it free the device and return 0.

Replace it with the correct behavior.

Fixes: 8a41f4decc ("common/mlx5: introduce layer for multiple class drivers")
Cc: stable@dpdk.org

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-09-20 23:22:10 +02:00
Michael Baum
dc26c9c21b common/mlx5: fix device list operations concurrency
The mlx5 common driver has a global list of mlx5 devices which are
probed.

In probe function it creates one and insert it to the list. Similarly it
removes the device in remove function.
These operations are not safe as there can be such operations in
parallel, by different threads.

Add global lock for the list and use it to insert or remove.

Fixes: 8a41f4decc ("common/mlx5: introduce layer for multiple class drivers")
Cc: stable@dpdk.org

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-09-20 23:16:29 +02:00
Michael Baum
288d7c3fa6 common/mlx5: fix class combination validation
The common probe function gets as a user argument the classes it should
create, and checks whether the combination is valid.

In case the device already exists, it checks the integration of the
above with the classes that the device has.
However, the function does not check the combination when the device
does not exist and it has to create it.

Check if the combination is valid for all cases.

Fixes: ad435d3204 ("common/mlx5: add bus-agnostic layer")
Cc: stable@dpdk.org

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-09-20 23:15:08 +02:00
Michael Baum
97c9b0aa25 net/mlx5: fix duplicate pattern option default
In order to allow/disallow configuring rules with identical patterns,
the new device argument 'allow_duplicate_pattern' was introduced.

The default is to allow, and it is initialized to 1 in PCI probe
function.
However, on auxiliary bus probing (for Sub-Function) it is not
initialized at all, so it's actually initialized to 0.

Move the initialization to default config function which is called from
both.

Fixes: 919488fbfa ("net/mlx5: support Sub-Function")
Cc: stable@dpdk.org

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-09-20 23:13:40 +02:00
Michael Baum
6856efa54e net/mlx5: fix PF leak on PCI probing failure
During PCI probe, the internal probe function is called per PF.

If one of them fails, it was missing a proper destroy for the previously
probed PFs.

This fixes the behavior by destroying all previously probed PFs.

Fixes: 08c2772fc7 ("net/mlx5: support list of representor PF")
Cc: stable@dpdk.org

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-09-20 23:12:10 +02:00
Michael Baum
c76db6a496 net/mlx5: fix memory leak on context allocation failure
In shared device context creation, there is a missing validation when
one of the btree memory allocation fails that will cause a memory leak.

This adds a proper check to clean resources in case of failure.

Fixes: 632f0f1905 ("net/mlx5: manage shared counters in three-level table")
Cc: stable@dpdk.org

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-09-20 16:33:40 +02:00
Kishore Padmanabha
dbd29c42ba net/bnxt: add enhancements to TruFlow ULP
1. Added support to specify l4 port masks in the template. Also enabled
   source mac in the wild card key for ingress flows.

2. Added support to enable offload for ipv6 traffic within the vxlan
   tunnel connection.

3. The flow counters is reduced from 7168 to 6912 for Whitney.
   The stats operation is updated to reflect counts for packets
   at egress from CFA instead of ingress to CFA

4. The miss path for the l2 context table is updated with correct
   parif and default action handler to handle the miss path for
   egress flows.

5. This support enables allocation of encapsulation, modification and
   action records dynamically based on a given flow actions.

6. Reduce the l2context resource requests during open_session. Move the
   SMAC from the L2Context to the EM/WM

7. Remap the parif in the bd action in order to eliminate incorrect
   replication of broadcast packets. The layer 4 source port mask
   was incorrectly updated in the outer layer 4 source port mask
   instead of inner layer 4. Add the l3 proto to egress rules, switch
   to using computed fields for l4 ports, add internal smac to f1/f2
   flows, add l3 proto to ingress ipv6 flows

Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Mike Baucom <michael.baucom@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Randy Schacher <stuart.schacher@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-09-21 06:42:17 +02:00
Farah Smith
fb97e50973 net/bnxt: add SRAM manager shared session
Fix shared session support issues due to SRAM manager
additions. Shared session does not support slices within
RM blocks. Calculate resources required without slices
and determine base addresses using old methods for the
shared session.

Signed-off-by: Farah Smith <farah.smith@broadcom.com>
Reviewed-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Reviewed-by: Shahaji Bhosle <sbhosle@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-09-21 06:42:08 +02:00
Randy Schacher
adf0802e0c net/bnxt: allocate space dynamically for EM defrag
The dynamic pool allocation defrag function currently uses stack
allocation. To improve use of stack space, dynamically allocate
and deallocate memory for use to defragment the dynamic pool of
EM resources.

Signed-off-by: Randy Schacher <stuart.schacher@broadcom.com>
Reviewed-by: Peter Spreadborough <peter.spreadborough@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-09-21 06:41:58 +02:00
Farah Smith
0e3c0b53df net/bnxt: decrease log level of a debug message
Adjust info message to debug level to prevent excessive
logging.

Signed-off-by: Farah Smith <farah.smith@broadcom.com>
Reviewed-by: Mike Baucom <michael.baucom@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-09-21 06:41:35 +02:00
Kishore Padmanabha
2730e7f9e8 net/bnxt: add flow templates for Thor
1. Add support for egress flows with port and count action for
   Thor platform.
2. Added templates to support VXLAN encapsulation feature for Thor.
3. Added support for VXLAN decap and VLAN pop actions along with
   the ingress flow.
4. Added templates to enable VXLAN decap support for f1 and f2 flows.
5. Added templates Thor VF Rep support
6. Added Thor ingress mod table actions for NAT, NAPT, and TTL.
7. Added mirror/sample table support
8. Added supported for IPv6 flows for Thor.

Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Mike Baucom <michael.baucom@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Randy Schacher <stuart.schacher@broadcom.com>
Reviewed-by: Shahaji Bhosle <sbhosle@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-09-21 06:40:18 +02:00
Kishore Padmanabha
1f7f7c3c73 net/bnxt: add wildcard TCAM byte order for Thor
The wild card TCAM for Thor platform is different from the profile TCAM
byte order.

Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Shuanglin Wang <shuanglin.wang@broadcom.com>
Reviewed-by: Mike Baucom <michael.baucom@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-09-21 06:40:00 +02:00
Kishore Padmanabha
f63aa27db6 net/bnxt: support dynamic encap action
The encapsulation record processing is enhanced to handle data
dynamically. Different combinations of VXLAN encapsulation using
no VLAN or single or double VLAN can be supported and also supports
both IPv4 and IPv6 versions.

Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Randy Schacher <stuart.schacher@broadcom.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-09-21 06:33:09 +02:00
Kishore Padmanabha
bdf4a3c631 net/bnxt: support tunnel offload
Add support for tunnel offload APIs. Specifically the following
are supported.
tunnel_decap_set, tunnel_match, tunnel_action_decap_release,
tunnel_item_release.

This provides support for VXLAN decap action where two flows
can indicate tunnel offload rule. The first flow indicates the
tunnel properties and second flow indicates the inner packet
structure. The templates are updated to support this
feature.

Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Shahaji Bhosle <sbhosle@broadcom.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-09-21 06:26:00 +02:00
Kishore Padmanabha
ad9eed0248 net/bnxt: support flow template for Thor
Template adds non-VFR based support for testpmd with:
matches to include
- DMAC, SIP, DIP, Proto, Sport, Dport
- SIP, DIP, Proto, Sport, Dport
actions:
- count, drop

Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Mike Baucom <michael.baucom@broadcom.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-09-21 06:13:10 +02:00
Farah Smith
37ff91c158 net/bnxt: add SRAM manager model
The SRAM manager supports allocation and free of variable sized
records within SRAM memory.  These record sizes are 8, 16, 32, or
64B. The SRAM manager algorithm will not fragment memory during
run time. Previous implementation only included fixed size 64B
records regardless of the size required.

Signed-off-by: Farah Smith <farah.smith@broadcom.com>
Reviewed-by: Shahaji Bhosle <sbhosle@broadcom.com>
Reviewed-by: Peter Spreadborough <peter.spreadborough@broadcom.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-09-21 06:11:42 +02:00
Jay Ding
998b9639df net/bnxt: support flow meter drop counter
This patch adds flow meter drop counter support for Thor.

Signed-off-by: Jay Ding <jay.ding@broadcom.com>
Reviewed-by: Farah Smith <farah.smith@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-09-21 05:16:29 +02:00
Peter Spreadborough
dfc65c77c0 net/bnxt: enable dynamic pool allocator
Enable dynamic entry allocator for Exact Match SRAM entries.
Deprecate static entry allocator code.

Signed-off-by: Peter Spreadborough <peter.spreadborough@broadcom.com>
Reviewed-by: Randy Schacher <stuart.schacher@broadcom.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-09-21 04:58:30 +02:00
Farah Smith
c6d273e9ab net/bnxt: update TruFlow core index table
Update the TruFlow core index table and
remove unused shadow table functionality.

Signed-off-by: Farah Smith <farah.smith@broadcom.com>
Reviewed-by: Peter Spreadborough <peter.spreadborough@broadcom.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-09-21 04:40:22 +02:00
Ashwin Sekhar T K
14a4e2844b common/cnxk: align NPA stack to ROC cache line size
Network Pool accelerator (NPA) is part of ROC (Rest Of Chip). So
NPA structures should be aligned to ROC Cache line size and not
CPU cache line size.

Non alignment of NPA stack to ROC cache line will result in
undefined runtime NPA behaviour.

Fixes: f765f56112 ("common/cnxk: add NPA pool HW operations")
Cc: stable@dpdk.org

Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-09-21 11:08:55 +02:00
Harman Kalra
9eb5cb3b11 net/octeontx: fix access to indirect buffers
Issue has been observed where fields of indirect buffers are
accessed after being set free by the diver. Also fixing freeing
of direct buffers to correct aura.

Fixes: 5cbe184802 ("net/octeontx: support fast mbuf free")
Cc: stable@dpdk.org

Signed-off-by: David George <david.george@sophos.com>
Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-09-21 10:42:31 +02:00
Ashwin Sekhar T K
dd9525a715 common/cnxk: avoid using stashing option of stype
Avoid using stashing option of stype in NPA in cn10k-a0 stepping.

This is a workaround for a HW Errata due to which NPA stashing operations
will never result in writing the data into L2 cache. But instead, it will
be written into LLC.

Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-09-20 10:47:01 +02:00
Ashwin Sekhar T K
fa4ac9512e common/cnxk: update ROC models
Made following updates to ROC (Rest of Chip) models.
- Use consistent upper/lower case in macros defining different
  ROC models.
- Add API to detect cn96 Cx stepping.
- Make all current cn10k models as A0 stepping.

Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-09-20 10:46:57 +02:00
Yuying Zhang
e4a0a7599d net/ice: fix flow priority support in non-pipeline mode
Lower values denote higher priority with 0 as the maximum.
The usage of priority in non-pipeline mode is wrong.

This patch fixed this issue in switch filter and added input
validation of priority in FDIR, RSS and ACL filter which
only support one priority level.

Fixes: 2321e34c23 ("net/ice: support flow priority for DCF switch filter")
Cc: stable@dpdk.org

Signed-off-by: Yuying Zhang <yuying.zhang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-09-22 09:31:07 +02:00
Robin Zhang
cd3b124955 net/iavf: enable interrupt polling
For VF hosted by Intel 700 series NICs, internal Rx interrupt and adminq
interrupt share the same source, that cause a lot CPU cycles be wasted on
interrupt handler on Rx path.

The patch disable PCI interrupt and remove the interrupt handler, replace
it with a low frequency(50ms) interrupt polling daemon which is
implemented by registering an alarm callback periodically.

The virtual channel capability bit VIRTCHNL_VF_OFFLOAD_WB_ON_ITR can be
used to negotiate if iavf PMD needs to enable background alarm or not, so
ideally this change will not impact the case hosted by Intel 800 series
NICS.

This patch implements the same logic with an early i40e commit:
commit 864a800d70 ("net/i40e: remove VF interrupt handler")

Signed-off-by: Robin Zhang <robinx.zhang@intel.com>
Acked-by: Pallavi Kadam <pallavi.kadam@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-09-22 09:27:12 +02:00
Wenjun Wu
f8d541da51 net/iavf: remove support for IP fragment default RSS
To support independent IP fragment default RSS, considerable
additional work need to be done, so we decide to remove this
feature to avoid some unexpected behavior we have observed,
meanwhile user always can use rte_flow to create RSS for IP
fragment packet explicitly.

Signed-off-by: Wenjun Wu <wenjun1.wu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-09-22 09:19:06 +02:00
Wenjun Wu
cc46bab596 net/ice: remove support for IP fragment default RSS
To support independent IP fragment default RSS, considerable
additional work need to be done, so we decide to remove this
feature to avoid some unexpected behavior we have observed,
meanwhile user always can use rte_flow to create RSS for IP
fragment packet explicitly.

Signed-off-by: Wenjun Wu <wenjun1.wu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-09-22 09:18:45 +02:00
Lingyu Liu
cd212c4669 net/iavf: fix QFI fields of GTPU UL/DL for flow director
Fix QFI (QoS Flow Identifier) fields matching of GTPU UL/DL for FDIR.

Fixes: 78e8a87f63 ("net/iavf: fix GTPU UL and DL support for flow director")
Cc: stable@dpdk.org

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Lingyu Liu <lingyu.liu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-09-22 09:15:44 +02:00
Qiming Chen
1028e5bc36 net/iavf: fix mbuf leak
In the iavf_dev_rx_queue_start function, if the iavf_switch_queue
or iavf_switch_queue_lv function fails, the previously applied mbuf
is not released, resulting in leakage. The patch fixes the problem.

Fixes: 9cf9c02bf6 ("net/iavf: add enable/disable queues for large VF")
Cc: stable@dpdk.org

Signed-off-by: Qiming Chen <chenqiming_huawei@163.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-09-22 09:05:50 +02:00
Simei Su
437dbd2fd4 net/ice: support 1PPS
The E810 supports four single-ended GPIO signals (SDP[20:23]). The 1PPS
signal outputs via SDP[20:23], which is measured by an oscilloscope.
This feature can be turned by a devargs which can select GPIO pin index
flexibly. Pin index 0 means SDP20, pin index 1 means SDP21 and so on.

The example for test command is as below:
./build/app/dpdk-testpmd -a af:00.0,pps_out='[pin:2]' -c f -n 4 -- -i

Signed-off-by: Simei Su <simei.su@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-09-22 08:47:42 +02:00
Qi Zhang
d8aaa6d9c2 net/ice/base: add API for parser profile initialization
Add API ice_parser_profile_init to init a parser profile base on
a parser result and a mask buffer. The ice_parser_profile can feed to
low level FXP engine to create HW profile / field vector directly.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-09-21 15:17:58 +02:00
Qi Zhang
6065f4cdc3 net/ice/base: support tunnel port for parser
UDP tunnel can be added/deleted for vxlan, geneve, ecpri through
below APIs:
ice_parser_vxlan_tunnel_set
ice_parser_geneve_tunnel_set
ice_parser_ecpri_tunnel_set

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-09-21 15:17:58 +02:00
Qi Zhang
cc3f51e466 net/ice/base: support double VLAN mode configure for parser
Add API ice_parser_dvm_set to support turn on/off parser's
double vlan mode.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-09-21 15:17:58 +02:00
Qi Zhang
39925373a3 net/ice/base: add parser execution main loop
Implement function ice_parser_rt_execute which perform the main
loop of the parser.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-09-21 15:17:58 +02:00
Qi Zhang
70ada0c508 net/ice/base: add helper function to aggregate flags
Add internal helper function ice_xlt_kb_flg_get to aggregate 64 bit
packet flag into 16 bit key builder flags.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-09-21 15:17:58 +02:00
Qi Zhang
1c9e61b3a4 net/ice/base: add helper function to redirect flags
Add internal helper function ice_flg_redirect to redirect parser flags
to packet flags.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-09-21 15:17:58 +02:00
Qi Zhang
510965b4dc net/ice/base: add helper for ptype markers match
Add internal helper function ice_ptype_mk_tcam_match for ptype markers
matching in tcam table.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-09-21 15:17:58 +02:00
Qi Zhang
d490f1ff41 net/ice/base: add helper for parse graph key matching
Add below two internal helper functions for parse graph key matching
in cam table:

ice_pg_cam_match
ice_pg_nm_cam_match

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-09-21 15:17:58 +02:00