Convert the igbvf pmd driver to use the PMD_REGISTER_DRIVER macro.
This means that the test applications now have no reference to the igbvf library
when building DSO's and must specify its use on the command line with the -d
option. Static linking will still initalize the driver automatically.
Signed-off-by: Neil Horman <nhorman@tuxdriver.com>
Acked-by: Thomas Monjalon <thomas.monjalon@6wind.com>
Convert the igb pmd driver to use the PMD_REGISTER_DRIVER macro.
This means that the test applications now have no reference to the igb library
when building DSO's and must specify its use on the command line with the -d
option. Static linking will still initalize the driver automatically.
Signed-off-by: Neil Horman <nhorman@tuxdriver.com>
Acked-by: Thomas Monjalon <thomas.monjalon@6wind.com>
It may happen that DPDK application gets killed while having
acquired locks on the ethernet hardware, causing these locks to
be never released. On next restart of the application, DPDK
skip those ports because it can not acquire the lock,
this may cause some ports (or even complete board if SMBI is locked)
to be inaccessible from DPDK application until reboot of the
hardware.
This patch release locks that are supposed to be locked due to
an improper exit of the application.
Signed-off-by: Didier Pallard <didier.pallard@6wind.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Add into the `rte_eth_stats` data structure 4 (64-bit) counters
of XOFF/XON pause frames received and sent on a given port.
Update em, igb, and ixgbe drivers to return the value of the 4 XOFF/XON
counters through the `rte_eth_stats_get` function exported by the DPDK
API.
Display the value of the 4 XOFF/XON counters in the `testpmd` application.
Signed-off-by: Ivan Boule <ivan.boule@6wind.com>
Acked-by: Thomas Monjalon <thomas.monjalon@6wind.com>
1) Make device RX and TX offload capabilities to be returned in the
rte_eth_dev_info data structure by the function rte_eth_dev_info_get
The following initial set of RX offload capabilities are defined:
- VLAN header stripping
- IPv4 header checksum check
- UDP checksum check
- TCP checksum check
- TCP large receive offload (LRO)
The following initial set of TX offload capabilities are defined:
- VLAN header insertion
- IPv4 header checksum computation
- UDP checksum computation
- TCP checksum computation
- SCTP checksum computation
- TCP segmentation offload (Transmit Segmentation Offload)
- UDP segmentation offload
2) Update the eth_dev_infos_get() function of the igb and ixgbe PMDs
to return the offload capabilities which are supported by the
device and that are effectively managed by the driver.
Signed-off-by: Ivan Boule <ivan.boule@6wind.com>
Acked-by: Thomas Monjalon <thomas.monjalon@6wind.com>
Since DPDK 1.4, if RTE_EAL_UNBIND_PORTS is disabled, igb_uio mapping is
done for all devices (commit eee16c964cd), breaking some non-Intel drivers.
But pci_uio_map_resource() should only be called for Intel devices
(using igb_uio kernel module).
The flag RTE_PCI_DRV_NEED_IGB_UIO is set for all those devices, even when
RTE_EAL_UNBIND_PORTS is disabled (fixes commit a22f5ce8fcc).
Signed-off-by: David Marchand <david.marchand@6wind.com>
Signed-off-by: Thomas Monjalon <thomas.monjalon@6wind.com>
Acked-by: Damien Millescamps <damien.millescamps@6wind.com>
In case of multi-process application, the secondary process can initialize
the driver without configuring queues. In this case the Rx/Tx functions
were not initialized because it was only done in queue setup.
Fix by reproducing the same behaviour as in eth_igb_dev_init().
Signed-off-by: Intel
When in 'normal' mode, hardware is designed to receive up to 1522 bytes.
When in 'jumbo' mode, RLPML register must be updated so that hardware accepts
a 802.1q vlan header. If dual vlan is enabled, then a second vlan header is
expected, so update RLPML register according to dual vlan support.
Signed-off-by: Intel
Need to change PCI code to support multiple I/O regions on a single device.
Some devices like VMXNET3 have multiple PCI memory regions, and some
have none.
Signed-off-by: Stephen Hemminger <shemminger@vyatta.com>
Signed-off-by: Intel
