Commit Graph

10587 Commits

Author SHA1 Message Date
Nikhil Rao
c018dbf5e0 doc: add event eth Rx adapter to release notes
Signed-off-by: Nikhil Rao <nikhil.rao@intel.com>
Acked-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
2017-10-27 00:57:29 +02:00
Pavan Nikhilesh
12a33b67dd doc: update software event device
Update software event device documentation to include use of service
cores for event distribution.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
Acked-by: John McNamara <john.mcnamara@intel.com>
2017-10-27 00:53:07 +02:00
Pavan Nikhilesh
9f9fad8f21 eventdev: remove schedule API
remove eventdev schedule api and enforce sw driver to use service core
feature for event scheduling.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
Acked-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
2017-10-27 00:53:07 +02:00
Pavan Nikhilesh
9773742710 examples/eventdev: use service library
Update the sample app eventdev_pipeline_sw_pmd to use service run iter for
event scheduling in case of sw eventdev.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
2017-10-27 00:53:07 +02:00
Pavan Nikhilesh
87751f82e5 test/eventdev: use service iter
Use service run iter for event scheduling instead of calling the event
schedule api directly.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
2017-10-27 00:53:07 +02:00
Pavan Nikhilesh
57305d794e app/testeventdev: use service cores
Use service cores for offloading event scheduling in case of
centralized scheduling instead of calling the schedule api directly.
This removes the dependency on dedicated scheduler core specified by
giving command line option --slcore.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
Acked-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
2017-10-27 00:53:07 +02:00
Pavan Nikhilesh
4c2fd9791d event/sw: extend service capability
Extend the service capability of the sw event device by exposing service id
to the application.
The application can use service id to configure service cores to run event
scheduling.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
2017-10-27 00:53:07 +02:00
Pavan Nikhilesh
6325c62dca eventdev: add API to get service id
In case of sw event device the scheduling can be done on a service core
using the service registered at the time of probe.
This patch adds a helper function to get the service id that can be used
by the application to assign a lcore for the service to run on.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
2017-10-27 00:53:07 +02:00
Pavan Nikhilesh
c86ced193a doc: update eventdev guide
Update the guide with event queue configuration and event enqueue
operation.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
2017-10-27 00:53:07 +02:00
Pavan Nikhilesh
2b3bb4d028 eventdev: extend queue attribute get function
Add schedule type queue attribute so that it can be queried along with
the queue config structure.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
2017-10-27 00:53:07 +02:00
Pavan Nikhilesh
13370a3877 eventdev: fix inconsistency in queue config
With the current scheme of event queue configuration the cfg schedule
type macros (RTE_EVENT_QUEUE_CFG_*_ONLY) are inconsistent with the
event schedule type (RTE_SCHED_TYPE_*) this requires unnecessary
conversion between the fastpath and slowpath API's while scheduling
events or configuring event queues.

This patch aims to fix such inconsistency by using event schedule
types (RTE_SCHED_TYPE_*) for event queue configuration.

This patch also fixes example/eventdev_pipeline_sw_pmd as it doesn't
convert RTE_EVENT_QUEUE_CFG_*_ONLY to RTE_SCHED_TYPE_* which leads to
improper events being enqueued to the eventdev.

Fixes: adb5d5486c ("examples/eventdev_pipeline_sw_pmd: add sample app")

Signed-off-by: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
2017-10-27 00:52:57 +02:00
Bernard Iremonger
bc0d4e6703 flow_classify: fix logging
Set log_level to RTE_LOG_INFO.
The RTE_LIBRTE_CLASSIFY_DEBUG macro has been removed from the
config file, use the log_level instead.

Fixes: be41ac2a33 ("flow_classify: introduce flow classify library")

Signed-off-by: Bernard Iremonger <bernard.iremonger@intel.com>
Acked-by: Jasvinder Singh <jasvinder.singh@intel.com>
2017-10-27 00:13:51 +02:00
Nikhil Rao
9d1c2a6a91 eal/x86: fix atomic cmpset
The original code used movl instead of xchgl, this caused
rte_atomic64_cmpset to use ebx as the lower dword of the source
to cmpxchg8b instead of the lower dword of function argument "src".

Fixes: af75078fec ("first public release")
Cc: stable@dpdk.org

Reported-by: Job Abraham <job.abraham@intel.com>
Signed-off-by: Nikhil Rao <nikhil.rao@intel.com>
Tested-by: Job Abraham <job.abraham@intel.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
2017-10-27 00:05:15 +02:00
Jonas Pfefferle
f25f8f3676 bus/pci: check VFIO reset ioctl error
Check return value of device reset ioctl

Coverity issue: 195003
Fixes: 33604c3135 ("vfio: refactor PCI BAR mapping")

Signed-off-by: Jonas Pfefferle <jpf@zurich.ibm.com>
Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
2017-10-26 23:51:39 +02:00
Jianfeng Tan
633e4c7d71 bus/pci: fix UIO bind check
When checking if any devices bound to uio, we did not exclude
those which are blacklisted (or in the case that a whitelist
is specified).

This patch fixes it by only checking whitelisted devices, or
not-blacklisted devices depending on the bus scan mode.

Fixes: 815c7deaed ("pci: get IOMMU class on Linux")

Signed-off-by: Jianfeng Tan <jianfeng.tan@intel.com>
Reviewed-by: Gaetan Rivet <gaetan.rivet@6wind.com>
Acked-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
2017-10-26 23:35:00 +02:00
Gaetan Rivet
3964426e58 maintainers: claim maintainership of PCI library
Signed-off-by: Gaetan Rivet <gaetan.rivet@6wind.com>
2017-10-26 23:17:31 +02:00
Gaetan Rivet
c752998b5e pci: introduce library and driver
The PCI lib defines the types and methods allowing to use PCI elements.

The PCI bus implements a bus driver for PCI devices by constructing
rte_bus elements using the PCI lib.

Move the relevant code out of the EAL to its expected place.

Libraries, drivers, unit tests and applications are updated to use the
new rte_bus_pci.h header when necessary.

Signed-off-by: Gaetan Rivet <gaetan.rivet@6wind.com>
2017-10-26 23:17:31 +02:00
Gaetan Rivet
3df742a917 net/bonding: use local prefix namespace
The current name conflicts with the librte_pci naming convention.
Additionally, it is easier to use gdb when having prefixed even private
functions.

Signed-off-by: Gaetan Rivet <gaetan.rivet@6wind.com>
2017-10-26 23:17:31 +02:00
Gaetan Rivet
da5c269bd7 pci: use EAL exposed configuration
Signed-off-by: Gaetan Rivet <gaetan.rivet@6wind.com>
2017-10-26 23:17:31 +02:00
Gaetan Rivet
64d19ecc06 pci: do not expose IOVA mode getter
Signed-off-by: Gaetan Rivet <gaetan.rivet@6wind.com>
2017-10-26 23:17:31 +02:00
Gaetan Rivet
a80f004592 pci: do not expose match function
This function is private to the PCI bus.

Signed-off-by: Gaetan Rivet <gaetan.rivet@6wind.com>
2017-10-26 23:17:31 +02:00
Gaetan Rivet
ea978e7c22 pci: do not expose private functions
make the functions

   + rte_pci_detach
   + rte_pci_probe
   + rte_pci_probe_one
   + rte_pci_scan

private as there is no point in using them outside of the rte_bus
framework.

Signed-off-by: Gaetan Rivet <gaetan.rivet@6wind.com>
2017-10-26 23:17:31 +02:00
Gaetan Rivet
eb12440a0e pci: use new address parsing function
Signed-off-by: Gaetan Rivet <gaetan.rivet@6wind.com>
2017-10-26 23:17:31 +02:00
Gaetan Rivet
102afb4067 pci: use new address comparison function
Signed-off-by: Gaetan Rivet <gaetan.rivet@6wind.com>
2017-10-26 23:17:31 +02:00
Gaetan Rivet
1a2d1f62d7 pci: make specialized parsing functions private
Do not expose the minute implementations of PCI parsing.
This leaves only the all-purpose rte_pci_addr_parse, which is simpler to
use.

Signed-off-by: Gaetan Rivet <gaetan.rivet@6wind.com>
2017-10-26 23:17:31 +02:00
Gaetan Rivet
aba747fe19 pci: introduce PCI address parsing function
A new single function that is able to parse all currently supported
format:

   * Domain-Bus-Device-Function
   *        Bus-Device-Function

Signed-off-by: Gaetan Rivet <gaetan.rivet@6wind.com>
2017-10-26 23:17:31 +02:00
Gaetan Rivet
7a25c9e3c8 pci: deprecate misnamed functions
Rename misnamed functions and describe the change in a deprecation
notice.

Signed-off-by: Gaetan Rivet <gaetan.rivet@6wind.com>
2017-10-26 23:17:31 +02:00
Gaetan Rivet
c742e8d311 pci: avoid over-complicated macro
Using a macro helps writing the code to the detriment of the reader
in this case. This is backward. Write once, read many.

The few LOCs gained is not worth the opacity of the implementation.

Signed-off-by: Gaetan Rivet <gaetan.rivet@6wind.com>
2017-10-26 23:17:31 +02:00
Gaetan Rivet
cbf10af6de pci: avoid inlining functions
Parsing operations should not happen in performance critical sections.
Headers should not propose implementations unless duly required.

Signed-off-by: Gaetan Rivet <gaetan.rivet@6wind.com>
2017-10-26 23:17:31 +02:00
Gaetan Rivet
7e434f300d vfio: move PCI related symbols
These symbols are only relevant to PCI operations.
Move them to a private PCI-related header, allowing to remove the
dependency of the PCI subsystem upon private eal_vfio.h.

Signed-off-by: Gaetan Rivet <gaetan.rivet@6wind.com>
2017-10-26 23:17:31 +02:00
Gaetan Rivet
deff7fee91 vfio: check PCI dependency in PCI scan
PCI sometimes requires vfio to be enabled.
Move the check from EAL init to PCI bus scan.

Signed-off-by: Gaetan Rivet <gaetan.rivet@6wind.com>
2017-10-26 23:17:31 +02:00
Gaetan Rivet
308eb10706 vfio: remove useless PCI headers
PCI headers are not necessary and are making this module dependent on
the PCI subsystem.

Signed-off-by: Gaetan Rivet <gaetan.rivet@6wind.com>
2017-10-26 23:17:31 +02:00
Gaetan Rivet
279b581c89 vfio: expose functions
The following symbols are used by vfio implementations within the PCI bus.
They need to be publicly available for the PCI bus to be outside the
EAL.

  + vfio_enable;
  + vfio_is_enabled;
  + vfio_noiommu_is_enabled;
  + vfio_release_device;
  + vfio_setup_device;

Signed-off-by: Gaetan Rivet <gaetan.rivet@6wind.com>
2017-10-26 23:17:31 +02:00
Gaetan Rivet
821f86e0f4 eal: expose internal config elements
Some internal configuration elements set by the user on the command line
are necessary outside the EAL, when the PCI bus is detached.

Expose:
  + rte_eal_create_uio_dev
  + rte_eal_has_pci
  + rte_eal_vfio_intr_mode

Signed-off-by: Gaetan Rivet <gaetan.rivet@6wind.com>
2017-10-26 23:17:31 +02:00
Gaetan Rivet
701b6f4909 mem: expose function for physical address use
This function was previously private to the EAL layer.
Other subsystems requires it, such as the PCI bus.

In order not to force other components to include stdbool, which is
incompatible with several NIC drivers, the return type has
been changed from bool to int.

Signed-off-by: Gaetan Rivet <gaetan.rivet@6wind.com>
2017-10-26 23:17:31 +02:00
Gaetan Rivet
2a46c2a2f2 eal/x86: include common header
The macro RTE_SET_USED is defined in rte_common.h

This header is included through eal_private.h, which includes in turn
rte_pci.h

Once the PCI subsystem is out of the EAL, this will break the
compilation (seen on FreeBSD).

Signed-off-by: Gaetan Rivet <gaetan.rivet@6wind.com>
2017-10-26 23:17:31 +02:00
Gaetan Rivet
b27a200d03 eal: include stdint in private header
Signed-off-by: Gaetan Rivet <gaetan.rivet@6wind.com>
2017-10-26 23:17:31 +02:00
Gaetan Rivet
0af0c40d41 bus: include debug header
This header is included through rte_pci.h, which will be removed once
the PCI bus is moved out of the EAL.

Signed-off-by: Gaetan Rivet <gaetan.rivet@6wind.com>
2017-10-26 23:17:31 +02:00
Gaetan Rivet
9aa8a1823f ethdev: remove useless PCI dependency
Signed-off-by: Gaetan Rivet <gaetan.rivet@6wind.com>
2017-10-26 23:17:31 +02:00
Ferruh Yigit
65d3ba3264 eal: fix build with glibc < 2.12
build error:
  CC rte_cycles.o
  cc1: warnings being treated as errors
  ...dpdk/lib/librte_eal/common/arch/x86/rte_cycles.c: In function
  ‘rdmsr’:
  ...dpdk/lib/librte_eal/common/arch/x86/rte_cycles.c:67:2: error:
  implicit declaration of function ‘pread’
  ...dpdk/lib/librte_eal/common/arch/x86/rte_cycles.c:67:2: error:
  nested extern declaration of ‘pread’

from pread man page:
pread(), pwrite():
   _XOPEN_SOURCE >= 500
   || /* Since glibc 2.12: */ _POSIX_C_SOURCE >= 200809L

For glibc < 2.12 _XOPEN_SOURCE >= 500 is required.

Adding _GNU_SOURCE define to the file which implies _XOPEN_SOURCE=700

Fixes: ad3516bb4a ("eal/x86: implement arch-specific TSC freq query")

Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Sergio Gonzalez Monroy <sergio.gonzalez.monroy@intel.com>
2017-10-26 23:08:13 +02:00
Shreyansh Jain
a57bbb68d4 event/dpaa2: fix shared build
Fixes: cbc12b0a96 ("mk: do not generate LDLIBS from directory dependencies")
Fixes: b677d4c6d2 ("net/dpaa2: add API for event Rx adapter")

Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
2017-10-26 23:04:54 +02:00
Shreyansh Jain
22f5f3cb6b crypto/dpaa_sec: fix shared build
Various symbols are being used by DPAA Crypto driver which were not exposed
from DPAA bus during initial version. This breaks the shared build.

This patch also adds the LDLIBS line required after (cbc12b0a9) patch.

Fixes: c3e85bdcc6 ("crypto/dpaa_sec: add crypto driver for NXP DPAA platform")

Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2017-10-26 22:50:53 +02:00
Radu Nicolau
6115b677bc crypto/dpaa2_sec: forbid build without security lib
Build fails when rte_security is disabled; make rte_security mandatory

Fixes: 0a23d4b6f4 ("crypto/dpaa2_sec: support protocol offload IPsec")

Signed-off-by: Radu Nicolau <radu.nicolau@intel.com>
2017-10-26 22:46:58 +02:00
Radu Nicolau
1b028d5e81 examples/ipsec-secgw: fix build without security lib
Build fails when rte_security is disabled; make rte_security mandatory

Fixes: ec17993a14 ("examples/ipsec-secgw: support security offload")

Signed-off-by: Radu Nicolau <radu.nicolau@intel.com>
Tested-by: David Marchand <david.marchand@6wind.com>
2017-10-26 22:33:22 +02:00
Radu Nicolau
71864623ba net/ixgbe: fix build without security library
Fixes: 9a0752f498 ("net/ixgbe: enable inline IPsec")

Signed-off-by: Radu Nicolau <radu.nicolau@intel.com>
Tested-by: David Marchand <david.marchand@6wind.com>
2017-10-26 22:30:28 +02:00
David Harton
289ba0c0f5 ethdev: allow returning error on VLAN offload ops
Some devices may not support or fail setting VLAN offload
configuration based on dynamic circumstances so the
vlan_offload_set_t vector is modified to return an int so
the caller can determine success or not.

rte_eth_dev_set_vlan_offload is updated to return the
value provided by the vector when called along with restoring
the original offload configs on failure.

Existing vlan_offload_set_t vectors are modified to return
an int.  Majority of cases return 0 but a few that actually
can fail now return their failure codes.

Finally, a vlan_offload_set_t vector is added to virtio
to facilitate dynamically turning VLAN strip on or off.

Signed-off-by: David Harton <dharton@cisco.com>
Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
2017-10-26 02:33:01 +02:00
Tomasz Kulasek
6abd94d72a net/bonding: fix check slaves link properties
Result of slaves link properties validation is not used when new slave
is added.

This patch uses the value of link_properties_valid() to determinate if
slave can be used in the bonding. If function fails, error is returned
preventing to add slave with invalid link properties.

Coverity issue: 158661
Fixes: deba8a2f8b ("net/bonding: fix link properties management")
Cc: stable@dpdk.org

Signed-off-by: Tomasz Kulasek <tomaszx.kulasek@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2017-10-26 02:33:01 +02:00
Nélio Laranjeiro
5f64e6bfa1 net/mlx5: fix device stop with multiple regions
LIST macro are not safe when inside a LIST_FOREACH() a LIST_REMOVE() is
called to remove an entry, this behavior is undefined causing some entries
to disappear from the list.

Fixes: 6e78005a9b ("net/mlx5: add reference counter on DPDK Tx queues")

Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
2017-10-26 02:33:01 +02:00
Roger Melton
3ba62841c2 net/e1000: correct VLAN tag byte order for i35x LB packets
When copying VLAN tags from the RX descriptor to the vlan_tci field
in the mbuf header,  igb_rxtx.c:eth_igb_recv_pkts() and
eth_igb_recv_scattered_pkts() both assume that the VLAN tag is always
little endian.  While i350, i354 and /i350vf VLAN non-loopback
packets are stored little endian, VLAN tags in loopback packets (LB)
for those devices are big endian.

For i350, i354 and i350vf VLAN loopback packets, swap the tag when
copying from the RX descriptor to the mbuf header.  This will ensure
that the mbuf vlan_tci is always little endian.

Signed-off-by: Roger Melton <rmelton@cisco.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
2017-10-26 02:33:01 +02:00
Yongseok Koh
fb870be5a8 net/mlx5: fix Tx doorbell memory barrier
Configuring UAR as IO-mapped makes maximum throughput decline by
noticeable amount. If UAR is configured as write-combining register,
a write memory barrier is needed on ringing a doorbell.

rte_wmb() is mostly effective when the size of a burst is comparatively
small. Revert the register back to write-combining and enforce a write
memory barrier instead, except for vectorized Tx burst routines.
Application can change it by setting MLX5_SHUT_UP_BF under its own
necessity.

Fixes: 9f9bebae55 ("net/mlx5: don't map doorbell register to write combining")

Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
Acked-by: Shahaf Shuler <shahafs@mellanox.com>
Acked-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
2017-10-26 02:33:01 +02:00