14 Commits

Author SHA1 Message Date
Raja Zidane
2700326085 regex/mlx5: refactor HW queue objects
The mlx5 PMD for regex class uses an MMO WQE operated by the GGA engine
in BF devices.
Currently, all the MMO WQEs are managed by the SQ object.
Starting from BF3, the queue of the MMO WQEs should be connected to the
GGA engine using a new configuration, MMO, that will be supported only
in the QP object.
The FW introduced new capabilities to define whether the MMO
configuration should be configured for the GGA queue.
Replace all the GGA queue objects to QP, set MMO configuration according
to the new FW capabilities.

Signed-off-by: Raja Zidane <rzidane@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-10-05 18:15:40 +02:00
Michael Baum
29ca3215f3 regex/mlx5: fix memory region unregistration
The issue can cause illegal physical address access while a huge-page A
is released and huge-page B is allocated on the same virtual address.
The old MR can be matched using the virtual address of huge-page B but
the HW will access the physical address of huge-page A which is no more
part of the DPDK process.

Register a driver callback for memory event in order to free out all the
MRs of memory that is going to be freed from the DPDK process.

Fixes: cda883bbb655 ("regex/mlx5: add dynamic memory registration to datapath")
Cc: stable@dpdk.org

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Ori Kam <orika@nvidia.com>
2021-07-22 15:19:30 +02:00
Suanming Mou
330a70b773 regex/mlx5: add data path scattered mbuf process
UMR (User-Mode Memory Registration) WQE can present data buffers
scattered within multiple mbufs with single indirect mkey. Take
advantage of the UMR WQE, scattered mbuf in one operation can be
presented to an indirect mkey. The RegEx which only accepts one
mkey can now process the whole scattered mbuf in one operation.

The maximum scattered mbuf can be supported in one UMR WQE is now
defined as 64. The mbufs from multiple operations can be combined
into one UMR WQE as well if there is enough space in the KLM array,
since the operations can address their own mbuf's content by the
mkey's address and length. However, one operation's scattered mbuf's
can't be placed in two different UMR WQE's KLM array, if the UMR
WQE's KLM does not has enough free space for one operation, the
extra UMR WQE will be engaged.

In case the UMR WQE's indirect mkey will be over wrapped by the SQ's
WQE move, the mkey's index used by the UMR WQE should be the index
of last the RegEX WQE in the operations. As one operation consumes
one WQE set, build the RegEx WQE by reverse helps address the mkey
more efficiently. Once the operations in one burst consumes multiple
mkeys, when the mkey KLM array is full, the reverse WQE set index
will always be the last of the new mkey's for the new UMR WQE.

In GGA mode, the SQ WQE's memory layout becomes UMR/NOP and RegEx
WQE by interleave. The UMR and RegEx WQE can be called as WQE set.
The SQ's pi and ci will also be increased as WQE set not as WQE.

For operations don't have scattered mbuf, uses the mbuf's mkey directly,
the WQE set combination is NOP + RegEx.
For operations have scattered mbuf but share the UMR WQE with others,
the WQE set combination is NOP + RegEx.
For operations complete the UMR WQE, the WQE set combination is UMR +
RegEx.

Signed-off-by: John Hurley <jhurley@nvidia.com>
Signed-off-by: Suanming Mou <suanmingm@nvidia.com>
Acked-by: Ori Kam <orika@nvidia.com>
2021-04-08 22:52:55 +02:00
Viacheslav Ovsiienko
dd25bd201d regex/mlx5: support timestamp format
This patch adds support for the timestamp format settings for
the receive and send queues. If the firmware version x.30.1000
or above is installed and the NIC timestamps are configured
with the real-time format, the default zero values for newly
added fields cause the queue creation to fail.

The patch queries the timestamp formats supported by the hardware
and sets the configuration values in queue context accordingly.

Fixes: 92f2c6a30fe0 ("regex/mlx5: add send queue")
Cc: stable@dpdk.org

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Acked-by: Ori Kam <orika@nvidia.com>
2021-03-16 10:05:38 +01:00
Michael Baum
9de7b16015 regex/mlx5: move DevX SQ creation to common
Using common function for DevX SQ creation.

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-01-14 10:12:36 +01:00
Michael Baum
3ddf57069b regex/mlx5: move DevX CQ creation to common
Using common function for DevX CQ creation.

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-01-14 10:12:36 +01:00
Michael Baum
a165ee1ec1 regex/mlx5: fix leak on queue setup failure
In regex QP setup, the PMD creates some SQ objects.

When SQ object creation is failed, the previous SQ objects memory were
not freed what caused a memory leak.

Free them.

Fixes: 54fa1f6a67d7 ("regex/mlx5: add teardown for fastpath buffers")

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Ori Kam <orika@nvidia.com>
2020-11-22 15:05:54 +01:00
Yuval Avnery
cda883bbb6 regex/mlx5: add dynamic memory registration to datapath
Currently job data is being copied to pre-registered buffer.
To avoid memcpy on the datapath, use dynamic memory registration.

This change will reduce latency when sending regex jobs. The first few
jobs may have high latency due to registration, but assuming all
following mbufs will arrive from the same mempool/hugepage, there will
be no further memory registration.

Signed-off-by: Yuval Avnery <yuvalav@nvidia.com>
Acked-by: Ori Kam <orika@nvidia.com>
2020-10-06 01:11:45 +02:00
Yuval Avnery
54fa1f6a67 regex/mlx5: add teardown for fastpath buffers
Added missing code to free Input/Output buffers and memory
registration.
Also added calls to this code in case of error in the qp setup
procedure.
The rollback code itself did not handle rollback properly
and did not check return value from the fastpath setup.

Signed-off-by: Yuval Avnery <yuvalav@mellanox.com>
Acked-by: Ori Kam <orika@mellanox.com>
2020-09-09 00:27:41 +02:00
Yuval Avnery
0db041e71e regex/mlx5: support dequeue
Implement dequeue function for the regex API.

Signed-off-by: Yuval Avnery <yuvalav@mellanox.com>
Acked-by: Ori Kam <orika@mellanox.com>
2020-07-21 19:04:05 +02:00
Yuval Avnery
4d4e245ad6 regex/mlx5: support enqueue
Will look for a free SQ to send the job on.
doorbell will be given when sq is full, or no more jobs on the burst.

Signed-off-by: Yuval Avnery <yuvalav@mellanox.com>
Acked-by: Ori Kam <orika@mellanox.com>
2020-07-21 19:04:05 +02:00
Yuval Avnery
5f41b66d12 regex/mlx5: setup fast path
Allocated and register input/output buffers and metadata.

Signed-off-by: Yuval Avnery <yuvalav@mellanox.com>
Acked-by: Ori Kam <orika@mellanox.com>
2020-07-21 19:04:05 +02:00
Ori Kam
92f2c6a30f regex/mlx5: add send queue
This commit introduce the SQ creation.
The SQ is used for enqueuing a job.

In order to support out of order matches, we create number
os SQ per one application QP.

Signed-off-by: Ori Kam <orika@mellanox.com>
2020-07-21 19:04:05 +02:00
Ori Kam
fbc8c7003b regex/mlx5: add completion queue creation
This commit adds the creation of CQ

Signed-off-by: Ori Kam <orika@mellanox.com>
2020-07-21 19:04:05 +02:00