Commit Graph

402 Commits

Author SHA1 Message Date
Ying A Wang
3e4eab9c21 net/ice: add pattern manifest
The patch adds a manifest for all patterns which can be selected
by low level filter engine to compose their supported list.

Signed-off-by: Ying A Wang <ying.a.wang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-23 16:43:09 +02:00
Ying A Wang
7615a68950 net/ice: rework for generic flow enabling
The patch reworks the generic flow API (rte_flow) implementation.
It introduces an abstract layer which provides a unified interface
for low-level filter engine (switch, fdir, hash) to register supported
patterns and actions and implement flow validate/create/destroy/flush/
query activities.

The patch also removes the existing switch filter implementation to
avoid compile error. Switch filter implementation for the new framework
will be added in the following patch.

Signed-off-by: Ying A Wang <ying.a.wang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-23 16:43:09 +02:00
Qiming Yang
0998c89a85 net/ice: add devargs to control pipeline mode
Added a devarg to control the mode in generic flow API.
We use none-pipeline mode by default.

Signed-off-by: Qiming Yang <qiming.yang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-23 16:43:09 +02:00
Ying A Wang
23ecda2aa5 net/ice: clean up redundant assignment and indentations
The patch removes redundant code and cleans up some wrong indentations.

Signed-off-by: Ying A Wang <ying.a.wang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-23 16:43:09 +02:00
Leyi Rong
43840e9d69 net/ice: support RSS in AVX path
Support 32 bits RSS in FlexMD fields in AVX path.

Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
2019-10-23 16:43:09 +02:00
Leyi Rong
9c9f24e915 net/ice: support RSS in SSE path
Support 32 bits RSS in FlexMD fields in SSE path.

Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
2019-10-23 16:43:09 +02:00
Simei Su
47c90af057 net/ice: fix LUT type for RSS
This patch changes RSS lut_type to corresponding macro.

Fixes: ff963bfa7c ("net/ice: support RSS")
Cc: stable@dpdk.org

Signed-off-by: Simei Su <simei.su@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-10-23 16:43:09 +02:00
Haiyue Wang
83665e492f net/ice: fix protocol extraction devargs parsing
If the default dev args 'proto_xtr' is not in the first position, it
will overwrite the parsed queue map value, so use an new variable to
save the default.

And enhance the error message printing to show the right information.

Fixes: 7e124ff12c ("net/ice: support protocol extraction per Rx queue")

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-23 16:43:09 +02:00
Haiyue Wang
f93949c3af net/ice: fix memory leak on dev closed
The original protocol extraction memory free is removed by introducing
new design for releasing port upon close.

Fixes: bd513ece3c ("net/ice: release port upon close")

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-23 16:43:09 +02:00
Haiyue Wang
e9a10e6c21 net/ice: support Rx/Tx burst mode info
Retrieve burst mode options according to the selected Rx/Tx burst
function name.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-23 16:43:09 +02:00
Qi Zhang
93b59ccf12 net/ice/base: improve misc code style
Combine a couple of function definitions that can fit on one line.
RCT a variable declaration.

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-23 16:43:09 +02:00
Qi Zhang
5479b0aff7 net/ice/base: add QFI for flow director
Added the GTP QFI field to the Flow director interface to allow
matching against this field. Since this field only appears in GTP
packets with extension headers, this also requires adding profile
TCAM mask matching capability.  This allows comprehending different
PTYPE attributes by examining flags from the parser. Using this
method, different profiles can be used by examining flag values
from the parser.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-23 16:43:09 +02:00
Qi Zhang
d1a6a2da5d net/ice/base: fix switch rule programming for all profiles
In switch rule programming, if the caller requested tunnel type of
ICE_SW_TUN_AND_NON_TUN, then the code would incorrectly attempt to
add a tunneled UDP port in the training packet, this would cause the
rule addition to fail. This patch does not attempt to add the UDP
port so that the rule programming will succeed.

Fixes: c3d6ac02c0 ("net/ice/base: update switch training packets with open ports")

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-23 16:43:09 +02:00
Qi Zhang
d173b59d25 net/ice/base: fix flow raw field vector extraction
Correct the ordering of raw field extraction in the field vector
by taking into account the ordering setting for requesting block.

Fixes: aa1cd410fa ("net/ice/base: add flow module")
Cc: stable@dpdk.org

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-23 16:43:09 +02:00
Qi Zhang
98ba06d0b7 net/ice/base: fix unexpected switch rule overwrite
A switch rule with "drop" action will be overwritten by a
rule with same pattern match but with a "to queue" action.
While in an inversed flow creation sequence, the "to queue"
can't be overwritten by the "drop" rule.

The inconsistent behavior is not expected, the patch
fix the issue by preventing rule overwrite in both cases.

Fixes: fed0c5ca5f ("net/ice/base: support programming a new switch recipe")
Cc: stable@dpdk.org

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-23 16:43:09 +02:00
Qi Zhang
40dceddab7 net/ice/base: initialize structures to zero
Some functions create ice_pkg_enum structure, but it seems it's possible
some of the members are used un-initialized.  So we'll initialize all
instantiations of this structure within ice_flex_pipe.c

The patch also fix header comment mismatch issue for
ice_init_prof_result_bm

Signed-off-by: Jeb Cramer <jeb.j.cramer@intel.com>
Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-23 16:43:09 +02:00
Qi Zhang
65d934d5b1 net/ice/base: remove dead error condition
The pointer cmd is set to an address of a structure, which can never be
NULL.  Remove the check-for-NULL lines since it's dead code anyway.

Signed-off-by: Jeb Cramer <jeb.j.cramer@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-23 16:43:09 +02:00
Qi Zhang
34a0e7c44f net/ice/base: improve flow director masking
Currently, 3-tuple FD matching is implemented using masking. However,
this is using up twenty-four of the thirty-two FD masks available. This
patch uses the swap register more efficiently to implement the 3-tuple
matches, which saves all FD masks for other uses.

Added IPV6 versions of DSCP, TTL and Protocol fields for flow director
use.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-23 16:43:09 +02:00
Qi Zhang
76211f7c4a net/ice/base: support GTPU TEID for flow director
Added the training packet for GTPU TEID field to the Flow director to
allow matching against this field.

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-23 16:43:09 +02:00
Qi Zhang
a1da29ee80 net/ice/base: update flow packet type bitmaps
In the flow API, the outer first ptype bitmaps contained many
references to inner ptypes. Because of PTG assignments, these were
causing issues when programming rules on the inner ptypes.
For example, in RSS when programming the outer IPV6 hash fields,
it also programmed several inner IPV4 PTGs with the same extraction.

There were several ptypes that have been removed, thus this patch
removes those bits from the type bitmaps.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-23 16:43:09 +02:00
Qi Zhang
e15b319bd3 net/ice/base: fix NVGRE switch rule programming
Correct for GRE/NVGRE training packets to include the
correct protocol IDs for TCP and UDP respectively.

Fixes: b83a0c2903 ("net/ice/base: fix inner TCP and UDP support for GRE")
Cc: stable@dpdk.org

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-23 16:43:09 +02:00
Qi Zhang
2048f3a965 net/ice/base: fix adding PPPoE switch rule
Update VLAN protocol ID to correct value for single VXLAN scenario.
Fix the missing ethertype offset for PPPoE dummy packet offset to
allow matching the corresponding field.

Fixes: d1c2f76b44 ("net/ice/base: support GTP and PPPoE protocols")

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-23 16:43:09 +02:00
Gavin Hu
8669e6ae05 net/ice: use relaxed and remove duplicate barrier
To guarantee the orderings of successive stores to CIO and MMIO memory,
a lighter weight rte_io_wmb [1] can be used instead of rte_wmb, and since
the ICE_PCI_REG_WRITE API already has an inclusive rte_io_wmb, this
explicit call can even be saved.

[1] http://git.dpdk.org/dpdk/tree/lib/librte_eal/common/include/generic/
rte_atomic.h#n98

Signed-off-by: Gavin Hu <gavin.hu@arm.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-10-08 12:14:30 +02:00
Stephen Hemminger
c67c8c5c14 net/ice: use dynamic log type for Tx/Rx debug
The generic RTE_LOGTYPE_PMD is a historical relic and should
not be used. Every driver must dynamic log types.

Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2019-10-07 15:00:58 +02:00
Chenxu Di
bd513ece3c net/ice: release port upon close
Set RTE_ETH_DEV_CLOSE_REMOVE upon probe so all the private resources
 for the port can be freed by rte_eth_dev_close().

Signed-off-by: Chenxu Di <chenxux.di@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:57 +02:00
Haiyue Wang
13676bd300 net/ice: remove legacy Rx descriptor definition
Since now the ice PMD only handles Rx Flex descriptor, so remove the
legacy descriptor definition.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-10-07 15:00:56 +02:00
Leyi Rong
4ab7dbb0a0 net/ice: switch to Rx flexible descriptor in AVX path
Switch to Rx flexible descriptor format instead of legacy
descriptor format.

Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-10-07 15:00:56 +02:00
Wenzhuo Lu
ece1f8a8f1 net/ice: switch to flexible descriptor in SSE path
With this path, the flexible descriptor is supported
in SSE path. And the legacy descriptor is not supported.

Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-10-07 15:00:56 +02:00
Haiyue Wang
7e124ff12c net/ice: support protocol extraction per Rx queue
The ice has the feature to extract protocol fields into flex descriptor
by programming per queue. Currently, the ice PMD will put the protocol
fields into rte_mbuf::udata64 with different type format. Application
can access the protocol fields quickly.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-10-07 15:00:56 +02:00
Haiyue Wang
dbf3c0e77a net/ice: handle Rx flex descriptor
Set the RXDID with flex descriptor type by default, change the Rx
function to support new descriptor handling.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-10-07 15:00:56 +02:00
Haiyue Wang
ae2e9514ee net/ice: add Rx flex descriptor definition
The Rx flex descriptor has 16B and 32B size, with different
field definitions compared to legacy type.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
3ac83b1141 net/ice/base: remove unused code
Remove unused code.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
53c4d83e41 net/ice/base: support switch for IPv6 TC field
Add support for IPv6 traffic class (tc) field for switch rule.
Correct ice_ipv6_hdr based on the IPv6 Protocol using bitfields.
Add big/little endian convert for tc field before it is inserted,
since tc is only one byte and also does not have a byte-aligned
offset.

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
f19c0a84c5 net/ice/base: fix packet type bitmap
Before this patch, IPv4 and UDP inner hash rule will be over
written by later rules after RSS initialization phase. This is
because the PTYPE bitmap table cover some PTYPEs belong to another
PTGs. And some PTYPEs are reserved. Remove these PTYPEs in TCP,
UDP, SCTP and ipv4 bitmap table.

Fixes: aa1cd410fa ("net/ice/base: add flow module")

Signed-off-by: Zhirun Yan <zhirun.yan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
8dad92662b net/ice/base: fix alignment
As title says, fix an alignment issue.

Fixes: 51d04e4933 ("net/ice/base: add flexible pipeline module")
Cc: stable@dpdk.org

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
fadf46b1ee net/ice/base: use bitmap copy where appropriate
ice_cp_bitmap() already exists and should be used instead of
using ice_memcpy().  Note, there are a couple comments that suggest
using a bitmap-specific copy function, but those are not correct
since the source block of memory is not a bitmap.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
737dcad0f8 net/ice/base: remove unnecessary error log
Remove the error log message when attempting to download a
package that has an unsupported version.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
4831259477 net/ice/base: fix 4 bytes alignment for PPPoE dummy packet
Add two bytes to meet the requirement of 4 bytes alignment for dummy
packet for creating switch rule for PPPoE.

Fixes: d1c2f76b44 ("net/ice/base: support GTP and PPPoE protocols")

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
2ed5eb0caa net/ice/base: search field vector indices for result slots
Previously, switch code would use only pre-reserved index
slots at the end of each field vector for recipe result index
locations. This patch adds code that detects other internal
empty index slots that could potentially be used. For each
recipe that is added, a determ ination is made as to whether
any of these additional index slots alige with all the profiles
selected for the recipe; if alignment is achieved, then these
result index slots can be used.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
ef2bf3dee2 net/ice/base: remove unused DDP package macros
Macros no longer be used and can be removed

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
0dc55879ce net/ice/base: fix segment in remove existing RSS rule
Before this patch, RSS tunneled rules can not be destroyed at runtime.
This is because it can not find the existing matching profile for tunnels.
segs[0] should always be zero and all matched, segs[1] for inner part.
It only construct one segment.

This patch modifies construct segment in ice_rem_rss_cfg_sync() to
match ice_add_rss_cfg_sync().

Fixes: b7d34ccc47 ("net/ice/base: packet encapsulation for RSS")

Signed-off-by: Zhirun Yan <zhirun.yan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
7818106ce6 net/ice/base: fix bitmap for TCP in RSS
Before this patch, if set rule for IPv4 first and then set rule
for TCP with IPv4. The first rule for inner IP will be overwritten
by TCP rule. This is because MAC_IPV6_TUN_MAC_IPV4_PAY using the
same ptgs PTG_TUN_INNER_IPV4_OTHER with MAC_IPV4_TUN_MAC_IPV4_PAY,
this ptype should not in TCP bitmap.
Remove this bit in TCP bitmap.

Fixes: aa1cd410fa ("net/ice/base: add flow module")
Cc: stable@dpdk.org

Signed-off-by: Zhirun Yan <zhirun.yan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
b5c274f4e2 net/ice/base: support FDIR for GTPU QFI field
Add GTPU qfi field support for flow director. Note that for GTPU pkt,
only qfi field (6 bits) can be set for FD. The supported GTPU pkts are
defined as:
ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_UDP,
ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_TCP,
ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_ICMP,
ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_OTHER (FRAG and PAY belong to this)

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
3a010f01d3 net/ice/base: replace alloc-followed-by-copy with memdup
ice_memdup() is preferred over an alloc immediately followed by a copy.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
ddae044035 net/ice/base: enable symmetric hash for RSS
Add parameter "symm" to rss configuration APIs.
When symm is 1, Symmetric Teoplitz Hash can be enabled by
configuring GLQF_HSYMM properly.

NOTE:
Symmetric Teoplitz hash will work only if hash schema of
VSIQF_HASH_CTL be configured to 01b and it is assumed be enabled
in PMD.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
29897f43a1 net/ice/base: update FW API minor version
Update FW API minor version to align to current value advertised
by FW in NVM images.

Signed-off-by: Kevin Scott <kevin.c.scott@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
bf8d075f73 net/ice/base: support destination MAC field for FDIR
Add dest MAC address support so that this field can be matched when
we set Flow Director filter with dst addr for MAC.

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
70b14768e3 net/ice/base: enable setting up FDIR counters
Enable getting value from input to set up flow director counters,
so that the FDIR counters can count none, packets only, bytes only
or both packets and bytes as demanded.

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
34c6724765 net/ice/base: enable FDIR queue region
Add fdir queue region support.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
b2ad03452a net/ice/base: enable RSS for PPPoE with SCTP
Add two ptypes(MAC_PPPOE_IPV4_SCTP and MAC_PPPOE_IPV6_SCTP) in
sctp ptype bitmap to enable rss.

Signed-off-by: Zhirun Yan <zhirun.yan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
d6eed0ddb4 net/ice/base: associate switch recipe to profiles
Properly associate switch recipes to profiles. Previous code was
using the wrong bitfield for updating the associations, which was
causing other PFs to not properly identify and use existing
recipes. This sometimes resulted in rules not being added when it
should have been possible.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
a4b14d3939 net/ice/base: refactor data structure
When declaring the ice_prot_ext, and ice_prot_id_tbl structure,
we can use a fixed length array instead of a variable length one
which helps us catch future code changes that might desynchronize
the enum ice_protocol_type and the structs.  This change also
necessitates removing the last member of the structs which was
just there to be a placeholder.

Also reorder the ice_prot_ext struct to match the ordering in the
associated enum ice_protocol_type.

Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
5037444203 net/ice/base: support switch rule about VLAN PPPoE
Add support for switch rule about single-VLAN-PPPoE. Note that double
VLAN is not supported by the hardware at this point, therefore only
single-VLAN support for PPPoE is added.

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
333e5c9d43 net/ice/base: remove RSS code as iavf host
The DPDK PF doesn't support SRIOV so remove the related iavf host
code.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
cfaeec82d2 net/ice/base: remove null check of port info
The code in ice_sched_cleanup_all checks whether the port info is NULL
prior to calling ice_sched_clear_port.

More importantly, it also checks whether the port structure has been
initialized by checking its port_state field as well.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
bb8851a31d net/ice/base: propagate errors from functions
There could be an error returned from ice_fill_adv_dummy_packet()
so we need to propagate that to the caller. Additionally, the
call to ice_flow_xtract_pkt_flags() could also return an error so
we need to propagate it as well.

Also add in the correct offsets for GENEVE and VXLAN_GPE to the
dummy packets.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
e7858c8b4a net/ice/base: fix mask for checking protocol header
Before this patch, the logic of protocol header checking only support
non-tunneled packet. This patch remove the inner protocol in L3/L4 RSS
seg hdr mask and change the protocol header validation to reflect this.
So, for ice_add_rss_cfg(), the last parameter addl_hdrs could specify
the protocol header for tunnel.

Signed-off-by: Zhirun Yan <zhirun.yan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:55 +02:00
Qi Zhang
b726c1a865 net/ice/base: add non-word aligned IPv6 field support
Add non-word aligned field support for IPv6 with hlim, tc and proto.
All these fields are one byte within one word. In order to match
bytes within the IPv6 header for flow director we need to use a mask.

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:55 +02:00
Qi Zhang
04e0690800 net/ice/base: add non-word aligned IPv4 field support
Add non-word aligned field support for ipv4 with ttl, tos and proto.
All these fields are one byte within one word. In order to match
bytes within the IPv4 header for flow director we need to use a mask.

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:55 +02:00
Qi Zhang
f344a9e11d net/ice/base: support tunnel packets
Add VXLAN tunnel training packets to flow director and change the
interface to support tunnel packets.

Signed-off-by: Henry Tieman <henry.w.tieman@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:55 +02:00
Qi Zhang
6b1172d4dc net/ice/base: remove redundant empty lines
Remove redundant empty lines

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:55 +02:00
Ivan Ilchenko
ca041cd44f ethdev: change allmulticast callbacks to return status
Enabling/disabling of allmulticast mode is not always successful and
it should be taken into account to be able to handle it properly.

When correct return status is unclear from driver code, -EAGAIN is used.

Signed-off-by: Ivan Ilchenko <ivan.ilchenko@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Acked-by: Hyong Youb Kim <hyonkim@cisco.com>
2019-10-07 15:00:55 +02:00
Igor Romanov
9970a9ad07 ethdev: make stats and xstats reset callbacks return int
Change return value of the callbacks from void to int. Make
implementations across all drivers return negative errno
values in case of error conditions.

Both callbacks are updated together because a large number of
drivers assign the same function to both callbacks.

Signed-off-by: Igor Romanov <igor.romanov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2019-10-07 15:00:54 +02:00
Andrew Rybchenko
9039c81257 ethdev: change promiscuous callbacks to return status
Enabling/disabling of promiscuous mode is not always successful and
it should be taken into account to be able to handle it properly.

When correct return status is unclear from driver code, -EAGAIN is used.

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Acked-by: Matan Azrad <matan@mellanox.com>
Acked-by: Hyong Youb Kim <hyonkim@cisco.com>
2019-10-07 15:00:54 +02:00
Ting Xu
03a05924da net/ice: support device-specific DDP package loading
This patch adds the feature that supports loading DDP package
according to the device serial number. Prior to loading the
default DDP package (ice.pkg), the driver will check for the
presence of a device-specific DDP package with the name containing
64-bit PCIe Device Serial Number (ice-xxxxxxxxxxxxxxxx.pkg)
during initialization. Users can use "lspci -vs" to get the device
serial number.
The pkg search path are /lib/firmware/updates/intel/ice/ddp/
and /lib/firmware/intel/ice/ddp/. If the package exists,
the driver will download it to the device instead of the default
one. The loaded package type (OS default and COMMS) will be
stored in ice_adapter->active_pkg_type. The package version is
stored in ice_hw->active_pkg_ver.

Signed-off-by: Ting Xu <ting.xu@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
3ba381eb65 net/ice/base: ignore inverse switch recipes
When looking for an existing recipes, never choose an inverse
recipe as these are used for anti-spoofing. Choosing inverse
recipes for source MAC address rules was causing errors while
adding the rule.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
8c1c61f970 net/ice/base: update profile to recipe bitmap array
Correctly update profile to recipe bitmap array after adding and
associating recipes. This fixes an issue where determining unused
recipe result index slots was incorrect.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
9b6f0c969b net/ice/base: add GENEVE offset
Add Geneve offset for tunneled packets to allow dummy packets to be
properly created.

Signed-off-by: Doug Dziggel <douglas.a.dziggel@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
c5adb3c448 net/ice/base: enable RSS with ether layer for PPPoE
Add these two ptype(MAC_PPPOD_PAY and MAC_PPPOE_PAY) in outer mac
bitmap, so it can hash for outer mac.

Signed-off-by: Zhirun Yan <zhirun.yan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
661264d19f net/ice/base: remove Rx flex descriptor programming
Removing Rx flex descriptor metadata and flag programming from the code,
these registers cannot be written to as they are read only.
The programming for all fields per RxDID is now handled differently.

Signed-off-by: Vignesh Sridhar <vignesh.sridhar@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
f4f79aa849 net/ice/base: add AQC get link topology handle support
Add AQC get link topology handle support. This is needed to determine
Direct Attach (DA) or backplane media type for PHY types that support
either. Get link topology handle cage node type request can be used to
determine if a cage is present or not. If a cage is present for PHY
types that supports both DA and backplane media type, then the media
type is DA, else the media type is backplane.

Signed-off-by: Paul Greenwalt <paul.greenwalt@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
fc882012b3 net/ice/base: delay less
Shorten the delay for SQ responses, but increase the number of loops.
Max delay time is unchanged, but some operations complete much more
quickly.

In the process, add a new define to make the delay count and delay time
more explicit, and simplify the code so it's the same for both switch
and NIC mode. Add comments to make things more explicit.

Signed-off-by: Mitch Williams <mitch.a.williams@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
82f3e28d23 net/ice/base: replace open-code duplication
Use BIT_ULL() instead of ICE_FLOW_HASH_FLD() which does the same bit shift
operation.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
8b4cd4eda0 net/ice/base: update to register definition file
Added register definitions for GL_MDCK_TX_TDPU and GL_MDET_TX_TDPU.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
6632c0556d net/ice/base: correct abbreviations
Correct abbreviation issues found by running abbrevcheck.

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
e123d30f4a net/ice/base: remove unnecessary if branch
We are already in the branch "if (fm_list->vsi_count == 1)"
no need to exit and re-enter.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
dbe449e5dc net/ice/base: remove unnecessary dummy packet finding
We don't need to find a dummy packet when removing a rule so remove
the call to get the dummy packet. This also obviates some variables
so remove them also.

Also reduce the scope of rule_buf_sz.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
c3d6ac02c0 net/ice/base: update switch training packets with open ports
This patch updates UDP tunneled training packets with an appropriate
UDP dest port. For the correct profile to be chosen, an open tunnel
port must be included in the training packet.

Added GENEVE tunnel labels in the test package in order to test GENEVE
tunnel rule creation.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
c932653c36 net/ice/base: maximize switch recipe words per line
Remove grouping rules to maximize the number of words placed into
a recipe line. This will allow more recipes to be added by reducing
the number of result indices required.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
58f116731d net/ice/base: refactor removal of VLAN promiscuous rules
Currently ice_clear_vsi_promisc() detects if the VLAN ID sent is not 0
and sets the recipe_id to ICE_SW_LKUP_PROMISC_VLAN in that case and
ICE_SW_LKUP_PROMISC if the VLAN_ID is 0. However this doesn't allow VLAN
0 promiscuous rules to be removed, but they can be added. Fix this by
checking if the promisc_mask contains ICE_PROMISC_VLAN_RX or
ICE_PROMISC_VLAN_TX. This change was made to match what is being done
for ice_set_vsi_promisc().

Signed-off-by: Brett Creeley <brett.creeley@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
21b28a9ef7 net/ice/base: fix flag settings in AQ call
Removed setting Read flag in the Get Allocated Resource Descriptors AQ
command (0x020A). The read flag is not required for this command and
causes the FW to return an error.

Fixes: d781ccbdd1 ("net/ice/base: add functions to get allocated resources")
Cc: stable@dpdk.org

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
b32be950a3 net/ice/base: remove unnecessary conditional check
There is no reason to do this conditional check before the assignment so
simply remove it.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
2aaf1d1b67 net/ice/base: add RSS support for PPPoE and GTPU
Added RSS support for PPPoE with inner TCP and UDP.
Added RSS support for GTPU with IPv4 and IPv6.

Signed-off-by: Zhirun Yan <zhirun.yan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
b7d34ccc47 net/ice/base: packet encapsulation for RSS
RSS configurations calls currently support only non-tunneled packets,
which uses outer-first IPs. Adding another call to configure RSS for
tunneled packets which will enable hashing on inner-last IP. RSS hash
will only be done on the innermost IP.
- Update RSS configuration calls to take packet segment count as input
  argument
- Update flow profile ID to include identifier for encapsulated packet
  [0:31] : Packet match fields
  [32:62]: Protocol header header
  [63]: Encapsulation flag, 0 if non-tunneled, 1 if tunneled

Signed-off-by: Vignesh Sridhar <vignesh.sridhar@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
12f6ea93f0 net/ice/base: fix for RSS hash on inner UDP port
Before this patch, only outer IP with inner UDP port can appear in
RSS hash, because the extraction sequence uses outer IP protocol
ID with Inner UDP protocol ID. ICE_PROT_UDP_OF always extracts the
TUNNELED UDP port values (i.e., 4789 for VXLAN). ICE_PROT_UDP_IL_OR_S
will extract NON-TUNNELED UDP port or inner UDP port.

Fixes: aa1cd410fa ("net/ice/base: add flow module")
Cc: stable@dpdk.org

Signed-off-by: Zhirun Yan <zhirun.yan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
282bd7d78d net/ice/base: consolidate packet type group
This patch is an optimization to decrease the number of TCAM entries
used in the profile blocks, especially for RSS. To be most effective
this will also require a package change in order to decrease the number
of PTYPE groups necessary to program RSS, FD and ACL rules.

Change required package version to 1.3.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
56c0ab4405 net/ice/base: add routine for tunnel port query
Add ice_get_open_tunnel_port routine, which can be used to find
an open tunnel port for creating switch and flow director training
packets.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
f636f2888c net/ice/base: move and add some help function and macros
The patch move ice_ilog2 and ice_is_pow2 to ice_type.h, also add help
macro ROUND_UP and IS_ETHER_ADDR_EQUAL.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
eda40e22b8 net/ice/base: improve switch chained recipe
When updating switch database with chained recipes from
firmware, where a null pointer derefence was occurring due to looking
into a sub-recipe entry which is not filled in.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
8b6e6e4024 net/ice/base: update UDP tunnel switch training packets
Change UDP tunnel training packets for the switch to work for both
Geneve and VXLAN cases.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
aa6ff47ad8 net/ice/base: return switch error on invalid match criteria
Modify ice_add_adv_rule to return an error when an invalid match
criteria is requested by the caller. This happens when the protocol
and offset pair is not supported by the package.

This change required a fix for the offset in the VXLAN GPE header,
and also found an issue with NVGRE where the package does not seem
to extract the correct offsets.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
55744222e6 net/ice/base: associate recipes by profile type
Change recipe to profile association logic to determine the profile type
to determine if a profile is compatible with the rule being added.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
54f75a4ce2 net/ice/base: support not locking sideband queue
For certain PTP clock adjustments, there is a use case for locking the
sideband queue at a higher level and performing an atomic series of
operations while the sideband queue is locked.  To accommodate this use
case, split ice_sw_send_cmd() into a version that takes the lock and a
version that does not.

Signed-off-by: Ben Shelton <benjamin.h.shelton@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
d1880ece7d net/ice/base: add function to configure Tx AQ command
This function is needed by the driver to move PSM leaf nodes to a new
parent.

Additionally, add struct ice_aqc_move_txqs to struct ice_aq_desc so
driver code can access it.

Signed-off-by: Ben Shelton <benjamin.h.shelton@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
5f9c389466 net/ice/base: initialize driver NVM data earlier
The driver detects and warns about FW rollback mode before getting the NVM
version (through ice_init_nvm) which results in "0.00 0x0 0.0.0" being
printed. Fix this by calling ice_init_nvm earlier.

This could have been fixed by moving ice_print_rollback_msg as well, but
it made more sense to move ice_init_nvm closer to the flow that gets the
FW version information (i.e. control queue init flow).

Signed-off-by: Anirudh Venkataramanan <anirudh.venkataramanan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
381bd0f265 net/ice/base: set status when global cfg lock is unavailable
To download the DDP file to the device, a PF first has to grab the
global configuration lock. When a PF can't grab this lock, set
hw->pkg_dwnld_status to ICE_AQ_RC_EEXIST.

Signed-off-by: Anirudh Venkataramanan <anirudh.venkataramanan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
3b326f5945 net/ice/base: add more opcode and macros
Add more opcode and macros:

1. Add opcode for the NVM Update EMPR command.
2. Add opcode for NVM save factory settings
3. Add opcode for NVM Write/Write Activate calls
4. Add loopback reporting to get link response macros
5. Add link event defines macros

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
7b6b3886de net/ice/base: update flag bits
Currently the VLAN ice_flg64_bits are off by 1. Fix this by
setting the ICE_FLG_EVLAN_x8100 flag to 14, which also updates
ICE_FLG_EVLAN_x9100 to 15 and ICE_FLG_VLAN_x8100 to 16.

Signed-off-by: Brett Creeley <brett.creeley@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
a6d7b12cab net/ice/base: add 32-byte Flex Rx descriptor
Add 32-byte Flex RX Descriptor structure definition.

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
2ebf458473 net/ice/base: add 16-byte Flex Rx descriptor
Add 16-byte Flex RX descriptor structure definition.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00