Commit Graph

19488 Commits

Author SHA1 Message Date
Jerin Jacob
7fa2537226 bpf: hide internal program argument type
RTE_BPF_ARG_PTR_STACK is used as internal program
arg type. Rename to RTE_BPF_ARG_RESERVED to
avoid exposing internal program type.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Tested-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
2019-10-12 14:27:19 +02:00
Jerin Jacob
082482cef4 bpf/arm: add branch operation
Add branch and call operations.

jump_offset_* APIs used for finding the relative offset
to jump w.r.t current eBPF program PC.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
2019-10-12 14:20:29 +02:00
Jerin Jacob
2acfae37f6 bpf/arm: add atomic-exchange-and-add operation
Implement XADD eBPF instruction using STADD arm64 instruction.
If the given platform does not have atomics support,
use LDXR and STXR pair for critical section instead of STADD.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
2019-10-12 14:20:29 +02:00
Jerin Jacob
e00906bdc7 bpf/arm: add load and store operations
Add load and store operations.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
2019-10-12 14:20:29 +02:00
Jerin Jacob
2b6d22fa9a bpf/arm: add byte swap operations
add le16, le32, le64, be16, be32 and be64 operations.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
2019-10-12 14:20:29 +02:00
Jerin Jacob
9f4469d9e8 bpf/arm: add logical operations
Add OR, AND, NEG, XOR, shift operations for immediate
and source register variants.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
2019-10-12 14:20:29 +02:00
Jerin Jacob
111e2a747a bpf/arm: add basic arithmetic operations
Add mov, add, sub, mul, div and mod arithmetic
operations for immediate and source register variants.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
2019-10-12 14:20:28 +02:00
Jerin Jacob
f3e5167724 bpf/arm: add prologue and epilogue
Add prologue and epilogue as per arm64 procedure call standard.

As an optimization the generated instructions are
the function of whether eBPF program has stack and/or
CALL class.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
2019-10-12 14:20:25 +02:00
Jerin Jacob
6861c01001 bpf/arm: add build infrastructure
Add build infrastructure and documentation
update for arm64 JIT support.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
2019-10-12 14:20:21 +02:00
Pavan Nikhilesh
fc8b96fbc0 app/eventdev: add options for mbuf and packet sizes
Add options to set mbuf size and max packet size which allow the user to
enable jumbo frames and Rx/Tx scatter gather.
Arrange `struct evt_options` based on ascending order of data type to
make it more readable.

Packet mbuf size can be modified by using `--mbuf_sz=N`.
Max packet size can be modified by using `--max_pkt_sz=N`.
These options are only applicable `pipeline_atq` and `pipeline_queue`
tests.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2019-10-05 15:39:31 +02:00
Hemant Agrawal
a439f6227c test/event: enable dpaa2 self test
This patch add the support to include dpaa2 event test
from the test framework.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2019-10-05 15:39:31 +02:00
Hemant Agrawal
653242c337 event/dpaa2: add self test
This patch add support for testing dpaa2 eventdev self test
for basic sanity for parallel and atomic queues.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2019-10-05 15:39:31 +02:00
Nipun Gupta
68bc970461 event/dpaa2: add retry break in packet enqueue
The patch adds the break in the TX function, if it is failing
to send the packets out. Previously the system was trying
infinitely to send packet out.

Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
2019-10-05 15:39:31 +02:00
Hemant Agrawal
febcd5a5b3 event/dpaa2: support destroy
This patch add support to destroy the event device

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2019-10-05 15:39:31 +02:00
Hemant Agrawal
fc0acd6ac5 event/dpaa2: remove conditional compilation
This patch removes the conditional compilation for
cryptodev event support from RTE_LIBRTE_SECURITY flag.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2019-10-05 15:39:31 +02:00
Hemant Agrawal
6f213fe940 event/dpaa2: fix default queue configuration
Test vector expect only one type of scheduling as default.
The old code is provide support scheduling types instead of default.

Fixes: 13370a3877 ("eventdev: fix inconsistency in queue config")
Cc: stable@dpdk.org

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2019-10-05 15:39:31 +02:00
Hemant Agrawal
49e74e0876 test/event_crypto: check adapter config failure
Return error when the adapter creation fails.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Abhinandan Gujjar <abhinandan.gujjar@intel.com>
2019-10-05 15:39:31 +02:00
Hemant Agrawal
b2196237eb test/event_crypto: change cipher algo
The existing code uses NULL as the cipher algo
for testing crypto event adapter.
DPAA1/DPAA2 do not support NULL algo. Hence changing
it to the most common algo AES-CBC, which is supported
by all crypto drivers implementing event crypto adapter.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Abhinandan Gujjar <abhinandan.gujjar@intel.com>
2019-10-05 15:39:31 +02:00
Hemant Agrawal
fd52587380 test/event_crypto: fix mempool name
The longer mempool name size is causing error in
rte_mempool_create_empty for dpaa1

ret = snprintf(mz_name, sizeof(mz_name), RTE_MEMPOOL_MZ_FORMAT, name);
This patch reduce the size of mempool name string

Fixes: 24054e3640 ("test/crypto: use separate session mempools")
Cc: stable@dpdk.org

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Abhinandan Gujjar <abhinandan.gujjar@intel.com>
2019-10-05 15:39:31 +02:00
Pavan Nikhilesh
26351696ff event/octeontx2: fix Rx adapter capabilities
Octeontx2 SSO co-processor allows multiple ethernet device Rx queues
connected to a single Event device queue.
Fix the Rx adapter capabilities to allow application to configure
Rx queueus in n:1 ratio to event queues by adding
`RTE_EVENT_ETH_RX_ADAPTER_CAP_MULTI_EVENTQ` as a capability.

Fixes: 37720fc1fb ("event/octeontx2: add Rx adapter")
Cc: stable@dpdk.org

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-10-05 15:39:31 +02:00
Gage Eads
d02c470c87 event/sw: fix xstats reset value
The sw PMD implements xstats reset by having the xstat get operations
return a value to the statistic's value at the last reset. The value at the
last reset is maintained in the per-xstat reset_value field, but the PMD
was setting reset_value = current - reset_value instead of reset_value =
current.

Fixes: c1ad03df7a ("event/sw: support xstats")
Cc: stable@dpdk.org

Signed-off-by: Gage Eads <gage.eads@intel.com>
Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
2019-10-05 15:39:31 +02:00
Hemant Agrawal
aa026482ba test/event_crypto: no service core when HW support available
If HW support is available, service core shall not come
into play by default. This shall be for both FWD/NEW modes.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Abhinandan Gujjar <abhinandan.gujjar@intel.com>
2019-10-05 15:39:31 +02:00
Hemant Agrawal
083a59695e test/event_crypto: check session init failure
Mismatch in algo or sec capability can cause session to fail.
This patch handle it and return error timely.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Abhinandan Gujjar <abhinandan.gujjar@intel.com>
2019-10-05 15:39:31 +02:00
Viacheslav Ovsiienko
cc8627bc6d net/mlx5: fix direct call to rdma-core library
The routine mlx5dv_query_devx_port() was called directly
instead of using the mlx5 glue thunk.

Fixes: d5c06b1b10 ("net/mlx5: query vport index match mode and parameters")

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2019-10-08 12:14:32 +02:00
Viacheslav Ovsiienko
fbc8341218 net/mlx5: fix device scan within switch domain
In LAG configuration the devices in the same switch domain
might be spawned on the base of different PCI devices, so
we should check all devices backed by mlx5 PMD whether they
belong to specified switch domain. When the new devices are
being created it is not possible to detect whether the
sibling devices created in the current probe() loop belong
to the driver, driver field is not filled yet (it will be
done on returned success of current probe()). This patch
updates the device scanning, allowing extra match on
current backing PCI device, is being used to create siblings.

Fixes: f7e95215ac ("net/mlx5: extend switch domain searching range")

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2019-10-08 12:14:32 +02:00
Viacheslav Ovsiienko
b53cd86965 net/mlx5: adjust inline setting for large Tx queue sizes
The hardware may have limitations on maximal amount of
supported Tx descriptors building blocks (WQEBB). Application
requires the Tx queue must accept the specified amount of packets.
If inline data feature is engaged the packet may require more WQEBBs
and overall amount of blocks may exceed the hardware capabilities.
Application has to make a trade-off between Tx queue size and maximal
data inline size.

In case if the inline settings are not requested explicitly with
devarg keys the default values are used. This patch adjusts the
applied default values if large Tx queue size is requested and
default inline settings can not be satisfied due to hardware
limitations.

The explicitly requested inline setting may be aligned (enlarging
only) by configurations routines to provide better WQEBB filling,
this implicit alignment is the subject for adjustment either.

The warning message is emitted to the log if adjustment happens.

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2019-10-08 12:14:32 +02:00
Rahul Lakkireddy
97e02581a1 net/cxgbe: fix races on flow API operations
When rules are being inserted from multiple cores, there are several
race conditions during rte_flow operations.

For example, when inserting rules from 2 cores simultaneously, both
the cores try to fetch a free available filter entry and they both
end up fetching the same entry. Both of them start overwriting the
same filter entry before sending to firmware, which results in wrong
rule being inserted to hardware.

Fix the races by adding spinlock to serialize the rte_flow operations.

Fixes: ee61f5113b ("net/cxgbe: parse and validate flows")
Fixes: 9eb2c9a480 ("net/cxgbe: implement flow create operation")
Fixes: da23bc9d33 ("net/cxgbe: implement flow destroy operation")
Fixes: 8d3c12e193 ("net/cxgbe: implement flow query operation")
Fixes: 86910379d3 ("net/cxgbe: implement flow flush operation")
Cc: stable@dpdk.org

Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
2019-10-08 12:14:32 +02:00
Lance Richardson
483e0691f0 net/bnxt: improve CPR handling in vector path
Reduce overhead of CPR descriptor validity checking in vector
receive and transmit functions.

Preserve raw cpr consumer index in vector transmit completion
function.

Remove an unneeded prefetch (per benchmarking) from vector
transmit completion function.

Fixes: bc4a000f2f ("net/bnxt: implement SSE vector mode")
Cc: stable@dpdk.org

Signed-off-by: Lance Richardson <lance.richardson@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2019-10-08 12:14:32 +02:00
Lance Richardson
94d4afd2d1 net/bnxt: advertise scatter Rx offload capability
Scattered receive is supported but not included in receive offload
capabilities. Fix by adding it and including in scattered receive
calculation.

Fixes: 9c1507d96a ("net/bnxt: switch to the new offload API")
Cc: stable@dpdk.org

Signed-off-by: Lance Richardson <lance.richardson@broadcom.com>
Reviewed-by: Somnath Kotur <somnath.kotur@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2019-10-08 12:14:32 +02:00
Lance Richardson
13d3780df6 net/bnxt: fix default Rx queue for Thor
Use first receive queue assigned to VNIC as the default receive queue
when configuring Thor VNICs. This is necessary e.g. in order for flow
redirection to a specific receive queue to work correctly.

Fixes: f8168ca0e6 ("net/bnxt: support thor controller")
Cc: stable@dpdk.org

Signed-off-by: Lance Richardson <lance.richardson@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2019-10-08 12:14:32 +02:00
Lance Richardson
74721ba062 net/bnxt: fix stats context calculation
The required number of statistics contexts is computed as the sum
of the number of receive and transmit rings plus one for the async
completion ring. A statistics context is not actually required for
the async completion ring, so remove it from the calculation.

Fixes: bd0a14c99f ("net/bnxt: use dedicated CPR for async events")
Cc: stable@dpdk.org

Signed-off-by: Lance Richardson <lance.richardson@broadcom.com>
Reviewed-by: Somnath Kotur <somnath.kotur@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2019-10-08 12:14:32 +02:00
Lance Richardson
683e5cf792 net/bnxt: use common NQ ring
Thor queue scaling is currently limited by the number of NQs that
can be allocated. Fix by using a common NQ for all receive/transmit
rings instead of allocating a separate NQ for each ring.

Fixes: f8168ca0e6 ("net/bnxt: support thor controller")
Cc: stable@dpdk.org

Signed-off-by: Lance Richardson <lance.richardson@broadcom.com>
Reviewed-by: Somnath Kotur <somnath.kotur@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Reviewed-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>
2019-10-08 12:14:32 +02:00
Venkat Duvvuru
84d49664b5 net/bnxt: support CoS classification
Class of Service (CoS) is a way to manage multiple types of
traffic over a network to offer different types of services
to applications. CoS classification (priority to cosqueue) is
determined by the user and configured through the PF driver.
DPDK driver queries this configuration and maps the cos queue
ids to different VNICs. This patch adds this support.

Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Santoshkumar Karanappa Rastapur <santosh.rastapur@broadcom.com>
Reviewed-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>
Reviewed-by: Somnath Kotur <somnath.kotur@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2019-10-08 12:14:32 +02:00
Lance Richardson
b150a7e7ee net/bnxt: support LRO on Thor adapters
Add support for LRO for adapters based on Thor (BCM57508).

Reviewed-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>
Signed-off-by: Lance Richardson <lance.richardson@broadcom.com>
Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2019-10-08 12:14:32 +02:00
Lance Richardson
17766722cc net/bnxt: fix ring alignment for Thor-based adapters
When using transmit/receive queue sizes smaller than 256, alignment
requirements are not being met for Thor-based adapters. Fix by
forcing memory addresses used for transmit/receive/aggregation ring
allocations to be on 4K boundaries.

Fixes: f8168ca0e6 ("net/bnxt: support thor controller")
Cc: stable@dpdk.org

Signed-off-by: Lance Richardson <lance.richardson@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2019-10-08 12:14:32 +02:00
Lance Richardson
cc5e26b8ef net/bnxt: increase TQM entry allocation
The current TQM backing store size isn't sufficient to allow 512
transmit rings. Fix by correcting TQM SP queue size calculation.

Fixes: f8168ca0e6 ("net/bnxt: support thor controller")
Cc: stable@dpdk.org

Signed-off-by: Lance Richardson <lance.richardson@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Reviewed-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>
2019-10-08 12:14:31 +02:00
Pavel Belous
e9924638f5 net/atlantic: add FW mailbox guard mutex
Driver uses the Firmware mailbox to read statistics and configure
some features.
This patch introduces a mutex to provide consistent access to the
FW mailbox to prevent potential data corruption.

Fixes: 86d36773bd ("net/atlantic: implement firmware operations")
Cc: stable@dpdk.org

Signed-off-by: Pavel Belous <pavel.belous@aquantia.com>
Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com>
2019-10-08 12:14:31 +02:00
Pavel Belous
c1339892dd net/atlantic: fix reported flow control mode
Driver reports current flow control mode based on internal flow control
settings. Currently this logic works incorrectly.

Fixes: 921eb6b8ce ("net/atlantic: fix flow control by sync settings on Rx")
Cc: stable@dpdk.org

Signed-off-by: Pavel Belous <pavel.belous@aquantia.com>
Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com>
2019-10-08 12:14:31 +02:00
Pavel Belous
9f3318d1d6 net/atlantic: exclude MACsec counters from xstats
Currently, driver always return full set of xstats counters, including
MACSEC counters. But this driver also supports AQC100 chips, which
does not have MACSEC feature.
This fix adds checking for MACSEC availability (based on FW capability
bits) and returns xstats without MACSEC counters if MACSEC feature
is not available.

Fixes: 09d4dfa853 ("net/atlantic: implement MACsec statistics")
Cc: stable@dpdk.org

Signed-off-by: Pavel Belous <pavel.belous@aquantia.com>
Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com>
2019-10-08 12:14:31 +02:00
Kommula Shiva Shankar
bd3e64cb1c net/octeontx2: fix CQE ring prefetch on wrap around
When computing the head of CQE ring of prefetch, use qmask to point to
the correct head index on wrap around case.

Fixes: cc4d7693f2 ("net/octeontx2: support Rx")
Cc: stable@dpdk.org

Signed-off-by: Kommula Shiva Shankar <kshankar@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2019-10-08 12:14:31 +02:00
Rasesh Mody
0cb4150f82 net/bnx2x: update to latest FW 7.13.11
Use latest firmware 7.13.11.

7.13.11 FW changelog:
    - Packets from a VF with pvid configured which were sent with a
      different vlan were transmitted instead of being discarded.
    - In some multi-function configurations, inter-PF and inter-VF
      Tx switching is incorrectly enabled.
    - Wrong assert code in FLR final cleanup in case it is sent not
      after FLR.
    - Chip may stall in very rare cases under heavy traffic with FW GRO
      enabled.
    - VF malicious notification error fixes.
    - Default gre tunnel to IPGRE which allows proper RSS for IPGRE
      packets, L2GRE traffic will reach single queue.
    - Removes unnecessary internal mem config, latest FW performs this
      autonomously.

Update the PMD version to 1.1.0.1.

Signed-off-by: Rasesh Mody <rmody@marvell.com>
2019-10-08 12:14:31 +02:00
Rasesh Mody
38dff79ba7 net/bnx2x: update HSI
Update hardware software common base driver code in preparation to
update the firmware to version 7.13.11.

Signed-off-by: Rasesh Mody <rmody@marvell.com>
2019-10-08 12:14:31 +02:00
Rasesh Mody
da62a28156 net/bnx2x: update and reorganize HW registers
Update and reorganize HW registers in preparation to update the firmware
to version 7.13.11.
Move HW_INTERRUT_ASSERT_SET_0 out from ecore_reg.h to bnx2x.h.

Signed-off-by: Rasesh Mody <rmody@marvell.com>
2019-10-08 12:14:31 +02:00
David Marchand
ff3555d684 net/qede: limit Rx ring index read for debug
Caught by clang, this idx value is only used for a debug message when
the mbufs allocation fails.
No need to use idx as a temporary storage.

Fixes: 8f23124745 ("net/qede: fix performance bottleneck in Rx path")
Cc: stable@dpdk.org

Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Rasesh Mody <rmody@marvell.com>
2019-10-08 12:14:31 +02:00
Nithin Dabilpuram
e404f39ca9 net/octeontx2: support GRE TSO offload
Extends existing TSO support to GRE tunnel on the
same SoC revisions.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2019-10-08 12:14:31 +02:00
Nithin Dabilpuram
3b635472a9 net/octeontx2: support TSO offload
Add support to below TCP segmentation offloads for
96XX A1 onwards and 95xx B0 onwards.
- TCPv4, TCPv6
- VXLAN[v4 | v6][v4 | v6]
- GENEVE[v4 | v6][v4 | v6]

This patch also modifies a fastpath function to be forced
inline due to performance reasons for multi-seg mode.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2019-10-08 12:14:31 +02:00
Kiran Kumar K
2445649605 net/octeontx2: extract NVGRE as ltype
Adding change to sync RTE Flow with KPU profile to extract
NVGRE as ltype.

Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2019-10-08 12:14:31 +02:00
Kiran Kumar K
b1094c3ca0 net/octeontx2: support Tx descriptor status
Adding support for tx descriptor status dev ops for octeontx2.

Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2019-10-08 12:14:31 +02:00
Vivek Sharma
2e0061dbb4 net/octeontx2: update KPU parser profile
Update LB ltypes and use the updated ones so as replace
LB_STAG and LB_QINQ by single LB_STAG_QINQ ltype.

Signed-off-by: Vivek Sharma <viveksharma@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2019-10-08 12:14:31 +02:00
Nithin Dabilpuram
30c234e4e9 net/octeontx2: allow VFs to enable back pressure
Allow VFs to enable backpressure for performance reasons.
The backpressure control is with kernel AF driver that will enable
backpressure even if one PF/VF requests it and disable it only
after all the PFs/VFs request for disable.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2019-10-08 12:14:31 +02:00