8822 Commits

Author SHA1 Message Date
Pavan Nikhilesh
de128f732f event/octeontx2: add device stop and close functions
Add event device stop and close callback functions.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:56:27 +02:00
Pavan Nikhilesh
9c96ff7696 event/octeontx2: add devargs to control SSO GGRP QoS
SSO GGRPs i.e. queue uses DRAM & SRAM buffers to hold in-flight
events. By default the buffers are assigned to the SSO GGRPs to
satisfy minimum HW requirements. SSO is free to assign the remaining
buffers to GGRPs based on a preconfigured threshold.
We can control the QoS of SSO GGRP by modifying the above mentioned
thresholds. GGRPs that have higher importance can be assigned higher
thresholds than the rest.

Example:
	--dev "0002:0e:00.0,qos=[1-50-50-50]" // [Qx-XAQ-TAQ-IAQ]

Qx  -> Event queue Aka SSO GGRP.
XAQ -> DRAM In-flights.
TAQ & IAQ -> SRAM In-flights.

The values need to be expressed in terms of percentages, 0 represents
default.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
2019-07-03 06:56:23 +02:00
Pavan Nikhilesh
5d6c50ffec event/octeontx2: add device start function
Add eventdev start function along with few cleanup API's to maintain
sanity.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:56:22 +02:00
Pavan Nikhilesh
09d5c0f356 event/octeontx2: add devargs to force legacy mode
Octeontx2 SSO by default is set to use dual workslot mode.
Add devargs option to force legacy mode i.e. single workslot mode.
Example:
	--dev "0002:0e:00.0,single_ws=1"

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:56:17 +02:00
Pavan Nikhilesh
54c5d3c24d event/octeontx2: add worker dual GWS dequeue functions
Add workder dual workslot mode dequeue functions.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:56:16 +02:00
Pavan Nikhilesh
ad4a8adf25 event/octeontx2: add worker dual GWS enqueue functions
Add dual workslot mode event enqueue functions.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
2019-07-03 06:56:14 +02:00
Pavan Nikhilesh
21d8822180 event/octeontx2: add SSO dual GWS HW device operations
Add SSO dual workslot mode GWS HW device operations.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
2019-07-03 06:56:12 +02:00
Pavan Nikhilesh
aa62547f7e event/octeontx2: add SSO dual workslot mode
OcteonTx2 AP core SSO cache contains two entries each entry caches
state of an single GWS aka event port.
AP core requests events from SSO by using following sequence :
1. Write to SSOW_LF_GWS_OP_GET_WORK
2. Wait for SSO to complete scheduling by polling on SSOW_LF_GWS_TAG[63]
3. SSO notifies core by clearing SSOW_LF_GWS_TAG[63] and if work is
valid SSOW_LF_GWS_WQP is non-zero.
The above sequence uses only one in-core cache entry.

In dual workslot mode we try to use both the in-core cache entries by
triggering GET_WORK on a second workslot as soon as the above sequence
completes. This effectively hides the schedule latency of SSO if there
are enough events with unique flow_tags in-flight.
This mode reserves two SSO GWS lf's for each event port effectively
doubling single core performance.
Dual workslot mode is the default mode of operation in octeontx2.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
2019-07-03 06:56:10 +02:00
Pavan Nikhilesh
46244b5b14 event/octeontx2: add worker dequeue functions
Add worker event dequeue functions.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:56:09 +02:00
Pavan Nikhilesh
0eaf90cff1 event/octeontx2: add worker enqueue functions
Add worker event enqueue functions.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:56:08 +02:00
Pavan Nikhilesh
4095660db7 event/octeontx2: add SSO HW device operations
Add SSO HW device operations used for enqueue/dequeue.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
2019-07-03 06:56:07 +02:00
Pavan Nikhilesh
284ea1cc38 event/octeontx2: support xstats
Add support for retrieving statistics from SSO GWS and GGRP.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2019-07-03 06:56:06 +02:00
Pavan Nikhilesh
9b8bc622a1 event/octeontx2: add register dump functions
Add SSO GWS and GGRP register dump function to aid debugging.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:56:05 +02:00
Pavan Nikhilesh
8c77f48337 event/octeontx2: add SSO GWS and GGRP IRQ handlers
Register and implement SSO GWS and GGRP IRQ handlers for error
interrupts.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
2019-07-03 06:56:04 +02:00
Pavan Nikhilesh
f563b7fa8c event/octeontx2: support dequeue timeout tick conversion
Add function to convert dequeue timeout from ns to ticks.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:56:03 +02:00
Pavan Nikhilesh
f7ac8b66b2 event/octeontx2: support linking queues to ports
Links between queues and ports are controlled by setting/clearing GGRP
membership in SSOW_LF_GWS_GRPMSK_CHG.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:56:01 +02:00
Pavan Nikhilesh
67b5f46864 event/octeontx2: add port config functions
Add default config, setup and release functions for event ports
i.e. SSO GWS.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:55:59 +02:00
Pavan Nikhilesh
55e778ca46 event/octeontx2: add devargs for inflight buffer count
The number of events for a *open system* event device is specified
as -1 as per the eventdev specification.
Since, Octeontx2 SSO inflight events are only limited by DRAM size, the
xae_cnt devargs parameter is introduced to provide upper limit for
in-flight events.

Example:
	--dev "0002:0e:00.0,xae_cnt=8192"

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2019-07-03 06:55:51 +02:00
Pavan Nikhilesh
5f96f77bb6 event/octeontx2: allocate event inflight buffers
Allocate buffers in DRAM that hold inflight events.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:55:50 +02:00
Pavan Nikhilesh
e3ffe19a53 event/octeontx2: add event queue config functions
Add default config, setup and release functions for event queues i.e.
SSO GGRPS.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:55:49 +02:00
Pavan Nikhilesh
cd24e70258 event/octeontx2: add device configure function
Add the device configure function that attaches the requested number of
SSO GWS(event ports) and GGRP(event queues) LF's to the PF.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:55:48 +02:00
Pavan Nikhilesh
bebc3dbcf4 event/octeontx2: add device capabilities function
Add the info_get function to return details on the queues, flow,
prioritization capabilities, etc. which this device has.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:55:47 +02:00
Pavan Nikhilesh
9b795ef7c6 event/octeontx2: add init and fini for SSO object
SSO object needs to be initialized to communicate with the kernel AF
driver through mbox using the common API's.
Also, initialize the internal eventdev structure to defaults.
Attach NPA lf to the PF if needed.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2019-07-03 06:55:46 +02:00
Pavan Nikhilesh
3ef6bbfead event/octeontx2: add build infra and device probe
Add the make and meson based build infrastructure along with the
eventdev(SSO) device probe.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2019-07-03 06:55:44 +02:00
Nipun Gupta
aad967bb3c event/dpaa2: fix timeout ticks
Correct timeout to tick conversion.

Fixes: 0ce3ce7c275c ("event/dpaa2: add configuration functions")
Cc: stable@dpdk.org

Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
2019-07-03 06:55:37 +02:00
Bruce Richardson
530588f3cd drivers: add reasons for components being disabled
For each driver where we optionally disable it, add in the reason why it's
being disabled, so the user knows how to fix it.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Luca Boccassi <bluca@debian.org>
2019-07-02 23:21:11 +02:00
Bruce Richardson
8baad6f884 build: print list of disabled components
When configuring with meson we print out a list of enabled components, but
it is also useful to list out the disabled components and the reasons why.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Luca Boccassi <bluca@debian.org>
2019-07-02 23:20:26 +02:00
Bruce Richardson
863fd2930b rawdev: pass the device id as parameter to selftest
When running self-tests, the driver needs to know the device on which to
run the tests, so we need to take the device ID as parameter. Only the
skeleton driver is providing this selftest capability right now, so we can
easily update it for this change.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2019-07-02 17:04:30 +02:00
Bruce Richardson
88a81bcecb raw/skeleton: remove compile-time constant for device id
Use a variable value rather than compile-time constant zero as the
device id for the skeleton rawdev tests. This ensures we can make the
tests work even if other rawdevs are present.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2019-07-02 17:04:10 +02:00
Thinh Tran
dcb1595956 raw/skeleton: fix test of attribute set/get
Using memory on the stack instead of on the heap by calling malloc
also avoid memory leak in case of test case failures

Fixes: 88d0e47880ec ("raw/skeleton: fix memory leak on test failure")
Cc: stable@dpdk.org

Signed-off-by: Thinh Tran <thinhtr@linux.vnet.ibm.com>
Acked-by: Shreyansh Jain <shreyansh.jain@nxp.com>
2019-07-01 19:52:52 +02:00
Ivan Malov
b51690ec69 mbuf: clarify outer offsets for non-tunnel packets
The default policy for offload-specific fields is that
they are undefined unless the corresponding offloads are
requested in mbuf ol_flags. This is also the case for outer
L2 and L3 length fields which must not be assumed to contain
zeros for non-tunnel packets. The patch clarifies this behaviour
in the comments and also adds appropriate checks to the PMDs which
do not check any tunnel-related offloads before using the said fields.

Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru>
Reviewed-by: Andrew Rybchenko <arybchenko@solarflare.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
2019-07-01 17:15:01 +02:00
Jakub Grajciar
c41a04958b net/memif: support multi-process
Multi-process support for memif PMD.
Primary process handles connection establishment.
Secondary process queries for memory regions.

Signed-off-by: Jakub Grajciar <jgrajcia@cisco.com>
Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
2019-06-28 20:32:18 +02:00
Xiaolong Ye
45bba02c95 net/af_xdp: support need wakeup feature
This patch enables need_wakeup flag for Tx and fill rings, when this
flag is set by the driver, it means that the userspace application has
to explicitly wake up the kernel Rx or kernel Tx processing by issuing
a syscall. Poll() can wake up both and sendto() or its alternatives
will wake up Tx processing only.

This feature is to provide efficient support for case that application
and driver executing on the same core.

Signed-off-by: Xiaolong Ye <xiaolong.ye@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2019-06-28 20:32:18 +02:00
Cian Ferriter
a3f5252e5c net/pcap: enable infinitely Rx a pcap file
It can be useful to use pcap files for some rudimental performance
testing. This patch enables this functionality in the pcap driver.

At a high level, this works by creating a ring of sufficient size to
store the packets in the pcap file passed to the application. When the
rx function for this mode is called, packets are dequeued from the ring
for use by the application and also enqueued back on to the ring to be
"received" again.

A tx_drop mode is also added since transmitting to a tx_pcap file isn't
desirable at a high traffic rate.

Jumbo frames are not supported in this mode. When filling the ring at rx
queue setup time, the presence of multi segment mbufs is checked for.
The PMD will exit on detection of these multi segment mbufs.

Signed-off-by: Cian Ferriter <cian.ferriter@intel.com>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
2019-06-28 20:32:18 +02:00
Cian Ferriter
da6ba28f05 net/pcap: use a struct to pass user options
The argument lists on some of the device creation functions are quite
large. Using a struct to hold the user options parsed in
'pmd_pcap_probe' will allow for cleaner function calls and definitions.
Adding user options will also be easier.

Signed-off-by: Cian Ferriter <cian.ferriter@intel.com>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
2019-06-28 20:32:18 +02:00
Stephen Hemminger
cc9271f9e7 net/netvsc: fix xstats for VF device
The id values for VF stats were not being offset correctly.
And getting xstats for VF device only worked if VF device supported
it; it did not support the generic stats.

Fixes: dc7680e8597c ("net/netvsc: support integrated VF")
Cc: stable@dpdk.org

Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
2019-06-28 20:32:18 +02:00
Mohsin Mazhar Shaikh
b21ad01a82 net/netvsc: fix xstats id
The xstats_get was not setting id correctly for each entry.

Fixes: 4e9c73e96e83 ("net/netvsc: add Hyper-V network device")
Cc: stable@dpdk.org

Signed-off-by: Mohsin Mazhar Shaikh <mohsinmazhar_shaikh@trendmicro.com>
Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
2019-06-28 20:32:18 +02:00
Stephen Hemminger
92d23a57ca net/netvsc: support configuring RSS parameters
Add RSS hash key and reta update and query functions.

Signed-off-by: Stephen Hemminger <sthemmin@microsoft.com>
2019-06-28 20:32:18 +02:00
Stephen Hemminger
3a899f8afc net/netvsc: fix RSS offload settings
Use the result from querying host to show the RSS info.

Fixes: 4e9c73e96e83 ("net/netvsc: add Hyper-V network device")
Cc: stable@dpdk.org

Signed-off-by: Stephen Hemminger <sthemmin@microsoft.com>
2019-06-28 20:32:18 +02:00
Ali Alnubani
843e720557 net/mlx5: fix 32-bit build
This is to fix the error:
  ```
  drivers/net/mlx5/mlx5_defs.h:14:26:
  error: format '%lx' expects argument of type 'long unsigned int',
  but argument 5 has type 'off_t {aka long long int}' [-Werror=format=]
  drivers/net/mlx5/mlx5_txq.c:569:48: note: format string is defined here
     DRV_LOG(DEBUG, "port %u: uar_mmap_offset 0x%lx"
                                                ~~^
                                                %llx
  ```
Which reproduces with gcc (Ubuntu 7.4.0-1ubuntu1~18.04.1) 7.4.0.

Fixes: 6bf10ab69be0 ("net/mlx5: support 32-bit systems")
Cc: stable@dpdk.org

Signed-off-by: Ali Alnubani <alialnu@mellanox.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2019-06-28 20:31:49 +02:00
Ziyang Xuan
cb7b6606eb net/hinic: add RSS stats and promiscuous ops
Add RSS, stats, promiscuous ops related function codes.

Signed-off-by: Ziyang Xuan <xuanziyang2@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2019-06-28 20:31:49 +02:00
Ziyang Xuan
076221c8fe net/hinic: add Rx/Tx
This patch add package sending and receiving function codes.

Signed-off-by: Ziyang Xuan <xuanziyang2@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2019-06-28 20:31:49 +02:00
Ziyang Xuan
2c473729dd net/hinic: add start/stop and queue ops
Add dev_start, dev_stop, link_update, queue_setup, queue_release
related function codes.

Signed-off-by: Ziyang Xuan <xuanziyang2@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2019-06-28 20:31:49 +02:00
Ziyang Xuan
64727024d2 net/hinic: add device initialization
Add device initialization function codes.

Signed-off-by: Ziyang Xuan <xuanziyang2@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2019-06-28 20:31:49 +02:00
Ziyang Xuan
1d09792a27 net/hinic: add build and doc files
Add build and doc files along with hinic_pmd_ethdev.c
which just includes PMD register and log initialization
for compilation.

Signed-off-by: Ziyang Xuan <xuanziyang2@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2019-06-28 20:31:49 +02:00
Ziyang Xuan
81d53291a4 net/hinic/base: add various headers
Add various headers that define mgmt commands, cmdq commands
and basic defines for use in the code.

Signed-off-by: Ziyang Xuan <xuanziyang2@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2019-06-28 20:31:49 +02:00
Ziyang Xuan
828d3e15a9 net/hinic/base: support context and work queue
Work queue is used for cmdq and Rx/Tx buff description.
NIC business needs to configure cmdq context and txq/rxq
context. This patch adds data structures and function codes
for work queue and context.

Signed-off-by: Ziyang Xuan <xuanziyang2@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2019-06-28 20:31:49 +02:00
Ziyang Xuan
2d5fd10181 net/hinic/base: add NIC business configurations
The items of configurations and queries for NIC business include
MAC, VLAN, MTU, RSS and so on. These configurations and queries
are handled by mgmt module. This patch introduces related
data structures and function codes.

Signed-off-by: Ziyang Xuan <xuanziyang2@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2019-06-28 20:31:49 +02:00
Ziyang Xuan
d9ce191794 net/hinic/base: add hardware operation
Add code for hardware operation, including configuration,
query and so on.

Signed-off-by: Ziyang Xuan <xuanziyang2@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2019-06-28 20:31:49 +02:00
Ziyang Xuan
a4957d87e0 net/hinic/base: add mgmt module
Mgmt module is a kind of administration module for the chip.
It is responsible for handling administration command from host.
It uses api channel. This patch adds related data structures,
packaged interfaces and function codes.

Signed-off-by: Ziyang Xuan <xuanziyang2@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2019-06-28 20:31:49 +02:00