Commit Graph

16256 Commits

Author SHA1 Message Date
Qiming Chen
4b458675d3 net/i40e: fix mbuf leak
A local test found that repeated port start and stop operations during
the continuous SSE vector bufflist receiving process will cause the mbuf
resource to run out. The final positioning is when the port is stopped,
the mbuf of the pkt_first_seg pointer is not released. Resources leak.
The patch scheme is to judge whether the pointer is empty when the port
is stopped, and release the corresponding mbuf if it is not empty.

Fixes: 4861cde461 ("i40e: new poll mode driver")
Cc: stable@dpdk.org

Signed-off-by: Qiming Chen <chenqiming_huawei@163.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-09-13 04:30:01 +02:00
Haiyue Wang
db46ff4482 common/iavf: update base driver version
Update the driver version to trace the change.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-09-13 02:47:33 +02:00
Haiyue Wang
146bf0916c common/iavf: remove flow director query opcode
The VIRTCHNL_OP_QUERY_FDIR_FILTER opcode is not used, so remove it.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-09-13 02:47:27 +02:00
Alvin Zhang
67edb141b9 common/iavf: enable hash calculation based on L4 checksum
Add TCP/UDP/SCTP header checksum field selectors, they can be used in
creating FDIR or RSS rules related to TCP/UDP/SCTP header checksum.

Signed-off-by: Alvin Zhang <alvinx.zhang@intel.com>
Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-09-13 02:47:05 +02:00
Junfeng Guo
e0c765fec8 common/iavf: add QFI fields for GTPU UL and DL
The QFI is 6-bit "QoS Flow Identifier" within the GTPU Extension Header.
Add virtchnl fields QFI of GTPU UL/DL for supporting the AVF FDIR.

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-09-13 02:46:47 +02:00
Hanumanth Reddy Pothula
07d15d4d84 net/octeontx2: fix MTU when PTP is enabled
Update MTU value based on PTP enable status and reserve eight
bytes in TX path to accommodate VLAN tags.

If PTP is enabled maximum allowed MTU is 9200 otherwise it's 9208.

Fixes: b5dc314044 ("net/octeontx2: support base PTP")
Cc: stable@dpdk.org

Signed-off-by: Hanumanth Reddy Pothula <hpothula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-09-16 16:29:51 +02:00
Harman Kalra
2c809af8a8 net/cnxk: add callback to get link status
Adding a new callback for reading the link status. PF can read its
link status and can forward the same to VF once it comes up.

Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-09-16 16:29:47 +02:00
Harman Kalra
02719901d5 common/cnxk: send link status event to VF
Currently link event is only sent to the PF by AF as soon as it comes
up, or in case of any physical change in link. PF will broadcast
these link events to all its VFs as soon as it receives it.
But no event is sent when a new VF comes up, hence it will not have
the link status.
Adding support for sending link status to the VF once it comes up
successfully.

Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-09-16 16:28:51 +02:00
Satheesh Paul
8ca851cdc5 common/cnxk: support dual VLAN insert and strip actions
Add ROC API to configure dual VLAN tag addition and removal.

Signed-off-by: Satheesh Paul <psatheesh@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-09-16 16:28:02 +02:00
Lance Richardson
cc7f749488 net/bnxt: fix Rx queue startup state
Since the addition of support for runtime queue setup,
receive queues that are started by default no longer
have the correct state. Fix this by setting the state
when a port is started.

Fixes: 0105ea1296 ("net/bnxt: support runtime queue setup")
Cc: stable@dpdk.org

Signed-off-by: Lance Richardson <lance.richardson@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Reviewed-by: Somnath Kotur <somnath.kotur@broadcom.com>
Reviewed-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>
2021-09-15 02:07:08 +02:00
Lior Margalit
aa52e5f0f9 net/mlx5: fix RSS expansion traversal over next nodes
The RSS expansion is based on DFS algorithm to traverse over the possible
expansion paths.

The current implementation breaks out, if it reaches the terminator of
the "next nodes" array, instead of going backwards to try the next path.
For example:
testpmd> flow create 0 ingress pattern eth / ipv6 / udp / vxlan / end
actions rss level 2 types tcp end / end
The paths found are:
ETH IPV6 UDP VXLAN END
ETH IPV6 UDP VXLAN ETH IPV4 TCP END
ETH IPV6 UDP VXLAN ETH IPV6 TCP END
The traversal stopped after getting to the terminator of the next nodes
of the ETH node. It missed the rest of the nodes in the next nodes array
of the VXLAN node.

The fix is to go backwards when reaching the terminator of the current
level and find if there is a "next node" to start traversing a new path.
Using the above example, the flows will be:
ETH IPV6 UDP VXLAN END
ETH IPV6 UDP VXLAN ETH IPV4 TCP END
ETH IPV6 UDP VXLAN ETH IPV6 TCP END
ETH IPV6 UDP VXLAN IPV4 TCP END
ETH IPV6 UDP VXLAN IPV6 TCP END
The traversal will find additional paths, because it traverses through
all the next nodes array of the VXLAN node.

Fixes: 4ed05fcd44 ("ethdev: add flow API to expand RSS flows")
Cc: stable@dpdk.org

Signed-off-by: Lior Margalit <lmargalit@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-09-13 21:56:10 +02:00
Lior Margalit
69d268b4ff net/mlx5: fix RSS expansion for explicit graph node
The RSS expansion algorithm is using a graph to find the possible
expansion paths. A graph node with the 'explicit' flag will be skipped,
if it is not found in the flow pattern.

The current implementation misses the case where the node with the
explicit flag is in the middle of the expanded path.
For example:
testpmd> flow create 0 ingress pattern eth / ipv6 / udp / vxlan / end
actions rss level 2 types tcp end / end
The VLAN node has the explicit flag, so it is currently included in the
expanded flow:
ETH IPV6 UDP VXLAN END
ETH IPV6 UDP VXLAN ETH VLAN IPV4 TCP END
ETH IPV6 UDP VXLAN ETH VLAN IPV6 TCP END

The fix is to skip the nodes with the explicit flag while iterating over
the possible expansion paths. Using the above example, the flows will be:
ETH IPV6 UDP VXLAN END
ETH IPV6 UDP VXLAN ETH IPV4 TCP END
ETH IPV6 UDP VXLAN ETH IPV6 TCP END

Fixes: 3f02c7ff68 ("net/mlx5: fix RSS expansion for inner tunnel VLAN")
Cc: stable@dpdk.org

Signed-off-by: Lior Margalit <lmargalit@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-09-13 21:56:09 +02:00
Ivan Ilchenko
580f3af31c net/virtio: fix device configure without jumbo Rx offload
Use max-pkt-len only if jumbo frames offload is requested
since otherwise this field isn't valid.

Fixes: 8b90e43581 ("net/virtio: set offload flag for jumbo frames")
Fixes: 4e8169eb0d ("net/virtio: fix Rx scatter offload")
Cc: stable@dpdk.org

Signed-off-by: Ivan Ilchenko <ivan.ilchenko@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2021-09-14 13:21:57 +02:00
Gaoxiang Liu
5d903aee8a net/virtio: fix repeated freeing of virtqueue
When virtio_init_queue returns error, the memory of vq is freed.
But the value of hw->vqs[queue_idx] does not restore.
If virtio_init_queue returns error, the memory of vq is freed again
in virtio_free_queues.

Fixes: 69c80d4ef8 ("net/virtio: allocate queue at init stage")
Cc: stable@dpdk.org

Signed-off-by: Gaoxiang Liu <liugaoxiang@huawei.com>
Reviewed-by: Chenbo Xia <chenbo.xia@intel.com>
2021-09-14 13:21:57 +02:00
David Marchand
848e93d900 net/virtio-user: fix Rx interrupts with multi-queue
The callfds[] array stores eventfds sequentially for Rx and Tx vq.

Fixes: 3d4fb6fd25 ("net/virtio-user: support Rx interrupt")
Cc: stable@dpdk.org

Signed-off-by: David Marchand <david.marchand@redhat.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2021-09-14 13:21:57 +02:00
David Marchand
5be2325ece net/virtio: avoid unneeded link interrupt configuration
There is no reason to re-register a interrupt handler for LSC if this
feature was not requested in the first place.
A simple use case is when asking for Rx interrupts without LSC interrupt.

Fixes: 26b683b4f7 ("net/virtio: setup Rx queue interrupts")
Cc: stable@dpdk.org

Signed-off-by: David Marchand <david.marchand@redhat.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2021-09-14 13:21:57 +02:00
Ivan Ilchenko
31136836bc net/virtio: report max/min/align Rx descriptor limits
Report max/min/align descriptors limits in device info get callback.
Before calling the callback, rte_eth_dev_info_get() provides
default values of nb_min as zero and nb_max as UINT16_MAX that are
not correct for the driver, so one can't rely on them.

Signed-off-by: Ivan Ilchenko <ivan.ilchenko@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2021-09-14 13:21:57 +02:00
Ivan Ilchenko
c97e73779c net/virtio: fix split queue vectorized Rx
Descriptors number may be set less than queue size for split queue
vectorized Rx path. Pointers to mbufs for received packets are
obtained from SW ring, that is initially filled with them in the end
of queue setup in virtio_dev_rx_queue_setup_finish(). The begin of the
SW ring filled up to the size of descriptors number. At queue size
offset from the begin of the SW ring pointers to some fake mbuf are also
set for wrapping purpose. So the ring may contains the hole of invalid
pointers from descriptors number offset to queue size offset, and split
vectorized Rx routines could write to the invalid addresses since they
use the ring up to the queue size. Fix this by setting descriptors
number to queue size on Rx queue setup.

Fixes: fc3d66212f ("virtio: add vector Rx")
Cc: stable@dpdk.org

Signed-off-by: Ivan Ilchenko <ivan.ilchenko@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2021-09-14 13:21:57 +02:00
Ivan Ilchenko
9897896ec7 net/virtio: remove handling of zero desc on Rx setup
Rx queue setup callback allows to use the whole ring when
descriptor number argument equals zero. There's no point to
handle zero in any way since RTE Rx queue setup function
rte_eth_rx_queue_setup() doesn't pass zero using fallback
values.

Signed-off-by: Ivan Ilchenko <ivan.ilchenko@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2021-09-14 13:21:57 +02:00
Ivan Ilchenko
b8d0a27842 net/virtio: fix mbuf count on Rx queue setup
Rx queue setup finish function may report wrong number of
allocated mbufs in case of in-order feature. Fix the
function to not ignore allocation error and count only
successfully allocated number of buffers.

Fixes: e5f456a98d ("net/virtio: support in-order Rx and Tx")
Cc: stable@dpdk.org

Signed-off-by: Ivan Ilchenko <ivan.ilchenko@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2021-09-14 13:21:57 +02:00
Jasvinder Singh
e73a7ab224 net/softnic: promote manage API
This API was introduced in 18.08, therefore removing
experimental tag to promote it to stable state.

Signed-off-by: Jasvinder Singh <jasvinder.singh@intel.com>
Acked-by: Ray Kinsella <mdr@ashroe.eu>
2021-09-15 09:26:23 +02:00
Thomas Monjalon
5dd12566f1 vdpa/mlx5: fix minsize build
Error occurs when configuring meson with --buildtype=minsize
with GCC 11.1.0:

drivers/vdpa/mlx5/mlx5_vdpa_mem.c: In function ‘mlx5_vdpa_mem_register’:
drivers/vdpa/mlx5/mlx5_vdpa_mem.c:183:24: error:
initialization of ‘uint64_t’ {aka ‘long unsigned int’} from ‘void *’
makes integer from pointer without a cast [-Werror=int-conversion]
|         uint64_t gcd = NULL;
|                        ^~~~
drivers/vdpa/mlx5/mlx5_vdpa_mem.c:244:75: error:
‘mode’ may be used uninitialized in this function [-Werror=maybe-uninitialized]
|                         klm_size = mode == MLX5_MKC_ACCESS_MODE_KLM ?
|                                    ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|                               KLM_SIZE_MAX_ALIGN(empty_region_sz) : gcd;
|                               ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Matan Azrad <matan@nvidia.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
2021-09-15 17:12:29 +02:00
Thomas Monjalon
51d7396440 regex/mlx5: fix minsize build
Error occurs when configuring meson with --buildtype=minsize
with GCC 11.1.0:

drivers/regex/mlx5/mlx5_regex_fastpath.c:398:17: error:
‘len’ may be used uninitialized in this function [-Werror=maybe-uninitialized]
|                 complete_umr_wqe(qp, sq, &qp->jobs[mkey_job_id], sq->pi,
|                 ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
|                                  klm_num, len);
|                                  ~~~~~~~~~~~~~
drivers/regex/mlx5/mlx5_regex_fastpath.c:315:31: note: ‘len’ was declared here
|         uint32_t klm_num = 0, len;
|                               ^~~

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
2021-09-15 17:12:29 +02:00
Thomas Monjalon
11c2e4b41c net/qede: fix minsize build
Error occurs when configuring meson with --buildtype=minsize
with GCC 11.1.0:

In function ‘__internal_ram_wr_relaxed’,
    inlined from ‘internal_ram_wr’ at ecore_int_api.h:166:2,
    inlined from ‘qede_update_rx_prod.constprop’ at qede_rxtx.c:736:2:
drivers/net/qede/base/bcm_osal.h:136:9: error:
‘rx_prods’ is used uninitialized [-Werror=uninitialized]
|         rte_write32_relaxed((_val), (_reg_addr))
|         ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
ecore_int_api.h:151:17: note: in expansion of macro ‘DIRECT_REG_WR_RELAXED’
|                 DIRECT_REG_WR_RELAXED(p_hwfn, &((u32 OSAL_IOMEM *)addr)[i],
|                 ^~~~~~~~~~~~~~~~~~~~~
drivers/net/qede/qede_rxtx.c: In function ‘qede_update_rx_prod.constprop’:
drivers/net/qede/qede_rxtx.c:724:33: note: ‘rx_prods’ declared here
|         struct eth_rx_prod_data rx_prods = { 0 };
|                                 ^~~~~~~~

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Devendra Singh Rawat <dsinghrawat@marvell.com>
Acked-by: Rasesh Mody <rmody@marvell.com>
2021-09-15 17:11:56 +02:00
Bruce Richardson
0e837e584e build: fix essential drivers in disable list
The PCI and vdev bus drivers cannot be disabled for DPDK builds and
special logic is put in place to not skip them when they are specified
in the disable list. This logic is broken though, as the inclusion of
the driver-specific meson.build file is only included in the "else" leg
of the condition check. This means that when they are specified as
disabled the PCI and vdev buses are not disabled, but neither are their
source files compiled.

Fix this by moving the "subdir()" call into the next "if build" block,
ensuring that if not disabled the sources are always included. To take
account of the fact that the subdir call could itself disable the
driver, we add a break call into the following loop to ensure we quickly
fall through to the following block which stops processing appropriately
if the driver is disabled.

Fixes: 2e33309ebe ("config: enable/disable drivers in Arm builds")
Cc: stable@dpdk.org

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Tested-by: Radu Nicolau <radu.nicolau@intel.com>
Acked-by: Radu Nicolau <radu.nicolau@intel.com>
2021-09-15 11:00:15 +02:00
Qi Zhang
af167bcf17 net/ice: fix performance with writeback policy
Apply the same fix that for iavf to DCF
commit ead06572bd ("net/iavf: fix performance with writeback policy")

Fixes: 4b0d391f0e ("net/ice: add queue config in DCF")
Cc: stable@dpdk.org

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Tested-by: Lijuan Tu <lijuan.tu@intel.com>
2021-09-06 03:57:13 +02:00
Qiming Chen
d54b51efb6 net/ixgbe: fix mbuf leak
A local test found that repeated port start and stop operations during
the continuous SSE vector bufflist receiving process will cause the mbuf
resource to run out. The final positioning is when the port is stopped,
the mbuf of the pkt_first_seg pointer is not released. Resources leak.
The patch scheme is to judge whether the pointer is empty when the port
is stopped, and release the corresponding mbuf if it is not empty.

Fixes: af75078fec ("first public release")
Cc: stable@dpdk.org

Signed-off-by: Qiming Chen <chenqiming_huawei@163.com>
Acked-by: Haiyue Wang <haiyue.wang@intel.com>
2021-09-06 03:46:22 +02:00
Qiming Chen
cc8aaa258f net/ixgbe: fix MAC resource leak
In the eth_ixgbevf_dev_init and eth_ixgbe_dev_init functions, memory is
allocated for the MAC address, and the address is stored in the
eth_dev->data->mac_addrs member variable. If the subsequent function is
abnormal, you need to use the rte_free function to release the MAC
address memory.

Fixes: af75078fec ("first public release")
Cc: stable@dpdk.org

Signed-off-by: Qiming Chen <chenqiming_huawei@163.com>
Acked-by: Haiyue Wang <haiyue.wang@intel.com>
2021-09-06 03:44:58 +02:00
Qiming Chen
3a732dce93 net/ixgbe: fix queue resource leak
In the ixgbevf_dev_start function, after initializing the rxtx queue, if
an exception occurs in the subsequent function, the rxtx queue needs to
be released. The patch solves the problem of queue resource leakage.

Fixes: 0eb609239e ("ixgbe: enable Rx queue interrupts for PF and VF")
Cc: stable@dpdk.org

Signed-off-by: Qiming Chen <chenqiming_huawei@163.com>
Acked-by: Haiyue Wang <haiyue.wang@intel.com>
2021-09-06 03:43:06 +02:00
Qiming Chen
03f83d6c5c net/ixgbe: fix hash handle leak
In the ixgbe_fdir_filter_init and ixgbe_l2_tn_filter_init functions,
after the hash handle is created, the handle is not released in
subsequent abnormal branches.

Fixes: 080e3c0ee9 ("net/ixgbe: store flow director filter")
Fixes: d0c0c416ef ("net/ixgbe: store L2 tunnel filter")
Cc: stable@dpdk.org

Signed-off-by: Qiming Chen <chenqiming_huawei@163.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-09-06 03:39:46 +02:00
Dapeng Yu
1a86f4dbdf net/ice: support DCF device reset
DCF PMD needs to support rte_eth_dev_reset, the reason is when a DCF
instance is killed, all the flow rules still exists in hardware, when
DCF gets to reconnect, it already lost the flow context, and if the
application wants to create new rules, it may fail due to firmware
reports rules already exist.

The rte_eth_dev_reset API provides a more elegant way for the
application to reset DCF when reconnect happens.

Signed-off-by: Dapeng Yu <dapengx.yu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-09-06 03:17:29 +02:00
Ivan Malov
142dd26a2f net/sfc: set FDIR bit for flow mark in EF100 Rx
According to flow action MARK definition, PMDs must set both
PKT_RX_FDIR and PKT_RX_FDIR_ID if the packet contains a mark.

Fixes: 1aacc3d388 ("net/sfc: support user mark and flag Rx for EF100")
Cc: stable@dpdk.org

Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru>
Reviewed-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
2021-09-09 19:52:36 +02:00
Min Hu (Connor)
fe9c27a337 net/hns3: fix Tx push capability
This patch fixes Tx push capability to be compatible with Kunpeng 920,
as Tx push is only supported on Kunpeng 930.

Fixes: 23e317dd1f ("net/hns3: support Tx push quick doorbell for performance")
Cc: stable@dpdk.org

Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
2021-09-09 19:35:40 +02:00
Chengchang Tang
3fb0df3138 net/hns3: fix taskqueue pair reset command
This new taskqueue pair reset command is used incorrectly, resulting in
the new command not taking effect.

This patch fixes the incorrect use.

Fixes: 6911e7c22c ("net/hns3: fix long task queue pairs reset time")
Cc: stable@dpdk.org

Signed-off-by: Chengchang Tang <tangchengchang@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
2021-09-09 19:35:40 +02:00
Chengchang Tang
aa3497d445 net/hns3: fix queue flow action validation
The used_rx_queues only takes effect after device is started, and
its value is incorrect before the device is started. Therefore, it
is not suitable for flow action to use it to verify the queue index
before the device is started.

E.g. Enable dedicated queue in bonding device will configure a queue
flow action before start its slave devices. The above problem will
make this reasonable flow action configuration fail.

This patch use the nb_rx_queues from the configuration phase to
achieve verification.

Fixes: a951c1ed3a ("net/hns3: support different numbers of Rx and Tx queues")
Fixes: f8e7fcbfd0 ("net/hns3: support flow action of queue region")
Cc: stable@dpdk.org

Signed-off-by: Chengchang Tang <tangchengchang@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
2021-09-09 19:35:40 +02:00
Qiming Chen
d70157c13f net/pcap: improve Rx statistics
In the receiving direction, if alloc mbuf or jumbo process failed, there
is no err_pkts count, which makes it difficult to locate the problem.
Because alloc mbuf failed, the rx_nombuf field is counted.

Signed-off-by: Qiming Chen <chenqiming_huawei@163.com>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
2021-09-09 15:30:32 +02:00
Qiming Chen
da0280b3a3 net/pcap: fix resource leakage on port probe
When the port is probed, if the eth_from_pcaps function fails, the
previously opened pcap resources are not released, causing resource
leakage.

The patch solves the problem of resource leakage caused by abnormal
branch exit during the port probe process.

Fixes: 4c173302c3 ("pcap: add new driver")
Cc: stable@dpdk.org

Signed-off-by: Qiming Chen <chenqiming_huawei@163.com>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
2021-09-09 15:01:47 +02:00
Chengfeng Ye
30b4d95a29 net/axgbe: fix unreleased lock in I2C transfer
The lock pdata->i2c_mutex is not released if the function return in
these two patched branches, which may lead to deadlock problem if
this lock is acquired again.

Bugzilla ID: 777
Fixes: 4ac7516b8b ("net/axgbe: add phy init and related APIs")
Cc: stable@dpdk.org

Signed-off-by: Chengfeng Ye <cyeaa@connect.ust.hk>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2021-09-08 15:27:02 +02:00
Aman Deep Singh
a7db3afce7 net: add macro to extract MAC address bytes
Added macros to simplify print of MAC address.
The six bytes of a MAC address are extracted in
a macro here, to improve code readablity.

Signed-off-by: Aman Deep Singh <aman.deep.singh@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2021-09-07 19:08:05 +02:00
Aman Deep Singh
c2c4f87b12 net: add macro for MAC address print
Added macro to print six bytes of MAC address.
The MAC addresses will be printed in upper case
hexadecimal format.
In case there is a specific check for lower case
MAC address, the user may need to make a change in
such test case after this patch.

Signed-off-by: Aman Deep Singh <aman.deep.singh@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2021-09-07 19:07:46 +02:00
Baruch Siach
0f2ffb49ce net/af_xdp: fix zero-copy Tx queue drain
Call xsk_ring_prod__submit() before kick_tx() so that the kernel
consumer sees the updated state of Tx ring. Otherwise, Tx packets are
stuck in the ring until the next call to af_xdp_tx_zc().

Fixes: d8a210774e ("net/af_xdp: support unaligned umem chunks")
Cc: stable@dpdk.org

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Acked-by: Ciara Loftus <ciara.loftus@intel.com>
2021-09-07 17:55:23 +02:00
Kalesh AP
36a97cd23f net/bnxt: fix double allocation of ring groups
After commit "d68249f88266", driver allocates ring groups in
bnxt_alloc_hwrm_rx_ring(). But during port start, driver invokes
bnxt_alloc_hwrm_rx_ring() followed by bnxt_alloc_all_hwrm_ring_grps().
This will cause the FW command failure in bnxt_alloc_all_hwrm_ring_grps()

To fix this, just don't create the ring group if it is already created.

Fixes: 9b63c6fd70 ("net/bnxt: support Rx/Tx queue start/stop")
Cc: stable@dpdk.org

Signed-off-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Reviewed-by: Lance Richardson <lance.richardson@broadcom.com>
2021-09-02 02:39:45 +02:00
Kalesh AP
8269a4e8af net/bnxt: fix ring group free
Added an invalid fw_grp_id check inside bnxt_hwrm_ring_grp_free().
This will prevent invalid fw_grp_id to be passed to the FW which can
result in an error.
This fixes the following failure in the "port stop" -> "port start"
sequence:

bnxt_hwrm_ring_grp_free(): error 2:0:00000000:0204
bnxt_hwrm_ring_grp_free(): error 2:0:00000000:0204

Fixes: 9b63c6fd70 ("net/bnxt: support Rx/Tx queue start/stop")
Cc: stable@dpdk.org

Signed-off-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Reviewed-by: Lance Richardson <lance.richardson@broadcom.com>
Reviewed-by: Somnath Kotur <somnath.kotur@broadcom.com>
2021-09-02 02:37:57 +02:00
Kalesh AP
620e0290d1 net/bnxt: fix VLAN indication in Rx mbuf
Fix to ignore the RX_PKT_CMPL_FLAGS2_META_FORMAT_VLAN
when the firmware doesn't support the VLAN strip offload.

Fixes: 2eb53b134a ("net/bnxt: add initial Rx code")
Cc: stable@dpdk.org

Signed-off-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>
Reviewed-by: Somnath Kotur <somnath.kotur@broadcom.com>
Reviewed-by: Lance Richardson <lance.richardson@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-09-02 02:34:03 +02:00
Kalesh AP
baedf29794 net/bnxt: check FW capability for VLAN offloads
VLAN offload capability may be disabled in the FW. The driver
should not attempt to override or utilize this feature in such
scenarios since it will not work as expected.

Fixes: 0a6d2a7200 ("net/bnxt: get device infos")
Cc: stable@dpdk.org

Signed-off-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>
Reviewed-by: Somnath Kotur <somnath.kotur@broadcom.com>
Reviewed-by: Lance Richardson <lance.richardson@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-09-02 02:33:50 +02:00
Kalesh AP
167978c167 net/bnxt: fix mbuf VLAN in scalar Rx
In the scalar Rx path, for the VLAN packet, TCI is not saved in
the "mbuf->vlan_tci", however the STRIPPED offload flag is set
along with PKT_RX_VLAN flag.

Fixes: c1b33d4031 ("net/bnxt: use table based mbuf flags handling")
Cc: stable@dpdk.org

Signed-off-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>
Reviewed-by: Somnath Kotur <somnath.kotur@broadcom.com>
Reviewed-by: Lance Richardson <lance.richardson@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-09-02 02:33:39 +02:00
Qiming Chen
8908691632 net/ixgbe: fix Rx multicast statistics after reset
In the implementation of the VF driver ixgbevf_update_stats to obtain
statistics, the multicast count hw_stats->vfmprc has been obtained,
but it is not cleared in the corresponding ixgbevf_dev_stats_reset
interface.

Fixes: abf7275bba ("ixgbe: move to drivers/net/")
Cc: stable@dpdk.org

Signed-off-by: Qiming Chen <chenqiming_huawei@163.com>
Acked-by: Haiyue Wang <haiyue.wang@intel.com>
2021-09-01 08:19:31 +02:00
Tudor Cornea
7fe7418213 net/iavf: fix overflow in maximum packet length config
The len variable, used in the computation of max_pkt_len could
overflow, if used to store the result of the following computation:

rxq->rx_buf_len * IAVF_MAX_CHAINED_RX_BUFFERS

Since, we could define the mbuf size to have a large value (i.e 13312),
and IAVF_MAX_CHAINED_RX_BUFFERS is defined as 5, the computation
mentioned above could potentially result in a value which might be
bigger than MAX_USHORT.

The result will be that Jumbo Frames will not work properly

Fixes: 69dd4c3d08 ("net/avf: enable queue and device")
Cc: stable@dpdk.org

Signed-off-by: Tudor Cornea <tudor.cornea@gmail.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-08-30 03:05:32 +02:00
Jie Wang
415363e2fc net/ice: fix queue config in DCF
When DCF configures rx_queues, it may cause the pointer of
rx_queues to go out of bounds.

This patch expands the scope of the judgment condition to
fix this issue.

Fixes: 4b0d391f0e ("net/ice: add queue config in DCF")
Cc: stable@dpdk.org

Signed-off-by: Jie Wang <jie1x.wang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-08-29 15:12:59 +02:00
Yu Wenjun
22db014997 net/ice: fix deadlock on flow query
Default case of the switch statement causes deadlock because it returns
without unlocking the 'flow_ops_lock' lock. Fixing it.

Fixes: 0d6ef740e4 ("net/ice: support flow ops thread safe")
Cc: stable@dpdk.org

Signed-off-by: Yu Wenjun <yuwenjun0x@163.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-08-29 15:07:19 +02:00
Wenjun Wu
b3d95f1817 net/ice: fix default RSS hash for IP fragments
Previously, hash value is calculated by src IP address, dst IP address
and IP ID. However, default RSS field only needs src and dst IP address.

This patch removes IP ID from default RSS field for IP fragment packets
to improve default RSS configuration.

Fixes: 4027fffe86 ("net/ice: support default RSS for IP fragment packet")
Cc: stable@dpdk.org

Signed-off-by: Wenjun Wu <wenjun1.wu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-08-29 13:48:01 +02:00
Wenjun Wu
54d7846234 net/iavf: fix default RSS hash for IP fragments
Previously, hash value is calculated by src IP address, dst IP address
and IP ID. However, default RSS field only needs src and dst IP address.

This patch removes IP ID from default RSS field for IP fragment packets
to improve default RSS configuration.

Fixes: 9e29a278bc ("net/iavf: support default RSS for IP fragment")
Cc: stable@dpdk.org

Signed-off-by: Wenjun Wu <wenjun1.wu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-08-29 13:46:06 +02:00
Wenjun Wu
fc299d7348 net/iavf: support flow director for IPv6 fragments
This patch adds L3 fields FDIR support for IPv6 fragment packets.

Signed-off-by: Wenjun Wu <wenjun1.wu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-08-29 13:23:17 +02:00
Wenjun Wu
8cd9b090b4 net/iavf: fix flow director L3 field for IPv4 fragments
Originally, the value of field_selector for IPV4_FRAG header hdr1 is
the same as the previous header hdr2. For IPv4 packets, field_selector
for hdr2 can be any value between 0 and 4, depending on the selected
field. Actually, this value for IPV4_FRAG should be constant 0,
which denotes the field packet ID.

This patch adds an assignment to hdr1->field_selector to make sure that
it is always 0.

Fixes: 3334513ef4 ("net/iavf: support flow director for IP fragment")
Cc: stable@dpdk.org

Signed-off-by: Wenjun Wu <wenjun1.wu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-08-29 13:20:13 +02:00
Qi Zhang
fb50aadcb3 net/ice: fix RXDID default value in DCF
Since DPDK 20.11 the default rxdid is changed from 16 to 22, but the
DCF data path didn't change, the patch fix the gap.

Fixes: 12443386a0 ("net/ice: support flex Rx descriptor RxDID22")
Cc: stable@dpdk.org

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Tested-by: Zhimin Huang <zhiminx.huang@intel.com>
2021-08-29 13:13:56 +02:00
Haiyue Wang
96b25c496a net/ice: fix memzone leak after device init failure
When flow engine initialization or FXP resource reset failed, it needs
to free the memory zone and unregister the interrupt callback.

Bugzilla ID: 752
Fixes: 84dc7a95a2 ("net/ice: enable flow director engine")
Fixes: 7615a68950 ("net/ice: rework for generic flow enabling")
Fixes: 7edc7158d7 ("net/ice: cleanup RSS/FDIR profile on device init")
Cc: stable@dpdk.org

Reported-by: David Marchand <david.marchand@redhat.com>
Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-08-29 13:13:54 +02:00
Wenjun Wu
e4d745abaf net/ice/base: support flow director for IPv6 fragments
Add L2 and L3 FDIR field support for IPv6 fragment packets.

Signed-off-by: Wenjun Wu <wenjun1.wu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-08-29 13:13:52 +02:00
Heinrich Kuhn
96289f2b80 net/nfp: fix minimum descriptor sizes
The NFP4000/6000 supports a minimum of 256 Tx/Rx descriptors and not 64.
Before this patch when a DPDK application configured < 256 Tx
descriptors the hardware read/write pointers would be unmasked and not
wrapped at the expected size of the ring. The PMD logic to determine the
amount of free space in the Tx ring is incompatible with the unmasked
hwqueue pointers and this will result in the PMD not updating the
read pointer at all.The knock-on effect is that under high load the
PMD will potentially re-use a Tx descriptor before the hw has had a
chance to process that particular descriptor. This issue can manifest as
a DMA error when the hardware tries to perform a DMA with info from a
partially populated descriptor.

Fixes: defb9a5dd1 ("nfp: introduce driver initialization")
Cc: stable@dpdk.org

Signed-off-by: Heinrich Kuhn <heinrich.kuhn@corigine.com>
Signed-off-by: Simon Horman <simon.horman@corigine.com>
2021-08-31 17:55:22 +02:00
Rosen Xu
1b7ca7d165 net/ipn3ke: change experimental symbol to internal
'ipn3ke_bridge_func' is a global variable and it used in net & raw
drivers.
It's only used for drivers, so change it from EXPERIMENTAL to INTERNAL.

Signed-off-by: Rosen Xu <rosen.xu@intel.com>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Ray Kinsella <mdr@ashroe.eu>
2021-08-31 16:00:04 +02:00
Gagandeep Singh
93e2661efb crypto/dpaa_sec: support PDCP short MAC-I
This patch add PDCP security short MAC-I support for
dpaa_sec driver.

Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-09-08 17:20:30 +02:00
Gagandeep Singh
3d1037e92a crypto/dpaa2_sec: support PDCP short MAC-I
This patch add PDCP short mac support in dpaa2_sec driver.

Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-09-08 16:56:56 +02:00
Hemant Agrawal
45e019608f crypto/dpaa2_sec: support integrity only PDCP
To support short MAC-I, integrity only case is required
to be supported for PDCP.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
2021-09-08 16:52:02 +02:00
Srujana Challa
0489d26064 common/cnxk: fix attaching NPA LF to CPT VF
ATTACH_RESOURCES mailbox for CPT LFs is being called without
setting modify bit. Because of this previously attached NPA LF
to the CPT VF is getting removed, when only CPT VF is whitelisted.
This patch fixes the same.

Fixes: c045d2e5cb ("common/cnxk: add CPT configuration")
Cc: stable@dpdk.org

Signed-off-by: Srujana Challa <schalla@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-09-08 13:59:02 +02:00
Hemant Agrawal
4f6cfd1393 crypto/dpaa2_sec: add error packet counters
This patch add support to also counter err pkt counter per queue.
This also enhances few related debug prints.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-09-08 12:12:03 +02:00
Franck Lenormand
ebc27d1b68 crypto/dpaa_sec: force inline keys to save space
This patch improve storage and performance by force inline
of the keys.

Signed-off-by: Franck Lenormand <franck.lenormand@nxp.com>
Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-09-08 12:11:45 +02:00
Gagandeep Singh
c0182d6b75 common/dpaax/caamflib: fix IV for short MAC-I in SNOW3G
The logic was incorrectly doing conditional swap. It need to
be bit swap always.

Fixes: 73a24060cd ("crypto/dpaa2_sec: add sample PDCP descriptor APIs")
Cc: stable@dpdk.org

Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-09-08 12:10:43 +02:00
Franck Lenormand
81eb760d22 common/dpaax/caamflib: remove some inline keys
The space in descriptor buffer is scarce as it is limited to
64 words for platforms except ERA10 (which has 128).

As the descriptors are processed with QI, it adds some words
to the descriptor which is passed.

Some descriptors used for SDAP were using too much words reaching
the limit.

This patch reduces the number of words used by removing the inlining
of some keys (done for performance) in order to have working
descriptors.

Signed-off-by: Franck Lenormand <franck.lenormand@nxp.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-09-08 12:10:43 +02:00
Franck Lenormand
8aa1a67c47 common/dpaax/caamflib: remove DPOVRD clear for SDAP
For SDAP, we are not using the protocol operation to perform
4G/LTE operation so the DPOVRD option is not used.

Removing it save some space in the descriptor buffer and
execution time.

Signed-off-by: Franck Lenormand <franck.lenormand@nxp.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-09-08 12:09:29 +02:00
Franck Lenormand
7f9d9170f2 common/dpaax/caamflib: load correct HFN from desc buffer
The offset of the HFN word and Bearer/Dir word is different
depending on type of PDB.

The wrong value was used.

This patch address this issue

Signed-off-by: Franck Lenormand <franck.lenormand@nxp.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-09-08 12:08:38 +02:00
Gagandeep Singh
2ed12d9b63 crypto/dpaa_sec: support AES-CMAC integrity check
This patch adds support for AES_CMAC integrity
in non-security mode.

Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-09-08 12:08:10 +02:00
Gagandeep Singh
66f95673b9 crypto/dpaa_sec: support AES-XCBC-MAC
This patch adds support for AES-XCBC-MAC algo.

Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-09-08 10:13:52 +02:00
Gagandeep Singh
4c42352c30 crypto/dpaa_sec: support non-HMAC auth algos
This patch add support for non-HMAC, md5, shax algos.

Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-09-08 10:12:35 +02:00
Gagandeep Singh
3e4fbc6c9e crypto/dpaa_sec: support DES-CBC
add DES-CBC support and enable available cipher-only
test cases.

Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-09-08 10:10:50 +02:00
Akhil Goyal
af668035f7 cryptodev: expose driver interface as internal
The rte_cryptodev_pmd.* files are for drivers only and should be
private to DPDK, and not installed for app use.

Signed-off-by: Akhil Goyal <gakhil@marvell.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2021-09-08 09:35:12 +02:00
Akhil Goyal
e74abd4843 cryptodev: rename function to check device validity
The API rte_cryptodev_pmd_is_valid_dev, can be used
by the application as well as PMD to check whether
the device is valid or not. Hence, _pmd is removed
from the API.
The applications and drivers which use this API are
also updated.

Signed-off-by: Akhil Goyal <gakhil@marvell.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2021-09-08 09:21:10 +02:00
Archana Muniganti
d38febb08d crypto/cnxk: add feature flag for cn9k lookaside IPsec
Update device feature flag to support lookaside IPsec for
cn9k.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
2021-09-07 20:19:28 +02:00
Archana Muniganti
64d415e0ac crypto/cnxk: update tailroom requirement
Update min tailroom to reflect IPsec additions.
PMD crypto_cn9k & crypto_cn10k would have packet
grow into tailroom post IPsec processing.

Signed-off-by: Archana Muniganti <marchana@marvell.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
2021-09-07 20:11:00 +02:00
Archana Muniganti
67a87e8956 crypto/cnxk: add cn9k lookaside IPsec datapath
Adds support for cn9k lookaside enqueue and dequeue
operations.

Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
2021-09-07 20:09:24 +02:00
Archana Muniganti
38f66464c6 crypto/cnxk: add cn9k security session operations
Add security session ops.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
2021-09-07 20:09:14 +02:00
Archana Muniganti
b07ee12f3a common/cnxk: add cn9k IPsec microcode defines
Microcode IE opcodes support IPsec operations. Add defines
and structs defined by microcode.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
2021-09-07 19:54:12 +02:00
Archana Muniganti
4cbef1e936 crypto/cnxk: add cn9k security context
Add security ctx in cn9k crypto PMD.

Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
2021-09-07 19:36:35 +02:00
Ciara Power
589f5e033d crypto/openssl: fix CCM processing 0 length source
When given a source length 0 for CCM, the encryption and decryption
functions did not call the EVP_ENCRYPTUPDATE/EVP_DECRYPTUPDATE functions
with a src and dst, causing some FIPS validation failures for testcases
with PLen=0:

process_openssl_auth_encryption_ccm() line 1131:
Process openssl auth encryption ccm failed

Fixes: 1a4998dc4d ("crypto/openssl: support AES-CCM")
Cc: stable@dpdk.org

Signed-off-by: Ciara Power <ciara.power@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
2021-09-06 21:54:57 +02:00
Anoob Joseph
962bbb0b7f crypto/cnxk: add dual submission in cn9k
Submit two instructions with one LMTST operation.
Also updated dequeue path to have local var for constants.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-09-06 21:46:34 +02:00
Vidya Sagar Velumuri
c3c26fc30c crypto/cnxk: support ucode API change
Add support for API changes in ucode 1.13

Signed-off-by: Vidya Sagar Velumuri <vvelumuri@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-09-06 21:46:34 +02:00
Anoob Joseph
516f595a63 crypto/cnxk: remove redundant assignment
The assignment to -1 is not required. Remove the same.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-09-06 21:46:34 +02:00
Anoob Joseph
dd56077573 crypto/cnxk: remove redundant memcpy of IV for ZUC
Swap is not required for ZUC. Update IV updation
sequence to remove the redundant swap in case of ZUC.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-09-06 21:46:34 +02:00
Anoob Joseph
28b569218a crypto/cnxk: remove redundant SNOW3G decrypt
The opcode for encryption & decryption is the
same and single routine would be able to handle
both encryption and decryption operations.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-09-06 21:46:34 +02:00
Anoob Joseph
b5a96164a8 common/cnxk: update to v1.16 ucc codes
Update to v1.16 microcode completion codes.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-09-06 21:46:34 +02:00
Vidya Sagar Velumuri
a07d1d4dd9 common/cnxk: update to v1.13 ZUC API
Add support for ZUC API change in ucode 1.13

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Vidya Sagar Velumuri <vvelumuri@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-09-06 21:46:34 +02:00
Michael Baum
460756f95b crypto/mlx5: fix timestamp format configuration
This patch adds support for the timestamp format settings for
the receive and send queues. If the firmware version x.30.1000
or above is installed and the NIC timestamps are configured
with the real-time format, the default zero values for newly
added fields cause the queue creation to fail.

The patch queries the timestamp formats supported by the hardware
and sets the configuration values in queue context accordingly.

Fixes: 6152534e21 ("crypto/mlx5: support queue pairs operations")
Cc: stable@dpdk.org

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-09-06 21:46:34 +02:00
Shijith Thotton
caf9ca4718 event/cnxk: add cn10k crypto adapter fast path
Set crypto adapter enqueue and dequeue operations for CN10K.

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-09-06 21:46:34 +02:00
Shijith Thotton
a200e7a9f2 crypto/cnxk: add cn10k crypto adapter fast path
Added crypto adapter enqueue and dequeue operations for CN10K.

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Acked-by: Ray Kinsella <mdr@ashroe.eu>
Acked-by: Anoob Joseph <anoobj@marvell.com>
2021-09-06 21:46:34 +02:00
Shijith Thotton
16261be9a3 event/cnxk: add cn9k crypto adapter fast path
Set crypto adapter enqueue and dequeue operations for CN9K.

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-09-06 21:46:34 +02:00
Shijith Thotton
4f7154d612 crypto/cnxk: add cn9k crypto adapter fast path
Added crypto adapter enqueue and dequeue operations for CN9K.

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Acked-by: Ray Kinsella <mdr@ashroe.eu>
Acked-by: Anoob Joseph <anoobj@marvell.com>
2021-09-06 21:46:34 +02:00
Shijith Thotton
19f81cb59c event/cnxk: add crypto adapter operations
Added eventdev ops required to initialize crypto adapter.

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-09-06 21:46:34 +02:00
Shijith Thotton
044bb99d6f common/cnxk: add function to check CPT IQ is full
Added flow control based check to determine CPT IQ is full.

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-09-06 21:46:34 +02:00
Shijith Thotton
fa71c328d1 event/cnxk: add macros to set eventdev operations
Added a common macro to set eventdev enqueue and
dequeue operations to reduce code.

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-09-06 21:46:34 +02:00
Shijith Thotton
64a1029a01 net/cnxk: add flag to show CPT can enqueue events
CPT can be told to submit events to SSO upon completion.
Crypto adapter uses this feature and the new flag can be
used to optimize receive path in those cases.

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-09-06 21:46:34 +02:00
Danny Patel
05f157b8c5 crypto/octeontx2: fix unaligned access to device memory
Use otx2_mbox_memcpy() instead of memcpy() to prevent unaligned access.

Fixes: a0645ed0d6 ("crypto/octeontx2: discover capabilities")
Cc: stable@dpdk.org

Signed-off-by: Danny Patel <dannyp@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
2021-09-06 21:46:34 +02:00
Michael Baum
12b253ee87 compress/mlx5: fix leak on QP setup failure
The QP setup function allocates buffer for its
opaque MR and register it into MR structure.

After buffer allocation and before MR registration,
it tries allocate MR Btree.
When the MR Btree allocation fails, the buffer was
not freed what caused a memory leak.

Allocate the MR Btree before buffer alloction.

Fixes: 0165bccdb4 ("compress/mlx5: add memory region management")
Cc: stable@dpdk.org

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-09-06 21:46:34 +02:00
Archana Muniganti
80d56d2d35 common/cnxk: make IPsec defines common
Make IPsec defines common and remove redundant macros.

Signed-off-by: Archana Muniganti <marchana@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-09-06 21:46:34 +02:00
Tejasree Kondoj
d9bf3a4150 crypto/cnxk: support cn10k transport mode
Adding support for cn10k lookaside IPsec transport mode.

Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-09-06 21:46:26 +02:00
Archana Muniganti
e997823da8 crypto/cnxk: make IPsec verify functions common
IPsec verify functions can be made common which can
be used for both cn9k and cn10k

Signed-off-by: Archana Muniganti <marchana@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-09-06 21:44:08 +02:00
Tejasree Kondoj
d665f0fc3d crypto/cnxk: use rlen from CPT result with lookaside
Use rlen from CPT result with lookaside operations

Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-09-06 21:44:08 +02:00
Tejasree Kondoj
77ca2a4f1f crypto/cnxk: remove redundant code
Removing redundant code in cn10k lookaside IPsec.

Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-09-06 21:44:08 +02:00
Tejasree Kondoj
9b4a4cc0e7 crypto/cnxk: support lookaside IPsec
Added lookaside IPsec AES-CBC-HMAC-SHA1
support to cnxk driver.

Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-09-06 21:44:03 +02:00
Tejasree Kondoj
d85f9749f9 common/cnxk: add hash generation API
Adding functions for hash generation that can be used
in hmac opad/ipad calculation.

Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-09-03 17:00:22 +02:00
Xueming Li
d2a66ad794 bus: add device arguments name parsing
For device probe and iterator, devargs name was key information,
parsed by rte_devargs_parse. In legacy parser, devargs name was
extracted after bus name:
  bus:name,kv_arguments,,,
Example:
  pci:83:00.0,arguments,...
  vdev:pcap0,...

To be compatible with legacy parser, this patch introduces new
bus driver API devargs_parse to parse devargs and update devargs name.
If devargs_parse not implemented by bus driver, the new syntax parser
rte_devargs_layers_parse default will resolve devargs name from bus's
"name" argument.

Different bus driver might choose different keys from arguments with
unified format. The PCI bus implementation fills the devargs name with
the "addr" argument, example:
 -a bus=pci,addr=83:00.0/class=eth/driver=mlx5,...
    name: 0000:03:00.0
 -a bus=vdev,name=pcap0/class=eth/driver=pcap,...
    name:pcap0

Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Reviewed-by: Gaetan Rivet <grive@u256.net>
2021-09-02 16:58:19 +02:00
Ajit Khaparde
ed0ebb6e17 net/bnxt: fix VNIC config error in Rx queue start
During port stop/start sequence the Thor FW is returning an error.
This is because we are deriving incorrect active Rx ring and using
that wrong information in the bnxt_vnic_rss_cfg HWRM command.

Fix it by using the rx_queue_state from eth_dev.

Fixes: 0105ea1296 ("net/bnxt: support runtime queue setup")
Cc: stable@dpdk.org

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Reviewed-by: Somnath Kotur <somnath.kotur@broadcom.com>
2021-08-25 05:55:07 +02:00
Somnath Kotur
61cd4384fa net/bnxt: fix crash after port stop/start
On chips like Thor, port stop/start sequence could result in a crash
in the application. This is because of false detection of a bad
opaque in the Rx completion and the subsequent kicking-in of the ring
reset code to recover from the condition.
The root cause being that the port stop/start would result in the HW
starting with fresh values, while the driver internal tracker variable
`rx_next_cons` is still pointing to a stale value.
Fix this by resetting rx_next_cons to 0 in bnxt_init_one_rx_ring()

Fixes: 03c8f2fe11 ("net/bnxt: detect bad opaque in Rx completion")
Cc: stable@dpdk.org

Signed-off-by: Somnath Kotur <somnath.kotur@broadcom.com>
Reviewed-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-08-25 03:13:52 +02:00
Shiri Kuzin
3b48087a8a net/mlx5: update GENEVE TLV option matching
The GENEVE TLV option matching is done using a flex parser.

Recent update in firmware, requires that in order to match on the
GENEVE TLV option the "geneve_tlv_option_0_exist" bit should be set.

Add the new "geneve_tlv_option_0_exist" setting when translating the
GENEVE TLV option item.

Signed-off-by: Shiri Kuzin <shirik@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-08-22 10:09:11 +02:00
Ajit Khaparde
ed0ae3502f net/bnxt: update ring group after ring stop start
A Rx ring stop start sequence may result in the FW returning
a different set of Rx ring and AGG ring IDs. If the ring group
is not updated with the new IDs, the HW sees the host driver using
incorrect BD types for the Rx ring and AGG ring. This can cause
the chip to go into a bad state or encounter RE_flush issue
or leak mbufs in the HW.

Fix this by issuing a bnxt_hwrm_ring_grp_free() and an
bnxt_hwrm_ring_grp_alloc() to refresh the ring group information.

Fixes: 9b63c6fd70 ("net/bnxt: support Rx/Tx queue start/stop")
Cc: stable@dpdk.org

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Reviewed-by: Somnath Kotur <somnath.kotur@broadcom.com>
2021-08-19 06:39:23 +02:00
Dmitry Kozlyuk
12d42b248c net/mlx5: fix eCPRI matching
When an ETH or VLAN flow item directly preceding ECPRI (i. e. a pattern
for eCPRI over Ethernet) did not specify the eCPRI protocol, matches
were not restricted to eCPRI traffic. For example, "eth / ecpri / end"
pattern behaved as "eth / end". Implicitly add Ethernet type condition,
so that "eth / ecpri / end" behaves as "eth type is 0xAEFE / end".

Fixes: daa38a8924 ("net/mlx5: add flow translation of eCPRI header")
Cc: stable@dpdk.org

Signed-off-by: Dmitry Kozlyuk <dkozlyuk@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-08-19 10:13:41 +02:00
Alexander Kozyrev
828274b70a net/mlx5: fix mbuf replenishment check for zipped CQE
A core dump is being generated with the following call stack:
0 _mm256_storeu_si256 (__A=..., __P=0x80)
1 rte_mov32 (src=0x2299c9140 "", dst=0x80)
2 rte_memcpy_aligned (n=60, src=0x2299c9140, dst=0x80)
3 rte_memcpy (n=60, src=0x2299c9140, dst=0x80)
4 mprq_buf_to_pkt (strd_cnt=1, strd_idx=0, buf=0x2299c8a00, len=60,
pkt=0x18345f0c0, rxq=0x18345ef40)
5 rxq_copy_mprq_mbuf_v (rxq=0x18345ef40, pkts=0x7f76e0ff6d18, pkts_n=5)
6 rxq_burst_mprq_v (rxq=0x18345ef40, pkts=0x7f76e0ff6d18, pkts_n=46,
err=0x7f76e0ff6a28, no_cq=0x7f76e0ff6a27)
7 mlx5_rx_burst_mprq_vec (dpdk_rxq=0x18345ef40, pkts=0x7f76e0ff6a88,
pkts_n=128)
8 rte_eth_rx_burst (nb_pkts=128, rx_pkts=0x7f76e0ff6a88,
queue_id=<optimized out>, port_id=<optimized out>)

This crash is caused by an attempt to copy previously uncompressed CQEs
into non-allocated mbufs. There is a check to make sure we only use
allocated mbufs in the rxq_burst_mprq_v() function, but it is done only
before the main processing loop. Leftovers of compressed CQEs session are
handled before that loop and may lead to the mbufs overflow as seen.

Move the check for replenished mbufs up to protect uncompressed CQEs
session leftovers from accessing non-allocated mbufs after the
mlx5_rx_mprq_replenish_bulk_mbuf() function is invoked.

Bugzilla ID: 746
Fixes: 0f20acbf5e ("net/mlx5: implement vectorized MPRQ burst")
Cc: stable@dpdk.org

Signed-off-by: Alexander Kozyrev <akozyrev@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-08-19 10:13:40 +02:00
Lior Margalit
3f02c7ff68 net/mlx5: fix RSS expansion for inner tunnel VLAN
The RSS expansion algorithm is using a graph to find the possible
expansion paths. The VLAN item in the flow pattern requires special
treatment, because it should not be added implicitly by the expansion
algorithm.  If the flow pattern ends with ETH item, the pattern will be
expanded with IPv4 and IPv6.
For example:
testpmd> flow create ... eth / end actions rss / end
ETH END
ETH IPV4 END
ETH IPV6 END
If a VLAN item follows the ETH item in the flow pattern, the pattern
will be expanded with IPv4 and IPv6 following the VLAN item.
For example:
testpmd> flow create ... eth / vlan / end actions rss level 1 / end
ETH VLAN END
ETH VLAN IPV4 END
ETH VLAN IPV6 END

The case of inner tunnel VLAN item was not taken care of so the flow
pattern did not expand with IPv6 and IPv4 as expected.
Example with inner VLAN:
testpmd> flow create ... / vxlan / eth / vlan / end actions rss level 2
/ end
The current result of the expansion alg:
ETH IPV6 UDP VXLAN ETH VLAN END
The expected result of the expansion alg:
ETH IPV6 UDP VXLAN ETH VLAN END
ETH IPV6 UDP VXLAN ETH VLAN IPV4 END
ETH IPV6 UDP VXLAN ETH VLAN IPV6 END

The fix is to introduce a new flag to set on a graph expansion node
to apply the 'explicit' behavior, meaning the node is not added to
the expanded pattern, if it is not found in the flow pattern, but the
expansion alg can go deeper to its next nodes.

Fixes: c7870bfe09 ("ethdev: move RSS expansion code to mlx5 driver")
Cc: stable@dpdk.org

Signed-off-by: Lior Margalit <lmargalit@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-08-19 10:13:35 +02:00
Jiawen Wu
e0f29d601c net/txgbe: fix L4 port mask in flow director
Remove bit reverse for TCP/UDP port mask, since it causes the flows with
some TCP/UDP ports to disobey the flow director rules.

Fixes: ea230dda16 ("net/txgbe: configure flow director filter")
Cc: stable@dpdk.org

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
2021-08-18 16:04:09 +02:00
Jiawen Wu
00970f6398 net/txgbe: fix reading SFP module SFF-8472 data
Fix the I2C target address selection to read SFP module's SFF-8472 data.

Fixes: 8f09fb4642 ("net/txgbe: add module identify")
Cc: stable@dpdk.org

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
2021-08-18 16:04:09 +02:00
Jiawen Wu
12a653eb53 net/txgbe: fix link status when device stopped
When device is stopped, the port status is not changed and only the Tx
laser is turned off by hardware design.

Fixes: 0c061eadec ("net/txgbe: add link status change")
Cc: stable@dpdk.org

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
2021-08-18 16:04:09 +02:00
Heinrich Kuhn
8d7a59f171 net/nfp: rename files for consistency
Rename the nfp_net.c file to nfp_common as it now contains functions
common to VF and PF functionality. Rename the header file too to be
consistent. Also remove the "net" naming from the _ctrl and _logs files
for consistency across the PMD.

Signed-off-by: Heinrich Kuhn <heinrich.kuhn@netronome.com>
Signed-off-by: Simon Horman <simon.horman@corigine.com>
2021-08-17 18:26:57 +02:00
Heinrich Kuhn
646ea79ce4 net/nfp: move PF functions into its own file
Similar to the last commit, this changeset moves all the PF specific
functions to a new file called nfp_ethdev.c.

Signed-off-by: Heinrich Kuhn <heinrich.kuhn@netronome.com>
Signed-off-by: Simon Horman <simon.horman@corigine.com>
2021-08-17 18:26:57 +02:00
Heinrich Kuhn
7f8e73201d net/nfp: move VF functions into its own file
Move any ethdev functionality specific to VF devices into a new file
called nfp_ethdev_vf.c.

Signed-off-by: Heinrich Kuhn <heinrich.kuhn@netronome.com>
Signed-off-by: Simon Horman <simon.horman@corigine.com>
2021-08-17 18:26:57 +02:00
Heinrich Kuhn
58b1c2e736 net/nfp: move common function prototypes
The majority of "ethdev" type functions are used for both PF devices and
VF devices. Prototype these functions in the nfp_net_pmd header file in
preparation of splitting PF and VF specific functions.

Signed-off-by: Heinrich Kuhn <heinrich.kuhn@netronome.com>
Signed-off-by: Simon Horman <simon.horman@corigine.com>
2021-08-17 18:26:57 +02:00
Heinrich Kuhn
19af5a38f7 net/nfp: move CPP bridge to separate file
This commit moves the CPP bridge logic to a separate file. A new
corresponding header file is also created.

Signed-off-by: Heinrich Kuhn <heinrich.kuhn@netronome.com>
Signed-off-by: Simon Horman <simon.horman@corigine.com>
2021-08-17 18:26:57 +02:00
Heinrich Kuhn
79c7601a64 net/nfp: move datapath functions to their own file
Create a new rxtx file and move the Rx/Tx functions to this file. This
commit will also move the needed shared functions to the nfp_net_pmd.h
file as needed.

Signed-off-by: Heinrich Kuhn <heinrich.kuhn@netronome.com>
Signed-off-by: Simon Horman <simon.horman@corigine.com>
2021-08-17 18:26:57 +02:00
Heinrich Kuhn
74f99d454e net/nfp: split datapath structs into separate file
This change splits out the rx/tx specific structs and defines from the
main nfp_net_pmd header file and into their own header file.

Signed-off-by: Heinrich Kuhn <heinrich.kuhn@netronome.com>
Signed-off-by: Simon Horman <simon.horman@corigine.com>
2021-08-17 18:26:57 +02:00
Huisong Li
168b7d79da net/hns3: support set link up/down for PF
This patch adds set link up/down feature. RxTx datapath and link status
will be disabled when dev_set_link_down() is called, and can be enabled by
dev_start() or dev_set_link_up().

Signed-off-by: Huisong Li <lihuisong@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
2021-08-17 12:59:00 +02:00
Huisong Li
69f9b420d8 net/hns3: add Tx start/stop multi-process handling
Currently, hns3 PMD has supported start/stop RxTx datapath request message
between the primary and secondary processes. However, there are some cases
only to start/stop Tx datapath. This patch adds start/stop Tx datapath
request for MP.

Signed-off-by: Huisong Li <lihuisong@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
2021-08-17 12:59:00 +02:00
Ferruh Yigit
23b096a374 net/nfp: remove compile time log
Logging should be converted to dynamic log.

Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
Reviewed-by: Heinrich Kuhn <heinrich.kuhn@netronome.com>
2021-08-16 16:03:30 +02:00
Ting Xu
e787b44a6b net/ice: fix bandwidth config size in memory copy
The memory size of bandwidth config parameters is not set correctly in
memory copy process, which leads to the wrong values. This patch fixed
the size to the correct value.

Fixes: 3a6bfc37ea ("net/ice: support QoS config VF bandwidth in DCF")
Cc: stable@dpdk.org

Signed-off-by: Ting Xu <ting.xu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-08-15 04:32:03 +02:00
Simei Su
4f72c21fdf net/ice: fix max entry number for ACL normal priority
For ACL, there are three entry priorities: LOW, NORMAL, HIGH.
Low priority starts from the highest index, 25% of total entries;
Normal priority starts from the highest index, 50% of total entries;
High priority starts from the lowest index, 25% of total entries.

Each TCAM block has 512 entries of 40 bits. Currently, there is a
scenario in which multiple TCAM blocks are cascaded. It means the
total entries are 512. The default priority is NORMAL, so the max
entry is 256, not 512. This patch changes the max entry number for
NORMAL priority.

Fixes: 40d466fa9f ("net/ice: support ACL filter in DCF")
Cc: stable@dpdk.org

Signed-off-by: Simei Su <simei.su@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-08-15 04:31:51 +02:00
Qi Zhang
2337015643 net/ice/base: increase maximum TCAM/PTG per profile
For GTPoGRE protocol in AVF FDIR/RSS, the number of associated PTGs
of one Profile may exceed the defined ICE_MAX_PTG_PER_PROFILE and
ICE_MAX_TCAM_PER_PROFILE. In those cases, some PTGs may be missed,
and therefore, the related and received packets will not have hash
values. Thus, this patch updated the ICE_MAX_PTG_PER_PROFILE and
ICE_MAX_TCAM_PER_PROFILE to a larger number 64.

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-08-11 04:25:34 +02:00
Qi Zhang
34be38f024 net/ice/base: fix typo in comment
Correct spelling of word data instead of date.

Fixes: 453d087cca ("net/ice/base: add common functions")
Cc: stable@dpdk.org

Signed-off-by: Kevin Scott <kevin.c.scott@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-08-11 04:25:29 +02:00
Qi Zhang
274eb0541e net/ice/base: rename and add setter for unicast MAC flag
Rename ucast_shared to umac_shared, as "umac" is a more widely
used shorthand for "unicast MAC".

Also add a helper function to set this flag. This helper is
expected to be called by core drivers.

Signed-off-by: Anirudh Venkataramanan <anirudh.venkataramanan@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-08-11 04:25:25 +02:00
Qi Zhang
4081cbd966 net/ice/base: support flow director for GTPU UL/DL with QFI
Enable Flow Director filtering for GTPU UL/DL QFI field matching.

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-08-11 04:25:21 +02:00
Qi Zhang
34a298a50b net/ice/base: enable jumbo frame during HW init
Call ice_aq_set_mac_cfg in ice_hw_init to enable jumbo frame support.

Signed-off-by: Anirudh Venkataramanan <anirudh.venkataramanan@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-08-11 04:25:17 +02:00
Qi Zhang
63137fa561 net/ice/base: support RSS for IPv4/L4 checksum
The IPv4/TCP/UDP/SCTP header checksum fields are defined in this
patch and can be used as RSS input sets.

Signed-off-by: Alvin Zhang <alvinx.zhang@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-08-11 04:25:13 +02:00
Qi Zhang
598be58400 net/ice/base: support flow director for GTPoGRE
Enable Flow Director filtering for GTPoGRE inner/outer fields
matching.

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-08-11 04:25:09 +02:00
Qi Zhang
390728c2e6 net/ice/base: enable NVM update reset capabilities
Add logic to parse capabilities relating to the firmware update reset
requirements. This includes both capability 0x76, which informs the
driver if the firmware can sometimes skip PCIe resets, and 0x77, which
informs the driver if the firmware might potentially restrict EMP
resets.

For capability 0x76, if the number is 1, the firmware will report the
required reset level for a given update as part of its response to the
last command sent to program the NVM bank. (Otherwise, if the firmware
does not support this capability then it will always send a 0 in the
field of the response).

For capability 0x77, if the number is 1, the firmware will report when
EMP reset is available as part of the response to the command for
switching flash banks. (Otherwise, if the firmware does not support this
capability, it will always send a 0 in the field of the response
message).

These capabilities are required to implement immediate firmware
activation. If the capabilities are set, software can read the response
data and determine what reset level is required to activate the firmware
image. If only an EMP reset is required, and if the EMP reset is not
restricted by firmware, then the driver can issue an EMP reset to
immediately activate the new firmware.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-08-11 04:25:04 +02:00
Qi Zhang
f6e5d8bb28 net/ice/base: support RSS for GTPoGRE
Support RSS for GTPoGRE inner fields hash.

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-08-11 04:24:59 +02:00
Qi Zhang
64d0083d34 net/ice/base: support flow director for GTPU EH inner IPv6
Support FDIR filtering for IPV4_GTPU_EH_IPV6 with inner
IPV6/UDP/TCP fields matching.

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-08-11 04:24:55 +02:00
Qi Zhang
c9cdbda853 net/ice/base: support RSS for GRE tunnel
Support RSS of inner headers for GRE tunnel packet.

Signed-off-by: Wenjun Wu <wenjun1.wu@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-08-11 04:24:50 +02:00
Qi Zhang
cbd13fb885 net/ice/base: support flow director for GRE tunnel
Support IPV4_GRE and IPV6_GRE with inner IPV4/IPV6/UDP/TCP for
FDIR.

Signed-off-by: Wenjun Wu <wenjun1.wu@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-08-11 04:24:46 +02:00
Qi Zhang
5889905bab net/ice/base: support TC nodes PIR configuration
TC nodes CIR configuration is not supported. In order to configure PIR,
the corresponding adminq command should not include the flag for CIR.
Since the TC node info has this flag by default, it is supposed to delete
this flag for TC nodes before sending the adminq command.

Signed-off-by: Ting Xu <ting.xu@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-08-11 04:24:41 +02:00
Qi Zhang
871bda1270 net/ice/base: refine MAC rule adding
Move replay_pre_init function to interface.
Add further MAC rules, despite unicast address is already on list.

Signed-off-by: Marcin Domagala <marcinx.domagala@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-08-11 04:24:35 +02:00
Qi Zhang
8cb3d9dfc6 net/ice/base: add new AQ description
Add ice_aqc_sw_gpio struct to ice_aq_desc
This change allows us to do SW_GPIO AQ cmd transactions
over ice_aq_send_cmd() interface.

Signed-off-by: Siddaraju DH <siddaraju.dh@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-08-11 04:24:31 +02:00
Qi Zhang
553fd7a7ae net/ice/base: implement firmware debug dump
Basic implementation of FW Debug Dump.

Signed-off-by: Marcin Domagala <marcinx.domagala@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-08-11 04:24:26 +02:00
Qi Zhang
e4a0ac89b0 net/ice/base: add E810T check function
Add function ice_is_e810t() to be able to distinguish if hardware is
E810T based or not.

Signed-off-by: Michal Michalik <michal.michalik@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-08-11 04:24:22 +02:00
Qi Zhang
6f71d4978a net/ice/base: support starting PHY in bypass mode
After starting the timestamping block, hardware begins calculating
precise offsets through a process of vernier calibration. This process
measures the effective phase offset of the various internal clocks used
in the PHY.

Once hardware completes these measurements, the P_REG_TX_OV_STATUS and
P_REG_RX_OV_STATUS registers are updated to indicate that the hardware
offset measurements are done.

This process does not happen immediately, but requires that at least one
packet be sent or received in order for the offset in that direction to
be calculated.

This poses a problem in some setups, because software expects the first
packet sent to be timestamped. This most often occurs if the clock time
is set by an application during startup. This set time command triggers
a PHY restart. Because of this, the timestamping block is reset, and
timestamps are not enabled until vernier calibration is complete. Since
this process won't complete until at least one packet is sent through
the PHY, timestamps of the very first packet sent will not be obtained.

This can result in the application failing due to missing timestamps.

To avoid this, allow starting the PHY in bypass mode. This mode enables
timestamps immediately, and skips adding the precise offset measurement.
This reduces the accuracy of the timestamp slightly, but ensures that we
get a reasonable value for the first packet.

The driver can continue monitoring the P_REG_TX_OV_STATUS and
P_REG_RX_OV_STATUS registers and exit bypass mode once the total
calibration is completed. In this way, once calibration is complete, the
timestamps will have the precise offset, but we do not break
applications which expect to be able to timestamp immediately.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-08-11 04:24:18 +02:00
Qi Zhang
a3f1d0e4fc net/ice/base: clarify comments on checking PFC mode
Rework the comment around checking PFC mode to make it clear why we are
checking the mode after sending the command.

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-08-11 04:24:13 +02:00
Qi Zhang
ca3feb9036 net/ice/base: implement Vernier calibration for E822
Move the implementation of Vernier calibration from Linux core ice_ptp.c
into the shared ice_ptp_hw.c file.

This implementation was recently refactored in Linux, so the move should
be verbatim with the latest Linux code that we had implemented.

This includes a new constant table with pre-determined values based on
link speed, new functions to aide in reading the multi-register values
from the PHY, functions to program the PAR/PCS conversion ratios, and
the UIX conversion ratios, functions to program the total Tx and Rx
offset after vernier calibration in the hardware completes, and finally
a function to start and stop the PHY timestamping block.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-08-11 04:24:08 +02:00
Qi Zhang
886b8115fc net/ice/base: print human-friendly PHY types
Add functions to print PHY types in human-friendly form

Signed-off-by: Anirudh Venkataramanan <anirudh.venkataramanan@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-08-11 04:24:03 +02:00
Qi Zhang
25c8802a2e net/ice/base: add accessors to get/set time reference
The E822 device clock might come from a variety of different sources,
called TIME_REFs. The firmware reports the current TIME_REF as part of
its function capabilities, which the driver caches when it loads.

Add an accessor function to look up the current TIME_REF from the
capabilities. This reduces line length significantly and also avoids
a tight coupling to the capabilities structure.

In some cases, TIME_REF might change at run time. This can occur in the
event that the CGU registers are updated. When this happens, its
possible that the capabilities structure can be out of date until the
capabilities are re-read.

Add a setter function to update the TIME_REF when this occurs. The
driver can call this function after updating the CGU to ensure that the
TIME_REF in the capabilities structure is up to date, without needing to
re-read the entire capabilities from firmware.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-08-11 04:23:59 +02:00
Qi Zhang
200df241d4 net/ice/base: add clock initialization function
Before the device PTP hardware clock can be initialized, some steps must
be taken by the driver. This includes writing some registers and
initializing the PHY.

Some of these steps are distinct depending on the device type (E810 or
E822). Additionally, a future change will introduce more steps for E822
devices to program the Clock Generation Unit.

Introduce ice_ptp_init_phc as well as device-specific sub-functions for
e810 and e822 devices.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-08-11 04:23:54 +02:00
Qi Zhang
275e88b0cf net/ice/base: add timestamp masks
Adding macros for shift and masking of the lower timestamp work in the
Rx flex descriptor. The LSB of the timestamp-low word indicates the
validity of the timestamp while the rest 7 bits contain the timestamp.

Signed-off-by: Vignesh Sridhar <vignesh.sridhar@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-08-11 04:23:45 +02:00
Qi Zhang
21bc183b68 net/ice/base: change dummy packets with VLAN
Ethertype was traded as VLAN tpid in dummy packets with VLAN.
This led to a problem when user wanted to add filter for VLAN and
ethertype.

Change ice_vlan_hdr to reflect correct order of VLAN fields in
packets (VLAN tpid, VLAN id). Correct all dummy packets with VLAN.
Move VLAN fields before ethertype and change offsets. Leave values
from dummy packets unchanged as they fit to new VLAN layout.

Order of offsets in ice_prot_ext_tbl_entry for VLAN protocol should
reflect order of fields in ice_vlan_hdr. However, hardware doesn't
support matching on all tpid. This should be done by matching on
packet flags. There is no FV word with protocol for VLAN and offset
2. Because of that, adding vlan tpid with not zero mask will lead
to error in creating recipe.

Signed-off-by: Michal Swiatkowski <michal.swiatkowski@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-08-11 04:23:38 +02:00
Qi Zhang
e0f9aa39fb net/ice/base: add ethertype IPv6 check for dummy packet
In order to support switch rule for ethertype filter
with ipv6 ethertype id, it has to check ethertype and
then find a proper dummy packet. There was a silent
assumption that packet is ipv4, unless src or dst ipv6
address is specified in a flow.

Signed-off-by: Grzegorz Nitka <grzegorz.nitka@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-08-11 04:23:23 +02:00
Qi Zhang
97f4f78bbd net/ice/base: add functions for device clock control
The ice hardware supports exposing a hardware clock for high precision
timestamping. This is primarily intended for accelerating the Precision
Time Protocol.

Add several low level functions intended to be used as the basis for
enabling the device clock, and ensuring that the port timers are
synchronized properly.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-08-11 04:23:18 +02:00
Qi Zhang
c9d0fccff0 net/ice/base: add IEEE 1588 capability probing
Parse 1588 timesync capability during device capability probing.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-08-11 04:23:10 +02:00
Ruifeng Wang
1a3f6cde64 net/i40e: fix clang warning on non-x86
Build on aarch64 with clang-10 has warning:
i40e_rxtx.c:3228:1:
	warning: unused function 'get_avx_supported' [-Wunused-function]

The function is used in x86 specific path. Moved it into ifdef
to fix build on non-x86.

Fixes: c30751afc3 ("net/i40e: fix data path selection in secondary process")
Cc: stable@dpdk.org

Signed-off-by: Ruifeng Wang <ruifeng.wang@arm.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-08-10 09:48:33 +02:00
Wenjun Wu
72908beba9 net/ice: fix priority of DCF switch rule
This patch fixes the reversed priority of DCF switch rule. Priority 0
and 1 are supported, and priority 0 should be the highest priority.

Fixes: 2321e34c23 ("net/ice: support flow priority for DCF switch filter")
Cc: stable@dpdk.org

Signed-off-by: Wenjun Wu <wenjun1.wu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-08-10 05:06:19 +02:00
Feifei Wang
319df9f9bf net/i40e: reduce L1 cache misses in NEON Rx
For N1 platform, packet mbuf load and descs load are hot spots to limit
the performance for "desc_to_ptype_v" and "desc_to_olflags_v" functions
in i40e rx NEON path. This is because packet mbuf and descs are evicted
from l1d-cache to l2d-cache.

To reduce l1d-cache-misses and improve the performance, change the code
order and move "desc_to_ptype_v" and "desc_to_olflags_v" functions
forward to the location, where packet mbuf and descs are just loaded.

Test Result:
dpdk:21.08-rc1
gcc-9
For n1sdp, the patch improves the performance by 1.8%.
For thunderx2, no performance changes.

Signed-off-by: Feifei Wang <feifei.wang2@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
2021-08-10 05:02:16 +02:00
Feifei Wang
decc3b6aa5 net/i40e: increase readability in NEON Rx
Rearrange the code in logical order for better readability and
maintenance convenience in Rx NEON path.

No performance change with this patch in arm platform.

Suggested-by: Joyce Kong <joyce.kong@arm.com>
Signed-off-by: Feifei Wang <feifei.wang2@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
2021-08-10 05:02:10 +02:00
Feifei Wang
4f76ac98b7 drivers/net: fix vector Rx comments
For the loop to process packets in Rx vector path, some notes for the
code are wrong, fix these errors.

Fixes: 7092be8437 ("fm10k: add vector Rx")
Fixes: c3def6a872 ("net/i40e: implement vector PMD for altivec")
Fixes: ae0eb310f2 ("net/i40e: implement vector PMD for ARM")
Fixes: 9ed94e5bb0 ("i40e: add vector Rx")
Fixes: 319c421f38 ("net/avf: enable SSE Rx Tx")
Fixes: 1162f5a0ef ("net/iavf: support flexible Rx descriptor in SSE path")
Fixes: c68a52b8b3 ("net/ice: support vector SSE in Rx")
Fixes: cf4b4708a8 ("ixgbe: improve slow-path perf with vector scattered Rx")
Cc: stable@dpdk.org

Suggested-by: Ruifeng Wang <ruifeng.wang@arm.com>
Signed-off-by: Feifei Wang <feifei.wang2@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
2021-08-10 05:01:57 +02:00
Feifei Wang
635a9373fa drivers/net: fix typo in vector Rx comment
In Rx vec path, for extracting and recording EOP bit, comment has
redundant "count" word, removing it.

Fixes: 7092be8437 ("fm10k: add vector Rx")
Fixes: c3def6a872 ("net/i40e: implement vector PMD for altivec")
Fixes: ae0eb310f2 ("net/i40e: implement vector PMD for ARM")
Fixes: 9ed94e5bb0 ("i40e: add vector Rx")
Fixes: 319c421f38 ("net/avf: enable SSE Rx Tx")
Fixes: 1162f5a0ef ("net/iavf: support flexible Rx descriptor in SSE path")
Fixes: c68a52b8b3 ("net/ice: support vector SSE in Rx")
Fixes: cf4b4708a8 ("ixgbe: improve slow-path perf with vector scattered Rx")
Cc: stable@dpdk.org

Signed-off-by: Feifei Wang <feifei.wang2@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
2021-08-10 05:01:48 +02:00
Jerin Jacob
1539acc20a drivers: remove warning with Meson 0.59
Since meson 0.59.0 version, the extract_all_objects() API
need to pass explicit boolean value.

To remove the following warning[1], added explicit `true` for
extract_all_objects() use in codebase whever there is
no argument.

[1]
WARNING: extract_all_objects called without setting recursive
keyword argument. Meson currently defaults to
non-recursive to maintain backward compatibility but
the default will be changed in the future.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
2021-08-27 15:51:34 +02:00
Thomas Monjalon
fdab8f2e17 version: 21.11-rc0
Start a new release cycle with empty release notes.

The ABI version becomes 22.0.
The map files are updated to the new ABI major number (22).
The ABI exceptions are dropped and CI ABI checks are disabled because
compatibility is not preserved.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: David Marchand <david.marchand@redhat.com>
2021-08-17 08:37:52 +02:00
Gregory Etelson
8f6c921b6a net/mlx5: fix build on Windows
mlx5_dev_check_sibling_config() API was updated to allow newly
spawned port locate existing sibling devices.
PMD port initialization for Windows OS was not updated
for the new API prototype:

drivers/net/mlx5/windows/mlx5_os.c:457:50: error:
too few arguments to function call, expected 3, have 2
	err = mlx5_dev_check_sibling_config(priv, config);

The patch fixes mlx5_dev_check_sibling_config call for Windows OS.

Fixes: e9d420dfc2 ("net/mlx5: fix find sibling devices")

Signed-off-by: Gregory Etelson <getelson@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-08-05 12:48:16 +02:00
Dmitry Kozlyuk
e9b3d79b06 bus: clarify log for non-NUMA-aware devices
PCI, vmbus, and auxiliary drivers printed a warning
when NUMA node had been reported as (-1) or not reported by OS:

    EAL:   Invalid NUMA socket, default to 0

This message and its level might confuse users because the configuration
is valid and nothing happens that requires attention or intervention.
It was also printed without the device identification and with an indent
(PCI only), which is confusing unless DEBUG logging is on to print
the header message with the device name.

Reduce level to INFO, reword the message, and suppress it when there is
only one NUMA node because NUMA awareness does not matter in this case.
Also, remove the indent for PCI.

Fixes: f0e0e86aa3 ("pci: move NUMA node check from scan to probe")
Fixes: 831dba47bd ("bus/vmbus: add Hyper-V virtual bus support")
Fixes: 1afce3086c ("bus/auxiliary: introduce auxiliary bus")
Cc: stable@dpdk.org

Signed-off-by: Dmitry Kozlyuk <dkozlyuk@nvidia.com>
Reviewed-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Reviewed-by: Xueming Li <xuemingl@nvidia.com>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
2021-08-04 11:33:31 +02:00
Gregory Etelson
e9d420dfc2 net/mlx5: fix find sibling devices
The routine mlx5_eth_find_next() and related iterating macro
MLX5_ETH_FOREACH_DEV is used to iterate through sibling devices (all
representors share the same configuration and switching domain) on top
of specified root device.

The root device parameter was specified as NULL, and it caused
missing siblings in iteration during representor device probing,
causing:

1. allocating new domain_id for the device being probed.
2. discrepancy in representor configurations and potential overall
   driver malfunctions.

Fixes: 56bb3c84e9 ("net/mlx5: reduce PCI dependency")

Signed-off-by: Gregory Etelson <getelson@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-08-04 11:27:49 +02:00
Shun Hao
1af874087c net/mlx5: fix domains detection in meter hierarchy
Meters in one hierarchy might support different domains. For
example, one meter may support ingress only, but the root meter
can support all the domains.

If the later meter in the meter hierarchy wrongly doesn't inherit
the first meter's domains, it will lead to invalid domain table
access.

Fix is when creating meter hierarchy, try to inherit the first meter
domains in the meter hierarchy.

Fixes: a3b7af90ba ("net/mlx5: validate meter action in policy")
Cc: stable@dpdk.org

Signed-off-by: Shun Hao <shunh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-08-04 11:25:29 +02:00
Shun Hao
6bbced4ae3 net/mlx5: fix meter flow counter translation
When a flow rule uses a meter without any modify packet action,
there will be an internal drop flow with meter counter created,
matching the same 5-tuple as the original flow.

In this case, the meter flow count action is wrongly reused as the
original flow counter, leading to wrong flow statistics.

Add a check in the count action translation to detect the meter case
and use the meter drop dedicated counter in the meter 5-tuple flow
only.

Fixes: f3191849f2 ("net/mlx5: support flow count action handle")
Cc: stable@dpdk.org

Signed-off-by: Shun Hao <shunh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-08-04 11:24:21 +02:00
Suanming Mou
45633c460c net/mlx5: workaround drop action with old kernel
Currently, there are two types of drop action implementation
in the PMD. One is the DR (Direct Rules) dummy placeholder drop
action and another is the dedicated dummy queue drop action.
When creates flow on the root table with DR drop action, the
action will be converted to MLX5_IB_ATTR_CREATE_FLOW_FLAGS_DROP
Verbs attribute in rdma-core.

In some inbox systems, MLX5_IB_ATTR_CREATE_FLOW_FLAGS_DROP Verbs
attribute may not be supported in the kernel driver. Create flow
with drop action on the root table will be failed as it is not
supported. In this case, the dummy queue drop action should be
used instead of DR dummy placeholder drop action.

This commit adds the DR drop action support detect on the root
table. If MLX5_IB_ATTR_CREATE_FLOW_FLAGS_DROP Verbs is not
supported in the system, a dummy queue will be used as drop
action.

Fixes: da845ae9d7 ("net/mlx5: fix drop action for Direct Rules/Verbs")
Cc: stable@dpdk.org

Signed-off-by: Suanming Mou <suanmingm@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-08-03 15:08:02 +02:00
Rongwei Liu
a1fd0c827b net/mlx5: fix VXLAN VNI matching on ConnectX-5
In the recent update, the misc5 matcher was introduced to
match VxLAN header extra fields. However, ConnectX-5
doesn't support misc5 for the UDP ports different from
VXLAN's standard one (4789).

Need to fall back to the previous approach and use legacy
misc matcher if non-standard UDP port is recognized
in VxLAN flow.

Fixes: 630a587bfb ("net/mlx5: support matching on VXLAN reserved field")
Cc: stable@dpdk.org

Signed-off-by: Rongwei Liu <rongweil@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-08-03 14:43:28 +02:00
Gregory Etelson
ce4062cb10 net/mlx5: fix port initialization of switch domain
All active ports that belong to the same E-switch share domain_id
value.
Port initialization procedure searches through a database for existing
port with matching properties. New domain_id allocated if match was
not located. Otherwise, new port inherits existing domain_id.

Port initialization did not pass enough info to search procedure to
find existing matches. Therefore, each port was created with a private
domain_id value. As the result, port_id flow action failed because it
could not match ports in a rule to E-switch.

The patch adds dpdk_dev with port properties to device search.

Fixes: 56bb3c84e9 ("net/mlx5: reduce PCI dependency")

Signed-off-by: Gregory Etelson <getelson@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-08-03 14:19:33 +02:00
Raja Zidane
237aad8824 compress/mlx5: fix compression level translation
Compression Level is interpreted by each PMD differently.
However, lower numbers give faster compression
at the expense of compression ratio, while higher numbers
may give better compression ratios but are likely slower.
The level affects the block size, which affects performance,
the bigger the block, the faster the compression is.

The problem was that higher levels caused bigger blocks:
  size = min_block_size - 1 + level.

the solution is to reverse the above:
  size = max_block_size + 1 - level.

Fixes: 39a2c8715f ("compress/mlx5: add transformation operations")
Cc: stable@dpdk.org

Signed-off-by: Raja Zidane <rzidane@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-08-03 14:09:00 +02:00
Ajit Khaparde
31a2db5a17 net/bnxt: fix number of action records
For Thor, the number of action records is being wrongly configured
to 128 because of incorrect definition of divider. This results in
an incorrect number of action records being negotiated with the FW.
Remove the divider from the templates and delete the logic which
uses the field in the resource manager logic.

Fixes: 3fe124d253 ("net/bnxt: support Thor platform")
Cc: stable@dpdk.org

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Tested-by: Shuanglin Wang <shuanglin.wang@broadcom.com>
2021-07-31 16:56:43 +02:00
Michael Baum
56ec985f31 crypto/mlx5: fix leaks on probing failure
In crypto driver probing, there are two validations after context
allocation.

When one of them fails, the context structure was not freed what caused
a memory leak.

Free it.

Fixes: debb27ea34 ("crypto/mlx5: create login object using DevX")
Fixes: e8db4413cb ("crypto/mlx5: add keytag configuration")
Cc: stable@dpdk.org

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-07-30 21:08:19 +02:00
Arek Kusztal
135e3a4046 crypto/qat: disable asymmetric crypto on GEN3
This patch disables asymmetric crypto PMD on GEN3 devices.

Fixes: 1f5e4053f9 ("common/qat: support GEN3 devices")
Cc: stable@dpdk.org

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
2021-07-30 21:08:19 +02:00
Arek Kusztal
3f6c8e77dd drivers: fix return of unsupported features on QAT GEN4
Fix return code when asymmetric crypto
or compression service is selected on GEN4 devices.

Fixes: 8f393c4ffd ("common/qat: support GEN4 devices")

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
2021-07-30 21:08:19 +02:00
Akhil Goyal
12b650efd4 crypto/octeontx: fix freeing after device release
When the PMD is removed, rte_cryptodev_pmd_release_device
is called which frees cryptodev->data, and then tries to free
cryptodev->data->dev_private, which causes the heap use
after free issue.

A temporary pointer is set before the free of cryptodev->data,
which can then be used afterwards to free dev_private.

Fixes: bfe2ae495e ("crypto/octeontx: add PMD skeleton")
Cc: stable@dpdk.org

Reported-by: Zhihong Peng <zhihongx.peng@intel.com>
Signed-off-by: Akhil Goyal <gakhil@marvell.com>
2021-07-30 21:08:19 +02:00
Fan Zhang
fe9e06ab08 crypto/qat: fix raw data path dequeue
This patch fixes the raw data path dequeue burst fail problem.
Previously in case the queue is full and not all packets
asked to be dequeued are processed, the dequeue burst will
never happen.

Fixes: c21574edc5 ("cryptodev: add dequeue count parameter in raw API")
Cc: stable@dpdk.org

Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
2021-07-30 20:57:23 +02:00
Kiran Kumar K
675ba70691 crypto/cnxk: add null check for RSA key data
Coverity is reporting FORWARD_NULL issue when qt data is NULL.
Adding NULL check for this.

Coverity issue: 371893
Fixes: 5a3513caeb ("crypto/cnxk: add asymmetric session")

Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-07-30 20:57:23 +02:00
Amaranath Somalapuram
889317b7ec crypto/ccp: convert driver from vdev to PCI
drop all the code duplicating the PCI bus driver
developed for enable IOMMU in vdev.

Signed-off-by: Amaranath Somalapuram <asomalap@amd.com>
2021-07-30 20:57:23 +02:00
Arek Kusztal
92a3ea2244 crypto/qat: fix array access
Fix possible access of an array by negative index in function
qat_sym_qp_setup.

Coverity issue: 372131, 372134
Fixes: 8f393c4ffd ("common/qat: support GEN4 devices")

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Adam Dybkowski <adamx.dybkowski@intel.com>
2021-07-30 20:57:23 +02:00
Kiran Kumar K
8cd5064c46 common/cpt: update asymmetric ECDSA messages
Adding changes to asymmetric ECDSA messages to align with
the new ucode for octeontx2 device.

Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-07-30 20:57:23 +02:00
Kiran Kumar K
64e5ee3075 crypto/cnxk: update asymmetric ECDSA messages
Adding changes to asymmetric ECDSA messages to align with
the new ucode for cnxk device.

Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-07-30 20:57:23 +02:00
Kiran Kumar K
f4d66aef98 common/cnxk: add constants to EC groups
New ucode expects const values A and B for asymmetric ECDSA
messages. Adding roc support for this.

Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-07-30 20:57:23 +02:00
Ajit Khaparde
1438a12cc8 net/bnxt: disable VF representors on Thor
In a few cases with Thor device, PMD can segfault when VF
representors are specified. Temporarily fix it by preventing
VF reps for Thor device. This will be addressed in next release.

Fixes: 3fe124d253 ("net/bnxt: support Thor platform")
Cc: stable@dpdk.org

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-07-31 00:20:59 +02:00
Kishore Padmanabha
9967ac7f84 net/bnxt: fix stats counter resource
The flow counters is reduced from 8192 to 6912 for Whitney
for compatibility with different versions of FW.
The FW resource manager splits resources for flow offload
and other use cases. A higher value used for flow offload
by the PMD can cause overriding the resources set aside by
FW. This in turn can lead to FW rejecting filter creation
requests during initialization.

Use a smaller safe value to avoid these issues.

Fixes: 6fad911510 ("net/bnxt: reorganize ULP template directory structure")
Cc: stable@dpdk.org

Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Reviewed-by: Randy Schacher <stuart.schacher@broadcom.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-07-30 17:37:35 +02:00
Jay Ding
c18b1b1f99 net/bnxt: fix initialization with old firmware
Fix the resource qcap list handling to use size based on
FW response.
The size of resource qcap list could be different when FW
and application are not matching. Application should be able
to handle this scenario when the FW is older and the size of
qcap is smaller. Failure to do this causes initialization failure.

This patch is needed for backward compatibility on different
firmware versions.

Fixes: 873661aa64 ("net/bnxt: support shared session")
Cc: stable@dpdk.org

Signed-off-by: Jay Ding <jay.ding@broadcom.com>
Reviewed-by: Randy Schacher <stuart.schacher@broadcom.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-07-30 17:21:36 +02:00
Pavan Nikhilesh
ac56433de5 event/cnxk: fix reading stale Tx queue depth
Reads to Tx queue FC memory need to be atomic to avoid cores using
same Tx queue spinning on stale values.

Fixes: 313e884a22 ("event/cnxk: support Tx adapter fast path")

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2021-07-30 12:28:52 +02:00
Dapeng Yu
b3bc560bd6 net/softnic: fix memory leak as profile is freed
In function softnic_table_action_profile_free(), the memory referenced
by pointer "ap" in the instance of "struct softnic_table_action_profile"
is not freed.

This patch fixes it.

Fixes: a737dd4e58 ("net/softnic: add table action profile")
Cc: stable@dpdk.org

Signed-off-by: Dapeng Yu <dapengx.yu@intel.com>
Acked-by: Jasvinder Singh <jasvinder.singh@intel.com>
2021-07-30 13:58:31 +02:00
Dapeng Yu
51799b4f97 net/softnic: fix null dereference in arguments parsing
When there is no "firmware" in arguments, the "firmware" pointer is
null, and will be dereferenced by rte_strscpy().

This patch moves the code block which copies character string from
"firmware" to "p->firmware" into the "if" statements where "firmware"
argument exists and it is duplicated successfully.

Coverity issue: 372136
Fixes: d8f852f5f3 ("net/softnic: fix memory leak in arguments parsing")
Cc: stable@dpdk.org

Signed-off-by: Dapeng Yu <dapengx.yu@intel.com>
Acked-by: Jasvinder Singh <jasvinder.singh@intel.com>
2021-07-30 13:32:15 +02:00
Nathan Skrzypczak
4e30586dcd net/memif: fix abstract socket address length
This fixes using abstract sockets with memifs.
We were not passing the exact addr_len,
which requires zeroing the remaining sun_path
and doesn't appear well in other utilities (e.g. lsof -U)

Signed-off-by: Nathan Skrzypczak <nathan.skrzypczak@gmail.com>
Reviewed-by: Jakub Grajciar <jgrajcia@cisco.com>
2021-07-30 13:25:54 +02:00
Ivan Malov
08b3a170cb common/sfc_efx/base: do not validate MAE action COUNT order
In DPDK + Open vSwitch use case, action COUNT is always the
first one to be added. In particular, it goes before action
DECAP in that use case. The current code enforces the right
order (DECAP goes before COUNT), and this provokes failures.
As an exception, do not validate the order for action COUNT.

Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru>
Reviewed-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
2021-07-30 13:14:50 +02:00
Ghalem Boudour
3e7008459d net/ena: enable multi-segment in Tx offload flags
The DPDK ENA driver does not provide multi-segment tx offload capability.
Let's add DEV_TX_OFFLOAD_MULTI_SEGS to ports offload capability by
default, and always set it in dev->data->dev_conf.txmode.offload.

This flag in not listed in doc/guides/nics/features/default.ini, so
ena.ini does not need to be updated.

Fixes: 1173fca25a ("ena: add polling-mode driver")
Cc: stable@dpdk.org

Signed-off-by: Ghalem Boudour <ghalem.boudour@6wind.com>
Signed-off-by: Olivier Matz <olivier.matz@6wind.com>
Acked-by: Michal Krawczyk <mk@semihalf.com>
2021-07-30 12:10:20 +02:00
Bing Zhao
f8c42c53ce net/mlx5: fix meter hierarchy validation with yellow
In mlx5 PMD, the meter hierarchy only supports the green color. It
means that a meter action can only be in the green action list. In
the meanwhile, the yellow action list should be empty now. Any
action for the yellow color policy will be considered invalid if
the green color policy is a hierarchy.

Also, the error message printing of meter hierarchy validation is
fixed by removing an incorrect checking.

Fixes: 4b7bf3ffb4 ("net/mlx5: support yellow in meter policy validation")
Fixes: a3b7af90ba ("net/mlx5: validate meter action in policy")

Signed-off-by: Bing Zhao <bingz@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-07-29 22:06:43 +02:00
Bing Zhao
d5bb76d5b0 net/mlx5: fix green meter policy RSS queues
Both green policy and yellow policy could support RSS actions
simultaneous, the Rx queues configuration may be different between
them while the other fields should be the same.

When the only green color policy was supported in the past, the
queues copied and saved in the temporary workspace were used. Since
the yellow support was added, the queues stored in the thread
workspace would be overwritten by the yellow color policy. The flow
rule created using a meter with such a policy would have the same
RSS distribution for both green and yellow packets.

By using the meter action containers RSS information instead of the
workspace RSS, this overwritten can be prevented.

Fixes: b38a12272b ("net/mlx5: split meter color policy handling")

Signed-off-by: Bing Zhao <bingz@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-07-29 22:06:42 +02:00
Bing Zhao
a9e3a4a9e2 net/mlx5: fix meter EIR calculation
Before the yellow color policy was supported, the only supported
profile of metering is RFC2697 and EIR is not part of the profile.
When creating a meter with this profile, the EIR part was always
zero.

After the yellow color policy supported and RFC2698 & 4115 support
was introduced, EIR is relevant and should be calculated. Usually
the EIR could not be zero and the formula for calculating CIR
mantissa & exponent could be reused.

The EIR could be 0 and then only green and red colors will be
supported from the specification. Both the mantissa and exponent
parts should be set to 0. Currently, the formula wrongly sets
non-zero values for the EIR=0 case.

Setting the mantissa and the exponent parts to zeros when EIR is 0
will solve the issue.

Fixes: 33a7493c8d ("net/mlx5: support meter for trTCM profiles")

Signed-off-by: Bing Zhao <bingz@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-07-29 22:05:36 +02:00
Bing Zhao
8a0fca1101 net/mlx5: fix meter profile validation
After the support for yellow color and RFC2698 & RFC4115 were added,
the profile validation adjustment was missed. With this fix, the
validation is like below:
  1. Legacy metering only supports RFC2697 without EBS.
  2. ASO metering can support all three profiles.
  3. For backward compatibility, none EBS with RFC2697 profile is
     still supported and the checking is done in the meter
     creation stage.

In the meanwhile, some checking which was done in the parameters
calculation stage is moved in the validation in order to skip the
useless checking.

Fixes: 33a7493c8d ("net/mlx5: support meter for trTCM profiles")

Signed-off-by: Bing Zhao <bingz@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-07-29 22:03:14 +02:00