Commit Graph

657 Commits

Author SHA1 Message Date
Qi Zhang
621996fb02 net/ice/base: allow GTP-U filter using only inner protocols
Adds a support for switch filter: GTP-U using just inner fields.
If user doesn't specify outer protocol and its fields but wants to
add switch filter for GTP-U using inner protocols and related fields
such as inner L3 and/or inner L4, this patch enables such filtering.

Signed-off-by: Kiran Patil <kiran.patil@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-04-13 16:25:27 +02:00
Qi Zhang
fb73e0200b net/ice/base: add packet type for PPPoL2TPv2oUDP
Add some new macros of PTYPE values to support PPPoL2TPv2oUDP.

Signed-off-by: Ting Xu <ting.xu@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-04-13 16:25:27 +02:00
Qi Zhang
03697c24b7 net/ice/base: fix QinQ PPPoE dummy packet selection
The dummy packet should be QinQ PPPoE ipv6 when ppp protocol is ipv6.

Fixes: bb3386f348 ("net/ice: enable QinQ filter for switch")
Cc: stable@dpdk.org

Signed-off-by: Yuying Zhang <yuying.zhang@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-04-13 16:25:27 +02:00
Qi Zhang
0475c77705 net/ice/base: add inner VLAN protocol type for QinQ filter
Since VLAN protocol type 'ICE_VLAN_OFOS' has been changed to map
the hardware VLAN protocol ID to 'ICE_VLAN_OF_HW (16)' when in Double
VLAN mode, and to 'ICE_VLAN_OL_HW (17)' when in Single VLAN mode.

So 'ICE_VLAN_OFOS' can't be used with 'ICE_VLAN_EX' which is outer VLAN
hardware protocol ID 'ICE_VLAN_OF_HW (16)' to do the QinQ VLAN pattern.

Introduce the new inner VLAN protocol type 'ICE_VLAN_IN', which is inner
VLAN hardware protocol ID 'ICE_VLAN_OL_HW (17)'.

Now for QinQ VLAN pattern, the protocol 'ICE_VLAN_EX' and 'ICE_VLAN_IN'
should be used to set the related protocol header fields like VLAN ID.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-04-13 16:25:26 +02:00
Qi Zhang
0f61c2af88 net/ice/base: add set/get GPIO helper functions
Add helper functions to set the GPIO pin state or get the value of a
GPIO signal that's the part of the topology based on AQ commands.
This change is needed to setup GPIO pins state for PTP, SyncE etc.

Signed-off-by: Karol Kolacinski <karol.kolacinski@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-04-13 16:25:26 +02:00
Qi Zhang
6f169ced1e net/ice/base: enable I2C read/write commands
Enable I2C read/write AQ commands. They are now required for
controlling the external physical connectors via external I2C
port expander on E810-T adapters.

Signed-off-by: Maciej Machnikowski <maciej.machnikowski@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-04-13 16:25:26 +02:00
Qi Zhang
2e6228787d net/ice/base: add priority check of matching recipe
Check priority when look for a recipe which matches our request
to enable flow priority for switch filter.

Signed-off-by: Yuying Zhang <yuying.zhang@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-04-13 16:25:26 +02:00
Qi Zhang
8d7bb8d500 net/ice/base: change protocol ID for VLAN in DVM
Protocol id for first vlan in Double VLAN Mode (DVM) should be
ICE_VLAN_OF_HW = 16, but for Single VLAN Mode (SVM) this should be
ICE_VLAN_OL_HW = 17.

Change protocol id in type to id translation array for outer vlan
to 17 when DVM is enabled, which means the driver, package,
and firmware support DVM.

Signed-off-by: Michal Swiatkowski <michal.swiatkowski@intel.com>
Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-04-13 16:25:26 +02:00
Qi Zhang
d42a7fef20 net/ice/base: support PPPoL2TPv2oUDP RSS hash
Add support for PPPoL2TPv2oUDP RSS hash. L2TPv2 and PPP ptypes
and flow headers are added. Protocol id for PPP is added.

Signed-off-by: Ting Xu <ting.xu@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-04-13 16:25:26 +02:00
Qi Zhang
084e64e6b6 net/ice/base: set MAC type for E823C device
Set E823C device's MAC type as generic.

Signed-off-by: Anirudh Venkataramanan <anirudh.venkataramanan@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-04-13 16:25:26 +02:00
Qi Zhang
40fb79650e net/ice/base: remove unused ptype field in PTT definition
Remove the unused ptype entry, and use the gcc extension for
ranged initializers in arrays for Linux, and explicitly target
each table entry by index when initializing under Linux.

Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-04-13 16:25:26 +02:00
Qi Zhang
a8b49eab87 net/ice/base: print link configure error
Newer NVMs return link_cfg_err for get_link_status AQ. Print it
for debug use.

Signed-off-by: Anirudh Venkataramanan <anirudh.venkataramanan@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-04-13 16:25:26 +02:00
Qi Zhang
03ed3e8b78 net/ice/base: support removing VSI from flow profile
Adding a function ice_flow_rem_vsi_prof() to remove flow entries
associated to the SW VSI handle. Once complete, clear the vsi index from
the flow profile bitmap. This will ensure that a VSI once removed
can be re-added and the package block rules will be added again.

Signed-off-by: Vignesh Sridhar <vignesh.sridhar@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-04-13 16:25:24 +02:00
Qi Zhang
8ae24eff3e net/ice/base: cleanup code
1. There are a lots of function header mismatch its function name.
2. remove unnecessary header file include.
3. remove unnecessary macro.
4. remove unnecessary comment.

Signed-off-by: Dave Ertman <david.m.ertman@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-04-13 16:19:01 +02:00
Pallavi Kadam
ce6617a069 net/ice: build on Windows
- Add Intel ice PMD support on Windows.
- Remove #include sys/ioctl header file as it is not needed.
- Replace x86intrin.h with rte_vect.h to avoid __m_prefetchw conflicting
  types.
- Replace POSIX usleep() API with rte API.
- Add a new macro for the access() API as the original function
  has been deprecated on Windows.
- Add extra cflags '-fno-asynchronous-unwind-tables'
  to avoid MinGW build error:
  Error: invalid register for .seh_savexmm
- Add documentation to support ice PMD on Windows.
  Update the release notes and features list for the same.

Signed-off-by: Pallavi Kadam <pallavi.kadam@intel.com>
Reviewed-by: Ranjit Menon <ranjit.menon@intel.com>
Acked-by: Jie Zhou <jizh@microsoft.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2021-04-06 19:00:36 +02:00
Qi Zhang
b83d270dff net/ice: refine RSS configure
The ICE_RSS_ANY_HEADERS will try to enable outer RSS for
non-tunnel case and inner RSS for tunnel case. This confuse
user.

As we already have ICE_RSS_INNER_HEADER for tunnel case,
So, replace ICE_RSS_ANY_HEADERS with ICE_RSS_OUTER_HEADERS
for all exist flow which only specified the outer pattern.

To enable inner RSS for any tunnel cases, a separated rule
should be enabled.

The patch also remove some unnecessary condition check for GTPU
in base code, as we already can support outer RSS for GTPU.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xuan Ding <xuan.ding@intel.com>
2021-03-30 07:15:01 +02:00
Qi Zhang
34ede45188 net/ice/base: cleanup filter list on error
When ice_remove_vsi_lkup_fltr is called, by calling
ice_add_to_vsi_fltr_list local copy of vsi filter list
is created. If any issues during creation of vsi filter
list occurs it up for the caller to free already
allocated memory. This patch ensures proper memory
deallocation in these cases.

Fixes: c7dd159311 ("net/ice/base: add virtual switch code")
Cc: stable@dpdk.org

Signed-off-by: Robert Malz <robertx.malz@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-03-05 09:36:38 +01:00
Qi Zhang
739dee1f22 net/ice/base: fix uninitialized struct
One of the structs being used for ACL counter rules was allocated on
the stack and left uninitialized.  Rather than depending on
undefined behavior around the .amount member during rule removal,
just leave a comment and initialize the struct to zero, as this is a
slow path call anyway. This bug could have caused silent failures
during counter removal.

Fixes: f3202a097f ("net/ice/base: add ACL module")
Cc: stable@dpdk.org

Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-03-05 09:36:18 +01:00
Qi Zhang
872a654998 net/ice/base: update GTPU EH dummy packets for FDIR
Update GTPU EH dummy pkts for FDIR, including EH/DL/UL.

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-03-05 09:35:58 +01:00
Qi Zhang
f977165db0 net/ice/base: update boost TCAM for DVM
Add code to update boost TCAM entries to enable DVM. This requires
enabled DVM entries, and disabling SVM entries.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-03-05 09:35:43 +01:00
Qi Zhang
c2b328a4ed net/ice/base: mark ptype 2 as reserved
The entry for PTYPE 2 in the ice_ptype_lkup table incorrectly states
that this is an L2 packet with no payload. According to the datasheet,
this PTYPE is actually unused and reserved.

Modify the lookup entry to indicate this is an unused entry that is
reserved.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-03-05 09:35:15 +01:00
Qi Zhang
50fb95cb66 net/ice/base: fix payload indicator on ptype
The entry for PTYPE 90 indicates that the payload is layer 3. This does
not match the specification in the datasheet which indicates the packet
is a MAC, IPv6, UDP packet, with a payload in layer 4.

Fix the lookup table to match the data sheet.

Fixes: 64e9587d56 ("net/ice/base: add structures for Rx/Tx queues")
Cc: stable@dpdk.org

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-03-05 09:34:58 +01:00
Qi Zhang
ce51df1ca2 net/ice/base: support GTPU IP inner IPv6 for flow director
Support IPV4_GTPU with inner IPV6/UDP/TCP for FDIR.

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-03-05 09:28:11 +01:00
Qi Zhang
886a4e7fc6 net/ice/base: support switch filter (GTP tunnel+IP flow)
Enabled support for advanced switch filter to satisfy match criteria
such as: GTP tunnel + Inner IPv4[6]

Signed-off-by: Kiran Patil <kiran.patil@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-03-05 09:27:50 +01:00
Qi Zhang
2fcb1dc954 net/ice/base: enable more GTPU inner L3 fields for FDIR
Add support for FDIR filter by GTPU inner L3 fields
(i.e., tos, ttl, proto).

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-03-05 09:27:34 +01:00
Qi Zhang
92533e9dfe net/ice/base: expose link configuration error
Store the link_cfg_err byte in order to determine whether an unsupported
power configuration is preventing link establishment.

Signed-off-by: Jeb Cramer <jeb.j.cramer@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-03-05 09:27:08 +01:00
Qi Zhang
535985974b net/ice/base: enable GTPU inner L3/L4 for flow director
For FDIR, GTPU with inner L3/L4 layers should only support inner
L3/L4 addrs/ports, instead of outer fields. Thus, we use TUN offsets
for GTPU IP/EH to insert inner L3/L4 addrs/ports fields.

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-03-05 09:26:14 +01:00
Qi Zhang
306a2fcd1b net/ice/base: indicate double reset solution restriction
Add capability which indicates double reset solution restriction.
Added "Post-update EMPR enabled" field to "Response Flags" field
(byte 19 in the response structure).

Signed-off-by: Amir Shay <shay.amir@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-03-05 09:21:52 +01:00
Qi Zhang
5fe41b4dcb net/ice/base: support external device secure programming
External topology devices (e.g. PHYs) connected to controller or to SoC
might have a firmware engine within the device and the firmware is
usually loaded from NVM connected to the topology device.

In some cases, those firmware packages might need to be regularly
updated in a secure way to prevent malicious user to burn malicious
firmware into the topology device. In other cases, the topology device
firmware might be burned independently, as burning the NVM attached to
the device might cause the device to stop function but could be fixed
without permanent damage.
SoC topologies also enable mezzanine card, with an ID EEPROM
within it. This ID EEPROM might need an update also.
This patch provides these abilities.

Signed-off-by: Amir Shay <shay.amir@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-03-05 09:15:46 +01:00
Qi Zhang
6fca104a7a net/ice/base: support firmware log
Currently we do not provide full end-to-end solution for system level
debug and diagnostics. This change purpose is to fulfill design and
implementation gaps to provide full end-to-end (HW-FW-SW) diagnostic
solution. In addition to functional improvements, it will provide
feasible, user-friendly Debug information.

Signed-off-by: Amir Shay <shay.amir@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-03-05 09:14:37 +01:00
Haiyue Wang
70f4e156ea net/ice/base: do not set VLAN mode in DCF mode
The PF will set the VLAN mode globally, DCF just needs to get the VLAN
mode.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-01-29 18:16:11 +01:00
Yuying Zhang
0c0735ff4f net/ice/base: add ethertype offset for QinQ dummy packet
Add the ethertype offset for QinQ switch rule dummy packet to
allow matching the corresponding field.

Signed-off-by: Yuying Zhang <yuying.zhang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-01-29 18:16:08 +01:00
Qi Zhang
6ad938f326 net/ice: support E823C family devices
Add device ID support for family E823C, also update the base code
BSD version.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-01-29 18:16:07 +01:00
Qi Zhang
14e7a4b37b net/ice/base: support configuring device in double VLAN mode
In order to support configuring the device in Double VLAN Mode (DVM),
the DDP and FW have to support DVM. If both support DVM, the PF
that downloads the package needs to update the default recipes and set
the VLAN mode. This is done in ice_set_dvm().

In order to support updating the default recipes in DVM add support
for updating an existing switch recipe's lkup_idx and mask.
This is done by first calling the get recipe AQ (0x0292) with the
desired recipe ID. Then, if that is successful update one of the lookup
indices (lkup_idx) and its associated mask if the mask is valid
otherwise the already existing mask will be used.

Signed-off-by: Brett Creeley <brett.creeley@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-01-29 18:16:07 +01:00
Qi Zhang
a6b975d23c net/ice/base: add VLAN TPID for VLAN filters
Currently VLAN filters via RID4 are only based on VLAN ID. However, with
incoming support for Double VLAN Mode (DVM), the driver needs to be able
to support filtering on VLAN ID + VLAN TPID (i.e. 0x8100, 0x88a8, etc.).
Add support for this by adding two fields to the ice_fltr_info
structure. First, add the tpid_valid field so the code can determine
whether or not to overwrite the default 0x8100 value for programming
packets or use the tpid field.

Signed-off-by: Brett Creeley <brett.creeley@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-01-29 18:16:07 +01:00
Qi Zhang
25aa214490 net/ice/base: fix outer VLAN related macro
Fix the wrong value of ICE_AQ_VSI_OUTER_VLAN_PORT_BASED_ACCEPT_HOST

Fixes: 9ea028123a ("net/ice/base: align add VSI and update VSI AQ command buffer")

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-01-29 18:16:07 +01:00
Jeff Guo
8a923ee7e7 net/ice/base: add more packet type values
Add some macros for some PType value.

Signed-off-by: Jeff Guo <jia.guo@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-01-13 18:51:59 +01:00
Qi Zhang
d84e220a8d net/ice/base: update copyright date
Updated the Copyright for 2021
Updated ice driver version.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
2021-01-08 19:03:09 +01:00
Qi Zhang
d5be7f9375 net/ice/base: update add scheduler node counter
The number of nodes added counter was updated incorrectly. This issue
was exposed when the driver tried to add more than 128 queues per TC.

Fix added to update the counter correctly.

Fixes: 93e84b1bfc ("net/ice/base: add basic Tx scheduler")
Cc: stable@dpdk.org

Signed-off-by: Victor Raj <victor.raj@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
2021-01-08 19:03:08 +01:00
Qi Zhang
36a7d65eb5 net/ice/base: cleanup style
A few style issues reported by checkpatch have snuck into the code,
resolve the style issues.

PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
2021-01-08 19:03:08 +01:00
Qi Zhang
9966f7fcb9 net/ice/base: support GTPU inner for AVF flow director
Add dummy packets for IPV4_GTPU with inner IPV4/UDP/TCP with all
kinds of GTPU (EH) type (i.e., IP/EH/DL/UL) for AVF FDIR.

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
2021-01-08 19:03:08 +01:00
Qi Zhang
02d6b64051 net/ice/base: limit forced overrides based on FW version
Beyond a specific version of firmware, there is no need to provide
override values to the firmware when setting PHY capabilities.  In this
case, we do not need to indicate whether we're in Strict or Lenient Link
Mode.

In the case of translating capabilities to the configuration structure,
the module compliance enforcement is already correctly set by firmware,
so the extra code block is redundant.

Signed-off-by: Jeb Cramer <jeb.j.cramer@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
2021-01-08 19:03:08 +01:00
Qi Zhang
964bafcf5e net/ice/base: fix memory handling
Fixed memory handling when memory allocated in user space was handled
as memory allocated in kernel space within QV os_dep implementation
of the ice_memdup function.

Fixes: 93e84b1bfc ("net/ice/base: add basic Tx scheduler")
Cc: stable@dpdk.org

Signed-off-by: Andrii Pypchenko <andrii.pypchenko@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
2021-01-08 19:03:08 +01:00
Qi Zhang
b3d554edfe net/ice/base: add package ptype enable information
Scan the 'Marker PType TCAM' session to retrieve the Rx parser PTYPE
enable information from the current package.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
2021-01-08 19:03:08 +01:00
Qi Zhang
171522b829 net/ice/base: remove deprecated field
hw_vsi_id is used to replace vsi_id, so remove the deprecated vsi_id.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
2021-01-08 19:03:08 +01:00
Qi Zhang
9ea028123a net/ice/base: align add VSI and update VSI AQ command buffer
Aligned the buffer the following admin commands to their new
definitions:
* 0x210 = add_vsi
* 0x211 = update_vsi

Signed-off-by: Shay Amir <shay.amir@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
2021-01-08 19:02:58 +01:00
Qi Zhang
7f90f00beb net/ice/base: refactor structure field
The change is for kernel driver RDMA usage, DPDK driver does not
enable RDMA, just for code sync.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-01-08 16:03:06 +01:00
Qi Zhang
484d2637a4 net/ice/base: remove unused struct member
The only time you can ever have a rq_last_status is if
a firmware event was somehow reporting a status on the receive
queue, which are generally firmware initiated events or
mailbox messages from a VF.  Mostly this struct member was unused.

Fix this problem by still printing the value of the field in a debug
print, but don't store the value forever in a struct, potentially
creating opportunities for callers to use the wrong struct member.

Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-01-08 16:03:06 +01:00
Qi Zhang
a018a05ad9 net/ice/base: support eCPRI over UDP type 0 flow
This patch adds extracting field for flow type eCPRI over UDP message
type 0 and field PC_ID which is used for FDIR/RSS packet steering.

Signed-off-by: Yahui Cao <yahui.cao@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-01-08 16:03:06 +01:00
Qi Zhang
4f667bb015 net/ice/base: support eCPRI over MAC type 0 flow
This patch adds extracting field for flow type eCPRI over mac message
type 0 and field PC_ID which is used for FDIR/RSS packet steering.

This patch also removes redundant hdr bitmask ops for PPPOE hdr.

Signed-off-by: Yahui Cao <yahui.cao@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-01-08 16:03:06 +01:00
Qi Zhang
cb71192486 net/ice/base: align macro names to specification
For get PHY abilities AQ, the specification defines "report modes"
as "with media", "without media" and "active configuration". For
clarity, rename macros to align with the specification.

Signed-off-by: Anirudh Venkataramanan <anirudh.venkataramanan@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-01-08 16:03:06 +01:00
Qi Zhang
35bd20c04d net/ice/base: use report default config to get PHY capa
In case of new link establishment flow we should use
Report Default Configuration if FW AQ API version
supports it. This patch adds check function for Report
Default Configuration support and updates ice_set_fc(),
ice_cfg_phy_fec() and ice_aq_get_phy_caps() accordingly.

Signed-off-by: Mateusz Pacuszka <mateuszx.pacuszka@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-01-08 16:03:06 +01:00
Qi Zhang
09f918e8bc net/ice/base: fix null pointer dereference
Added handling of allocation fault for ice_vsi_list_map_info
Should also check dereference of NULL pointer to filters VSI list
information for FWD_TO_VSI_LISt type only, otherwise, the FWD_TO_VSI type
filters by the given VSI can't be located.

Also the point *pi should not be NULL pointer, it is a reference to raw
data field, so remove this variable, use the reference directly.

Fixes: c7dd159311 ("net/ice/base: add virtual switch code")
Cc: stable@dpdk.org

Signed-off-by: Jacek Bułatek <jacekx.bulatek@intel.com>
Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-01-08 16:03:06 +01:00
Qi Zhang
254f19c8c0 net/ice/base: modify recursive way of adding nodes
Remove the recursive way of adding the nodes to the layer in order
to reduce the stack usage. Instead the algorithm is modified to use
a while loop.

The previous code was scanning recursively the nodes horizontally.
The total stack consumption will be based on number of nodes present
on that layer. In some cases it can consume more stack.

Signed-off-by: Victor Raj <victor.raj@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-01-08 16:03:06 +01:00
Qi Zhang
553be3ed18 net/ice/base: change get PHY capability log level
As the user may be expected to take action on this issue, change the
message to a warning so that the message is more easily accessible than
a debug. Also, add the error code to further aide in identifying the
problem.

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-01-08 16:03:06 +01:00
Qi Zhang
6f69acf117 net/ice/base: resend some AQ commands when EBUSY
Retry sending some AQ commands, as result of EBUSY AQ error.
This change follows the latest guidelines from HW. It is better
to retry the same AQ command several times, as the result of
EBUSY, instead of returning error to the caller right away.

Signed-off-by: Chinh T Cao <chinh.t.cao@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-01-08 16:03:06 +01:00
Qi Zhang
67285599c9 net/ice/base: support checking double VLAN mode
If a driver wants to configure double VLAN mode (DVM) it needs to
first check if the DDP supports DVM. To do this the driver needs to read
the package metadata section via the upload section AQ (0x04C1).

If the DDP doesn't support configuring double VLAN mode (DVM), then
there is nothing to do regarding configuring the VLAN mode of the
device.

The set_svm() or set_dvm() ops should only be called if the current
configuration supports configuring the VLAN mode of the device.

Suggested-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Brett Creeley <brett.creeley@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-01-08 16:03:06 +01:00
Qi Zhang
c7ff2213a5 net/ice/base: fix tunnel destroy
The TCAM information in AQ command buffer is not correct when destroying
the tunnel entries. The TCAM count was always ONE even multiple entries
are destroyed, and the offset of TCAM memory was also incorrect.
This patch is to fix this issue.

Fixes: 884efe3ca1 ("net/ice/base: add VXLAN/generic tunnel management")
Cc: stable@dpdk.org

Signed-off-by: Xiao Zhang <xiao.zhang@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-01-08 16:03:06 +01:00
Qi Zhang
608cd0a5e2 net/ice/base: support VXLAN VNI field in flow director
Enable VXLAN VNI field in FDIR.

Signed-off-by: Zhirun Yan <zhirun.yan@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-01-08 16:03:06 +01:00
Qi Zhang
4e4dc21e45 net/ice/base: add interface to support configuring VLAN mode
The VLAN mode of the device has to be configured while the global
configuration lock is held while downloading the DDP, specifically after
the DDP has been downloaded. In order to support this a VLAN mode
interface was added. By default the device will stay in single VLAN
mode (SVM), which is the current implementation. However, this can be
changed by implementing the .set_dvm op.

Signed-off-by: Brett Creeley <brett.creeley@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-01-08 16:03:06 +01:00
Qi Zhang
ff1d3f523a net/ice/base: add condition to copy module info into memory
There is added condition,to copy information about used module into
memory

Signed-off-by: Szymon T Cudzilo <szymon.t.cudzilo@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-01-08 16:03:06 +01:00
Qi Zhang
8213db126d net/ice/base: add function for NVM checksum verification
AQ 0x0706 lets user to verify and recalculate NVM checksum. The usage
depends on command flags.

Signed-off-by: Milena Olech <milena.olech@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-01-08 16:03:06 +01:00
Qi Zhang
4878a9becc net/ice/base: add definitions for FW health status codes
Add definitions for the various health status codes that can be reported
by firmware.

Signed-off-by: Nick Nunley <nicholas.d.nunley@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-01-08 16:03:06 +01:00
Qi Zhang
b59806a42f net/ice/base: cleanup some macros
Replaced the netlist related macro and removed some unused macro

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-01-08 16:03:06 +01:00
Qi Zhang
bd4d9a89db net/ice/base: add GTP filtering via advanced switch filter
Add support to enable GTP filtering using advanced switch filter mechanism.
Example of GTP filter criteria:
  Outer UDP + GTP (Optional) + Inner IPv4[6] + Inner TCP/UDP

Signed-off-by: Kiran Patil <kiran.patil@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-01-08 16:03:06 +01:00
Qi Zhang
3c66b6c531 net/ice/base: implement inactive NVM version get
Similar to ice_get_inactive_orom_ver, add a function to read the NVM
version data from the inactive section of flash. The primary motivation
of this function is to allow the driver to report the version of
a pending update that has not yet been activated.

To do this, refactor ice_get_nvm_ver_info to allow it to take a bank
parameter. Read from the copy of the Shadow RAM in the NVM bank, rather
than reading from the RAM copy that is loaded by the device. This
ensures we get the accurate value when reading the inactive section.

Note that the start of the Shadow RAM copy is not directly following the
CSS header, but is actually aligned to the next 64-byte boundary. The
correct word offset must be rounded up to 32-bytes.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-01-08 16:03:06 +01:00
Qi Zhang
b1d08cb258 net/ice/base: read option ROM combo version from CIVD
The driver currently reads the combo image version data from within the
Boot Configuration TLV block of the PFA area of the NVM. This allows
access to the active Option ROM version data, assuming that it has been
properly copied into this section.

There is no equivalent method for reading the Option ROM version data
from a pending Option ROM update, as it will not yet have been copied
into the PFA boot configuration block. Instead, replace this
implementation with one which scans for the CIVD data section of the
Option ROM image data.

This CIVD data is stored in a packed structured format within the Option
ROM. It is always aligned to a 512 byte boundary, and starts with
a special '$CIV' 4-byte signature. Data integrity is checked using
a simple modulo 256 sum of the structure bytes.

Implement a new ice_get_orom_civd_data function which allows reading
from the selected flash bank (active or inactive), and scans for valid
CIVD data. Use this instead of the boot configuration TLV in order to
report the combo version data of precisely what is in the Option ROM
data.

To allow access to reading the inactive Option ROM bank, introduce a new
ice_get_inactive_orom_ver function. Use of a new function is done in
order to avoid leaking the bank selection abstraction outside of
ice_nvm.c

With this new function, the driver can now read and display the version
of the to-be-activated Option ROM when an update has been initiated but
not yet finalized.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-01-08 16:03:06 +01:00
Qi Zhang
c897f535e3 net/ice/base: allow flash read with arbitrary size
Refactor ice_read_flash_module so that it takes a size and a length
value, rather than always reading in 2-byte increments. The
ice_read_nvm_module and ice_read_orom_module wrapper functions will
still read a u16 with the byte-swapping enabled.

This will be used in a future change to implement reading of the CIVD
data from the Option ROM module.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-01-08 16:03:06 +01:00
Qi Zhang
f443820918 net/ice/base: allow reading inactive flash security revision
Modify ice_get_nvm_srev and ice_get_orom_srev to take the
ice_flash_bank enumeration that specifies whether to read from the
active or the inactive flash module. Rename and refactor the
ice_read_active_nvm_module and ice_read_active_orom_module functions to
take the bank enum value as well.

With this change, ice_get_nvm_srev and ice_get_orom_srev will be usable
in a future change to implement reading the version data for a pending
flash image.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-01-08 16:03:06 +01:00
Qi Zhang
eb1f31fad3 net/ice/base: refactor interface for flash read
The ice_read_flash_module interface for reading from the various NVM
modules was introduced.

It's purpose is two-fold. First, it enables reading data from the CSS
header, used to allow accessing the image security revisions. Second, it
allowed reading from either the 1st or the 2nd NVM bank. This interface
was necessary because the device has two copies of each module. Only one
bank is active at a time, but it could be different for each module. The
driver had to determine which bank was active and then use that to
calculate the offset into the flash to read.

Future plans include allowing access to read not just from the active
flash bank, but also the inactive bank. This will be useful for enabling
display of the version information for a pending flash update.

The current abstraction in ice_read_flash_module is to specify the exact
bank to read. This requires callers to know whether to read from the 1st
or 2nd flash bank. This is the wrong abstraction level, since in most
cases the decision point from a caller's perspective is whether to read
from the active bank or the inactive bank.

Add a new ice_bank_select enumeration, used to indicate whether a flow
wants to read from the active, or inactive flash bank. Refactor
ice_read_flash_module to take this new enumeration instead of a raw
flash bank.

Have ice_read_flash_module select which bank to read from based on the
cached data we load during NVM initialization. With this change, it will
be come easier to implement reading version data from the inactive flash
banks in a future change.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-01-08 16:03:06 +01:00
Qi Zhang
5e4016e277 net/ice/base: read more security revision options
Added read of security revision disabled and updated disabled.

Signed-off-by: Fabio Pricoco <fabio.pricoco@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-01-08 16:03:06 +01:00
Qi Zhang
64589777b9 net/ice/base: increase control queue timeout
250 msec timeout is insufficient for some AQ commands. Advice from FW
team was to increase the timeout. Increased to 1 second.

Signed-off-by: Fabio Pricoco <fabio.pricoco@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-01-08 16:03:06 +01:00
Qi Zhang
40e186a69e net/ice/base: modify ptype map for UDP
Add below ptypes into ice_ptypes_udp_il.

MAC_IPV4_GTPC_TEID
MAC_IPV6_GTPC_TEID
MAC_IPV4_GTPC
MAC_IPV6_GTPC
MAC_IPV4_GTPU
MAC_IPV6_GTPU

So outer UDP can also be selected as input set for GTPC and
GTPU non IP packet.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-01-08 16:03:06 +01:00
Qi Zhang
397df9c4d1 net/ice/base: update version
Update base code version in readme.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-11-03 23:35:03 +01:00
Qi Zhang
c960eb0f59 net/ice/base: specify global RSS LUT id in get/set RSS LUT
There is no way to specify a global RSS lookup table (LUT) ID with the
current API and 0 is the only global LUT ID that can be supported since
it's hard coded.
Upcoming support to specify a global LUT ID will require this
flexibility. To fix this, update the API for ice_aq_get_rss_lut() and
ice_aq_set_rss_lut() to take the new structure
ice_aq_get_set_rss_params, which includes a global_lut_id member. A new
structure was introduced instead of adding another parameter to the
previously mentioned functions for 2 reasons:

1. Reduce the number of parameters passed to the functions.
2. Reduce the amount of change required if the arguments ever need to be
   updated in the future.

Also, reduce duplicate code that was checking for an invalid vsi_handle
and lut parameter by moving the checks to the lower level
__ice_aq_get_set_rss_lut().

Signed-off-by: Brett Creeley <brett.creeley@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-11-03 23:35:03 +01:00
Qi Zhang
16187528a9 net/ice/base: refactor RSS configure API
Use struct ice_rss_hash_cfg as parameter for
ice_add_rss_cfg, ice_add_rss_cfg_sync and
ice_rem_rss_cfg, ice_rem_rss_cfg_sync.

Introduce enmu ice_rss_cfg_hdr_type to allow user specify the more
flexible RSS configure.

ICE_RSS_OUTER_HEADERS - take outer layer as RSS inputset
ICE_RSS_INNER_HEADERS - take inner layer as RSS inputset
ICE_RSS_INNER_HEADERS_W_OUTER_IPV4
	- take inner layer as RSS inputset for packet with outer IPV4
ICE_RSS_INNER_HEADERS_W_OUTER_IPV6
	- take inner layer as RSS inputset for packet with outer IPV6
ICE_RSS_ANY_HEADERS - try with outer first then inner
		(same as the behaviour without this change)

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-11-03 23:35:03 +01:00
Qi Zhang
b2176f760b net/ice/base: use macro to get variable size array length
Use the FLEX_ARRAY_SIZE() helper with the recently added flexible array
members in structures.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-11-03 23:35:03 +01:00
Qi Zhang
fd1173d75c net/ice/base: remove duplicated AQ command flag setting
When sending the indirect Read/Write SFF EEPROM AQ command. The flag is
already added later in the code flow for all indirect AQ commands, i.e.
commands that provide an additional data buffer.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-11-03 23:35:03 +01:00
Qi Zhang
872ba77bf7 net/ice/base: support extended GPIO access
Added two new admin commands called: SW Set GPIO and SW Get GPIO
(0x6EF and 0x6F0 respectively) which extends GPIO handling
capabilities by SW driver

Signed-off-by: Shay Amir <shay.amir@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-11-03 23:35:03 +01:00
Qi Zhang
c675d5f852 net/ice/base: fix parameter name in comment
Fix parameter name for cookie_high and cookie_low.

Fixes: a90fae1d07 ("net/ice/base: add admin queue structures and commands")
Cc: stable@dpdk.org

Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-11-03 23:35:03 +01:00
Qi Zhang
67f1552b5e net/ice/base: recognize 860 as iSCSI port in CEE mode
iSCSI can use both TCP ports 860 and 3260. However, in our current
implementation, the ice_aqc_opc_get_cee_dcb_cfg (0x0A07) AQ command
doesn't provide a way to communicate the protocol port number to the
AQ's caller. Thus, we assume that 3260 is the iSCSI port number at the
AQ's caller layer.

In this patch, we will rely on the dcbx-willing mode, desired QOS and
remote QOS configuration to determine which port number that iSCSI will
use.

Signed-off-by: Chinh T Cao <chinh.t.cao@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-11-03 23:35:03 +01:00
Qi Zhang
b54a1781d2 net/ice/base: implement shared rate limiter
Implemented shared bandwidth rate limit functionality to account for
dedicated bandwidth and minimum bandwidth. It requires non default
profile be programmed for CIR, EIR/PIR, and SRL.

Signed-off-by: Tarun Singh <tarun.k.singh@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-11-03 23:35:03 +01:00
Qi Zhang
8bdcabf4c1 net/ice/base: return error directly
As there is nothing to unroll, return the error directly. Remove the
label as this is the only reference to that label.

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-11-03 23:35:03 +01:00
Qi Zhang
ee5031b810 net/ice/base: support class 5+ modules
Currently QSFP/SFP modules up to power class 4 are supported.
100G modules require higher power in many cases.
Also, low power mode requires support of power classes 7 and even 8.

This change extends "Get Link Status" AQ command (0x0607) to
support class 5+ modules.

The patch also add couple other missing bits for link status.

Signed-off-by: Shay Amir <shay.amir@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-11-03 23:35:03 +01:00
Qi Zhang
323e51eb25 net/ice/base: use malloc instead of calloc
Use *malloc() instead of *calloc() when allocating only a single object
as opposed to an array of objects.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-11-03 23:35:03 +01:00
Qi Zhang
bd885ab120 net/ice/base: use package info from ice segment metadata
There are two package versions in the package binary. Today, these two
version numbers are the same. However, in the future that may change.

Update code to use the package info from the ice segment metadata
section, which is the package information that is actually downloaded to
the firmware during the download package process.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-11-03 23:35:03 +01:00
Qi Zhang
b298908229 net/ice/base: add more capability to admin queue
Add below 3 new capability to "Get Capabilities" AQ commands
0x000A and 0x000B.

ICE_AQC_CAPS_IWARP
ICE_AQC_CAPS_PCIE_RESET_AVOIDANCE
ICE_AQC_CAPS_NVM_MGMT

Signed-off-by: Shay Amir <shay.amir@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-11-03 23:35:03 +01:00
Qi Zhang
a85f5a914a net/ice/base: allocate and free RSS global lookup table
Currently there is no API to allocate and free a RSS global LUT.
Incoming changes to support VFs having >16 queues will require using
RSS global LUT resources. The functions included will allow a PF to
configure a RSS global LUT for VFs that request >16 queues.

Signed-off-by: Brett Creeley <brett.creeley@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-11-03 23:35:03 +01:00
Qi Zhang
a7c0c27a6b net/ice/base: read security revision
The main NVM module and the Option ROM module contain a security
revision in their CSS header. This security revision is used to
determine whether or not the signed module should be loaded at bootup.
If the module security revision is lower than the associated minimum
security revision, it will not be loaded.

The CSS header does not have a module id associated with it, and thus
requires flat NVM reads in order to access it. To do this, take
advantage of the cached bank information. Introduce a new
"ice_read_flash_module" function that takes the module and bank to read.
Implement both ice_read_active_nvm_module and
ice_read_active_orom_module. These functions will use the cached values
to determine the active bank and calculate the appropriate offset.

Using these new access functions, extract the security revision for both
the main NVM bank and the Option ROM into the associated info structure.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-11-03 23:35:03 +01:00
Qi Zhang
319223c4df net/ice/base: move sched function prototypes
These functions reside in ice_sched.c but the function protypes are
declared in ice_common.h. Move the function prototypes to ice_sched.h.

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-11-03 23:35:03 +01:00
Qi Zhang
c450ea96a4 net/ice/base: rename ptype bitmap
Align all ptype bitmap to follow ice_ptypes_xxx prefix.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-11-03 23:35:03 +01:00
Qi Zhang
e8406591c3 net/ice/base: modify ptype bitmap for outer MAC
Add below ptypes into ice_ptypes_mac_ofos:

MAC_IPV4[6]_ESP
MAC_IPV4[6]_AH
MAC_IPV4[6]_NAT_T_ESP
MAC_IPV4[6]_NAT_T_IKE
MAC_IPV4[6]_NAT_T_KEEP
MAC_IPV4[6]_PFCP_NODE
MAC_IPV4[6]_PFCP_SESSION
MAC_IPV4[6]_L2TPV3

So above ptype can also be selected by a filter when outer mac header
is required.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-11-03 23:35:03 +01:00
Qi Zhang
ca180ce05b net/ice/base: add NVM write response flags
Added NVM Write Admin Command (0x703) ARQ response flags - as
returned in "Response flags" field.
Three flags are supported: POR, PERST and EMPR. All indicate the
type of reset required to get the NVM bank update effective.

Signed-off-by: Shay Amir <shay.amir@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-11-03 23:35:03 +01:00
Qi Zhang
1df9736b92 net/ice/base: support tunnel for flow director
Add struct to store outer part for tunnel rule.
Add vxlan ptype in ipv4 mac bitmap. So when create a vxlan rule, the
ptype group will be valid.

Signed-off-by: Zhirun Yan <zhirun.yan@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-11-03 23:35:03 +01:00
Simei Su
40d466fa9f net/ice: support ACL filter in DCF
Add ice_acl_create_filter to create a rule and ice_acl_destroy_filter
to destroy a rule. If a flow is matched by ACL filter, filter rule
will be set to HW. Currently IPV4/IPV4_UDP/IPV4_TCP/IPV4_SCTP pattern
and drop action are supported.

Signed-off-by: Simei Su <simei.su@intel.com>
Signed-off-by: Xuan Ding <xuan.ding@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2020-11-03 23:24:24 +01:00
Simei Su
d647871c50 net/ice/base: fix bitmap set function
This patch corrects an upper limit value in for loop.

Fixes: dd4a3cef55 ("net/ice/base: introduce and use bitmap set API")
Cc: stable@dpdk.org

Signed-off-by: Simei Su <simei.su@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2020-11-03 23:24:24 +01:00
Radu Nicolau
ad6f7399d2 net/ice: use write combining store for tail updates
Performance improvement: use a write combining store
instead of a regular mmio write to update queue tail
registers.

Signed-off-by: Radu Nicolau <radu.nicolau@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
2020-10-13 14:42:02 +02:00
Qi Zhang
da598edd06 net/ice/base: preserve default aggregator VSI information
Added the change to keep the default aggregator VSI information.

Signed-off-by: Tarun Singh <tarun.k.singh@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-09-18 18:55:10 +02:00
Qi Zhang
5a141eac05 net/ice/base: rename ACL priority values
The naming convention used to shorten 'priority' is 'prio'.
Convert the ACL related entries that use 'prior' to 'prio'.

Also, as ICE_LOW, ICE_NORMAL,... are not very descriptive of what
they represent. Add 'ACL_PRIO' to help convey their use.

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-09-18 18:55:10 +02:00
Qi Zhang
374c4bcaa0 net/ice/base: remove unnecessary conditional
These two conditional statements are unnecessary because the condition
is always true based on existing code flow.  Remove them to resolve
potential errors from some static analysis tools.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-09-18 18:55:10 +02:00
Qi Zhang
3fbba579a2 net/ice/base: rename function
'xtrct' or 'xtract' is currently used in the code to shorten 'extract'.
Rename ice_prgm_acl_prof_extrt() to ice_prgm_acl_prof_xtrct() so we don't
have another variation of a 'extract'.

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-09-18 18:55:10 +02:00
Qi Zhang
8d6004858c net/ice/base: cache NVM module bank information
The ice flash contains two copies of each of the NVM, Option ROM, and
Netlist modules. Each bank has a pointer word and a size word. In order
to correctly read from the active flash bank, the driver must calculate
the offset manually.

During NVM initialization, read the Shadow RAM control word and
determine which bank is active for each NVM module. Additionally, cache
the size and pointer values for use in calculating the correct offset.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-09-18 18:55:10 +02:00
Qi Zhang
9ec03609d8 net/ice/base: cleanup code
Remove unnecessary mac_type check, fix couple comment, and remove
unnecessary empty line.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-09-18 18:55:10 +02:00
Qi Zhang
0b7de72c96 net/ice/base: remove unused parameter
remove unused parameter of ice_parse_fdir_func_caps

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-09-18 18:55:10 +02:00
Qi Zhang
d55ca51267 net/ice/base: separate NVM version struct
The ice_nvm_info structure has become somewhat of a dumping ground for
all of the fields related to flash version. It holds the NVM version and
EETRACK id, the OptionROM info structure, the flash size, the ShadowRAM
size, and more.

A future change is going to add the ability to read the NVM version and
EETRACK ID from the inactive NVM bank. To make this simpler, it is
useful to have these NVM version info fields extracted to their own
structure.

Rename ice_nvm_info into ice_flash_info, and create a separate
ice_nvm_info structure that will contain the eetrack and NVM map
version. Move the netlist_ver structure into ice_flash_info and rename it
ice_netlist_info for consistency.

Modify the static ice_get_orom_ver_info to take the option rom structure
as a pointer. This makes it more obvious what portion of the hw struct
is being modified. Do the same for ice_get_netlist_ver_info.

Introduce a new ice_get_nvm_ver_info function, which will be similar to
ice_get_orom_ver_info and ice_get_netlist_ver_info, used to keep the NVM
version extraction code co-located.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-09-18 18:55:10 +02:00
Qi Zhang
ca5a25c5f0 net/ice/base: enable QinQ filter for switch advanced rule
Enable QinQ type filter for switch advanced rule, it support tunnel
and non-tunnel packet use external and inner vlan id as input set
for rules, it also support session id as input set for PPPoE rule
with QinQ flag in packet.

Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-09-18 18:55:10 +02:00
Qi Zhang
2906c7eac9 net/ice/base: adjust rate limit profile ids runtime database
Moving the runtime profile ids database/storage to the hw structure.

Signed-off-by: Shibin Koikkara Reeny <shibin.koikkara.reeny@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-09-18 18:55:10 +02:00
Qi Zhang
14fa11f485 net/ice/base: change misc ACL style
This is a collection of minor ACL style changes including:

- When there is nothing to unroll, return a value directly.
- Return ICE_SUCCESS(0) in cases where an error was previously checked
  so ICE_SUCCESS is the only possible return.
- Remove unnecessary parentheses and newlines
- Move unroll of allocation to end of function and use goto on errors to
  free.
- Fix function header comment style
- Remove 'else' from an 'if else' condition where both conditions return
  a value to reduce indentation.

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-09-18 18:55:10 +02:00
Qi Zhang
5ebb52ae42 net/ice/base: preserve NVM capabilities in safe mode
If the driver initializes in safe mode, it will call
ice_set_safe_mode_caps. This results in clearing the capabilities
structures, in order to set them up for operating in safe mode, ensuring
many features are disabled.

This has a side effect of also clearing the capability bits that relate
to NVM update. The result is that the device driver will not indicate
support for unified update, even if the firmware is capable.

Fix this by adding the relevant capability fields to the list of values
we preserve. To simplify the code, use a common_cap structure instead of
a handful of local variables. To reduce some duplication of the
capability name, introduce a couple of macros used to restore the
capabilities values from the cached copy.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-09-18 18:55:09 +02:00
Qi Zhang
0fceb10f6d net/ice/base: remove function ACL count query
Remove debug function ice_aq_query_acl_cntrs.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-09-18 18:55:09 +02:00
Qi Zhang
39a7a85680 net/ice/base: remove repeated words
A new test in checkpatch detects repeated words; cleanup all pre-existing
occurrences of those now.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-09-18 18:55:09 +02:00
Qi Zhang
d58cc74ebd net/ice/base: check failed acts allocation
There is no check for failed allocation of 'acts'. Add a check and
return if memory was not successfully allocated. Also, as all 'goto out'
occur after this check there is no need to perform a check for 'acts' as
we will have returned if it is not set.

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-09-18 18:55:09 +02:00
Qi Zhang
56ec90f190 net/ice/base: move a function
Move ice_flow_get_hw_prof, this is not necessary for DPDK, just
sync the code with other compile option which ice_flow_get_hw_prof
is declared as a static function.

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-09-18 18:55:09 +02:00
Qi Zhang
8ae56d6af0 net/ice/base: clear advanced rules in reset preparation
Clear advanced rules from SW and HW before reset.

Signed-off-by: Norbert Ciosek <norbertx.ciosek@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-09-18 18:55:09 +02:00
Qi Zhang
54d86ca587 net/ice/base: move a function
The only caller of this function is within the file so mark it as static
and move it up in the file to avoid a forward declaration.

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-09-18 18:55:09 +02:00
Qi Zhang
e8ae33f119 net/ice/base: filter for GTPU outer IP without inner IP
Add ptype MAC_IPV4_GTPU into
ice_ptypes_ipv4_ofos, ice_ptypes_ipv4_ofos_all and ice_ipv4_ofos_no_l4

Add ptype MAC_IPV6_GTPU into
ice_ptypes_ipv6_ofos, ice_ptypes_ipv6_ofos_all and ice_ipv6_ofos_no_l4

Add ptype MAC_IPV4_GTPU and MAC_IPV6_GTPU into
the new ice_ptypes_gtpu_no_ip

So outer IP can be configured as input set for GTPU packet that without
inner IP layer.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-09-18 18:55:09 +02:00
Qi Zhang
ef77f2cfe9 net/ice/base: support outer IP filter for GTPC
Add ptype MAC_IPV4_GTPC_TEID and MAC_IPV4_GTPC into
ice_ptypes_ipv4_ofos, ice_ptypes_ipv4_ofos_all and ice_ipv4_ofos_no_l4

Add ptype MAC_IPV6_GTPC_TEID and MAC_IPV6_GTPC into
ice_ptypes_ipv6_ofos, ice_ptypes_ipv6_ofos_all and ice_ipv6_ofos_no_l4

So outer IP can be configured as input set for GTPC packet.

Also add MAC_IPV4_GTPC_TEID and MAC_IPV6_GTPC_TEID into
ice_ptypes_gtpc, so when ICE_FLOW_SEG_HDR_GTPC is requested, it can
take effect on all GTPC packets (with or without TEID).

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-09-18 18:55:09 +02:00
Qi Zhang
c6048730ea net/ice/base: refactor DCB related variables
In this patch, the DCB related variables will be refactored out of the
ice_port_info_struct. The goal is to make the ice_port_info struct
cleaner.

Signed-off-by: Chinh T Cao <chinh.t.cao@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-09-18 18:55:09 +02:00
Qi Zhang
af73360557 net/ice/base: reduce profile to recip info get from firmware
Only need to get profile_to_recip info from firmware for
profiles used by switch, no need for other free profile
in order that we can reduce the time consumed when
download a switch rule.

Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-09-18 18:55:09 +02:00
Qi Zhang
24b38f1ea5 net/ice/base: introduce Tx rate limiting on port level
The PSM Configuration has a Rate Limiter for each associated
switch port based on its relative speed from the total BW of
switch ports connected to LAN controller. The rate limiters
will be dynamic get readjusted if switch port speeds are
changed at the root node layer of the scheduler tree. Adding
a function to directly modify the EIR of root node.

Signed-off-by: Shibin Koikkara Reeny <shibin.koikkara.reeny@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-09-18 18:55:09 +02:00
Qi Zhang
3cd364d84b net/ice/base: join format strings to same line
When printing messages with ice_debug, align the printed string to the
origin line of the message in order to ease debugging and tracking
messages back to their source.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-09-18 18:55:09 +02:00
Qi Zhang
804db32db3 net/ice/base: support GTP-U type switch rule
This patch add support for GTP-U type of switch rule.
It enable all GTP-U related ptype.

Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-09-18 18:55:09 +02:00
Qi Zhang
e39e66f4f4 net/ice/base: add AQ LLDP filter control command
As of NVM ver 1.7.1 there is a new AQ command to add and remove
LLDP filters for Rx flow.  This patch implements the support
structure to implement this functionality.

Signed-off-by: Dave Ertman <david.m.ertman@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-09-18 18:55:09 +02:00
Qi Zhang
1f9c73593c net/ice/base: fix abbreviations
Correct abbreviations as identified by abbrevcheck

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-09-18 18:55:09 +02:00
Qi Zhang
bd0438d9d4 net/ice/base: introduce and use for each bit iterator
A number of code flows iterate over a block of memory to do something
for every bit set in that memory. Use existing bit operations in a new
iterator macro to make those code flows cleaner.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-09-18 18:55:09 +02:00
Qi Zhang
4406ca307a net/ice/base: add function header
Add a function header for ice_cfg_phy_fc()

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-09-18 18:55:09 +02:00
Qi Zhang
6d288fa5f7 net/ice/base: introduce and use bitmap hamming weight API
Introduce ice_bitmap_hweight() and use it instead of open-coding that
functionality.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-09-18 18:55:09 +02:00
Qi Zhang
dd4a3cef55 net/ice/base: introduce and use bitmap set API
Introduce ice_bitmap_set() and use it instead of open-coding that
functionality.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-09-18 18:55:09 +02:00
Qi Zhang
170d34ac43 net/ice/base: replace single-element array hack
Convert the pre-C90-extension "C struct hack" method (using a single-
element array at the end of a structure for implementing variable-length
types) to the preferred use of C99 flexible array member.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-09-18 18:55:09 +02:00
Qi Zhang
3b085e6054 net/ice/base: silence static analysis warning
Sparse warns about these casts to/from restricted types which are not
actual problems; silence the warnings.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-09-18 18:55:09 +02:00
Qi Zhang
2fa7b31996 net/ice/base: cleanup misleading comment
The maximum Admin Queue buffer size and NVM shadow RAM sector size are
both 4 Kilobytes. Some comments refer to those as 4Kb which can be
confused with 4 Kilobits.
Update the comments to use the commonly used KB symbol instead.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-09-18 18:55:09 +02:00
Qi Zhang
465f3809a6 net/ice/base: clean code wrapping
To make the wrapping a little cleaner, move the variables only applicable
to ICE_FC_AUTO into that case. Also move caching of the value to only occur
on success.

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-09-18 18:55:09 +02:00
Qi Zhang
b41ed0021f net/ice/base: cleanup stack hog
In ice_flow_add_prof_sync(), struct ice_flow_prof_params has recently
grown in size hogging stack space when allocated there.
Hogging stack space should be avoided. Change allocation to be on the
heap when needed.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-09-18 18:55:09 +02:00
Qi Zhang
252deadabc net/ice/base: fix issues around move nodes
1. Fixed the max children check when moving the last(8th) children. This
   allows the parent node to hold 8 children instead of 7.
2. Check whether the VSI is already part of the given aggregator subtree
   before moving it.

Fixes: 29a0c11489 ("net/ice/base: clean code")
Cc: stable@dpdk.org

Signed-off-by: Victor Raj <victor.raj@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-09-18 18:55:09 +02:00
Qi Zhang
39ecbb6be0 net/ice/base: avoid single-member variable-length structs
There are a number of structures that consist of a one-element array as the
only struct member.  Some of those are unused (ice_aqc_add_get_recipe_data,
ice_aqc_get_port_options_data, ice_aqc_dis_txq, etc.) so remove them.
Others are used to index into a buffer/array consisting of a variable
number of a different data or structure type.  Those are unnecessary since
we can use simple pointer arithmetic or index directly into the buffer to
access individual elements of the buffer/array.

Additional code cleanups were done near areas affected by this change.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-09-18 18:55:09 +02:00
Qi Zhang
897aef75dc net/ice/base: split capabilities discovering
Using the new ice_aq_list_caps and ice_parse_(dev|func)_caps functions,
replace ice_discover_caps with two functions that each take a pointer to
the dev_caps and func_caps structures respectively.

This makes the side effect of updating the hw->dev_caps and
hw->func_caps obvious from reading the implementation of the function.
Additionally, it opens the way for enabling reading of device
capabilities outside of the initialization flow. By passing in
a pointer, another caller will be able to read the capabilities without
modifying the hw capabilities structures.

As there are no other callers, it is safe to now remove
ice_aq_discover_caps and ice_parse_caps.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-09-18 18:55:09 +02:00
Qi Zhang
8a15c69ce9 net/ice/base: handle error gracefully in HW table calloc
In the ice_init_hw_tbls API, if the ice_calloc for es->written
fails, catch that error and bail out gracefully, instead of
continuing with a NULL pointer.

Signed-off-by: Surabhi Boob <surabhi.boob@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-09-18 18:55:09 +02:00
Qi Zhang
55b41f2372 net/ice/base: fix outer IPv6 packet type table
ptype 264, 265, 266, 267, 275 should not be set
in ice_ptypes_ipv6_ofos_all.

Fixes: 88824213be ("net/ice/base: enable RSS for PFCP/L2TP/ESP/AH")
Cc: stable@dpdk.org

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Jeff Guo <jia.guo@intel.com>
2020-09-18 18:55:08 +02:00
Wei Zhao
5942204918 net/ice: fix flow director GTPU rule creation
For GTPU rule without extend header the training packet
for FDIR is different. This patch enable these case.

Fixes: 934fd00c93 ("net/ice/base: fix GTPU IP hash")
Cc: stable@dpdk.org

Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Tested-by: Zhimin Huang <zhiminx.huang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2020-09-18 18:55:07 +02:00
Junfeng Guo
6982f1848f net/ice: support auxiliary IP offset Rx descriptor
Add RXDID #25 to support Auxiliary IP Offset Rx descriptor, including
	FlexiMD.4: Outer/Single IPv4 Header offset
	FlexiMD.5: Outer/Single IPv6 Header offset
And parse the valid IP Offset into mbuf by flexible descriptor
section via devargs "proto_xtr" with "proto_xtr=ip_offset".

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Acked-by: Haiyue Wang <haiyue.wang@intel.com>
2020-09-18 18:55:06 +02:00
Thomas Monjalon
72f82c4324 mem: remove physical address aliases
Remove the deprecated unioned fields phys_addr
from the structures rte_memseg and rte_memzone.
They are replaced with the fields iova which are at the same offsets.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Andrew Rybchenko <arybchenko@solarflare.com>
Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Ray Kinsella <mdr@ashroe.eu>
2020-09-19 00:25:35 +02:00
Qi Zhang
58f58cfe70 net/ice/base: fix RSS interference
A new symmetric RSS rule may force another asymmetric rule to be
symmetric, vice versa. The reason is due to the flow engine will
try to reuse the existing profile if the input set matches with the
new rule. The fix is to disable this optimization for RSS since we
are not at the situation as profile shortage.

Fixes: ddae044035 ("net/ice/base: enable symmetric hash for RSS")
Cc: stable@dpdk.org

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Tested-by: Nannan Lu <nannan.lu@intel.com>
Acked-by: Jeff Guo <jia.guo@intel.com>
2020-07-30 00:41:23 +02:00
Junfeng Guo
c7b545fc91 net/ice/base: fix memory leak on GTPU RSS
Add memory space free logic for adding and removing GTP-U before return
success status, to avoid memory leak issue.

Fixes: bed9bb3139 ("net/ice/base: fix GTP-U inner RSS IPv4 IPv6 co-exist")
Cc: stable@dpdk.org

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2020-07-21 13:54:54 +02:00
Jeff Guo
934fd00c93 net/ice/base: fix GTPU IP hash
Enable GTPU SESSION flag usage to fix GTPU IP hash issue.

Fixes: 8fb9088385 ("net/ice/base: improve GTPU extend header handle")
Cc: stable@dpdk.org

Signed-off-by: Jeff Guo <jia.guo@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2020-07-17 18:21:21 +02:00
Wei Zhao
69d5406d60 net/ice: fix tunnel type get
When function ice_get_tun_type_for_recipe() get tunnel type,
for ICE_NON_TUN we need to include gtp-c and some gtp-u ptype
with no payload, as they do not have tunnel packet as paylod.

Fixes: 418d2563d1 ("net/ice/base: get tunnel type for recipe")

Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Tested-by: Nannan Lu <nannan.lu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2020-07-17 18:21:21 +02:00
Junfeng Guo
27dc00646f net/ice/base: fix RSS removal for GTP-U
Previous logic in removing RSS for GTPU was added in incorrect lines.
The adjustment in this patch will correct the code order so that RSS
for GTPU can be removed successfully.

We also delete the redundant print statement and cleanup the coding
style in this patch.

Fixes: bed9bb3139 ("net/ice/base: fix GTP-U inner RSS IPv4 IPv6 co-exist")
Cc: stable@dpdk.org

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-07-17 18:21:21 +02:00
Zhirun Yan
fb3ef40fc6 net/ice: support src MAC filter for flow director
This patch enables FDIR with src mac filter and change the logic for
only supporting ether type field without IP pattern. Application may
set ether type with IP. It is redundant for flow, ignore ether type
except for ICE_FLTR_PTYPE_NON_IP_L2.

Also, remove redundant code for checking next_type.

Signed-off-by: Zhirun Yan <zhirun.yan@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2020-07-11 06:18:52 +02:00
Wei Zhao
2d6255ff0a net/ice/base: fix tunnel filtering rule
If we download a NVGRE rule like "eth / ipv4 / nvgre / eth / ipv4 src
is 192.168.1.2 dst is 192.168.1.3 / end actions queue index 3 / end"
the special word will not be added because of rm->n_grp_count = 1,
so we have to change the ice_add_special_words() function before
ice_create_recipe_group(), then the special words will be add
into rm->rg_list.
Btw, the flag match_tun_mask is useless now and no need to add special
words in function ice_add_sw_recipe().

Fixes: eda40e22b8 ("net/ice/base: improve switch chained recipe")
Cc: stable@dpdk.org

Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2020-07-11 06:18:52 +02:00
Wei Zhao
afa8eeffec net/ice/base: fix tunnel type check for PPPoE
This patch fix tunnel type check for PPPoE type of recipe
when search for recipe which has been created before, and
also fix a bug of typo.

Fixes: 418d2563d1 ("net/ice/base: get tunnel type for recipe")

Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2020-07-11 06:18:52 +02:00
Qi Zhang
196dfa7703 net/ice/base: update version
Update base code version in readme.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-07-07 23:38:26 +02:00