CRC bytes should be excluded, so rx/tx bytes of VF stats is aligned
with PF stats.
Fixes: 9aace75fc8 ("i40e: fix statistics")
Cc: stable@dpdk.org
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Tx/Rx byte counts of internal managed packet should be
excluded from the total rx/tx bytes.
Fixes: 9aace75fc8 ("i40e: fix statistics")
Cc: stable@dpdk.org
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
When the last fdir flow be destroyed, the flag "mask_added"
should be reset, so the remain mask info will not take effect
when a new flow be added.
Fixes: a14de8b498 ("net/ixgbe: destroy consistent filter")
Cc: stable@dpdk.org
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
This commit adds support of FLAG action and PASSTHRU
action for flow director.
Signed-off-by: Beilei Xing <beilei.xing@intel.com>
Acked-by: Jingjing Wu <jingjing.wu@intel.com>
Move all bypass functions to ixgbe pmd and remove function
pointers from the eth_dev_ops struct.
Signed-off-by: Radu Nicolau <radu.nicolau@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
To enable L4 checksum offload for SCTP packets, E1000_RXCSUM_CRCOFL
should be set.
Otherwise, for SCTP packets even L4 checksum not calculated, it will
return PKT_RX_L4_CKSUM_GOOD.
Fixes: af75078fec ("first public release")
Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
SW completion ring of Tx (txq->elts) stores individual mbufs even if a
multi-segmented packet is sent. rte_pktmbuf_free_seg() must be used when
cleaning up the completion ring. Otherwise, chained mbufs are redundantly
freed and finally it would cause a crash.
Fixes: 1d88ba1719 ("net/mlx5: refactor Tx data path")
CC: stable@dpdk.org
Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
Acked-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
A sanity check is required in priv_fdir_disable(). If resizing Rx queue
fails, this can cause a crash by referencing a NULL pointer.
Fixes: 76f5c99e68 ("mlx5: support flow director")
Fixes: 0cdddf4d06 ("net/mlx5: split Rx queue structure")
Cc: stable@dpdk.org
Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
Acked-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Andy Moreton <amoreton@solarflare.com>
Reviewed-by: David Riddoch <driddoch@solarflare.com>
There is not point to check other Tx descriptors.
It is important if Tx datapath does not reset Tx descriptor
mbuf pointer to NULL on completion (EF10 simple Tx will do).
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Andy Moreton <amoreton@solarflare.com>
Reviewed-by: David Riddoch <driddoch@solarflare.com>
When .mac_addr_add() was changed to allow a return code, ring was changed
to return -ENOTSUP. This changes the behavior of the rte_ring driver in
a way that does not maintain backward compatibility. Additionally, if
the intent is to return -ENOTSUP, you could simply not define the stubs.
Fixes: 6d01e580ac ("ethdev: fix adding invalid MAC address")
Cc: stable@dpdk.org
Signed-off-by: Chas Williams <ciwillia@brocade.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Since commit 8f094a9ac5 ("mbuf: set mbuf fields while in pool"), some
fields are already initialised and do not need to be modified by the PMD
anymore.
Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
Acked-by: Shahaf Shuler <shahafs@mellanox.com>
Acked-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Flow rules must be applied in the same order as they have been created and
thus destroyed in the reverse order.
Fixes: 2097d0d1e2 ("net/mlx5: support basic flow items and actions")
Cc: stable@dpdk.org
Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
Acked-by: Yongseok Koh <yskoh@mellanox.com>
Acked-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
This patch disables X550EM_X 1Gbase-t led_[on|off] support since
the LEDs are wired to the PHY and the driver can not access the
PHY. led_[on|off]
Support is disabled by setting the function pointer to NULL.
init_led_link_act is also set to NULL.
Signed-off-by: Wei Dai <wei.dai@intel.com>
This patch removes some some 1GBASE-T PHY access since the FW
configures the PHY. SW shall not configure or initialize link.
Accessing the PHY would require the use of MDI clause 22 which
should be avoided in high layer driver code.
Signed-off-by: Wei Dai <wei.dai@intel.com>
Tx/Rx queue may be already flushed due to Tx/Rx error on the queue or
MC reboot. Caller needs to know that the queue is already flushed to
avoid waiting for flush done event.
Signed-off-by: Andy Moreton <amoreton@solarflare.com>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
MCDI results returned in req.emr_rc have already been translated
from MC_CMD_ERR_* to errno names, so using an MC_CMD_ERR_* value
is incorrect.
Fixes: e7cd430c86 ("net/sfc/base: import SFN7xxx family support")
Cc: stable@dpdk.org
Signed-off-by: Andy Moreton <amoreton@solarflare.com>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Add support to configure minimum and maximum PCIe extended tag.
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com>
rmb before determining rsp_type is a bottleneck.
Once we determine rsp-type is FL, we can directly go ahead and read
packets based on q->stat->pidx and budget_left.
This removes bottleneck of rmb once per every RX packet.
Now, rmb exists once per RX batch.
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com>
Enabling rx queues with default interrupt parameters doesn't happen
for other ports under same PF due to FULL_INIT_DONE flag being set
by the first port.
Fix is to to allow each port to enable its own rx queues with default
parameters.
Fixes: 0462d11544 ("cxgbe: add device related operations")
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com>
TX coalescing waits for ETH_COALESCE_PKT_NUM packets to be coalesced
across bursts before transmitting them. For slow traffic, such as
100 PPS, this approach increases latency since packets are received
one at a time and tx coalescing has to wait for ETH_COALESCE_PKT
number of packets to arrive before transmitting.
To fix this:
- Update rx path to use status page instead and only receive packets
when either the ingress interrupt timer threshold (5 us) or
the ingress interrupt packet count threshold (32 packets) fires.
(i.e. whichever happens first).
- If number of packets coalesced is <= number of packets sent
by tx burst function, stop coalescing and transmit these packets
immediately.
Also added compile time option to favor throughput over latency by
default.
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com>
Remove RTE_PCI_DRV_INTR_LSC from driver flags, since LSC interrupts
are currently not supported.
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com>
Do not count pause frames as part of normal TX/RX Frame/Byte counts.
Also, switch to using software counters rather than hardware for RX
stats.
Fixes: 856505d303 ("cxgbe: add port statistics")
Cc: stable@dpdk.org
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com>
Add support for compressed error vector available in cpl_rx_pkt for
Chelsio T6.
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com>
Update RX path to reflect Chelsio T6 register value changes.
Update ingress pack boundary value based on maximum payload size
that can be accommodated by underlying PCI. Update ingress pad
boundary value based on smallest memory controller bus width
possible. Enforce alignment for free list pointer start address.
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com>
Update informational prints pertaining to underlying hardware.
Add bootstrap firmware version and expansion ROM version prints.
Move the prints to a single function.
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com>
Add 25G and 100G link speeds and update supported port modules.
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com>
Move code to get the available ports from the firmware after it had
been reset. This ensures that driver uses the latest info on available
ports after firmware reset.
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com>
Update flash part identification and decoding to accommodate new
flash parts.
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com>
Add code to detect and run T6 devices. Update PCI ID Device table
with Chelsio T6 device ids and update documentation.
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com>
This patch adds basic offloading support, widely expected in a PMD.
Verify IPv4 and UDP/TCP checksums upon packet reception, and set
ol_flags accordingly.
On Tx, set IPv4 and UDP/TCP checksums when required, considering
ol_flags.
Signed-off-by: Pascal Mazon <pascal.mazon@6wind.com>
The following two flow rules (testpmd syntax) should not collide:
flow create 0 priority 1 ingress pattern eth / ipv4 / end actions drop / end
flow create 0 priority 1 ingress pattern eth / ipv6 / end actions drop / end
But the eth_type in the associated TC rule was set to either "ip" or
"ipv6". For TC, they could thus not have the same priority.
Use ETH_P_ALL only in the TC message to make sure those rules can
coexist.
Fixes: de96fe68ae ("net/tap: add basic flow API patterns and actions")
Cc: stable@dpdk.org
Signed-off-by: Pascal Mazon <pascal.mazon@6wind.com>
