Commit Graph

236 Commits

Author SHA1 Message Date
Fan Zhang
728c76b0e5 crypto/qat: support raw datapath API
This patch updates QAT PMD to add raw data-path API support.

Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Adam Dybkowski <adamx.dybkowski@intel.com>
2020-10-14 22:22:06 +02:00
Adam Dybkowski
efc52855dc common/qat: remove unused fields
This patch removes unused fields from structs qat_qp and
qat_qp_config, together with their initializations.

Signed-off-by: Adam Dybkowski <adamx.dybkowski@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2020-07-28 22:09:22 +02:00
David Coyle
012affe138 crypto/qat: fix DOCSIS performance
DOCSIS protocol performance in the downlink direction can be improved
significantly in the QAT SYM PMD, especially for larger packets, by
pre-processing all CRC generations in a batch before building and
enqueuing any requests to the HW. This patch adds this optimization.

Fixes: 6f0ef23740 ("crypto/qat: support DOCSIS protocol")

Signed-off-by: David Coyle <david.coyle@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2020-07-28 22:09:21 +02:00
David Coyle
8688fcf030 crypto/qat: improve security instance setup
This patch makes some improvements to the security instance setup for
the QAT SYM PMD, as follows:
- fix potential memory leak where the security instance was not freed if
  an error occurred later in the device creation
- tidy-up security instance initialization code by moving it all,
  including enabling the RTE_CRYPTODEV_FF_SECURITY feature, into one
  '#ifdef RTE_LIBRTE_SECURITY' block

Fixes: 6f0ef23740 ("crypto/qat: support DOCSIS protocol")

Signed-off-by: David Coyle <david.coyle@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2020-07-28 22:09:21 +02:00
David Coyle
979b07d8b6 crypto/qat: fix ambiguous variable names for CRC
The variable names crc_length and crc_offset have been changed to
crc_data_len and crc_data_ofs respectively, to make it clearer as to
their use i.e. the length and offset of the data over which the CRC is
calculated.

Fixes: 6f0ef23740 ("crypto/qat: support DOCSIS protocol")

Signed-off-by: David Coyle <david.coyle@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2020-07-18 23:30:47 +02:00
David Coyle
6b048cdfa2 crypto/qat: check multi-segment buffers for DOCSIS
Multi-segment mbufs are not supported for DOCSIS security protocol.
This patch adds an explicit check for this and returns an op error if
this case is found. This limitation is also added to the QAT cryptodev
documentation.

Fixes: 6f0ef23740 ("crypto/qat: support DOCSIS protocol")

Signed-off-by: David Coyle <david.coyle@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2020-07-18 23:27:31 +02:00
David Coyle
9acadb24fa crypto/qat: improve DOCSIS session creation
This patch improves the DOCSIS session creation as follows:
- it validates the security action type as well as the protocol before
  creating a session and now does this validation before allocating the
  session from the mempool
- it clears the entire private session struct before populating it with
  DOCSIS session info, in case any data was left over from the last time
  it was used
- it simplifies the DOCSIS parameter setting, which was overly
  complicated

Fixes: 6f0ef23740 ("crypto/qat: support DOCSIS protocol")

Signed-off-by: David Coyle <david.coyle@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2020-07-18 23:21:52 +02:00
Arek Kusztal
faa57df0b4 crypto/qat: support ChaCha20-Poly1305
This patchset adds ChaCha20-Poly1305 implementation to Intel
QuickAssist Technology pmd.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
2020-07-08 18:16:40 +02:00
Arek Kusztal
7788dceccb common/qat: add multi-process handling of capabilities
Move qat capabilities data into a memzone where it can be
shared by primary and secondary processes.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2020-07-08 18:16:27 +02:00
Arek Kusztal
21792c4432 crypto/qat: add multi-process handling of driver ID
As cryptodev driver_id is allocated per-process,
a corner case exists where binaries for primary and
secondary processes could have different driver_ids
if built differently. Add checking in qat PMD to catch and
handle the case where driver_ids are inconsistent.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2020-07-08 18:16:27 +02:00
Arek Kusztal
9904ff6849 common/qat: improve multi-process handling
This patch refactors qat data into structures
which are local to the process and structures which
are intended to be shared by primary and secondary
processes. This enables qat devices to be used by
multi process applications.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2020-07-08 18:16:26 +02:00
Adam Dybkowski
12e4f2b719 crypto/qat: fix AES-XTS capabilities
This patch fixes the increment field of the AES-XTS cipher key size.

Fixes: 7d5ef3bb32 ("crypto/qat: support XTS")
Cc: stable@dpdk.org

Signed-off-by: Adam Dybkowski <adamx.dybkowski@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2020-07-08 18:16:16 +02:00
David Coyle
6f0ef23740 crypto/qat: support DOCSIS protocol
Add support to the QAT SYM PMD for the DOCSIS protocol, through the
rte_security API. This, therefore, includes adding support for the
rte_security API to this PMD.

Signed-off-by: David Coyle <david.coyle@intel.com>
Signed-off-by: Mairtin o Loingsigh <mairtin.oloingsigh@intel.com>
2020-07-08 18:16:13 +02:00
Adam Dybkowski
b9e3ac6964 crypto/qat: verify session IOVA
This patch adds the verification of the crypto session IOVA
that should be known (not zero) to proceed with the
session initialisation. In case of unknown IOVA
the error code -EINVAL is returned.

Signed-off-by: Adam Dybkowski <adamx.dybkowski@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2020-07-08 00:15:35 +02:00
Arek Kusztal
fae347cb34 crypto/qat: fix cipher descriptor for ZUC and SNOW
Offset of cd pointer is too big by state1size + state2size, so few extra
unnecessary bytes will be copied into cd. Snow offset was improved as well.

Fixes: d9b7d5bbc8 ("crypto/qat: add ZUC EEA3/EIA3 capability")
Cc: stable@dpdk.org

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2020-05-11 13:17:43 +02:00
Adam Dybkowski
6e21c1a532 crypto/qat: support plain SHA1..SHA512 hashes
This patch adds support for plain SHA-1, SHA-224, SHA-256,
SHA-384 and SHA-512 hashes to QAT PMD.

Signed-off-by: Adam Dybkowski <adamx.dybkowski@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2020-04-19 22:45:11 +02:00
Thomas Monjalon
f35e5b3e07 replace alignment attributes
There is a common macro __rte_aligned for alignment,
which is now used where appropriate for consistency.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Reviewed-by: David Christensen <drc@linux.vnet.ibm.com>
2020-04-16 18:16:18 +02:00
Adam Dybkowski
a1598e90f3 crypto/qat: handle mixed hash-cipher on GEN2
This patch adds handling of mixed hash-cipher algorithms
available on GEN2 QAT in particular firmware versions.
Also the documentation is updated to show the mixed crypto
algorithms are supported on QAT GEN2.

Signed-off-by: Adam Dybkowski <adamx.dybkowski@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2020-04-05 18:30:00 +02:00
Arek Kusztal
2165e2e9ea crypto/qat: support AES-GCM J0
This patch adds J0 capability to Intel QuickAssist Technology driver

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2020-04-05 18:26:04 +02:00
Fiona Trahe
603ad3ae91 crypto/qat: optimise check for chained mbufs
To detect if sgl, use nb_segs > 1, instead of checking for next pointer,
as nb_segs is in first cache-line while next is in second cache-line.

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
2020-04-05 18:26:04 +02:00
Fiona Trahe
5390f304b7 crypto/qat: improve out-of-place conditional check
Improve case where application set m_dst to same as m_src
so really an in-place operation, though would have been treated
as out-of-place. No functional change but this path can now benefit
from DMA alignment.

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
2020-04-05 18:26:04 +02:00
Artur Trybula
728aaeffb4 cryptodev: remove unused operation for queue count
This commit removes unused function pointer (queue_pair_count)
from struct rte_cryptodev_ops. Related functions removed as well.

Signed-off-by: Artur Trybula <arturx.trybula@intel.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
2020-04-05 18:26:04 +02:00
Mairtin o Loingsigh
2aab3ff3d8 crypto/qat: support DOCSIS AES-256
This patch adds support for DOCSIS AES-256 when using qat

Signed-off-by: Mairtin o Loingsigh <mairtin.oloingsigh@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2020-04-05 18:26:04 +02:00
Thomas Monjalon
f5862ae99e cryptodev: revert Chacha20-Poly1305 AEAD algorithm
API makes think that rte_cryptodev_info_get() cannot return
a value >= 3 (RTE_CRYPTO_AEAD_LIST_END in 19.11).
20.02-rc1 was returning 3 (RTE_CRYPTO_AEAD_CHACHA20_POLY1305).
So the ABI compatibility contract was broken.

It could be solved with some function versioning,
but because a lack of time, the feature is reverted for now.

This reverts following commits:
- 6c9f3b347e ("cryptodev: add Chacha20-Poly1305 AEAD algorithm")
- 2c512e64d6 ("crypto/qat: support Chacha Poly")
- d55e01f579 ("test/crypto: add Chacha Poly cases")

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2020-02-05 15:14:46 +01:00
Arek Kusztal
2c512e64d6 crypto/qat: support Chacha Poly
This patchset adds Chacha20-Poly1305 implementation to Intel
QuickAssist Technology pmd.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2020-01-16 17:10:36 +01:00
Adam Dybkowski
bcd7e3e8e6 crypto/qat: handle mixed hash-cipher requests on GEN3
This patch implements handling mixed encrypted digest hash-cipher
requests (e.g. SNOW3G + ZUC or ZUC + AES CTR) possible when running
on GEN3 QAT. Such algorithm combinations are not supported on
GEN1/GEN2 hardware.

Signed-off-by: Adam Dybkowski <adamx.dybkowski@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2020-01-15 16:45:04 +01:00
Arek Kusztal
47c3f7a41a crypto/qat: add minimum enqueue threshold
This patch adds minimum enqueue threshold to Intel
QuickAssist Technology PMD.
It is an optimisation, configured by a command line option,
which can be used to reduce MMIO write occurrences.

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
2020-01-15 16:45:04 +01:00
Arek Kusztal
a7f8087bbd crypto/qat: fix AES CMAC mininum digest size
AES-CMAC is used in 3gpp specifications hence it is needed
to support 4 byte digest.

Fixes: 91c1daa4e1 ("crypto/qat: support AES-CMAC")
Cc: stable@dpdk.org

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2019-10-23 16:57:06 +02:00
Arek Kusztal
539a3216e1 crypto/qat: support RSA CRT in asym
This commit extends RSA implementation by CRT option

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2019-10-23 16:57:06 +02:00
Arek Kusztal
e2c5f4ea99 crypto/qat: support RSA in asym
This commit adds RSA algorithm to asymmetric pmd
using pair (n, d) private key

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2019-10-23 16:57:06 +02:00
Arek Kusztal
e1ed5a73cd crypto/qat: support session-less for asym ops
This patch adds option to use asymmetric crypto pmd with
session-less support.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2019-10-23 16:57:06 +02:00
Damian Nowak
65beb9abca crypto/qat: fix null auth when using VFIO
When running auth NULL cases while using
vfio_pci, DMAR read/write faults appear. It
happens even if digest_length is set to 0.
This is caused by auth_res_addr initialized
as 0x0.

Fixes: 4e0955bddb ("crypto/qat: fix null auth algo overwrite")
Cc: stable@dpdk.org

Signed-off-by: Damian Nowak <damianx.nowak@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2019-10-23 16:57:06 +02:00
Adam Dybkowski
aa983f03ad crypto/qat: handle Single Pass Crypto Requests on GEN3
This patch improves the performance of AES GCM by using
the Single Pass Crypto Request functionality when running
on GEN3 QAT. Falls back to the classic 2-pass mode on older
hardware.

Signed-off-by: Adam Dybkowski <adamx.dybkowski@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2019-10-09 11:50:12 +02:00
Fiona Trahe
0996ed0d5a crypto/qat: fix digest length in XCBC capability
Digest length in RTE_CRYPTO_AUTH_AES_XCBC_MAC capability
was incorrectly marked 16 bytes, should be 12.

Fixes: 6a3c87bc6a ("crypto/qat: refactor capabilities infrastructure")
Cc: stable@dpdk.org

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
2019-10-09 11:50:12 +02:00
Fiona Trahe
1a2ff59679 crypto/qat: fix crashes
Resolution for seg-faults observed:
1) in buffer re-alignment in-place sgl case
2) case where data end is exactly at end of an sgl segment.
Also renamed variable and increased comments for clearer code.

Fixes: 40002f6c2a ("crypto/qat: extend support for digest-encrypted auth-cipher")

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Tested-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Damian Nowak <damianx.nowak@intel.com>
2019-07-19 14:15:21 +02:00
Fan Zhang
186b14d685 cryptodev: make xform key pointer constant
This patch changes the key pointer data types in cipher, auth,
and aead xforms from "uint8_t *" to "const uint8_t *" for a
more intuitive and safe sessionn creation.

Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
Acked-by: Liron Himi <lironh@marvell.com>
2019-07-19 14:15:21 +02:00
Damian Nowak
40002f6c2a crypto/qat: extend support for digest-encrypted auth-cipher
This patch adds condition to be met when using
out-of-place auth-cipher operations. It checks
if the digest location overlaps with the data to
be encrypted or decrypted and if so, treats as a
digest-encrypted case.
Patch adds checking, if the digest is being
encrypted or decrypted partially and extends PMD
buffers accordingly.
It also adds feature flag for QuickAssist
Technology to emphasize it's support for digest
appended auth-cipher operations.

Signed-off-by: Damian Nowak <damianx.nowak@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2019-07-05 15:28:14 +02:00
Gosia Bakota
22606a96e9 crypto/qat: set message field to zero in sym SGL case
Fixes: e09231eaa2 ("crypto/qat: add SGL capability")
Cc: stable@dpdk.org

Signed-off-by: Gosia Bakota <gosia.bakota@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2019-07-05 14:52:25 +02:00
Bruce Richardson
530588f3cd drivers: add reasons for components being disabled
For each driver where we optionally disable it, add in the reason why it's
being disabled, so the user knows how to fix it.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Luca Boccassi <bluca@debian.org>
2019-07-02 23:21:11 +02:00
Fiona Trahe
20f1cb1aaf crypto/qat: fix null cipher algo for non 8-byte multiple
NULL cipher algo of 4-byte multiple and other sizes caused firmware hang
due to use of wrong mode. Changed from ECB mode to CTR mode to fix.

Fixes: 98f0608916 ("crypto/qat: add symmetric session file")
Cc: stable@dpdk.org

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
2019-04-30 15:40:56 +02:00
Arek Kusztal
8245972c04 crypto/qat: add modular multiplicative inverse
This commit adds modular multiplicative inverse to Intel
QuickAssist Technology driver. For capabilities or limitations
please refer to qat.rst or qat_asym_capabilities.h.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2019-04-02 16:50:24 +02:00
Arek Kusztal
fb70b33b05 crypto/qat: add modular exponentiation
This commit adds modular exponentiation to Intel QuickAssist
Technology driver. For capabilities or limitations please refer to
qat.rst or qat_asym_capabilities.h.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2019-04-02 16:50:24 +02:00
Arek Kusztal
f81cbc208f crypto/qat: add asymmetric crypto PMD
This patch adds Poll Mode Driver for asymmetric crypto
functions of Intel QuickAssist Technology hardware.

It contains plain driver with no functions implemented, specific
algorithms will be introduced in separate patches.

This patch depends on a QAT PF driver for device initialization. See
the file docs/guides/cryptodevs/qat.rst for configuration details.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2019-04-02 16:50:24 +02:00
Damian Nowak
7d5ef3bb32 crypto/qat: support XTS
This patch adds XTS capabilities and enables
XTS cipher mode on QAT.
It also updates the documentation for newly
supported AES XTS mode on QAT.

Signed-off-by: Damian Nowak <damianx.nowak@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2019-03-22 15:54:24 +01:00
Luca Boccassi
e30b4e566f build: improve dependency handling
Whenever possible (if the library ships a pkg-config file) use meson's
dependency() function to look for it, as it will automatically add it
to the Requires.private list if needed, to allow for static builds to
succeed for reverse dependencies of DPDK. Otherwise the recursive
dependencies are not parsed, and users doing static builds have to
resolve them manually by themselves.
When using this API avoid additional checks that are superfluous and
take extra time, and avoid adding the linker flag manually which causes
it to be duplicated.

Signed-off-by: Luca Boccassi <bluca@debian.org>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Tested-by: Bruce Richardson <bruce.richardson@intel.com>
2019-02-27 12:13:54 +01:00
Fiona Trahe
89da5e006f crypto/qat: fix digest in wireless auth case
When operation calls for auth (digest generation), followed by
encryption of both data plus digest, the digest-in-buffer
flag must be set for QAT.

Fixes: 39e0bee48e ("crypto/qat: rework request builder for performance")
Cc: stable@dpdk.org

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
2019-01-27 23:48:34 +01:00
Fan Zhang
725d2a7fbf cryptodev: change queue pair configure structure
This patch changes the cryptodev queue pair configure structure
to enable two mempool passed into cryptodev PMD simutaneously.

Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2019-01-10 16:57:22 +01:00
Arek Kusztal
4dc73ff704 crypto/qat: fix message for NULL algo setting unused counter
NULL algo algo does not to set counter flag so it should be zeroed.

Fixes: db0e952a5c ("crypto/qat: add NULL capability")
Cc: stable@dpdk.org

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Marko Kovacevic <marko.kovacevic@intel.com>
2018-12-19 11:19:10 +01:00
Arek Kusztal
605eb4d596 crypto/qat: fix message for CCM when setting unused counter
AES-CCM algo does not to set counter flag so it should be zeroed.

Fixes: ab56c4d9ed ("crypto/qat: support AES-CCM")
Cc: stable@dpdk.org

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Marko Kovacevic <marko.kovacevic@intel.com>
2018-12-19 11:19:10 +01:00
Arek Kusztal
93685b1fbf crypto/qat: fix block size error handling
Error code of qat_hash_get_block_size needs to be handle properly.

Fixes: 10b49880e3 ("crypto/qat: make the session struct variable in size")
Cc: stable@dpdk.org

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
Tested-by: Marko Kovacevic <marko.kovacevic@intel.com>
Acked-by: Marko Kovacevic <marko.kovacevic@intel.com>
2018-12-19 11:19:10 +01:00