Commit Graph

18657 Commits

Author SHA1 Message Date
Qi Zhang
a7b867e989 net/ice/base: remove unnecessary fields
Remove unnecessary fields in data structure for 1588 and QoS
func capabilities.

Signed-off-by: Karol Kolacinski <karol.kolacinski@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
20c549a89d net/ice/base: convert 1588 structs to use bit fields
Use bitfields in 1588 structs so they don't waste too much space.

Signed-off-by: Karol Kolacinski <karol.kolacinski@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
7ab3a759d4 net/ice/base: handle default VSI lookup type
ICE_SW_LKUP_DFLT is handled in ice_update_vsi_list_rule and
ice_aq_alloc_free_vsi_list.

Signed-off-by: Lukasz Kupczak <lukasz.kupczak@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
ed86e63543 net/ice/base: add function to parse DCBX config
LLDP MIB Change Event (opcode 0x0A01) already contains MIB, which
has been changed. Add ice_dcb_process_lldp_set_mib_change() function,
which will set local/remote DCBX config from LLDP MIB Change Event's
buffer.

This function will be used in a base driver handler for LLDP MIB
Change Event.

Signed-off-by: Anatolii Gerasymenko <anatolii.gerasymenko@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
97e32e8d48 net/ice/base: complete pending LLDP MIB
Completed structure ice_aqc_lldp_get_mib.
Added 'Pending Event Enable' bit.

Signed-off-by: Tsotne Chakhvadze <tsotne.chakhvadze@intel.com>
Signed-off-by: Karen Sornek <karen.sornek@intel.com>
Signed-off-by: Anatolii Gerasymenko <anatolii.gerasymenko@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
04ab2b2f0b net/ice/base: fix comment of overloaded GCO bit
The bit that is overloaded is bit 11 in the flex descriptor,
updating the comment to have the right one reflected.

Signed-off-by: Alice Michael <alice.michael@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
3f34e62690 net/ice/base: add unload flag for control queue shutdown
Admin queue command for shutdown AQ contains flag to indicate
driver unload. However the flag is always set in driver, even
for the resets. It causes Firmware to consider driver as unloaded
once the PF reset is triggered on all ports of device. Firmware then
restores default configuration of some features like Tx Balancing,
which is not expected behavior.
This patch added an additional function parameter to indicate
driver unload.

Signed-off-by: Piotr Gardocki <piotrx.gardocki@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
b0472e210f net/ice/base: fix input set of GTPoGRE
For GTPoGRE, When setting the prot_id of prot, it should be
set to second inner.

Fixes: 34a0e7c44f ("net/ice/base: improve flow director masking")
Cc: stable@dpdk.org

Signed-off-by: Kevin Liu <kevinx.liu@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
01aec828d9 net/ice/base: add GRE TAP tunnel type
Added new tunnel type to support NvGRE

Signed-off-by: Michal Swiatkowski <michal.swiatkowski@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
bf66265397 net/ice/base: support L2TPv2 flow rule
Add L2TPv2 (include PPP over L2TPv2) support for FDIR.

And add support PPPoL2TPv2oUDP with inner IPV4/IPV6/UDP/TCP for
FDIR.

The supported L2TPv2 packets are defined as below:
ICE_FLTR_PTYPE_NONF_IPV4_L2TPV2_CONTROL
ICE_FLTR_PTYPE_NONF_IPV4_L2TPV2
ICE_FLTR_PTYPE_NONF_IPV4_L2TPV2_PPP
ICE_FLTR_PTYPE_NONF_IPV4_L2TPV2_PPP_IPV4
ICE_FLTR_PTYPE_NONF_IPV4_L2TPV2_PPP_IPV4_UDP
ICE_FLTR_PTYPE_NONF_IPV4_L2TPV2_PPP_IPV4_TCP
ICE_FLTR_PTYPE_NONF_IPV4_L2TPV2_PPP_IPV6
ICE_FLTR_PTYPE_NONF_IPV4_L2TPV2_PPP_IPV6_UDP
ICE_FLTR_PTYPE_NONF_IPV4_L2TPV2_PPP_IPV6_TCP
ICE_FLTR_PTYPE_NONF_IPV6_L2TPV2_CONTROL
ICE_FLTR_PTYPE_NONF_IPV6_L2TPV2
ICE_FLTR_PTYPE_NONF_IPV6_L2TPV2_PPP
ICE_FLTR_PTYPE_NONF_IPV6_L2TPV2_PPP_IPV4
ICE_FLTR_PTYPE_NONF_IPV6_L2TPV2_PPP_IPV4_UDP
ICE_FLTR_PTYPE_NONF_IPV6_L2TPV2_PPP_IPV4_TCP
ICE_FLTR_PTYPE_NONF_IPV6_L2TPV2_PPP_IPV6
ICE_FLTR_PTYPE_NONF_IPV6_L2TPV2_PPP_IPV6_UDP
ICE_FLTR_PTYPE_NONF_IPV6_L2TPV2_PPP_IPV6_TCP

Signed-off-by: Jie Wang <jie1x.wang@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
f203e2ba10 net/ice/base: support RSS with L2TPv2 session ID
Add L2TPv2 session ID field support for RSS.

Enable L2TPv2 non-tunneled packet types for UDP protocol header
bitmaps.

Signed-off-by: Jie Wang <jie1x.wang@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
5aa6d76051 net/ice/base: add generic MAC with 3K signature segment
Define new type id ICE_MAC_GENERIC_3k in ice_mac_type enum, to
distinguish devices which use RSA-3K/SHA-384 segment signature type.
Use 3k signing type for E824S device.

Signed-off-by: Grzegorz Nitka <grzegorz.nitka@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
5a6a27c8fa net/ice/base: support custom WPC and LGB NICs
There are few custom Westport Channel (WPC) and Logan Beach (LGB)
network interface cards (NICs) - add their subdevice IDs to be
able to distinguish them.

Signed-off-by: Michal Michalik <michal.michalik@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
b7a6a9733c net/ice/base: clean main timer command register
Clean the main timer command register after use to avoid residual
command execution, such as re-initialization of the main timer.

Signed-off-by: Sergey Temerkhanov <sergey.temerkhanov@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
5f5b5d3f86 net/ice/base: update PHY type high max index
ICE_PHY_TYPE_HIGH_MAX_INDEX should be the maximum index value and
not the length/number of ICE_PHY_TYPE_HIGH.

Signed-off-by: Paul Greenwalt <paul.greenwalt@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
4b6ede113f net/ice/base: support auto FEC with FEC disabled
The default Link Establishment State Machine (LESM) behavior does
not allow the use of FEC disable mode if the media does not support
FEC disabled. However users may want to override this behavior.

Add support for setting Auto FEC with FEC disabled.

Signed-off-by: Paul Greenwalt <paul.greenwalt@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
2421af6c56 net/ice/base: clean up rule add without lookup
The add rule functionality works fine with a NULL lookups parameter.
However when running the undefined behavior sanitizer it noticed that
the function could trigger a memcpy from a NULL target.

Fix the code to handle NULL lkups and a zero lkups_cnt variable more
explicitly, and clean up the test to just directly pass a NULL value
instead of allocating a stack variable assigned to NULL and passing
that as a pointer.

Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
68834871b2 net/ice/base: ignore promiscuous already exist
Ignore ERR_ALREADY_EXISTS error when setting promiscuous mode.
This fix is needed because the driver could set promiscuous mode
when it still has not cleared properly.
Promiscuous mode could be set only once, so setting it second
time will be rejected.

Fixes: 60ff6f5ce2 ("net/ice/base: consolidate VF promiscuous mode")
Cc: stable@dpdk.org

Signed-off-by: Grzegorz Siwik <grzegorz.siwik@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
3cfa5591b2 net/ice/base: refine header file include
The ice_switch.h and ice_fdir.h headers include ice_common.h. They
are both themselves included in ice_common.h. This causes a circular
dependency ordering.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
23351e2ae7 net/ice/base: update L2TPv2 packet type values
Because the macros of L2TPv2 packet type value were changed in
ice_ppp-o-l2tpv2-o-udp-1.3.4.0.pkg. So update the macros of L2TPv2
packet type value and the bitmaps of packet types for relevant
protocol header to match the new DDP package.

Signed-off-by: Jie Wang <jie1x.wang@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
d308398cda net/ice/base: update definitions for AQ debug dump
Add defines for Queue Mng and Full CSR Space in debug
dump internal data. This defines are used in Lanconf for
debug dump. Added QV_SUPPORT macro in ifdef for ACL.

Signed-off-by: Dawid Zielinski <dawid.zielinski@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
e980509c3f net/ice/base: complete support for Tx balancing
Add module ID and struct necessary to read and save Tx Scheduler
Topology Tree User Selection data from PFA TLV.

Signed-off-by: Lukasz Czapnik <lukasz.czapnik@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
0012bc2d87 net/ice/base: move functions
Move function ice_ptp_set_vernier_wl and ice_ptp_src_cmd to align with
kernel driver.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
40ff47dd4b net/ice/base: fix double VLAN in promiscuous mode
Avoid enabling or disabling vlan 0 when trying to set promiscuous
vlan mode if double vlan mode is enabled. This fix is needed
because the driver tries to add the vlan 0 filter twice (once for
inner and once for outer) when double VLAN mode is enabled. The
filter program is rejected by the firmware when double vlan is
enabled, because the promiscuous filter only needs to be set once.

This issue was missed in the initial implementation of double vlan
mode.

Fixes: 60ff6f5ce2 ("net/ice/base: consolidate VF promiscuous mode")
Cc: stable@dpdk.org

Signed-off-by: Grzegorz Siwik <grzegorz.siwik@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
dcdbb1e405 net/ice/base: add low latency Tx timestamp read
E810 products can support low latency Tx timestamp register read.
Add a check for the device capability and use the new method if
supported.

Signed-off-by: Karol Kolacinski <karol.kolacinski@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
de281096d1 net/ice/base: add helper to check device is E823
Add a simple function checking if the device is E823-L or E823-C
based.

Signed-off-by: Karol Kolacinski <karol.kolacinski@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
97061639bc net/ice/base: cast types to match data sizes
Adding typecast to variables to avoid compiler warnings generated if
variables of a particular data type are assigned to ones of a
smaller data type. For example assigning an unsigned 16 bit integer
to an 8 bit integer could trigger data loss warnings or errors.

Signed-off-by: Vignesh Sridhar <vignesh.sridhar@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
c82b04c2d2 net/ice/base: adjust VSI/aggregator layers
Adjust the VSI/Aggregator layers based on the number of logical
layers supported by the FW. Currently the VSI and aggregator layers are
fixed based on the 9 layer scheduler tree layout. Due to performance
reasons the number of layers of the scheduler tree is changing from
9 to 5. It requires a readjument of these VSI/Aggregator layer
values.

Signed-off-by: Victor Raj <victor.raj@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
2be2fabdee net/ice/base: support Tx topology config
Complete the Tx topo config implementation.

Signed-off-by: Victor Raj <victor.raj@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
5dbc19cf43 net/ice/base: fix add MAC rule
Fix ice_add_mac_rule function by not overriding action value
with vsi id. It's possible to add MAC based switch filters
with action other than FWD_TO_VSI.
In current implementation fwd_id member of filter config
structure was always overwritten with hw vsi index, regardless
of action type.
Fix it, by setting hw vsi index only for FWD_TO_VSI action
filter and leave it as it is in case of other actions.

Fixes: 3ee1b0159e ("net/ice/base: support adding MAC rules on specific port")
Cc: stable@dpdk.org

Signed-off-by: Grzegorz Nitka <grzegorz.nitka@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
71dce67ab1 net/ice/base: refine default VSI config
Refine API ice_cfg_dflt_vsi and add new API
ice_check_if_dflt_vsi.

Signed-off-by: Michal Wilczynski <michal.wilczynski@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
38ef9e1b99 net/ice/base: fix null pointer dereference
Sometimes, during the shutdown process, a PCIe unrecoverable error
occurs. This leads to the following NULL pointer dereference error
while clearing hardware tables:

The patch fixes this bug by checking every table pointer against
NULL before reference it, as some of them probably have been cleared
in advance.

Fixes: 969890d505 ("net/ice/base: enable clearing of HW tables")
Cc: stable@dpdk.org

Signed-off-by: Roman Storozhenko <roman.storozhenko@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
9ad9e34820 net/ice/base: add AQ command to config node attribute
Added AQ command to config nod attribute.

Signed-off-by: Ben Shelton <benjamin.h.shelton@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
7bbc85ce2c net/ice/base: rename PHY/QUAD/ports definitions
Rename PHY/QUAD/ports definitions to reflect the correct HW
specification.

Signed-off-by: Karol Kolacinski <karol.kolacinski@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
c0ad102b47 net/ice/base: move function to internal
The function ice_disable_fd_swap should be defined as static.

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
ac549a3249 net/ice/base: fix bit finding range over ptype bitmap
The 2nd argument to function ice_find_first_bit is the bitmap size,
(in bits) not a mask. Thus, use of UINT16_MAX or 0xFFFF will allow a
potential run off the end of the ptype array.
Also, the ptype bitmap (i.e., prof->ptypes) is declared with size
ICE_FLOW_PTYPE_MAX, thus finding the bits within this bitmap should
not exceed this bound.

Fixes: 8ebb93942b ("net/ice/base: add function to set HW profile for raw flow")
Cc: stable@dpdk.org

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
289b2846c1 net/ice/base: fix array overflow in add switch recipe
The array indexes in this function are used with a zero index in the
fv_idx table, and with a +1 index in the lkup_idx arrays. The code
was using the lookup index for the field vector in only one place in
this function, but the code was never used after this point so just
remove the bad line.

This was caught by the undefined behavior sanitizer.

Fixes: fed0c5ca5f ("net/ice/base: support programming a new switch recipe")
Cc: stable@dpdk.org

Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
e48a4589b0 net/ice/base: convert array of u8 to bitmap
Previously the ice_add_prof function took an array of u8 and looped
over it with for_each_set_bit, examining each 8 bit value as a bitmap.

This was just hard to understand and unnecessary, and was triggering
undefined behavior sanitizers with unaligned accesses within bitmap
fields. Since the ptype being passed in was already declared as a
bitmap, refactor this to use native types with the advantage of
simplifying the code to use a single loop.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
d374022f21 net/ice/base: convert IO expander handle to u16
The io_expander_handle cached value is marked as an __le16, but
several places track the node handle with u16 values. Unify all
the interfaces so that it is stored and reported as a u16, and
keep the low level conversion to LE16 only at the direct firmware
interface.

This fixes warnings from sparse about mixing __le16 and u16, and
will fix related issues on platforms which use Big Endian format.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
843a099aa2 net/ice/base: fix endian format
A few functions failed to properly convert some values into Little
Endian format before sending them to the firmware. This will produce
incorrect results when running on a Big Endian platform.

Fix this by adding the necessary CPU_TO_LE* macros around the input
to firmware.

These issues were detected by sparse.

Fixes: 0f61c2af88 ("net/ice/base: add set/get GPIO helper functions")
Cc: stable@dpdk.org

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
0486c968f6 net/ice/base: fix function descriptions for parser
Some function descriptions for parser are mismatched, thus fixed
with this patch.

Fixes: 7fe2d98070 ("net/ice/base: add parser create and destroy skeleton")
Fixes: 1792942b2d ("net/ice/base: init boost TCAM table for parser")
Fixes: f787952d13 ("net/ice/base: init flag redirect table for parser")
Fixes: b3e73a812f ("net/ice/base: init IMEM table for parser")
Fixes: 2f7a1864cc ("net/ice/base: init metainit table for parser")
Fixes: 90bbd7d954 ("net/ice/base: init marker group table for parser")
Fixes: c55b1ba93f ("net/ice/base: init parse graph CAM table for parser")
Fixes: 7b61be517f ("net/ice/base: init protocol group table for parser")
Fixes: 111871087c ("net/ice/base: init ptype marker TCAM table for parser")
Fixes: 0cbacf60dc ("net/ice/base: init XLT key builder for parser")
Cc: stable@dpdk.org

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
8f43c8205c net/ice/base: detect duplicate ACL rules
Currently there is no check for adding duplicate ACL rules,
this creates subtle bugs, for example unability to remove
filters. Adding check + refactoring a redundant function.

Signed-off-by: Michal Wilczynski <michal.wilczynski@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
234f985695 net/ice/base: report NVM version numbers on mismatch
Report NVM version numbers (both detected and expected) when a
mismatch b/w driver and firmware is detected.
This would provide more useful information about which NVM
version the driver expects instead of looking up the code

Signed-off-by: Sergey Temerkhanov <sergey.temerkhanov@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
419aede32c net/ice/base: support double VLAN rules
Add support for double vlan rules with c-tag and s-tag in it.
Enable the caller to configure double vlan rules, and use extended
package capabilities to allow adding flow with double vlans.

The patch also re-order the code in ice_switch.c to align with
kernel driver.

Signed-off-by: Wiktor Pilarczyk <wiktor.pilarczyk@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
1b04de20a2 net/ice/base: add E822 generic PCI device ID
The E822 has a generic PCI device ID that can be used in the PLDM
header when updating the device so add it.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
ed3066a3b1 net/ice/base: refactor DDP code
Move DDP related into ice_ddp.c.
Refactor status flow for DDP load.
Also added support for DDP signature segments.

Signed-off-by: Sergey Temerkhanov <sergey.temerkhanov@intel.com>
Signed-off-by: Wojciech Drewek <wojciech.drewek@intel.com>
Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
ef12579699 net/ice/base: fix media type of PHY 10G SFI C2C
PHY type ICE_PHY_TYPE_LOW_10G_SFI_C2C is incorrectly mapped to media
type Fiber which results in ethtool reporting the wrong Supported
ports.

PHY type ICE_PHY_TYPE_LOW_10G_SFI_C2C should map to media type
Backplane.

Fixes: 453d087cca ("net/ice/base: add common functions")
Cc: stable@dpdk.org

Signed-off-by: Paul Greenwalt <paul.greenwalt@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
cb02072170 net/ice/base: enable calling ETH56G functions
Enable calling of ETH56G functions in the base code when the
appropriate PHY has been detected

Signed-off-by: Sergey Temerkhanov <sergey.temerkhanov@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
fb800fde66 net/ice/base: work around missing PTP capabilities
Provide a WA for missing PTP caps on Simics, this code shall be
removed after cap reporting is fixed

Signed-off-by: Sergey Temerkhanov <sergey.temerkhanov@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
e05720c063 net/ice/base: implement 56G PHY setup functions
Implement setup functions for the 56G PHY Simics model

Signed-off-by: Sergey Temerkhanov <sergey.temerkhanov@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
680793c782 net/ice/base: implement 56G PHY access functions
Implement 56G PHY register and memory read/write functions
to facilitate PTP support

Signed-off-by: Sergey Temerkhanov <sergey.temerkhanov@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
88b32fd7cc net/ice/base: add 56G PHY register definitions
Add 56G PHY register address definitions to facilitate 56G PHY
support.

Signed-off-by: Sergey Temerkhanov <sergey.temerkhanov@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
f4ce264ffe net/ice/base: add 56G PHY destination address
Add PHY 56G destination address. PHY56G is a single device
incorporating all SerDes lanes

Signed-off-by: Sergey Temerkhanov <sergey.temerkhanov@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
85508ab0c7 net/ice/base: move code block
Move some code block to the beginning of ice_ptp_hw.c to align
with kernel driver.

Signed-off-by: Sergey Temerkhanov <sergey.temerkhanov@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
0fb8370005 net/ice/base: add suffix to E822-specific functions
Add the suffix to E822 HW-dependent function names

Signed-off-by: Sergey Temerkhanov <sergey.temerkhanov@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
5a71038ffa net/ice/base: complete health status codes
add definitions for async health status codes.

Signed-off-by: Leszek Zygo <leszek.zygo@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
bc696378a9 net/ice/base: fix DSCP PFC TLV creation
When creating the TLV to send to the FW for configuring DSCP
mode PFC, the PFCENABLE field was being masked with a 4 bit
mask (0xF), but this is an 8 bit bitmask for enabled classes
for PFC.  This means that traffic classes 4-7 could not be
enabled for PFC.

Remove the mask completely, as it is not necessary, as we are
assigning 8bits to an 8 bit field.

Fixes: 8ea78b1696 ("net/ice/base: support L3 DSCP QoS")
Cc: stable@dpdk.org

Signed-off-by: Dave Ertman <david.m.ertman@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
9066f200cb net/ice/base: support VXLAN and GRE for RSS
Add RSS of inner headers for VXLAN tunnel packet.

Add packet types for packets with outer IPv4/IPv6 header
support GRE and VXLAN tunnel packet.

Following rules can use new packet types:
    - eth / ipv4(6) / udp / vxlan / ipv4(6)
    - eth / ipv4(6) / udp / vxlan / ipv4(6) / tcp
    - eth / ipv4(6) / udp / vxlan / ipv4(6) / udp
    - eth / ipv4(6) / gre / ipv4(6)
    - eth / ipv4(6) / gre / ipv4(6) / tcp
    - eth / ipv4(6) / gre / ipv4(6) / udp

Signed-off-by: Jie Wang <jie1x.wang@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
8f81056e5a net/ice/base: fix 100M speed capability
Couple of 10GBase-T devices don't support advertising 100M
speed. For these devices, ice_is_100m_speed_supported should
return false. Meanwhile add device that supports 100M speed.

Fixes: 486d29fda5 ("net/ice/base: add dedicate MAC type for E810")
Cc: stable@dpdk.org

Signed-off-by: Anirudh Venkataramanan <anirudh.venkataramanan@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
0054012bd8 net/ice/base: add auto drop blocking packets
Extended ice_aq_set_mac_cfg()function to add support for
auto drop blocking packets.

Signed-off-by: Mateusz Rusinski <mateusz.rusinski@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
4e1d404e03 net/ice/base: fix division during E822 PTP init
When initializing the device hardware for PTP, the E822 devices
requirea number of values to be calculated and programmed to
hardware.These values are calculated using unsigned 64-bit
division.

The DIV_64BIT macro currently translates into a specific Linux
functionthat triggers a *signed* division. This produces incorrect
results when operating on a dividend larger than an s64. The
division calculation effectively overflows and results in totally
unexpected behavior.

In this case, the UIX value for 10Gb/40Gb link speeds are calculated
incorrectly. This ultimately cascades into a failure of the Tx
timestamps. Specifically, the reported Tx timestamps become wildly
inaccurate and not representing nominal time.

The root cause of this bug is the assumption that DIV_64BIT can
correctly handle both signed and unsigned division. In fact the
entire reason we need this is because the Linux kernel compilation
target does not provide native 64 bit division ops, and requires
explicit use of kernel functions which explicitly do either signed
or unsigned division.

To correctly solve this, introduce new functions, DIV_U64 and
DIV_S64 which are specifically intended for signed or unsigned
division. To help catch issues, use static inline functions so
that we get strict type checking.

Fixes: 97f4f78bbd ("net/ice/base: add functions for device clock control")
Cc: stable@dpdk.org

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
683b6ab56e net/ice/base: make function names more generic
Previously "e810t" was part of few function names.
In the future it will require to add similar functions
for different NIC types.
Make "NIC type" a suffix of the function name.

Signed-off-by: Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
f450334f47 net/ice/base: combine functions for VSI promiscuous
Remove ice_get_vsi_vlan_promisc,
cause of similar implementation as ice_get_vsi_promisc,
which will now handle the use case of ice_get_vsi_vlan_promisc.

Signed-off-by: Wiktor Pilarczyk <wiktor.pilarczyk@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
2146d23a18 net/ice/base: get NVM CSS header length from CSS header
The CSS Header length is defined as ICE_CSS_HEADER_LENGTH. To
support changes in CSS Header length, calculate the CSS Header
length from the NVM CSS Header length field plus the Authentication
Header length.

Signed-off-by: Paul Greenwalt <paul.greenwalt@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Qi Zhang
10eddf13bd net/ice/base: add netlist helper functions
Add new functions to check in netlist if HW has:
- Recovered Clock device,
- Clock Generation Unit,
- Clock Multiplexer,
- GPS generic device.

Signed-off-by: Michal Michalik <michal.michalik@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2022-09-18 16:12:32 +02:00
Zhichao Zeng
6de9af2491 net/ice: support traffic to original DCF port
Add support for sending traffic to the original DCF port
with 'port_representor' action by using DCF port id as 'port_id'.

For example:
testpmd> flow create 0 ingress pattern any
         / end actions port_representor port_id 0 / end

Signed-off-by: Zhichao Zeng <zhichaox.zeng@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2022-09-18 16:12:27 +02:00
Jie Wang
19147456ac net/iavf: support priority of flow rule
Add flow rule attribute "priority" support for AVF.

Lower values denote higher priority, the highest priority for
a flow rule is 0.

All subscription rule will have a lower priority than the rules
that be created by host.

Signed-off-by: Jie Wang <jie1x.wang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2022-09-07 20:33:26 +02:00
Jie Wang
7b902af499 net/iavf: support flow subscription rule
Support flow subscribption create/destroy/validation flow
rule for AVF.

For examples:
testpmd> flow create 0 ingress pattern eth / ipv4 / udp src is 11
          / end actions represented_port port_id 1 / end
testpmd> flow validate 1 ingress pattern eth / ipv4 / tcp src is 22
          / end actions represented_port port_id 1 / end
testpmd> flow destroy 1 rule 0

VF subscribes to a rule, which means the packets will be sent to VF
instead of PF, and only VF will receive the packets.

It is allowed multiple VF subscribe to same rule, the packets will
be replicated and received by each VF.

PF will destroy all subscriptions during VF reset.

Signed-off-by: Jie Wang <jie1x.wang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2022-09-07 20:33:26 +02:00
Jie Wang
6d42380e59 net/iavf: add flow subscrption supported pattern
Add flow subscription pattern support for AVF.

The supported patterns are listed below:
eth/vlan/ipv4
eth/ipv4(6)
eth/ipv4(6)/udp
eth/ipv4(6)/tcp

Signed-off-by: Jie Wang <jie1x.wang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2022-09-07 20:33:26 +02:00
Jie Wang
fe10f0407e net/iavf: add flow subscription skeleton
Add the skeletal code of flow subscription to AVF driver.

Signed-off-by: Jie Wang <jie1x.wang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2022-09-07 20:33:26 +02:00
Jie Wang
096c21906a common/iavf: support flow subscription
VF is able to subscribe a flow from PF by VIRTCHNL_FLOW_SUBSCRIBE.

PF is expected to offload a rule to hardware which will redirect
the packet that matching the required pattern to this VF.

Only a flow with dst mac address as PF's mac address can be subscribed.

VIRTCHNL_VF_OFFLOAD_FSUB_PF is used for Flow subscription capability
negotiation and only a trusted VF can be granted with this capability.

A flow can be unsubscribed by VIRTCHNL_FLOW_UNSUBSCRIBE.

Signed-off-by: Jie Wang <jie1x.wang@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2022-09-07 20:33:26 +02:00
Steven Zou
c60fad5626 common/iavf: avoid copy in async mode
If cmd_details are defined or async flag is set,
don't copy the desc/buff back to temp.

Fixes: e5b2a9e957 ("net/avf/base: add base code for avf PMD")
Cc: stable@dpdk.org

Signed-off-by: Steven Zou <steven.zou@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2022-09-07 20:33:26 +02:00
Mah Yock Gen
4841015ffb net/igc: remove unnecessary PHY ID checks
I225 devices have only one PHY vendor. There is unnecessary to check
_I_PHY_ID during the link establishment and auto-negotiation process,
the checking also caused devices like i225-IT failed. This patch is to
remove the mentioned unnecessary checking.

Cc: stable@dpdk.org

Signed-off-by: Mah Yock Gen <yock.gen.mah@intel.com>
Signed-off-by: Taripin Samuel <samuel.taripin@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2022-09-07 20:33:26 +02:00
Kevin Liu
df539aaf35 net/ice: refactor flex descriptor protocol field extraction
The ice has the feature to extract protocol fields into flex descriptor
by programming per queue. However, the dynamic field for proto_ext are
allocated by PMD, it is the responsibility of application to reserved
the field, before start DPDK.

Application with parse the offset and proto_ext name to PMD with devargs.
Remove related private API in 'rte_pmd_ice.h' and 'rte_pmd_ice.h' file.

Signed-off-by: Kevin Liu <kevinx.liu@intel.com>
Tested-by: Jin Ling <jin.ling@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2022-09-06 14:54:56 +02:00
Radu Nicolau
eb944b5906 net/iavf: update IPsec ESN values when updating session
When updating an ingress session update the internal values before
making the virtual channel request.

Fixes: 6bc987ecb8 ("net/iavf: support IPsec inline crypto")
Cc: stable@dpdk.org

Signed-off-by: Radu Nicolau <radu.nicolau@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2022-09-06 14:54:56 +02:00
Aleksandr Miloshenko
4e868408bf net/iavf: fix Tx done descriptors cleanup
iavf_xmit_pkts() sets tx_tail to the next of last transmitted
Tx descriptor. So the cleanup of Tx done descriptors must be started
from tx_tail, not from the next of tx_tail.
Otherwise rte_eth_tx_done_cleanup() doesn't free the first Tx done mbuf
when tx queue is full.

Fixes: 86e44244f9 ("net/iavf: cleanup Tx buffers")
Cc: stable@dpdk.org

Signed-off-by: Aleksandr Miloshenko <a.miloshenko@f5.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2022-09-06 14:54:56 +02:00
Zhichao Zeng
9e984bc53b net/ice: add option to disable ACL engine in DCF
Support disabling DCF ACL engine via devarg "acl=off" in cmdline, aiming to
shorten the DCF startup time.

Signed-off-by: Zhichao Zeng <zhichaox.zeng@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2022-09-06 14:54:56 +02:00
Steve Yang
e5c7498fae net/iavf: fix pattern check for flow director parser
FDIR rules with masks are not supported in current code. Thus add
pattern check for IPv4/UDP/TCP/SCTP addr/port to terminate the FDIR
programming stage.

Fixes: d5eb3e600d ("net/iavf: support flow director basic rule")
Cc: stable@dpdk.org

Signed-off-by: Steve Yang <stevex.yang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2022-09-06 14:54:56 +02:00
Junfeng Guo
cf0884e4b0 net/igc: support device I225-IT
Add device id for Ethernet Controller (2) I225-IT.

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2022-09-06 14:54:56 +02:00
Yiding Zhou
0d58caa7d6 net/iavf: fix VLAN insertion
When the driver tells the VF to insert VLAN tag using the L2TAG2 field,
vector Tx path does not use Tx context descriptor and would cause VLAN tag
inserted into the wrong location.

This commit is to fix issue by using normal Tx path to handle L2TAG2 case.

Fixes: 3aa9573385 ("net/iavf: fix VLAN insert")
Cc: stable@dpdk.org

Signed-off-by: Yiding Zhou <yidingx.zhou@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2022-09-06 14:54:56 +02:00
Zhichao Zeng
776c119736 net/ice: remove deprecated VF flow action
According to the ABI and API Deprecation, remove deprecated VF action
as hard-to-use / ambiguous.

Action REPRESENTED_PORT should be used instead.

Signed-off-by: Zhichao Zeng <zhichaox.zeng@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2022-09-06 14:54:56 +02:00
Ke Zhang
817577c03a net/iavf: fix L3 checksum Tx offload flag
When ol_flag is only RTE_MBUF_F_TX_IPV4, the Tx L3
checksum offload is still configured to IIPT in the
command field of Tx data descriptor.

This patch is to fix the issue to make the Tx L3
checksum offload flags and Tx data descriptor
consistent.

Fixes: 1e728b0112 ("net/iavf: rework Tx path")
Cc: stable@dpdk.org

Signed-off-by: Ke Zhang <ke1x.zhang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2022-09-06 14:54:56 +02:00
Zhichao Zeng
c0444f6273 net/ice: support represented port flow action
Add support for action REPRESENTED_PORT in DCF. Supposed to send matching
traffic to the entity (VF) represented by the given ethdev, at embedded
switch level.

Signed-off-by: Zhichao Zeng <zhichaox.zeng@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2022-09-06 14:54:40 +02:00
Dexia Li
4be031d7af net/iavf: support flow matching on MAC address
Position src and dst mac bit in iavf fdir eth inset, thus
eth pattern can support src and dst mac match.

Signed-off-by: Dexia Li <dexia.li@jaguarmicro.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2022-08-08 11:11:30 +02:00
Ting Xu
53e7c7fcf3 net/ice/base: fix inner symmetric RSS hash in raw flow
Inner IPv4 and IPv6 symmetric RSS hash is not valid for raw pattern.
This patch fixes the issue by adding the corresponding protocol ID
for inner IPv4/6.

Fixes: 0837da2e27 ("net/ice/base: support add HW profile for RSS raw flow")
Cc: stable@dpdk.org

Signed-off-by: Ting Xu <ting.xu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2022-08-08 10:51:02 +02:00
Zhichao Zeng
04887b812a net/ice: fix RSS hash update
This patch fixes the issue that the RSS does not update correctly
when the user sets it to none.

Fixes: 4717a12cfa ("net/ice: initialize and update RSS based on user config")
Cc: stable@dpdk.org

Signed-off-by: Zhichao Zeng <zhichaox.zeng@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2022-08-08 10:45:53 +02:00
Ke Zhang
ba10df53e4 net/i40e: fix VF representor release
A segmentation fault occurs when testpmd exit.

This is due to fetching the device name from PF, PF
is freed firstly and then VF representor is called
later.

This commit fixes the bug by fetching the device
name from VF representor instead of PF.

Fixes: e391a7b7f8 ("net/i40e: fix multi-process shared data")
Cc: stable@dpdk.org

Signed-off-by: Ke Zhang <ke1x.zhang@intel.com>
Acked-by: Yuying Zhang <yuying.zhang@intel.com>
2022-08-08 10:37:41 +02:00
Pavan Nikhilesh
2367e7e0cf event/cnxk: update event vector Tx routine
Update event vector transmit routine to honor elem_offset.
Use ``rte_event_vector::elem_offset`` to report partial
vector transmission to the application when there is not
enough space in the SQ.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2022-09-27 15:41:59 +02:00
Pavan Nikhilesh
a6d13f59e6 event/cnxk: disable timer resolution estimation
Disable timer resolution estimation, read TIM LF clock registers
to get the current running clock counter as estimating causes
time drift.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2022-09-27 12:56:38 +02:00
Pavan Nikhilesh
4b5ffa6a05 event/cnxk: set dequeue mode to prefetch with wait
Set default GetWork(dequeue) mode to prefetch with wait for
event.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2022-09-27 12:56:38 +02:00
Pavan Nikhilesh
e3c0049d16 event/cnxk: avoid reading non-cached registers
Avoid reading non-cached registers in fastpath.
PENDSTATE need not be read before tag flush in Tx enqueue
context as we have additional checks prior to check for
pending flushes.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2022-09-27 12:56:38 +02:00
Shijith Thotton
bd1cf51125 event/cnxk: remove option to limit XAQ
Removed support to limit XAQ from devargs. If XAQ is limited, new add
works could run out of XAQ entries and disable the queue.

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
2022-09-27 12:55:39 +02:00
Bruce Richardson
8c76e2f693 raw/ioat: remove deprecated driver
The ioat driver has been superseded by the ioat and idxd dmadev drivers,
and has been deprecated for some time, so remove it.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2022-09-28 14:41:07 +02:00
Kai Ji
0100b0f3f1 crypto/openssl: fix HMAC output length
This patch sets the max length of dst in OpenSSL 3.0 lib EVP MAC final
routine to ensure enough space for the result.

Fixes: 75adf1eae4 ("crypto/openssl: update HMAC routine with 3.0 EVP API")
Cc: stable@dpdk.org

Signed-off-by: Kai Ji <kai.ji@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
2022-09-27 18:20:35 +02:00
Nithin Dabilpuram
be7e9c5fb0 net/cnxk: remove L2 header update for outbound inline
Remove L2 header update for outbound inline packets as
application is already taking care of the same.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2022-09-27 18:20:35 +02:00
Volodymyr Fialko
87d396163c crypto/cnxk: support DOCSIS
Add support for offloading RTE_CRYPTO_CIPHER_AES_DOCSISBPI and
RTE_CRYPTO_CIPHER_DES_DOCSISBPI algorithms to symmetric crypto session.

Signed-off-by: Volodymyr Fialko <vfialko@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2022-09-27 17:18:45 +02:00
Vamsi Attunuru
f57e36acb2 crypto/cnxk: update flow label copy capability
Update flow label copy capability in IPsec options.

Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2022-09-27 17:18:45 +02:00
Shijith Thotton
bfce22f1f9 crypto/cnxk: change adapter datapath error log to debug
Errors in crypto adapter datapath can be handled gracefully. So the
error print can be moved under debug.

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2022-09-27 17:18:45 +02:00
Anoob Joseph
1ceb66a1e4 crypto/cnxk: remove unused context buffer length
'struct roc_se_buf_ptr ctx_buf' has fields for a pointer and len.
The field for len was unused.
It is removed and the required pointer is added in the parent struct.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2022-09-27 17:18:45 +02:00
Anoob Joseph
82ab591504 crypto/cnxk: use dedicated functions based on operation
Identify the datapath thread to be used during session create. This can
be used to call right function early on to avoid multiple session
specific checks in datapath functions.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2022-09-27 17:18:45 +02:00
Tejasree Kondoj
2c049fb12d crypto/cnxk: enable IE engine for Chacha-Poly
Change engine group of Chacha20-Poly1305 as it is
supported on IE engines also.

Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2022-09-27 17:18:45 +02:00
Anoob Joseph
256d24011e crypto/cnxk: remove auth IV from Kasumi cipher
Auth IV is not applicable for kasumi cipher operation.
Removed the same.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2022-09-27 17:18:45 +02:00
Anoob Joseph
5cbc879b81 crypto/cnxk: avoid accessing SE context in GCM path
Field op_minor is required only for digest encrypted cases
with chained ops, hence removed from AES-GCM path.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2022-09-27 17:18:45 +02:00
Anoob Joseph
741e81c29e crypto/cnxk: remove extra digest length check
When the flag ROC_SE_VALID_MAC_BUF is set, digest length will be
non-zero. Remove extra check in datapath.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2022-09-27 17:18:45 +02:00
Anoob Joseph
7a59ccc1b5 crypto/cnxk: remove extra indirection for FC and Kasumi
Fill FC params routine now caters to only KASUMI & FC_GEN.
Call appropriate functions directly.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2022-09-27 17:18:45 +02:00
Tejasree Kondoj
ccf84704fd crypto/cnxk: fix endianness in anti-replay
Fixed anti-replay endianness issue in lookaside IPsec.

Fixes: c1eac1b966 ("crypto/cnxk: add anti-replay as per new firmware")
Cc: stable@dpdk.org

Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2022-09-27 17:18:45 +02:00
Anoob Joseph
464fe5121b crypto/cnxk: remove MAC length check for AEAD
For both AES-GCM and ChaChaPoly, digest size must be non-zero.
So remove the conditional handling in the datapath.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2022-09-27 17:18:45 +02:00
Anoob Joseph
d94414d162 crypto/cnxk: separate out PDCP cipher datapath
Add separate datapath for PDCP opcode performing cipher operation.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2022-09-27 17:18:45 +02:00
Anoob Joseph
d3bff77cc3 crypto/cnxk: separate out PDCP chain datapath
Add separate datapath for PDCP chain opcode.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2022-09-27 17:18:45 +02:00
Anoob Joseph
7674b967dd crypto/cnxk: limit meta buf cache to 128
Limit meta buf pool cache size as 128. Having 512 as
the cache size would cause more time for refill.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Volodymyr Fialko <vfialko@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2022-09-27 17:18:45 +02:00
Anoob Joseph
effdcd4853 crypto/cnxk: remove IV clearing
Zeroising AES-CMAC IV would be done in microcode.
Clearing in DPDK is not redundant.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2022-09-27 17:18:45 +02:00
Volodymyr Fialko
661aeb251c crypto/cnxk: add burst enqueue for event mode
Added support for burst enqueue for cn10k event crypto adapter.
Instructions will be grouped based on the queue pair and sent in a burst.

Signed-off-by: Volodymyr Fialko <vfialko@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2022-09-27 17:18:45 +02:00
Archana Muniganti
246dea7e6e crypto/cnxk: support AES-CCM
Added lookaside IPsec AES-CCM support in CN9K & CN10K PMDs.

Signed-off-by: Archana Muniganti <marchana@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2022-09-27 17:18:45 +02:00
Amit Prakash Shukla
04361fe2ac crypto/qat: fix build with GCC 12
GCC 12 raises the following warning:

In function '_mm_storeu_si128',
    inlined from 'rte_mov16' at
	../lib/eal/x86/include/rte_memcpy.h:508:2,
    inlined from 'rte_mov128' at
	../lib/eal/x86/include/rte_memcpy.h:542:2,
    inlined from 'rte_memcpy_generic' at
	../lib/eal/x86/include/rte_memcpy.h:732:4,
    inlined from 'rte_memcpy' at
	../lib/eal/x86/include/rte_memcpy.h:882:10,
    inlined from 'qat_sym_do_precomputes.constprop' at
	../drivers/crypto/qat/qat_sym_session.c:1434:2:
/usr/lib/gcc/x86_64-pc-linux-gnu/12.1.1/include/emmintrin.h:739:8: error:
	array subscript 8 is outside array bounds of 'unsigned char[128]'
	[-Werror=array-bounds]
  739 |   *__P = __B;
      |   ~~~~~^~~~~

../drivers/crypto/qat/qat_sym_session.c:
	In function 'qat_sym_do_precomputes.constprop':
../drivers/crypto/qat/qat_sym_session.c:1305:17: note:
	at offset 192 into object 'opad.750' of size 128
 1305 | uint8_t
	  opad[qat_hash_get_block_size(ICP_QAT_HW_AUTH_ALGO_DELIMITER)];
      |           ^~~~

../drivers/crypto/qat/qat_sym_session.c:
	In function 'qat_sym_do_precomputes.constprop':
../drivers/crypto/qat/qat_sym_session.c:1304:17: note:
	at offset 128 into object 'ipad.749' of size 128
 1304 | uint8_t
	  ipad[qat_hash_get_block_size(ICP_QAT_HW_AUTH_ALGO_DELIMITER)];
      |           ^~~~

Added a check to prevent compiler warnings.

Fixes: 1703e94ac5 ("qat: add driver for QuickAssist devices")
Cc: stable@dpdk.org

Signed-off-by: Amit Prakash Shukla <amitprakashs@marvell.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
2022-09-27 17:16:52 +02:00
Arek Kusztal
66c0ad1f3d common/qat: fix VF to PF answer
This commit fixes answer sent to physical device in
vf2pf communication.

Fixes: b17d16fb47 ("common/qat: add PF to VF communication")
Cc: stable@dpdk.org

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
2022-09-27 17:16:52 +02:00
Kai Ji
52d59b92b0 crypto/qat: enable OpenSSL legacy provider in session
Some cryptographic algorithms such as MD5 and DES are now considered legacy
and not enabled by default in OpenSSL 3.0. Load up legacy provider as MD5
DES are needed in QAT session pre-computes and secure session creation.

Fixes: 3227bc7138 ("crypto/qat: use intel-ipsec-mb for partial hash and AES")
Cc: stable@dpdk.org

Signed-off-by: Kai Ji <kai.ji@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
2022-09-27 17:16:52 +02:00
Ashwin Sekhar T K
2b9c693f6e crypto/openssl: support AES-CMAC operations
Extend openssl crypto PMD to support AES CMAC operations.

Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>
Acked-by: Kai Ji <kai.ji@intel.com>
2022-09-27 17:16:52 +02:00
Ruifeng Wang
0899a87ce7 crypto/ipsec_mb: enable IPsec on Arm platform
Arm port of ipsec_mb library [1] has different header file name than
the Intel ipsec_mb library. Proper header name is picked according to
the architecture to get the code compile when ipsec_mb is installed on
Arm platform.

And the Arm port currently supports ZUC and SNOW3g. Call to other
algorithms will be blocked.

[1] https://gitlab.arm.com/arm-reference-solutions/ipsec-mb/-/tree/main

Signed-off-by: Ruifeng Wang <ruifeng.wang@arm.com>
Acked-by: Ashwin Sekhar T K <asekhar@marvell.com>
2022-09-27 17:16:52 +02:00
Ruifeng Wang
4232326bd6 crypto/ipsec_mb: remove redundant includes
The intel-ipsec-mb header is included by ipsec_mb_private header file.
Hence removed intel-ipsec-mb from files that have ipsec_mb_private
included.

Signed-off-by: Ruifeng Wang <ruifeng.wang@arm.com>
2022-09-27 17:16:52 +02:00
Ashwin Sekhar T K
7ecd638528 crypto/ipsec_mb: enable support for arm64
Enable support for arm64 architecture in ipsec_mb. x86
specific code is conditionally compiled only for x86
architecture builds. Other architectures will be unsupported.

Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
2022-09-27 17:16:52 +02:00
Kai Ji
6705190edf common/qat: fix build with OpenSSL 1.1
This patch add in libcrypto version check before enable libipsec-mb for
QAT. The intel-ipsec-mb lib for partial hash and AES calculation should
only be enabled when both OpensSSL 3.0 and IPSec_MB 1.2.0 are installed
on the system.

Fixes: 3227bc7138 ("crypto/qat: use intel-ipsec-mb for partial hash and AES")
Cc: stable@dpdk.org

Signed-off-by: Kai Ji <kai.ji@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2022-09-27 17:16:52 +02:00
Pavan Nikhilesh
3fe71706ab event/cnxk: fix stale data in workslot
Fix stale XAQ depth check pointers in workslot memory after
XAQ pool resize.

Fixes: bd64a963d2 ("event/cnxk: use common XAQ pool functions")
Cc: stable@dpdk.org

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2022-09-27 05:22:51 +02:00
Shijith Thotton
2f279a1b6e eventdev: add weight and affinity attributes to queue conf
Added new fields to represent event queue weight and affinity in
rte_event_queue_conf structure. Internal op to get queue attribute is
removed as it is no longer needed. Updated driver to use the new field.

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2022-09-26 15:34:57 +02:00
Naga Harish K S V
3d9d8adf8c eventdev/timer: support periodic event timer
Add support to configure and use periodic event timers in
software timer adapter.

The structure ``rte_event_timer_adapter_stats`` is extended
by adding a new field, ``evtim_drop_count``. This stat
represents the number of times an event_timer expiry event
is dropped by the event timer adapter.

Updated the software eventdev pmd timer_adapter_caps_get
callback function to report the support of periodic
event timer capability.

Signed-off-by: Naga Harish K S V <s.v.naga.harish.k@intel.com>
Acked-by: Erik Gabriel Carrillo <erik.g.carrillo@intel.com>
2022-09-26 15:33:48 +02:00
Rahul Bhansali
ffe6a6a109 event/cnxk: support reassembly functions
Add the support of reassembly functions callback
assignment to eventdev dequeue and dequeue_burst.

Fixes: c062f5726f ("net/cnxk: support IP reassembly")
Cc: stable@dpdk.org

Signed-off-by: Rahul Bhansali <rbhansali@marvell.com>
2022-09-26 15:33:47 +02:00
Pavan Nikhilesh
1c47a13510 event/cnxk: add preliminary Tx queue depth check
Add preliminary Tx queue depth check and return on failure.
Once the check passes, tx_adapter_enqueue() function becomes
a blocking call till it succeeds.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2022-09-26 15:33:47 +02:00
Stephen Hemminger
ec70113a60 event/sw: fix device name in dump
The software eventdev PMD reports todo-fix-name as the
device name.

Fixes: c66baa68e4 ("event/sw: add dump function for easier debugging")
Cc: stable@dpdk.org

Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
2022-09-26 15:33:46 +02:00
Mattias Rönnblom
70cb0278a4 event/dsw: fix flow migration
Fix bug in flow migration, which under certain conditions causes
reordering and violation of atomicity guarantees.

The issue occurs when the processing of a flow (on an atomic queue)
has resulted in events enqueued to a flow currently being migrated,
and the former (producer) flow is also selected for migration. The
events are buffered ("paused") on the originating port, and released
(forwarded) when the migration has completed. However, at the time of
"unpausing" the latter (consumer) flow, processing of the producer
flow on the port to which it was migrated may have already produced
events, for the same paused flow. This constitutes a race condition,
and depending on which port wins, reordering may have been introduced.

This patch forbids migration when a port has paused events, since
those events may have been the result of processing a to-be-migrated
flow.

This patch also disallows processing events pertaining to a flow under
migration, for the same reason. A new buffer is introduced, which
holds such not-yet-processed events dequeued from the port's input
ring. Such events are forwarded to the target port as a part of the
migration process.

The 'forwarding' migration state is eliminated, and instead background
processing is only performed if there are no unreleased events on the
port.

The bug is primarily triggered in situations where multiple flows are
migrated as one transaction, but may occur even if only a single flow
is migrated (e.g., with older DSW versions, which does not support
multi-flow migration).

Fixes: f6257b22e7 ("event/dsw: add load balancing")
Cc: stable@dpdk.org

Signed-off-by: Mattias Rönnblom <mattias.ronnblom@ericsson.com>
2022-09-26 15:33:46 +02:00
Shijith Thotton
8d5387a99a event/cnxk: move crypto adapter to respective file
Moved the common crypto adapter ops to file specific to eventdev
adapters.

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
2022-09-26 15:33:44 +02:00
Ivan Malov
235558fe94 ethdev: remove deprecated flow action physical port
Such deprecation was commenced in DPDK 21.11.
Since then, no parties have objected. Remove.

The patch breaks ABI.

Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru>
Reviewed-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Acked-by: Ori Kam <orika@nvidia.com>
2022-09-27 10:26:51 +02:00
Ivan Malov
5e3779b7ab ethdev: remove deprecated flow item physical port
Such deprecation was commenced in DPDK 21.11.
Since then, no parties have objected. Remove.

The patch breaks ABI.

Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru>
Reviewed-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Acked-by: Ori Kam <orika@nvidia.com>
2022-09-27 10:26:51 +02:00
Ivan Malov
5c45fde3e9 ethdev: remove deprecated flow item VF
Such deprecation was commenced in DPDK 21.11.
Since then, no parties have objected. Remove.

The patch breaks ABI.

Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru>
Reviewed-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Acked-by: Ori Kam <orika@nvidia.com>
2022-09-27 10:26:51 +02:00
Ivan Malov
13f8de927a ethdev: remove deprecated flow item PF
Such deprecation was commenced in DPDK 21.11.
Since then, no parties have objected. Remove.

The patch breaks ABI.

Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru>
Reviewed-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Acked-by: Ori Kam <orika@nvidia.com>
2022-09-27 10:26:51 +02:00
Ivan Malov
a05a8e409b net/cnxk: support represented port flow action
There has been support for similar action PORT_ID for
some time already, but this action will be deprecated.
Support action REPRESENTED_PORT before the transition.

Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru>
Reviewed-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
2022-09-27 10:26:51 +02:00
Ivan Malov
b1e1529441 net/dpaa2: support represented port flow action
There's been support for similar actions PHY_PORT and PORT_ID
for some time already, but these actions are being deprecated.
Support action REPRESENTED_PORT to prepare for the transition.

Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru>
Reviewed-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
2022-09-27 10:26:51 +02:00
Nithin Dabilpuram
479c2b1b5f net/cnxk: support multi-segment inline IPsec
Add multi-seg support for Inline IPsec.
Also in reassembly, FI_PAD is not required to compute pointer to
Fragment info because it is only at CPT_PARSE_HDR_S + FI_OFFSET * 8
and is always 8B aligned.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Rahul Bhansali <rbhansali@marvell.com>
2022-09-22 10:44:47 +02:00
Satheesh Paul
73fc72e125 common/cnxk: update MKEX capability flags
Update MKEX capability flags to enable parsing
VLAN PCP, DSCP and GTPv1 TEID.

Signed-off-by: Satheesh Paul <psatheesh@marvell.com>
Reviewed-by: Kiran Kumar K <kirankumark@marvell.com>
2022-09-22 10:44:46 +02:00
Satheesh Paul
ad2c7b20ef common/cnxk: print counters along with flow dump
When dumping hardware flow data, print any counter
configured on the flow as well.

Signed-off-by: Satheesh Paul <psatheesh@marvell.com>
Reviewed-by: Kiran Kumar K <kirankumark@marvell.com>
2022-09-22 10:44:44 +02:00
Satheesh Paul
af45c18e90 common/cnxk: fix printing disabled MKEX registers
This patch skips printing disabled MKEX registers when
dumping hardware flow MCAM entry data.

Fixes: 9869c39918 ("common/cnxk: support flow entry dump")
Cc: stable@dpdk.org

Signed-off-by: Satheesh Paul <psatheesh@marvell.com>
Reviewed-by: Kiran Kumar K <kirankumark@marvell.com>
2022-09-22 10:44:43 +02:00
Satheesh Paul
b494807269 common/cnxk: fix missing flow counter reset
Added code to clear counters upon flow deletion.

Fixes: f9af908074 ("common/cnxk: add mcam utility API")
Cc: stable@dpdk.org

Signed-off-by: Satheesh Paul <psatheesh@marvell.com>
Reviewed-by: Kiran Kumar K <kirankumark@marvell.com>
2022-09-22 10:44:41 +02:00
Amit Prakash Shukla
d7b080f1e7 net/mvneta: fix build with GCC 12
./drivers/net/mvneta/mvneta_rxtx.c:89:42:
	error: 'mbufs' may be used uninitialized [-Werror=maybe-uninitialized]
   89 |         MVNETA_SET_COOKIE_HIGH_ADDR(mbufs[0]);
      |                                          ^
../drivers/net/mvneta/mvneta_rxtx.c:77:26: note: 'mbufs' declared here
   77 |      struct rte_mbuf *mbufs[MRVL_NETA_BUF_RELEASE_BURST_SIZE_MAX];
      |                       ^~~~~

Fixes: ce7ea76459 ("net/mvneta: support Rx/Tx")
Cc: stable@dpdk.org

Signed-off-by: Amit Prakash Shukla <amitprakashs@marvell.com>
Acked-by: Liron Himi <lironh@marvell.com>
2022-09-22 10:44:39 +02:00
Rakesh Kudurumalla
dac480837c net/cnxk: dump device private information
Add support for ethdev private data dump callback for
debugging purposes.

Signed-off-by: Rakesh Kudurumalla <rkudurumalla@marvell.com>
2022-09-22 10:44:37 +02:00
Rakesh Kudurumalla
4006ac1ffb common/cnxk: dump device basic information to file
Add helper API to complete device info for debug purposes.
This is used by ethdev dump API to dump ethdev's internal info.

Signed-off-by: Rakesh Kudurumalla <rkudurumalla@marvell.com>
2022-09-22 10:44:36 +02:00
Vidya Sagar Velumuri
a33ed96814 net/cnxk: enable ESN and anti-replay
Enable ESN and anti-replay in IPsec capabilities
Add support for session update security API
Fix the CPT command population for ESN enabled case

Signed-off-by: Vidya Sagar Velumuri <vvelumuri@marvell.com>
2022-09-22 10:44:35 +02:00
Vidya Sagar Velumuri
fe87c45543 net/cnxk: support crypto auth algo MD5
Add support for MD5 auth algo for security offload in inline mode.

Signed-off-by: Vidya Sagar Velumuri <vvelumuri@marvell.com>
2022-09-22 10:44:33 +02:00
Vidya Sagar Velumuri
e1a9ff6930 net/cnxk: support crypto cipher DES-CBC
Add support for DES-CBC cipher for security offload in inline mode.

Signed-off-by: Vidya Sagar Velumuri <vvelumuri@marvell.com>
2022-09-22 10:44:32 +02:00
Nithin Dabilpuram
61ee9dc8b6 net/cnxk: limit port-specific SA table size
Limit port specific SA table size to 1 entry when not used.
This is useful when inline device is enabled as then
Port specific SA table will not be used for Inline IPsec
inbound processing.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2022-09-22 10:44:31 +02:00
Nithin Dabilpuram
9c11122cd0 net/cnxk: wait for CPT FC on WQE path
Wait for CPT flow control on WQE path. This is to
avoid CPT queue overflow and thereby a CPT misc
interrupt.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2022-09-22 10:44:29 +02:00
Kommula Shiva Shankar
b059bbb895 common/cnxk: support Tx completion event via RQ/CQ mapping
Added RoC support for Tx completion events via RQ to CQ mapping.

Signed-off-by: Kommula Shiva Shankar <kshankar@marvell.com>
2022-09-22 10:44:28 +02:00
Kommula Shiva Shankar
ba6855a01d common/cnxk: add CQ limit associated with SQ
Update CQ threshold limit associated with sq.
This is used when we need completions for packets that are
successfully transmitted.

Signed-off-by: Kommula Shiva Shankar <kshankar@marvell.com>
2022-09-22 10:44:27 +02:00