Commit Graph

29020 Commits

Author SHA1 Message Date
Fan Zhang
328d690d2f crypto/qat: update raw data path
This commit updates the QAT raw data-path API to support the
changes made to device and sessions. The QAT RAW data-path API
now works on Generation 1-3 devices and is disabled on GEN4.

Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
Signed-off-by: Adam Dybkowski <adamx.dybkowski@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-07-20 10:32:05 +02:00
Arek Kusztal
960ff4d665 common/qat: add service discovery
This commit adds service discovery to generation four
of Intel QuickAssist Technology devices.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-07-20 10:32:05 +02:00
Arek Kusztal
c546d6e3d4 common/qat: reset ring pairs before setting GEN4
This commit resets ring pairs of particular vf before
setting PMD.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-07-20 10:32:05 +02:00
Arek Kusztal
b17d16fb47 common/qat: add PF to VF communication
Add communication between physical device and virtual function
in Intel QucikAssist Technology PMD.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-07-20 10:32:05 +02:00
Arek Kusztal
e4beb311d2 crypto/qat: support GMAC in GEN4 legacy mode
Add AES-GMAC algorithm in legacy mode to generation 4 devices.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-07-20 10:32:05 +02:00
Arek Kusztal
c2c1ccaec2 crypto/qat: add Chacha-Poly in UCS-SPC mode
This commit adds Chacha20-Poly1305 aglorithm that works
in UCS (Unified crypto slice) SPC(Single-Pass) mode.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-07-20 10:32:05 +02:00
Arek Kusztal
3e7a5a124d crypto/qat: add AES-GCM in UCS-SPC mode
This commit adds AES-GCM algorithm that works
in UCS (Unified crypto slice) SPC(Single-Pass) mode.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-07-20 10:32:05 +02:00
Arek Kusztal
6618d3b5ca crypto/qat: rework init common header
Rework init common header function for request
descriptor so it can be called only once.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-07-20 10:32:05 +02:00
Arek Kusztal
6599d09314 crypto/qat: support legacy GCM and CCM
Add AES-GCM, AES-CCM algorithms in legacy mode.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-07-20 10:32:05 +02:00
Arek Kusztal
bfe16f145d crypto/qat: rename content descriptor functions
Content descriptor functions are incorrectly named,
having them with proper name will improve readability and
facilitate further work.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-07-20 10:32:05 +02:00
Arek Kusztal
d05492913e crypto/qat: support GEN4 unified cipher slice
This commit adds unified cipher slice(UCS) to Intel QuickAssist
Technology PMD and enables AES-CTR algorithm.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-07-20 10:32:05 +02:00
Arek Kusztal
976da46344 crypto/qat: enable GEN4 legacy algorithms
This commit enables algorithms labeled as 'legacy'
on QAT generation 4 devices.
Following algorithms were enabled:
* AES-CBC
* AES-CMAC
* AES-XCBC MAC
* NULL (auth, cipher)
* SHA1-HMAC
* SHA2-HMAC (224, 256, 384, 512)

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-07-20 10:32:05 +02:00
Arek Kusztal
8f393c4ffd common/qat: support GEN4 devices
This commit adds support for fourth generation (GEN4) of
Intel QuickAssist (QAT) Technology devices.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-07-20 10:32:05 +02:00
Arek Kusztal
7b976dd079 common/qat: rework queue pair per service
Different generations of Intel QuickAssist Technology devices may
differ in approach to allocate queues. Queue pair number function
therefore needs to be more generic.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-07-20 10:32:05 +02:00
Cristian Dumitrescu
cfcc7bf8da examples/pipeline: fix out of bounds array access
Fix the incorrect array out of bounds check within the function
pipeline_selector_group_member_read().

Coverity issue: 371911
Fixes: 598fe0dd0d ("examples/pipeline: support selector table")

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
2021-07-21 13:51:17 +02:00
Cristian Dumitrescu
40d42de563 pipeline: fix selector freeing
Due to a typo, the selector_free() function incorrectly takes an early
return when the selectors array is non-NULL, as opposed to the other
way around.

Coverity issue: 371912
Fixes: cdaa937d3e ("pipeline: support selector table")

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
2021-07-21 13:51:17 +02:00
Richael Zhuang
cf1e803508 test/power: fix CPU frequency check for intel_pstate
For acpi_cpufreq and cppc_cpufreq, both cpuinfo_cur_freq and
scaling_cur_freq exist. For pstate, only scaling_cur_freq exists.
And value in scaling_cur_freq and cpuinfo_cur_freq may not be the
same. For acpi_cpufreq and cppc_cpufreq, we should check
cpuinfo_cur_freq but not scaling_cur_freq. So here change the
check sequence to make sure it works for all cpufreq drivers.
Besides, add rounding for pstate driver.

Fixes: ff6dfb8e49 ("test/power: fix CPU frequency check")
Cc: stable@dpdk.org

Signed-off-by: Richael Zhuang <richael.zhuang@arm.com>
Acked-by: David Hunt <david.hunt@intel.com>
2021-07-20 17:24:07 +02:00
Anatoly Burakov
87fb608356 power: fix crash on error for intel_pstate
Currently, the error paths can lead to attempts at dereferencing NULL
pointers. Add the check to avoid attempts at dereferencing NULL
pointers.

Coverity issue: 371895
Coverity issue: 371889
Fixes: 06cffd468f ("power: refactor ACPI and intel_pstate support")

Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Reviewed-by: David Marchand <david.marchand@redhat.com>
2021-07-20 17:24:00 +02:00
Konstantin Ananyev
a03e4b62a7 raw/ioat: fix termination descriptor for batch
When batch_size == 1, idxd has to add a dummy termination descriptor
to satisfy HW requirements.
Right now it uses NOP descriptor with FENCE flag.
This is excessive and fencing can slowdown things quite significantly.
The patch removes FENCE flag from termination dummy descriptor.
That helps to improve performance for no-burst scenarios.

Fixes: 245efe544d ("raw/ioat: report status of completed jobs")

Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
2021-07-20 15:28:43 +02:00
Kevin Laatz
9cf9ac48b1 raw/ioat: fix config script queue size calculation
The queue size calculation is currently based on "max_tokens" rather than
"max_work_queues_size". This is resulting in the queue size being
incorrectly configured when using the script to configure devices bound to
the IDXD kernel driver.
This patch fixes this miscalculation so devices are configured with
appropriate queue size.

Fixes: 01863b9d23 ("raw/ioat: include example configuration script")
Cc: stable@dpdk.org

Reported-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Signed-off-by: Kevin Laatz <kevin.laatz@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
2021-07-20 15:28:43 +02:00
David Hunt
de8606bf73 distributor: fix 128-bit write alignment
When the distributor sample app is built as a 32-bit app,
the data buffer passed to find_match_vec can be unaligned,
causing a segmentation fault due to writing a 128-bit value
using _mm_store_si128().  128-bit align the data being
passed in so this does not happen.

Fixes: 775003ad2f ("distributor: add new burst-capable library")
Cc: stable@dpdk.org

Signed-off-by: David Hunt <david.hunt@intel.com>
2021-07-20 14:32:08 +02:00
Igor Romanov
5cb4746205 net/sfc: support count action in flow query
The query reports the number of hits for a counter associated
with a flow rule.

Signed-off-by: Igor Romanov <igor.romanov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
Reviewed-by: Ivan Malov <ivan.malov@oktetlabs.ru>
2021-07-20 12:20:31 +02:00
Igor Romanov
96fd2bd69b net/sfc: support flow action count in transfer rules
For now, a rule may have only one dedicated counter, shared counters
are not supported.

HW delivers (or "streams") counter readings using special packets.
The driver creates a dedicated Rx queue to receive such packets
and requests that HW start "streaming" the readings to it.

The counter queue is polled periodically, and the first available
service core is used for that. Hence, the user has to specify at least
one service core for counters to work. Such a core is shared by all
MAE-capable devices managed by sfc driver.

Signed-off-by: Igor Romanov <igor.romanov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
Reviewed-by: Ivan Malov <ivan.malov@oktetlabs.ru>
2021-07-20 12:20:31 +02:00
Andrew Rybchenko
248239f874 common/sfc_efx/base: add packetiser packet format definition
Packetiser composes packets with MAE counters update.

Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
2021-07-20 12:20:31 +02:00
Igor Romanov
3bcd60fe2e common/sfc_efx/base: add max MAE counters to limits
The information about the maximum number of MAE counters is
crucial to the counter support in the driver.

Signed-off-by: Igor Romanov <igor.romanov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
Reviewed-by: Ivan Malov <ivan.malov@oktetlabs.ru>
2021-07-20 12:20:31 +02:00
Igor Romanov
a9a238e9f5 net/sfc: add Rx datapath method to get pushed buffers count
The information about the number of pushed Rx buffers is required
for counter Rx queue to know when to give credits to counter
stream.

Signed-off-by: Igor Romanov <igor.romanov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
Reviewed-by: Ivan Malov <ivan.malov@oktetlabs.ru>
2021-07-20 12:20:31 +02:00
Igor Romanov
238306cf9a common/sfc_efx/base: support counter in action set
User will be able to associate counter with MAE action set to
collect counter packets and bytes for a specific action set.

Signed-off-by: Igor Romanov <igor.romanov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
Reviewed-by: Ivan Malov <ivan.malov@oktetlabs.ru>
2021-07-20 12:20:31 +02:00
Igor Romanov
c0a77efb9c common/sfc_efx/base: add counter stream MCDI wrappers
The MCDIs will be used to control counter Rx queue packet flow.

Signed-off-by: Igor Romanov <igor.romanov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
Reviewed-by: Ivan Malov <ivan.malov@oktetlabs.ru>
2021-07-20 12:20:31 +02:00
Igor Romanov
bbc42f3411 common/sfc_efx/base: add counter creation MCDI wrappers
User will be able to create and free MAE counters. Support for
associating counters with action set will be added in upcoming
patches.

Signed-off-by: Igor Romanov <igor.romanov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
Reviewed-by: Ivan Malov <ivan.malov@oktetlabs.ru>
2021-07-20 12:20:31 +02:00
Igor Romanov
983ce116c2 net/sfc: reserve internal Rx queue for counters
MAE delivers counters data as special packets via dedicated Rx queue.
Reserve an RxQ so that it does not interfere with ethdev Rx queues.
A routine will be added later to handle these packets.

There is no point to reserve the queue if no service cores are
available and counters cannot be used.

Signed-off-by: Igor Romanov <igor.romanov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
Reviewed-by: Ivan Malov <ivan.malov@oktetlabs.ru>
2021-07-20 12:20:31 +02:00
Andrew Rybchenko
7c041f971b net/sfc: add NUMA-aware registry of service logical cores
The driver requires service cores for housekeeping. Share these
cores for many adapters and various purposes to avoid extra CPU
overhead.

Since housekeeping services will talk to NIC, it should be possible
to choose logical core on matching NUMA node.

Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
Reviewed-by: Ivan Malov <ivan.malov@oktetlabs.ru>
2021-07-20 12:20:31 +02:00
Igor Romanov
b8cf5ba549 net/sfc: support initialising different Rx queue types
Add extra EFX flags to RxQ info initialization API to support
choosing different RxQ types and make the API public to use
it in for counter queues.

Signed-off-by: Igor Romanov <igor.romanov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
2021-07-20 12:20:31 +02:00
Igor Romanov
29b133bb15 net/sfc: add abstractions for the management EVQ identity
Add a function returning management event queue software index.

Signed-off-by: Igor Romanov <igor.romanov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
2021-07-20 12:20:31 +02:00
Igor Romanov
c414c567c7 common/sfc_efx/base: add user mark RxQ flag
Add a flag to request support for user mark field on an RxQ.
The field is required to retrieve generation count value from
counter RxQ.

Implement it only for Riverhead and EF10 ESSB since they support
the field in the Rx prefix.

Signed-off-by: Igor Romanov <igor.romanov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
Reviewed-by: Ivan Malov <ivan.malov@oktetlabs.ru>
2021-07-20 12:20:31 +02:00
Igor Romanov
aa3e21f006 common/sfc_efx/base: add ingress m-port RxQ flag
Add a flag to request support for ingress m-port on an RxQ.
Implement it only for Riverhead, other families will return an error
if the flag is set.

Signed-off-by: Igor Romanov <igor.romanov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
Reviewed-by: Ivan Malov <ivan.malov@oktetlabs.ru>
2021-07-20 12:20:31 +02:00
Igor Romanov
db980d266f net/sfc: prepare for internal Tx queue
Make software index of a Tx queue and ethdev index separate.
When an ethdev TxQ is accessed in ethdev callbacks, an explicit ethdev
queue index is used.

Signed-off-by: Igor Romanov <igor.romanov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
Reviewed-by: Ivan Malov <ivan.malov@oktetlabs.ru>
2021-07-20 12:20:31 +02:00
Andrew Rybchenko
704512214d net/sfc: explicitly control IRQ used for Rx queues
Interrupts support has assumptions on interrupt numbers used
for LSC and Rx queues. The first interrupt is used for LSC,
subsequent interrupts are used for Rx queues.

Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
2021-07-20 12:20:31 +02:00
Andrew Rybchenko
aa6dc1017c common/sfc_efx/base: support custom EvQ to IRQ mapping
Custom mapping is actually supported for EF10 and EF100 families only.

A driver (e.g. DPDK PMD) may require to customize mapping of EvQ
to interrupts if, for example, extra EvQ are used for house-keeping
in polling or wake up (via another EvQ) mode.

Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
2021-07-20 12:20:31 +02:00
Andrew Rybchenko
3dee345ab3 common/sfc_efx/base: separate target EvQ and IRQ config
Target EvQ and IRQ number are specified in the same location
in MCDI request. The value is treated as IRQ number if the
event queue is interrupting (corresponding flag is set) and
as target event queue otherwise.

However it is better to separate it on helper API level to
make it more clear.

Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
2021-07-20 12:20:31 +02:00
Andrew Rybchenko
396541fe43 net/sfc: do not enable interrupts on internal Rx queues
rxq_intr flag requests support for interrupt mode for ethdev Rx queues.
There is no internal Rx queues yet.

Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
2021-07-20 12:20:31 +02:00
Igor Romanov
09cafbddbb net/sfc: prepare for internal Rx queue
Make software index of an Rx queue and ethdev index separate.
When an ethdev RxQ is accessed in ethdev callbacks, an explicit ethdev
queue index is used.

Signed-off-by: Igor Romanov <igor.romanov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
Reviewed-by: Ivan Malov <ivan.malov@oktetlabs.ru>
2021-07-20 12:20:31 +02:00
Ali Alnubani
00b67591d2 examples/pipeline: fix build
This patch fixes the following build failures seen on Ubuntu 16.04
with gcc 5.4.0 because of uninitialized variables:
...
examples/pipeline/cli.c:1559:11: error: 'weight_val' may be used
  uninitialized in this function [-Werror=maybe-uninitialized]
...
examples/pipeline/cli.c:1545:13: error: 'member_id_val' may be used
  uninitialized in this function [-Werror=maybe-uninitialized]
...
examples/pipeline/cli.c:1538:12: error: 'group_id_val' may be used
  uninitialized in this function [-Werror=maybe-uninitialized]
...
examples/pipeline/cli.c:2189:2: error: 'idx1' may be used
  uninitialized in this function [-Werror=maybe-uninitialized]
...
examples/pipeline/cli.c:2179:43: error: 'idx0' may be used
  uninitialized in this function [-Werror=maybe-uninitialized]
...
examples/pipeline/cli.c:2265:2: error: 'idx1' may be used
  uninitialized in this function [-Werror=maybe-uninitialized]
...
examples/pipeline/cli.c:2248:43: error: 'idx0' may be used
  uninitialized in this function [-Werror=maybe-uninitialized]
...
examples/pipeline/cli.c:2358:2: error: 'idx1' may be used
  uninitialized in this function [-Werror=maybe-uninitialized]
...
examples/pipeline/cli.c:2325:43: error: 'idx0' may be used
  uninitialized in this function [-Werror=maybe-uninitialized]

Fixes: 598fe0dd0d ("examples/pipeline: support selector table")

Signed-off-by: Ali Alnubani <alialnu@nvidia.com>
Acked-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
2021-07-20 11:58:18 +02:00
Pavan Nikhilesh
761a321acf event/cnxk: support vectorized Tx event fast path
Add Tx event vector fastpath, integrate event vector Tx routine
into Tx burst.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-07-16 14:16:50 +02:00
Pavan Nikhilesh
7fbbc981d5 event/cnxk: support vectorized Rx event fast path
Add Rx event vector fastpath to convert HW defined metadata into
rte_mbuf and rte_event_vector.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-07-16 14:16:45 +02:00
Pavan Nikhilesh
072a281873 event/cnxk: support vectorized Rx adapter
Add event vector support for cnxk event Rx adapter, add control path
APIs to get vector limits and ability to configure event vectorization
on a given Rx queue.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-07-16 14:16:44 +02:00
Pavan Nikhilesh
313e884a22 event/cnxk: support Tx adapter fast path
Add support for event eth Tx adapter fastpath operations.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-07-16 14:16:38 +02:00
Pavan Nikhilesh
097835ecdf event/cnxk: support Tx adapter
Add support for event eth Tx adapter.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2021-07-16 14:16:37 +02:00
Pavan Nikhilesh
aa4311c654 event/cnxk: support Rx adapter fast path
Add support for event eth Rx adapter fastpath operations.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-07-16 14:16:28 +02:00
Pavan Nikhilesh
cb4bfd6e7b event/cnxk: support Rx adapter
Add support for event eth Rx adapter.
Resize cn10k workslot fastpath structure to fit in 64B cacheline size.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-07-16 14:16:26 +02:00
Ting Xu
f5dd3ea456 net/iavf: fix bandwidth unit in TM capability query
In IAVF node TM capability querying, the unit of bandwidth is Kbps,
which is not correct according to TM specification. Change the unit to
Byte per second. Refine some unclear comments as well.

Fixes: 44d0a720a5 ("net/iavf: query QoS capabilities and set queue TC mapping")

Signed-off-by: Ting Xu <ting.xu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-07-16 10:19:29 +02:00