A read barrier is required to ensure the ordering between
available index and the descriptor reads is enforced.
1. read avail_head = avail->idx
2. read cur_idx = last_avail_idx
if (cur_idx != avail_head) {
3. read idx = avail->ring[cur_idx]
4. read desc[idx]
}
There is a control dependency between step 1 and steps 3 & 4,
3 could be speculatively executed before 1, which could result
in 'idx' to not being updated yet.
Fixes: 4796ad63ba ("examples/vhost: import userspace vhost application")
Cc: stable@dpdk.org
Reported-by: Jason Wang <jasowang@redhat.com>
Signed-off-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Acked-by: Ilya Maximets <i.maximets@samsung.com>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Acked-by: Tiwei Bie <tiwei.bie@intel.com>
The common data freeing has been moved to rte_eth_dev_release_port(),
so freeing mac_addrs like this in eth_dev_close() is unnecessary and
will cause double free.
Fixes: e16adf08e5 ("ethdev: free all common data when releasing port")
Cc: stable@dpdk.org
Signed-off-by: Hideyuki Yamashita <yamashita.hideyuki@po.ntt-tx.co.jp>
Signed-off-by: Yasufumi Ogawa <ogawa.yasufumi@lab.ntt.co.jp>
Reviewed-by: Tiwei Bie <tiwei.bie@intel.com>
The failsafe driver spews messages every time it is polling
making debugging other things more difficult. Just remove it.
Example:
net_failsafe: Hot-plug mutex was locked by thread 140182066431744 by the hot-plug alarm
net_failsafe: Hot-plug mutex was locked by thread 140182066431744 by the hot-plug alarm
...
Signed-off-by: Stephen Hemminger <sthemmin@microsoft.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
The checksum calculation APIs take only the packet headers pointers as
parameters, so they assume that the lengths reported in those headers
are correct. However, a malicious packet could claim to be far larger
than it is, so we need to check the header lengths in the driver before
calling the checksum API.
A better fix would be to allow the lengths to be passed into the API
function, but that would be an API break, so fixing in TAP driver for
now.
Fixes: 8ae3023387 ("net/tap: add Rx/Tx checksum offload support")
Cc: stable@dpdk.org
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Keith Wiles <keith.wiles@intel.com>
If we receive a packet with an invalid IP header, where the total packet
length is reported as less than the IP header length, we would end up
getting an underflow in the length subtraction.
This could cause us to checksum e.g. 4GB of data in the case where the
result of the subtraction was -1.
We fix this by having the function return 0 - an invalid sum - when
the length is less than the header length.
Fixes: af75078fec ("first public release")
Fixes: 6006818cfb ("net: new checksum functions")
Cc: stable@dpdk.org
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
When MPRQ mempool is freed, the pointer stored in priv structure must be
reset to null. Otherwise, the mempool can be freed again if the port is
restarted.
Fixes: 7d6bf6b866 ("net/mlx5: add Multi-Packet Rx support")
Cc: stable@dpdk.org
Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
Acked-by: Shahaf Shuler <shahafs@mellanox.com>
Updated the doc and release notes on the support for requesting more
queues.
Signed-off-by: Zhirun Yan <zhirun.yan@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
This patch respond the VIRTCHNL_OP_REQUEST_QUEUES msg from VF, and
process to allocated more queues for the requested VF. If successful,
PF will notify VF to reset. If unsuccessful, PF will send message to
inform VF.
Signed-off-by: Zhirun Yan <zhirun.yan@intel.com>
Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Before this patch, VF gets a default number of queues from the PF.
This patch enables VF to request a different number. When VF configures
more queues, it will send VIRTCHNL_OP_REQUEST_QUEUES to PF to request
more queues, if success, PF will reset the VF.
User can run "port stop all", "port config port_id rxq/txq queue_num"
and "port start all" to reconfigure queue number.
Signed-off-by: Zhirun Yan <zhirun.yan@intel.com>
Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Fix following build errors reported by Intel C++ compiler in Windows
build.
C:\> t4_hw.c(5105): warning #147: declaration is incompatible with
"int t4_bar2_sge_qregs(struct adapter *, unsigned int, unsigned int,
u64={uint64_t={unsigned __int64}} *, unsigned int *)"
(declared at line 524 of "..\..\..\..\drivers\net\cxgbe\base\common.h")
int t4_bar2_sge_qregs(struct adapter *adapter, unsigned int qid,
^
C:\> cxgbe_filter.c(42): error : expected an expression
n_user_filters = mult_frac(adap->tids.nftids,
^
C:\> sge.c(400): error : expression must be a pointer to a complete
object type
(uint16_t)(RTE_PTR_ALIGN((char *)mbuf->buf_addr +
^
Build Environment:
1. Target OS: Microsoft Windows Server 2016
2. Compiler: Intel C++ Compiler from Intel Parallel Studio XE 2019 [1]
3. Development Tools:
3.1 Microsoft Visual Studio 2017 Professional
3.2 Windows Software Development Kit (SDK) v10.0.17763
3.3 Windows Driver Kit (WDK) v10.0.17763
[1] https://software.intel.com/en-us/parallel-studio-xe
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Define symbols only when they are not available.
This fixes following types of issues reported by Intel C++ compiler
in Windows build.
C:\> cxgbe_compat.h(154): warning #47: incompatible redefinition of
macro "min"
#define min(a, b) RTE_MIN(a, b)
^
C:\> t4_hw.c(338): warning #266: function "bzero" declared implicitly
bzero(p, 0, size);
^
C:\> t4_hw.c(5337): warning #266: function "htonl" declared implicitly
rvc.op_to_viid = htonl(V_FW_CMD_OP(FW_RSS_VI_CONFIG_CMD) |
^
C:\> sge.c(361): error : expected an expression
struct sge_eth_rxq *rxq = container_of(q, struct sge_eth_rxq, fl);
^
C:\> sge.c(1350): error : identifier "caddr_t" is undefined
static void inline_tx_mbuf(const struct sge_txq *q, caddr_t from,
^
[...]
Build Environment:
1. Target OS: Microsoft Windows Server 2016
2. Compiler: Intel C++ Compiler from Intel Parallel Studio XE 2019 [1]
3. Development Tools:
3.1 Microsoft Visual Studio 2017 Professional
3.2 Windows Software Development Kit (SDK) v10.0.17763
3.3 Windows Driver Kit (WDK) v10.0.17763
[1] https://software.intel.com/en-us/parallel-studio-xe
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Replace "args..." with "fmt, ..." and directly use __VA_ARGS__.
This fixes following errors reported by Intel C++ compiler in Windows
build.
C:\> cxgbe_compat.h(28): error : expected a ")"
#define dev_printf(level, fmt, args...) \
^
C:\> cxgbe_compat.h(31): error : expected a ")"
#define dev_err(x, args...) dev_printf(ERR, args)
^
[...]
Build Environment:
1. Target OS: Microsoft Windows Server 2016
2. Compiler: Intel C++ Compiler from Intel Parallel Studio XE 2019 [1]
3. Development Tools:
3.1 Microsoft Visual Studio 2017 Professional
3.2 Windows Software Development Kit (SDK) v10.0.17763
3.3 Windows Driver Kit (WDK) v10.0.17763
[1] https://software.intel.com/en-us/parallel-studio-xe
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
The Intel C++ compiler is not able to locate the header files without
relative paths in Windows build. Following errors are seen for these
header files.
C:\> base\common.h(9): error : cannot open source file "cxgbe_compat.h"
#include "cxgbe_compat.h"
^
[...]
Fix by explicitly stating header file location using relative paths.
Also, remove automatically including header files for Linux, to keep
it consistent across both OS.
Build Environment:
1. Target OS: Microsoft Windows Server 2016
2. Compiler: Intel C++ Compiler from Intel Parallel Studio XE 2019 [1]
3. Development Tools:
3.1 Microsoft Visual Studio 2017 Professional
3.2 Windows Software Development Kit (SDK) v10.0.17763
3.3 Windows Driver Kit (WDK) v10.0.17763
[1] https://software.intel.com/en-us/parallel-studio-xe
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Add ops link_update.
LSC interrupt is also enabled in this patch.
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Signed-off-by: Qiming Yang <qiming.yang@intel.com>
Signed-off-by: Xiaoyun Li <xiaoyun.li@intel.com>
Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Reviewed-by: Qi Zhang <qi.z.zhang@intel.com>
Normally when starting/stopping the device the queue
should be started and stopped. Support them both in
this patch.
Below ops are added,
dev_configure
dev_start
dev_stop
dev_close
dev_reset
rx_queue_start
rx_queue_stop
tx_queue_start
tx_queue_stop
rx_queue_setup
rx_queue_release
tx_queue_setup
tx_queue_release
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Signed-off-by: Qiming Yang <qiming.yang@intel.com>
Signed-off-by: Xiaoyun Li <xiaoyun.li@intel.com>
Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Reviewed-by: Qi Zhang <qi.z.zhang@intel.com>
Add some MACRO defination and small functions which
are specific for DPDK.
Add readme too.
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Add the structures that define how the Rx/Tx queues
are used.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Add the structures and defines that define what
protocols the NIC can handle.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Add various headers that define status codes and
basic defines for use in the code.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Add code that multiple other features use.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Add code to read/write/query the NVM image.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Add code to handle the virtual switch within the NIC.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Add code for the basic TX scheduler.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Add the structures for the control queues.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Add all the device IDs that represent the NIC.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Add the commands, error codes, and structures
for the sideband queue.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Add the commands, error codes, and structures for
the admin queue.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Add the structures required by the NIC.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Add the registers that comprise the Intel(R) 800
Series NIC. There is no functionality in this patch.
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Skip parsing pattern match items that have no spec. This fixes NULL
dereference when accessing their non-existent spec.
Fixes: ee61f5113b ("net/cxgbe: parse and validate flows")
Cc: stable@dpdk.org
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Location of filter TID table should be after active TID table memory,
and not from the beginning of TID table memory. This fixes memory
corruption due to overlapping regions.
Fixes: 3a381a4116 ("net/cxgbe: query firmware for HASH filter resources")
Cc: stable@dpdk.org
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
The ENAv2 is introducing many new features, mainly the LLQ feature
(Low Latency Queue) which allows the device to process packets faster
and as a result, the latency is noticeably lower.
The second major feature is configurable depth of hw queues where Rx
and Tx can be reconfigured independently and maximum depth of Rx queue
is 8k.
The release also includes many bug fixes and minor new features, like
improved statistics counters and extended statistics.
Driver is still compatible with ENAv1 device.
Signed-off-by: Michal Krawczyk <mk@semihalf.com>
Previously, the features list was indicating unsupported ENA PMD
features and were missing few ones, that were actually supported.
The features file was updated, so it is now reflecting current driver
state.
The documentation was updated with the more actual example and features,
especially ones which are ENA and not listed in the features file.
Signed-off-by: Michal Krawczyk <mk@semihalf.com>
