Introduce flags to make flexible adjusting
number of outstanding requests.
Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
Reviewed-by: Wei Zhao <wei.zhao1@intel.com>
Intel® 100/200 Series Chipset platforms reduced the round-trip
latency for the LAN Controller DMA accesses, causing in some high
performance cases a buffer overrun while the I219 LAN Connected
Device is processing the DMA transactions. I219LM and I219V devices
can fall into unrecovered Tx hang under very stressfully UDP traffic
and multiple reconnection of Ethernet cable. This Tx hang of the LAN
Controller is only recovered if the system is rebooted. Slightly slow
down DMA access by reducing the number of outstanding requests.
This workaround could have an impact on TCP traffic performance
on the platform. Disabling TSO eliminates performance loss for TCP
traffic without a noticeable impact on CPU performance.
Please, refer to I218/I219 specification update:
https://www.intel.com/content/www/us/en/embedded/products/networking/
ethernet-connection-i218-family-documentation.html
Cc: stable@dpdk.org
Signed-off-by: Xiao Zhang <xiao.zhang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
This works around a possible stalled packet issue, which may occur due to
clock recovery from the PCH being too slow, when the LAN is transitioning
from K1 at 1G link speed.
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
There are some client PHY Ultra Low Power (ULP) register bits that are
configured by the Manageability Engine (ME) FW.
The driver must ensure that these bits are cleared on exit from ULP.
Ordinarily the ME FW would do that, but there are cases in which the
FW is not present, and the driver must handle that.
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
This patch is for the following updates to the K1 configurations:
Tx idle period for entering K1 should be 128 ns.
Minimum Tx idle period in K1 should be 256 ns.
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Several customers have reported a link flap issue on 82579. The symptoms
are random and intermittent link losses when 82579 is connected to specific
switches. Issue has been root caused as interoperability problem between
the NIC and at least some Broadcom PHYs in the Energy Efficient Ethernet
wake mechanism.
To fix the issue, we are disabling the Phase Locked Loop shutdown in 100M
Low Power Idle. This solution will cause an increase of power in 100M EEE
link. It may cost additional 28mW in this specific mode.
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Add u32 return value to function e1000_resume_workarounds_pchlan,
so that calling function can detect PHY access failure during resuming
flow.
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Move e1000 pmd to drivers/net directory
As part of move, rename "e1000" subdirectory, which contains the code
from the "base driver", to "base".
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: John McNamara <john.mcnamara@intel.com>
Acked-by: Thomas Monjalon <thomas.monjalon@6wind.com>