Commit Graph

14302 Commits

Author SHA1 Message Date
Ashish Gupta
f23c977d03 doc: add octeonx zip guide
Add Octeontx ZIP PMD feature specification and user guide
with build and run instructions.

Signed-off-by: Ashish Gupta <ashish.gupta@caviumnetworks.com>
Signed-off-by: Shally Verma <shally.verma@caviumnetworks.com>
Signed-off-by: Sunila Sahu <sunila.sahu@caviumnetworks.com>
2018-07-25 13:36:26 +02:00
Ashish Gupta
52048f8f89 compress/octeontx: support burst enqueue/dequeue
Implement enqueue/dequeue APIs to perform compression/decompression
operations

Signed-off-by: Ashish Gupta <ashish.gupta@caviumnetworks.com>
Signed-off-by: Shally Verma <shally.verma@caviumnetworks.com>
Signed-off-by: Sunila Sahu <sunila.sahu@caviumnetworks.com>
2018-07-25 13:36:26 +02:00
Ashish Gupta
b43ebc65aa compress/octeontx: create private xform
Create non-shareable private xform for applications to
perform stateless compression/decompression.

Signed-off-by: Ashish Gupta <ashish.gupta@caviumnetworks.com>
Signed-off-by: Shally Verma <shally.verma@caviumnetworks.com>
Signed-off-by: Sunila Sahu <sunila.sahu@caviumnetworks.com>
2018-07-25 13:36:26 +02:00
Ashish Gupta
c378f084d6 compress/octeontx: add device setup ops
Add compression PMD device and queue pair setup ops.

Signed-off-by: Ashish Gupta <ashish.gupta@caviumnetworks.com>
Signed-off-by: Shally Verma <shally.verma@caviumnetworks.com>
Signed-off-by: Sunila Sahu <sunila.sahu@caviumnetworks.com>
2018-07-25 13:36:26 +02:00
Sunila Sahu
43e610bb85 compress/octeontx: introduce octeontx zip PMD
Octentx zipvf PMD provides hardware acceleration for
deflate and lzs compression and decompression operations
using Octeontx zip co-processor, which provide 8
virtualized zip devices.

This patch add basic initialization routine to register zip VFs
to compressdev library.

Signed-off-by: Ashish Gupta <ashish.gupta@caviumnetworks.com>
Signed-off-by: Shally Verma <shally.verma@caviumnetworks.com>
Signed-off-by: Sunila Sahu <sunila.sahu@caviumnetworks.com>
2018-07-25 13:36:26 +02:00
Konstantin Ananyev
c1fe6dbfce examples/ipsec-secgw: fix bypass rule processing
For outbound ports BYPASS rule is erroneously treated as PROTECT one
with SA idx zero.

Fixes: 2a5106af13 ("examples/ipsec-secgw: fix corner case for SPI value")
Cc: stable@dpdk.org

Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2018-07-25 08:36:19 +02:00
Amr Mokhtar
b9cf7fe64d baseband/turbo_sw: update for FlexRAN 1.6.0
Update BBDEV Turbo SW driver download/build instructions for
FlexRAN 1.6.0 release

Signed-off-by: Amr Mokhtar <amr.mokhtar@intel.com>
2018-07-25 08:22:14 +02:00
Ashish Gupta
11e5ba72cf doc: add crypto asymmetric feature list
Signed-off-by: Sunila Sahu <sunila.sahu@caviumnetworks.com>
Signed-off-by: Shally Verma <shally.verma@caviumnetworks.com>
Signed-off-by: Ashish Gupta <ashish.gupta@caviumnetworks.com>
2018-07-25 08:22:14 +02:00
Sunila Sahu
ac42813a0a crypto/openssl: add DH and DSA asym operations
- Add dh key generation and shared compute
- Add dsa sign and verify operation

Signed-off-by: Sunila Sahu <sunila.sahu@caviumnetworks.com>
Signed-off-by: Shally Verma <shally.verma@caviumnetworks.com>
Signed-off-by: Ashish Gupta <ashish.gupta@caviumnetworks.com>
2018-07-25 08:22:14 +02:00
Sunila Sahu
3e9d6bd447 crypto/openssl: add RSA and mod asym operations
- Add compat.h to make pmd compatible to openssl-1.1.0 and
  backward version
- Add rsa sign/verify/encrypt/decrypt and modular operation
  support

Signed-off-by: Sunila Sahu <sunila.sahu@caviumnetworks.com>
Signed-off-by: Shally Verma <shally.verma@caviumnetworks.com>
Signed-off-by: Ashish Gupta <ashish.gupta@caviumnetworks.com>
2018-07-25 08:22:14 +02:00
Shally Verma
0baf92041e doc: add zlib PMD guide
Add zlib pmd feature support and user guide with
build and run instructions

Signed-off-by: Sunila Sahu <sunila.sahu@caviumnetworks.com>
Signed-off-by: Shally Verma <shally.verma@caviumnetworks.com>
Signed-off-by: Ashish Gupta <ashish.gupta@caviumnetworks.com>
2018-07-25 08:22:14 +02:00
Sunila Sahu
c7b436ec95 compress/zlib: support burst enqueue/dequeue
Signed-off-by: Sunila Sahu <sunila.sahu@caviumnetworks.com>
Signed-off-by: Shally Verma <shally.verma@caviumnetworks.com>
Signed-off-by: Ashish Gupta <ashish.gupta@caviumnetworks.com>
2018-07-25 08:21:25 +02:00
Sunila Sahu
0cc20d33ac compress/zlib: create private xform
Create non-shareable private xform for stateless
operation processing

Signed-off-by: Sunila Sahu <sunila.sahu@caviumnetworks.com>
Signed-off-by: Shally Verma <shally.verma@caviumnetworks.com>
Signed-off-by: Ashish Gupta <ashish.gupta@caviumnetworks.com>
2018-07-25 08:21:25 +02:00
Ashish Gupta
27422fc33c compress/zlib: add basic ops
Implement device configure and queue pair
setup PMD ops

Signed-off-by: Sunila Sahu <sunila.sahu@caviumnetworks.com>
Signed-off-by: Shally Verma <shally.verma@caviumnetworks.com>
Signed-off-by: Ashish Gupta <ashish.gupta@caviumnetworks.com>
2018-07-25 08:21:25 +02:00
Ashish Gupta
0c4e4c16b0 compress/zlib: introduce zlib PMD
Add initial PMD setup routines in compressdev
framework. ZLIB PMD appears as virtual compression
device. User would need to install zlib prior to
enabling this PMD.

Signed-off-by: Sunila Sahu <sunila.sahu@caviumnetworks.com>
Signed-off-by: Shally Verma <shally.verma@caviumnetworks.com>
Signed-off-by: Ashish Gupta <ashish.gupta@caviumnetworks.com>
2018-07-25 08:21:25 +02:00
Lee Daly
788e748d38 compress/isal: support chained mbufs
This patch adds chained mbuf support for input or output buffers
during compression/decompression operations.

Signed-off-by: Lee Daly <lee.daly@intel.com>
Reviewed-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2018-07-25 08:19:54 +02:00
Amr Mokhtar
54c4cbb6cc doc: add graphics to bbdev guide
Add two SVG graphics representing Turbo coding of code blocks
in mbuf data buffer.

Signed-off-by: Amr Mokhtar <amr.mokhtar@intel.com>
2018-07-25 08:19:54 +02:00
Fan Zhang
6760463c9f crypto/scheduler: add mode-specific threshold parameter
This patch adds packet-size-distr mode specific parameter parser
to support different threshold packet size value other than default
128 bytes.

Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
2018-07-25 08:19:54 +02:00
Fan Zhang
ee9586dd15 crypto/scheduler: add mode-specific parameter
This patch adds the mode parameter parsing to scheduler PMD.

Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
2018-07-25 08:19:54 +02:00
Fiona Trahe
1947bd1858 compress/qat: support scatter-gather buffers
This patch adds Scatter-Gather List (SGL) feature to
QAT compression PMD.

Signed-off-by: Tomasz Jozwiak <tomaszx.jozwiak@intel.com>
Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
2018-07-25 08:19:54 +02:00
Fiona Trahe
944027acd4 common/qat: add scatter-gather header
This patch refactors the sgl struct so it includes a flexible
array of flat buffers as sym and compress PMDs can have
different size sgls.

Signed-off-by: Tomasz Jozwiak <tomaszx.jozwiak@intel.com>
Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
2018-07-25 08:19:54 +02:00
Pablo de Lara
9d6d5b4d47 app/crypto-perf: compile with -O3
The crypto performance application was not being compiled
with -O3, which means that the performance shown may not be
optimal.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2018-07-24 01:48:10 +02:00
Pablo de Lara
4487cfa1fa crypto/virtio: fix memory leak
Put session private data back to mempool when clearing
a crypto session, which is expected to be done in the PMD.

Fixes: b7fa78c7d3 ("crypto/virtio: support session related ops")
Cc: stable@dpdk.org

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Reviewed-by: Jay Zhou <jianjay.zhou@huawei.com>
2018-07-24 01:48:10 +02:00
Fiona Trahe
e3d9988442 crypto/qat: support 8-byte 3DES
Added extra case to support 8 byte key size
for 3DES CBC. Also changed capabilities to reflect
the change.

Signed-off-by: Marko Kovacevic <marko.kovacevic@intel.com>
Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2018-07-24 01:48:10 +02:00
Marko Kovacevic
9607e37e8c crypto/openssl: support 8-byte 3DES
Added extra case to support 8 byte key size
for 3DES CBC. Also changed capabilities to reflect
the change.

Signed-off-by: Marko Kovacevic <marko.kovacevic@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2018-07-24 01:48:10 +02:00
Marko Kovacevic
06c761d6fb crypto/aesni_mb: support 3DES
Added support for 3DES cipher algorithm which
will support 8, 16 and 24 byte keys, which also has been
added in the v0.50 of the IPSec Multi-buffer lib.

Signed-off-by: Marko Kovacevic <marko.kovacevic@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2018-07-24 01:48:10 +02:00
Pablo de Lara
58d3852ef5 crypto/aesni_mb: support IPsec Multi-buffer lib v0.50
Adds support for the v0.50 of the IPsec Multi-buffer lib.
The library now exposes its version, with the idea
of maintaining backwards compatibility in the future,
avoiding breaking the compilation of the PMD every time
there is a new version available.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2018-07-24 01:48:10 +02:00
Pablo de Lara
f961a887d7 crypto/aesni_gcm: support IPsec Multi-buffer lib v0.50
Adds support for the v0.50 of the IPsec Multi-buffer lib.
The library now exposes its version, with the idea
of maintaining backwards compatibility in the future,
avoiding breaking the compilation of the PMD every time
there is a new version available.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2018-07-24 01:48:10 +02:00
Pablo de Lara
862c0a9643 crypto/aesni_mb: call buffer manager allocation
Instead of having a static field for the buffer manager
MB_MGR in the queue pair structure, use the provided API
that allocates memory for it and store a pointer to it.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2018-07-24 01:48:10 +02:00
Fiona Trahe
67db8acdbc test/compress: limit segments in scatter-gather
Some PMDs may have a limitation on the number of segments
in an SGL mbuf that they can process.
Thefore, an upper limit is set to avoid having
an indeterminate number of segments.

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2018-07-24 01:48:10 +02:00
Pablo de Lara
0b920a5f3d examples/l2fwd-crypto: remove duplicated capability check
Now that device capabilities are checked separately,
before setting the xform parameters, it is not required
to do the check again, leaving only the xform setting
with the device configuration.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2018-07-24 01:48:10 +02:00
Pablo de Lara
6ae3fb9df6 examples/l2fwd-crypto: fix session mempool size
The session mempool size for this application depends
on the number of crypto devices that are capable
of performing the operation given by the parameters on the app.

However, previously this calculation was done before all devices
were checked, resulting in an incorrect number of sessions
required.

Now the calculation of the devices to be used is done first
(checking the capabilities of the enabled devices),
followed by the creation of the session pool, resulting
in a correct number of objects needed for the sessions
to be created.

Fixes: e3bcb99a5e ("examples/l2fwd-crypto: limit number of sessions")

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2018-07-24 01:48:10 +02:00
Pablo de Lara
a6fde4f194 examples/l2fwd-crypto: separate IV check from xform setting
IV_param_check() function was checking if the IV size provided
was supported by device and setting the IV size in the xform
structure.

Instead of this, the function should only do the parameter check
and outside the IV size on the xform is set.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2018-07-24 01:48:10 +02:00
Pablo de Lara
a8fd8881dd examples/l2fwd-crypto: skip device not supporting operation
When a crypto device does not support an algorithm, it is skipped
and not used. However, when it does support it, but not the rest
of the parameters (IV, key, AAD sizes...), application stops.
Instead, the device should be skipped and the search of a suitable
device should continue.

Fixes: a061e50a0d ("examples/l2fwd-crypto: fix ambiguous input key size")
Cc: stable@dpdk.org

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2018-07-24 01:48:10 +02:00
Pablo de Lara
53b9a5b66d examples/l2fwd-crypto: check return value on IV size check
IV size parameter is checked through a function,
but its return value was not checked.

Fixes: 0fbd75a99f ("cryptodev: move IV parameters to session")
Fixes: acf8616901 ("cryptodev: add auth IV")
Fixes: 2661f4fbe9 ("examples/l2fwd-crypto: add AEAD parameters")
Cc: stable@dpdk.org

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2018-07-24 01:48:10 +02:00
Pablo de Lara
6df38301de examples/l2fwd-crypto: fix digest with AEAD algo
When performing authentication verification (both for AEAD algorithms,
such as AES-GCM, or for authentication algorithms, such as SHA1-HMAC),
the digest address is calculated based on the packet size and the
algorithm used (substracting digest size and IP header to the packet size).

However, for AEAD algorithms, this was not calculated correctly,
since the digest size was not being substracted.

Bugzilla ID: 44
Fixes: 2661f4fbe9 ("examples/l2fwd-crypto: add AEAD parameters")
Cc: stable@dpdk.org

Reported-by: Ankur Dwivedi <ankur.dwivedi@cavium.com>
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Tested-by: Ankur Dwivedi <ankur.dwivedi@cavium.com>
2018-07-24 01:48:10 +02:00
Pablo de Lara
37667e0a57 test/compress: add scatter-gather tests
Added Scatter-Gather test, which split input data
into multi-segment mbufs and compresses/decompresses
the data into also a multi-segment mbuf.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Lee Daly <lee.daly@intel.com>
2018-07-24 01:48:10 +02:00
Radu Nicolau
f05511bc85 app/crypto-perf: fix mempool creation
Using a small number of sessions results in rte_mempool_create call
with cache_size > n, which fails. There is no need to cache the elements,
as there is no performance impact.

Fixes: 501c0a3b14 ("app/crypto-perf: limit number of sessions")

Signed-off-by: Radu Nicolau <radu.nicolau@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2018-07-24 01:48:10 +02:00
Fiona Trahe
78de041582 test/compress: log device name
Print out name of device on which test is running at start of
test suite.

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2018-07-24 01:48:10 +02:00
Pablo de Lara
f51c290154 compress/isal: fix memory leak
Processed operations ring is created for each queue pair,
but it was not being freed when the queue pair was released.

Fixes: b0e23c458a ("compress/isal: add queue pair related ops")
Cc: stable@dpdk.org

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Lee Daly <lee.daly@intel.com>
2018-07-24 01:48:10 +02:00
Pablo de Lara
2d02781c7a compress/isal: set null pointer after freeing
Fixes: b0e23c458a ("compress/isal: add queue pair related ops")
Cc: stable@dpdk.org

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Lee Daly <lee.daly@intel.com>
2018-07-24 01:48:10 +02:00
Pablo de Lara
23edc362ff compress/isal: fix log type name
There is a naming convention for logtypes of PMDs:
"pmd.driverType.driverName".
Therefore, the logtype for ISA-L PMD should be "pmd.compress.isal".

Fixes: 490e725b95 ("compress/isal: add device init and de-init")
Cc: stable@dpdk.org

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Lee Daly <lee.daly@intel.com>
2018-07-24 01:48:10 +02:00
Lee Daly
6a000343ed compress/isal: fix offset usage
This patch allows the ISA-L compression PMD,
to be used with offsets in the mbuf.
Offsets can now be used for source and destination buffers,
during compression or decompression.

Fixes: 7bf4f0630a ("compress/isal: add ISA-L decomp functionality")
Fixes: dc49e6aa48 ("compress/isal: add ISA-L compression functionality")
Cc: stable@dpdk.org

Signed-off-by: Lee Daly <lee.daly@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2018-07-24 01:48:10 +02:00
Fiona Trahe
64cb90f882 crypto/qat: fix checks for 3GPP algo bit params
QAT driver checks byte alignment for KASUMI/SNOW 3G/ZUC algorithms using
cipher/auth_param, which are not initialized at this moment yet. Use
operation params instead.

Fixes: 39e0bee48e ("crypto/qat: rework request builder for performance")
Cc: stable@dpdk.org

Reported-by: Dmitry Eremin-Solenikov <dmitry.ereminsolenikov@linaro.org>
Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2018-07-24 01:48:10 +02:00
Konstantin Ananyev
b45be46dfd examples/ipsec-secgw: fix IPv4 checksum at Tx
For ESP transport and BYPASS mode the app might generate output
packets with invalid IPv4 header checksum.
At least such behavior was observed on few Intel NICs.
The reason is that the app didn't set ipv4 header checksum to zero
before passing it to the HW.

Fixes: 906257e965 ("examples/ipsec-secgw: support IPv6")
Cc: stable@dpdk.org

Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Radu Nicolau <radu.nicolau@intel.com>
2018-07-24 01:48:10 +02:00
Fiona Trahe
bb44fb6fe7 doc: add QAT compression guide
Extend QAT guide to cover crypto and compression and common
information, particularly about kernel driver dependency.
Update release note.
Update compression feature list for qat.

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
2018-07-24 01:48:10 +02:00
Fiona Trahe
2519de891e compress/qat: prevent usage if incorrect firmware
Previous check only causes op to fail on dequeue.
This extends so once first fail is detected, application can
no longer enqueue ops to the device and will also get an
appropriate error if trying to reconfigure or setup the device.

Signed-off-by: Tomasz Jozwiak <tomaszx.jozwiak@intel.com>
Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
2018-07-24 01:48:10 +02:00
Fiona Trahe
c0c90bc4ca compress/qat: add create and destroy functions
Now that all the device operations are available,
add the functions to create and destroy the pmd.
Called on probe and remove of the qat pci device, these
register the device with the compressdev API
and plug in all the device functionality.

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Signed-off-by: Tomasz Jozwiak <tomaszx.jozwiak@intel.com>
2018-07-24 01:48:10 +02:00
Fiona Trahe
edd37ac10d compress/qat: create and populate the ops structure
Create an ops structure and populate it with the
qat-specific functions.

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Signed-off-by: Tomasz Jozwiak <tomaszx.jozwiak@intel.com>
2018-07-24 01:48:10 +02:00
Fiona Trahe
d8d380ad1c compress/qat: add device start and stop
There are no specific actions needed to start/stop a QAT comp device
so these are just trivial fns to satisfy the pmd API.

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
2018-07-24 01:48:10 +02:00