Commit Graph

288 Commits

Author SHA1 Message Date
Eric van Gyzen
63e4c6cdf9 Provide vnode in memory map info for files on tmpfs
When providing memory map information to userland, populate the vnode pointer
for tmpfs files.  Set the memory mapping to appear as a vnode type, to match
FreeBSD 9 behavior.

This fixes the use of tmpfs files with the dtrace pid provider,
procstat -v, procfs, linprocfs, pmc (pmcstat), and ptrace (PT_VM_ENTRY).

Submitted by:   Eric Badger <eric@badgerio.us> (initial revision)
Obtained from:  Dell Inc.
PR:             198431
MFC after:      2 weeks
Reviewed by:    jhb
Approved by:    kib (mentor)
2015-06-02 18:37:04 +00:00
John Baldwin
a1febbf667 Fix two bugs that could result in PMC sampling effectively stopping.
In both cases, the the effect of the bug was that a very small positive
number was written to the counter. This means that a large number of
events needed to occur before the next sampling interrupt would trigger.
Even with very frequently occurring events like clock cycles wrapping all
the way around could take a long time. Both bugs occurred when updating
the saved reload count for an outgoing thread on a context switch.

First, the counter-independent code compares the current reload count
against the count set when the thread switched in and generates a delta
to apply to the saved count. If this delta causes the reload counter
to go negative, it would add a full reload interval to wrap it around to
a positive value. The fix is to add the full reload interval if the
resulting counter is zero.

Second, occasionally the raw counter value read during a context switch
has actually wrapped, but an interrupt has not yet triggered. In this
case the existing logic would return a very large reload count (e.g.
2^48 - 2 if the counter had overflowed by a count of 2). This was seen
both for fixed-function and programmable counters on an E5-2643.
Workaround this case by returning a reload count of zero.

PR:		198149
Differential Revision:	https://reviews.freebsd.org/D2557
Reviewed by:	emaste
MFC after:	1 week
Sponsored by:	Norse Corp, Inc.
2015-05-19 19:15:19 +00:00
John Baldwin
2b1df86c17 Use the proper mask when reloading sampling PMCs for Core CPUs.
Differential Revision:	https://reviews.freebsd.org/D2492
Reviewed by:	emaste
MFC after:	1 month
2015-05-19 19:01:22 +00:00
John Baldwin
0ceb54c2cf Use fixed enum values for PMC_CLASSES().
This removes one of the frequent causes of ABI breakage when new CPU
types are added to hwpmc(4).

Differential Revision:	https://reviews.freebsd.org/D2586
Reviewed by:	davide, emaste, gnn (earlier version)
MFC after:	2 weeks
2015-05-19 18:58:18 +00:00
Ruslan Bukin
bc88bb2bf3 Add Performance Monitoring Counters support for AArch64.
Family-common and CPU-specific counters implemented.

Supported CPUs: ARM Cortex A53/57/72.

Reviewed by:	andrew, bz, emaste, gnn, jhb
Sponsored by:	ARM Limited
Differential Revision:	https://reviews.freebsd.org/D2555
2015-05-19 15:25:47 +00:00
Bjoern A. Zeeb
62699f3424 Convert remaining hwpmc(4) debug printfs over to KTR to unbreak the build
for at least powerpc kernels.   Missed in r282658.

MFC after:	10 days
2015-05-09 09:21:59 +00:00
John Baldwin
4a3690dfa1 Convert hwpmc(4) debug printfs over to KTR.
Differential Revision:	https://reviews.freebsd.org/D2487
Reviewed by:	davide, emaste
MFC after:	2 weeks
Sponsored by:	Norse Corp, Inc.
2015-05-08 19:40:00 +00:00
John Baldwin
680f1afd94 Move hwpmc(4) debugging code under a new HWPMC_DEBUG option instead of
the broader DEBUG option.

Reviewed by:	emaste
MFC after:	2 weeks
Sponsored by:	Norse Corp, Inc.
2015-05-08 15:57:23 +00:00
Justin Hibbits
a745246822 Implement hwpmc(4) for Freescale e500 core.
This supports e500v1, e500v2, and e500mc. Tested only on e500v2, but the
performance counters are identical across all, with e500mc having some
additional events.

Relnotes:	Yes
2015-04-18 21:39:17 +00:00
Rui Paulo
bc3464096a hwpmc: add initial Intel Broadwell support.
The full list of aliases and events will follow in a subsequent
commit.

MFC after:	1 month
2015-04-05 05:14:20 +00:00
Rui Paulo
03a24b7026 Remove whitespace. 2015-04-05 05:09:38 +00:00
Adrian Chadd
f6e6460dfc Add support for the MIPS74K SoC family performance counters events.
These are similar to the mips24k performance counters - some are
available on perfcnt0/3, some are available on perfcnt1/4.
However, the events aren't all the same.

* Add the events, named the same as from Linux oprofile.
* Verify they're the same as  "MIPS32(R) 74KTM Processor Core Family
  Software User's Manual"; Document Number: MD00519; Revision 01.05.
* Rename INSTRUCTIONS to something else, so it doesn't clash with
  the alias INSTRUCTIONS.  I'll try to tidy this up later; there
  are a few other aliases to add and shuffle around.

Tested:

* QCA9558 SoC (AP135 board) - MIPS74Kc core (no FPU.)
* make universe; where it didn't fail for other reasons.

TODO:

* It'd be nice to support the four performance counters
  in at least this hardware, rather than just two.

Reviewed by:	bsdimp ("looks good; don't break world".)
2015-04-05 02:57:02 +00:00
Bjoern A. Zeeb
54384e56c9 Remove all the handcrafted assembly in hwpmc_armv7.c and use the
common (autogenerated) versions.   Removes extra vertical space,
and makes it easier to grep for usage throughout the tree.
Conditionally compile only for arm6 [1] (yes sounds odd but is right).

Submitted by:	andrew [1]
Reviewed by:	gnn, andrew (ian earlier version I think)
Differential Revision: https://reviews.freebsd.org/D2159
Obtained from:	Cambridge/L41
Sponsored by:	DARPA, AFRL
2015-03-28 18:57:13 +00:00
Bjoern A. Zeeb
0ede88a413 Rather than defining our own magic checks here use INKERNEL() for
the PMC_IN_KERNEL() macro definition.

Add missing macros to extract the return address (LR) from the trapframe.

Discussed with:	andrew
Obtained from:	Cambridge/L41
Sponsored by:	DARPA, AFRL
MFC after:	2 weeks
2015-03-27 08:47:16 +00:00
Ryan Stone
67e51766bd hwpmc: Fix event number to match enum name
Differential revision:	https://reviews.freebsd.org/D1592
Reviewed by:	Joseph Kong
MFC after:	1 month
2015-03-12 23:44:28 +00:00
Randall Stewart
de8d8ca4c8 You need to have the capabilities and not skip it if you are
not on head.. otherwise the file pointer will be NULL and when
you try to do something with it you will crash. Make the #else
be the old capabilites, and then remove the erroneous ifdefs for
11.

MFC after:	1 week (with the other MFC I was going to do until the panic)
2015-03-11 20:15:49 +00:00
Ryan Stone
1761699194 Add missing counter definitions
Differential Revision:	https://reviews.freebsd.org/D1591
MFC after:	1 month
Sponsored by:	Sandvine Inc
2015-03-10 01:24:16 +00:00
Ryan Stone
bc0ad9a99d Fix Ivy Bridge+ MEM_UOPS_RETIRED counters
The MEM_UOPS_RETIRED actually work the same way as the Sandy
Bridge counters, but the counters were documented in a different
way and that seemed to cause the Ivy Bridge counters to be
implemented incorrectly.  Use the same counter definitions as
Sandy Bridge.  While I'm here, rename the counters to match
what's documented in the datasheet.

Differential Revision:	https://reviews.freebsd.org/D1590
MFC after:	1 month
Sponsored by:	Sandvine Inc.
2015-03-10 01:24:08 +00:00
Ryan Stone
e31c323f95 Support architectural events on Haswell/Ivy Bridge
Differential Revision:	https://reviews.freebsd.org/D1589
MFC after:	1 month
Sponsored by:	Sandvine Inc
2015-03-10 01:24:02 +00:00
Ryan Stone
9e60f3acd2 Fix Sandy Bridge+ hwpmc branch counters
On Sandy Bridge and later, to count branch-related events you
have to or together a mask indicating the type of branch
instruction to count (e.g. direct jump, branch, etc) and a bits
indicating whether to count taken and not-taken branches.  The
current counter definitions where defining this bits individually,
so the counters never worked and always just counted 0.

Fix the counter definitions to instead contain the proper
combination of masks.  Also update the man pages to reflect the
new counters.

Differential Revision:	https://reviews.freebsd.org/D1587
MFC after:	1 month
Sponsored by:	Sandvine Inc.
2015-03-10 01:23:47 +00:00
Ryan Stone
89d0633b86 Fix pmc unit restrictions to match documentation
A couple of pmc counters did not work because there were being
restricted to the wrong PMC unit.  I've verified that these
counters now work and match the documented restrictions.

Differential Revision:	https://reviews.freebsd.org/D1586
MFC after:	1 month
Sponsored by:	Sandvine Inc
2015-03-10 01:23:40 +00:00
Ryan Stone
d444c14119 Fix various bugs in Haswell counter definitions
1) The "WALK_COMPLETED_2M_4M" event incorrectly referenced 4K pages.
2) The umask for RING0 and RING123 events was reversed.

Differential Revision:	https://reviews.freebsd.org/D1585
MFC after:	1 month
Sponsored by:	Sandvine Inc
2015-03-10 01:23:34 +00:00
Andrew Turner
90e8f62386 The cpu_id macro was renamed in r278529, catch up with this new name. 2015-02-11 10:37:55 +00:00
Ruslan Bukin
6411d14d62 Add ARMv7 performance monitoring counters.
Differential Revision:	https://reviews.freebsd.org/D1687
Reviewed by:	rpaulo
Sponsored by:	DARPA, AFRL
2015-01-28 16:08:07 +00:00
Ryan Stone
6a429fa5d7 style(9) cleanup 2015-01-22 03:56:23 +00:00
Randall Stewart
d95b3509e1 Update the hwpmc driver to have the new type HASWELL_XEON. Also
go back through HASWELL, IVY_BRIDGE, IVY_BRIDGE_XEON and SANDY_BRIDGE
to straighten out all the missing PMCs. We also add a new pmc tool
pmcstudy, this allows one to run the various formulas from
the documents "Using Intel Vtune Amplifier XE on XXX Generation platforms" for
IB/SB and Haswell. The tool also allows one to postulate your own
formulas with any of the various PMC's. At some point I will enahance
this to work with Brendan Gregg's flame-graphs so we can flamegraph
various PMC interactions. Note the manual page also needs some
work (lots of work) but gnn has committed to help me with that ;-)
Reviewed by: gnn
MFC after:1 month
Sponsored by:	Netflix Inc.
2015-01-14 12:46:58 +00:00
Justin Hibbits
409062f166 Fix hwpmc sampling for ppc970 (G5-class) processors.
With this, hwpmc sampling now works on these processors.

MFC after:	3 weeks
Relnotes:	yes
2014-11-27 18:41:14 +00:00
Justin Hibbits
bd52e21d55 Fix hwpmc sampling for MPC74xxx (G4) processors.
With this, hwpmc sampling now works correctly on these processors.

MFC after:	3 weeks
Relnotes:	yes
2014-11-27 06:42:34 +00:00
Ed Maste
201b654e38 Clamp too-large hwpmc callchaindepth to the maximum
If the depth requested by the user is too large, it's better to provide
the maximum than the smaller default.

Sponsored by:	The FreeBSD Foundation
2014-11-20 23:16:19 +00:00
Mateusz Guzik
cdcf242896 Fix up module unload for syscall_module_handler consumers.
After r273707 it was registering syscalls as static.

This fixes hwpmc module unload.

Reported by: markj
2014-11-01 22:36:40 +00:00
Mark Johnston
06796b6791 Use pmc_destroy_pmc_descriptor() to actually free the pmc, which is
consistent with pmc_destroy_owner_descriptor(). Also be sure to destroy
PMCs if a process exits or execs without explicitly releasing them.

Reviewed by:	bz, gnn
MFC after:	2 weeks
Sponsored by:	EMC / Isilon Storage Division
Differential Revision: https://reviews.freebsd.org/D958
2014-10-17 19:04:24 +00:00
Bjoern A. Zeeb
c896236487 Since introducing the extra mapping in r250103 for architectural performance
events we have actually counted 'Branch Instruction Retired' when people
asked for 'Unhalted core cycles' using the 'unhalted-core-cycles' event mask
mnemonic.

Reviewed by:	jimharris
Discussed with:	gnn, rwatson
MFC after:	3 days
Sponsored by:	DARPA/AFRL
2014-10-07 18:00:34 +00:00
Justin Hibbits
cddd0f61e3 Fix PowerPC backtraces. Since kernel and user have completely separate address
spaces, rather than a split address, we actually can't check for being within
the kernel's address range.  Instead, do what other backtraces do, and use
trapexit()/asttrapexit() as the stack sentinel.

MFC after:	3 weeks
2014-09-14 22:03:41 +00:00
Marcel Moolenaar
e7d939bda2 Remove ia64.
This includes:
o   All directories named *ia64*
o   All files named *ia64*
o   All ia64-specific code guarded by __ia64__
o   All ia64-specific makefile logic
o   Mention of ia64 in comments and documentation

This excludes:
o   Everything under contrib/
o   Everything under crypto/
o   sys/xen/interface
o   sys/sys/elf_common.h

Discussed at: BSDcan
2014-07-07 00:27:09 +00:00
Justin Hibbits
e42edd4db6 Fix a bug in hwpmc(4) callchain retrieval, for both user and kernel.
The array index for the callchain is getting double-incremented -- both in the
loop and the storing.  It should only be incremented in one location.

Also, constrain the stack pointer range check.

MFC after:	2 weeks
2014-07-03 06:52:26 +00:00
Hans Petter Selasky
af3b2549c4 Pull in r267961 and r267973 again. Fix for issues reported will follow. 2014-06-28 03:56:17 +00:00
Glen Barber
37a107a407 Revert r267961, r267973:
These changes prevent sysctl(8) from returning proper output,
such as:

 1) no output from sysctl(8)
 2) erroneously returning ENOMEM with tools like truss(1)
    or uname(1)
 truss: can not get etype: Cannot allocate memory
2014-06-27 22:05:21 +00:00
Hans Petter Selasky
3da1cf1e88 Extend the meaning of the CTLFLAG_TUN flag to automatically check if
there is an environment variable which shall initialize the SYSCTL
during early boot. This works for all SYSCTL types both statically and
dynamically created ones, except for the SYSCTL NODE type and SYSCTLs
which belong to VNETs. A new flag, CTLFLAG_NOFETCH, has been added to
be used in the case a tunable sysctl has a custom initialisation
function allowing the sysctl to still be marked as a tunable. The
kernel SYSCTL API is mostly the same, with a few exceptions for some
special operations like iterating childrens of a static/extern SYSCTL
node. This operation should probably be made into a factored out
common macro, hence some device drivers use this. The reason for
changing the SYSCTL API was the need for a SYSCTL parent OID pointer
and not only the SYSCTL parent OID list pointer in order to quickly
generate the sysctl path. The motivation behind this patch is to avoid
parameter loading cludges inside the OFED driver subsystem. Instead of
adding special code to the OFED driver subsystem to post-load tunables
into dynamically created sysctls, we generalize this in the kernel.

Other changes:
- Corrected a possibly incorrect sysctl name from "hw.cbb.intr_mask"
to "hw.pcic.intr_mask".
- Removed redundant TUNABLE statements throughout the kernel.
- Some minor code rewrites in connection to removing not needed
TUNABLE statements.
- Added a missing SYSCTL_DECL().
- Wrapped two very long lines.
- Avoid malloc()/free() inside sysctl string handling, in case it is
called to initialize a sysctl from a tunable, hence malloc()/free() is
not ready when sysctls from the sysctl dataset are registered.
- Bumped FreeBSD version to indicate SYSCTL API change.

MFC after:	2 weeks
Sponsored by:	Mellanox Technologies
2014-06-27 16:33:43 +00:00
Konstantin Belousov
49fe48ab0c For Xeon 7500 and 48XX (Nehalem EX and Westmere EX) variants of the
Core i7 and Westmere processors, the uncore PMC subsystem is
completely different from the uncore PMC on smaller versions of CPUs.
Disable existing uncore hwpmc code for EX, otherwise non-existing MSRs
are accessed.

The cores PMCs seems to be identical for non-EX and EX, according to
the SDM.

Reviewed by:	davide, fabient
Sponsored by:	The FreeBSD Foundation
MFC after:	2 weeks
2014-06-04 16:06:38 +00:00
George V. Neville-Neil
5c37e5dacf Add missing Ivy Bridge and Haswell events.
Submitted by: Anton Rang <rang@mac.com>
MFC: 2 weeks
2014-06-02 20:50:08 +00:00
Mark Johnston
2a1681877e Remove some prototypes for undefined functions.
MFC after:	3 days
2014-05-15 21:19:13 +00:00
Justin Hibbits
8a00edea58 Enable and disable the PMC unit at load/unload time, respectively.
MFC after:	3 weeks
2014-04-18 06:39:00 +00:00
Hiren Panchasara
e8f021a3f7 Update hwpmc to support core events for Atom Silvermont microarchitecture.
(Model 0x4D as per Intel document 330061-001 01/2014)

Tested by:	Olivier Cochard-Labbe <olivier@cochatrd.me>
MFC after:	4 weeks
2014-03-20 20:51:08 +00:00
Robert Watson
4a14441044 Update kernel inclusions of capability.h to use capsicum.h instead; some
further refinement is required as some device drivers intended to be
portable over FreeBSD versions rely on __FreeBSD_version to decide whether
to include capability.h.

MFC after:	3 weeks
2014-03-16 10:55:57 +00:00
Eitan Adler
c08da1429f Fix pointer type in call to malloc
Submitted by:	Meyer, Conrad conrad.meyer@isilon.com
2014-03-13 16:51:40 +00:00
Eitan Adler
7793787339 Fix pointer type in call to malloc
Submitted by:	Meyer, Conrad conrad.meyer@isilon.com
2014-03-13 16:51:01 +00:00
Konstantin Belousov
cee9542d51 Use correct types for sizeof() in the calculations for the malloc(9) sizes [1].
While there, remove unneeded checks for failed allocations with M_WAITOK flag.

Submitted by:	Conrad Meyer <cemeyer@uw.edu> [1]
MFC after:	1 week
2014-03-12 10:25:26 +00:00
Justin Hibbits
5c0761ba72 Fix callchain capture for hwpmc(4). While here, some style(9) fixes, too.
MFC after:	2 weeks
2014-02-27 04:45:29 +00:00
Justin Hibbits
169dd953b0 Add hwpmc(4) support for the PowerPC 970 class processors, direct events.
This also fixes asserts on removal of the module for the mpc74xx.

The PowerPC 970 processors have two different types of events: direct events
and indirect events.  Thus far only direct events are supported.  I included
some documentation in the driver on how indirect events work, but support is
for the future.

MFC after:	1 month
2014-02-01 02:03:50 +00:00
Justin Hibbits
e35effceaf MPC74xx should not fall through, to the error case.
MFC after:	1 week
2014-01-25 22:50:42 +00:00
John Baldwin
e07ef9b0f6 Move <machine/apicvar.h> to <x86/apicvar.h>. 2014-01-23 20:10:22 +00:00
George V. Neville-Neil
ac4030b7e1 Add another Haswell model (0x45) to the set of supported chips.
Model 0x45 appears, for example, in late 2013 Mac Book Pro models
and is properly emulated by VMware.
2013-12-20 20:22:10 +00:00
Attilio Rao
026346c8f1 o Remove assertions on ipa_version as sometimes the version detection
using cpuid can be quirky (this is the case of VMWare without the
  vPMC support) but fail to probe hwpmc.
o Apply the fix for XEON family of processors as established by
  315338-020 document (bug AJ85).

Sponsored by:	EMC / Isilon storage division
Reviewed by:	fabient
2013-12-20 14:03:56 +00:00
Justin Hibbits
0587a07215 Add userland PMC backtracing, and use the PMC trapframe macros for kernel
backtraces.

MFC after:	1 week
2013-12-14 20:12:28 +00:00
Eitan Adler
7a22215c53 Fix undefined behavior: (1 << 31) is not defined as 1 is an int and this
shifts into the sign bit.  Instead use (1U << 31) which gets the
expected result.

This fix is not ideal as it assumes a 32 bit int, but does fix the issue
for most cases.

A similar change was made in OpenBSD.

Discussed with:	-arch, rdivacky
Reviewed by:	cperciva
2013-11-30 22:17:27 +00:00
Davide Italiano
cabba8f230 Remove local change leftover, this should never have been part of
r255745.

Pointy-hat to:	davide
Approved by:	re (implicit)
2013-09-20 23:10:52 +00:00
Davide Italiano
7faf4d90e8 Fix lc_lock/lc_unlock() support for rmlocks held in shared mode. With
current lock classes KPI it was really difficult because there was no
way to pass an rmtracker object to the lock/unlock routines. In order
to accomplish the task, modify the aforementioned functions so that
they can return (or pass as argument) an uinptr_t, which is in the rm
case used to hold a pointer to struct rm_priotracker for current
thread. As an added bonus, this fixes rm_sleep() in the rm shared
case, which right now can communicate priotracker structure between
lc_unlock()/lc_lock().

Suggested by:	jhb
Reviewed by:	jhb
Approved by:	re (delphij)
2013-09-20 23:06:21 +00:00
Justin Hibbits
995df27c66 Fix the build. 2013-09-05 01:13:26 +00:00
Pawel Jakub Dawidek
7008be5bd7 Change the cap_rights_t type from uint64_t to a structure that we can extend
in the future in a backward compatible (API and ABI) way.

The cap_rights_t represents capability rights. We used to use one bit to
represent one right, but we are running out of spare bits. Currently the new
structure provides place for 114 rights (so 50 more than the previous
cap_rights_t), but it is possible to grow the structure to hold at least 285
rights, although we can make it even larger if 285 rights won't be enough.

The structure definition looks like this:

	struct cap_rights {
		uint64_t	cr_rights[CAP_RIGHTS_VERSION + 2];
	};

The initial CAP_RIGHTS_VERSION is 0.

The top two bits in the first element of the cr_rights[] array contain total
number of elements in the array - 2. This means if those two bits are equal to
0, we have 2 array elements.

The top two bits in all remaining array elements should be 0.
The next five bits in all array elements contain array index. Only one bit is
used and bit position in this five-bits range defines array index. This means
there can be at most five array elements in the future.

To define new right the CAPRIGHT() macro must be used. The macro takes two
arguments - an array index and a bit to set, eg.

	#define	CAP_PDKILL	CAPRIGHT(1, 0x0000000000000800ULL)

We still support aliases that combine few rights, but the rights have to belong
to the same array element, eg:

	#define	CAP_LOOKUP	CAPRIGHT(0, 0x0000000000000400ULL)
	#define	CAP_FCHMOD	CAPRIGHT(0, 0x0000000000002000ULL)

	#define	CAP_FCHMODAT	(CAP_FCHMOD | CAP_LOOKUP)

There is new API to manage the new cap_rights_t structure:

	cap_rights_t *cap_rights_init(cap_rights_t *rights, ...);
	void cap_rights_set(cap_rights_t *rights, ...);
	void cap_rights_clear(cap_rights_t *rights, ...);
	bool cap_rights_is_set(const cap_rights_t *rights, ...);

	bool cap_rights_is_valid(const cap_rights_t *rights);
	void cap_rights_merge(cap_rights_t *dst, const cap_rights_t *src);
	void cap_rights_remove(cap_rights_t *dst, const cap_rights_t *src);
	bool cap_rights_contains(const cap_rights_t *big, const cap_rights_t *little);

Capability rights to the cap_rights_init(), cap_rights_set(),
cap_rights_clear() and cap_rights_is_set() functions are provided by
separating them with commas, eg:

	cap_rights_t rights;

	cap_rights_init(&rights, CAP_READ, CAP_WRITE, CAP_FSTAT);

There is no need to terminate the list of rights, as those functions are
actually macros that take care of the termination, eg:

	#define	cap_rights_set(rights, ...)				\
		__cap_rights_set((rights), __VA_ARGS__, 0ULL)
	void __cap_rights_set(cap_rights_t *rights, ...);

Thanks to using one bit as an array index we can assert in those functions that
there are no two rights belonging to different array elements provided
together. For example this is illegal and will be detected, because CAP_LOOKUP
belongs to element 0 and CAP_PDKILL to element 1:

	cap_rights_init(&rights, CAP_LOOKUP | CAP_PDKILL);

Providing several rights that belongs to the same array's element this way is
correct, but is not advised. It should only be used for aliases definition.

This commit also breaks compatibility with some existing Capsicum system calls,
but I see no other way to do that. This should be fine as Capsicum is still
experimental and this change is not going to 9.x.

Sponsored by:	The FreeBSD Foundation
2013-09-05 00:09:56 +00:00
Justin Hibbits
177f0102f4 Fix hwpmc(4) for 32-bit PowerPC. 2013-09-04 04:11:38 +00:00
Justin Hibbits
b2fb58a11d Refactor PowerPC hwpmc(4) driver into generic and specific. More refactoring
will likely be done as more drivers are added, since AIM-compatible processors
have similar PMC configuration logic.
2013-09-03 00:34:18 +00:00
Davide Italiano
89f6b7baf4 Complete r250105. Do not zero fields if M_ZERO flag is specified to
malloc(9).

Reported by:	pluknet, glebius
2013-09-01 21:44:43 +00:00
Adrian Chadd
808d6d430f Remove the duplicate LLC_MISS event and put it in the right order. 2013-08-29 13:52:51 +00:00
Adrian Chadd
81c4f79f18 Update the mis-predicted branch PMC names (for sandy bridge) to not clash.
The SDM (June 2013) tables on these are rather confusing.  Yes, they
assign the same name (BR_MISP_RETIRED.ALL_BRANCHES) to two codes
(C5H/00H and C5H/04H.) The latter however is the PEBS version.

So, to make it easier to see the difference - and yes, we can use
both without having to actually enable the PEBS specific bits! -
just rename the PEBS one to _PS so there's no clashing.

Tested:

* Sandy bridge
2013-08-25 12:58:34 +00:00
Adrian Chadd
cb42cde6ec Fix a >80 character long line, introduced in my previous commit.
Noticed by: hiren
2013-08-25 12:02:20 +00:00
Adrian Chadd
c55e621eed Update the MEM_UOP_RETIRED PMC operation for sandy bridge and sandy
bridge Xeon.

Summary: These are PEBS events but they're also available as normal
counter/sample events.  The source table (Table 19-2) lists the
base versions (LOAD, STLB_MISS, SPLIT, ALL) but it says they must
be qualified with other values.  This particular commit fleshes
out those umask values.

Source:

* Linux; SDM June 2013, Volume 3B, Table 19-2 and 18-21.

Tested:

* Sandy Bridge (non-Xeon)
2013-08-25 02:07:28 +00:00
Mark Johnston
29f4e216f2 Rename the kld_unload event handler to kld_unload_try, and add a new
kld_unload event handler which gets invoked after a linker file has been
successfully unloaded. The kld_unload and kld_load event handlers are now
invoked with the shared linker lock held, while kld_unload_try is invoked
with the lock exclusively held.

Convert hwpmc(4) to use these event handlers instead of having
kern_kldload() and kern_kldunload() invoke hwpmc(4) hooks whenever files are
loaded or unloaded. This has no functional effect, but simplifes the linker
code somewhat.

Reviewed by:	jhb
2013-08-24 21:13:38 +00:00
Adrian Chadd
8e0cf70b5d Change the name of this particular event to reflect the name used in
Linux and Intel examples.

Sourced:

* https://github.com/andikleen/pmu-tools/blob/master/snb-client.csv
* http://software.intel.com/en-us/comment/1747932#comment-1747932

Note:

* It's not currently in the Intel SDM; I need to chase down what's
  going on.

Tested:

* Sandy Bridge
2013-08-21 21:47:56 +00:00
Bjoern A. Zeeb
a66b2c65c3 Correct a typo in the event mask mnemonic.
Reviewed by:	gnn
MFC after:	3 days
2013-08-20 14:59:31 +00:00
Adrian Chadd
f7cd52247d Add in missing events for Sandy Bridge Xeon.
* Add in MEM_LOAD_UOPS_LLC_HIT_RETIRED for both sandy bridge and sandy
  bridge Xeon.  Right now it only is enabled for Sandy Bridge.
* D2/0F is actually a combination rather than a separate counter, so
  just flip that on for the CPU types that support it.

There's an errata for using this on SB Xeon hardware - I've documented
it in kern/181346.

Tested:

* Sandy Bridge
* Sandy Bridge Xeon

Sponsored by:	Netflix, Inc.
2013-08-18 06:08:52 +00:00
Alan Cox
66c392df53 Relax the vm object locking. Use a read lock.
Sponsored by:	EMC / Isilon Storage Division
2013-06-05 17:00:10 +00:00
Davide Italiano
31d7f0b7b0 Suppress a GCC warning. This warning is actually bogus and newer GCC
versions than the one in base (dim@ mentioned he tried on 4.7.3 and 4.8.1)
do not whine about it, so, at some point this workaround will be reverted.

Reported by:	ache
Discussed with:	dim
2013-05-02 14:55:21 +00:00
Davide Italiano
c0c97b9962 malloc(9) cannot return NULL if M_WAITOK flag is specified. 2013-04-30 15:59:22 +00:00
Davide Italiano
38179e6e76 The Intel PMC architectural events have encodings which are identical to
those of some non-architectural core events. This is not a problem in the
general case as long as there's an 1:1 mapping between the two, but there
are few exceptions. For example, 3CH_01H on Nehalem/Westmere represents
both unhalted-reference-cycles and CPU_CLK_UNHALTED.REF_P.
CPU_CLK_UNHALTED.REF_P on the aforementioned architectures does not measure
reference (i.e. bus) but TSC, so there's the need to disambiguate.
In order to avoid the namespace collision rename all the architectural
events in a way they cannot be ambigous and refactor the architectural
events handling function to reflect this change.
While here, per Jim Harris request, rename
iap_architectural_event_is_unsupported() to iap_event_is_architectural().

Discussed with:	jimharris
Reviewed by:	jimharris, gnn
2013-04-30 15:31:45 +00:00
Davide Italiano
1c12d03f5e Complete r250097:
Do not change the initialization order in pmc_intel_initialize().
2013-04-30 14:56:41 +00:00
Davide Italiano
e1bd42c272 When hwpmc(4) module is unloaded it reports a double leakage. This happens
at least if FreeBSD is ran under VirtualBox. In order to avoid the leakage,
properly deallocate structures in case CPU claims that hw performance
monitoring counters are not supported.

Reported by:	hiren
2013-04-30 08:33:38 +00:00
Davide Italiano
9dc0d11127 Fixup Westmere hwpmc(4) support: add missing CPU flag so that
intrucion-retired, llc-misses and llc-reference events can now be
allocated.

Reviewed by:	jimharris, gnn
2013-04-30 08:18:08 +00:00
Hiren Panchasara
c851725506 Improve/correct a comment. We now support a lot more cpu types.
PR:	kern/177496
Approved by:	sbruno (mentor)
2013-04-14 02:26:12 +00:00
Ryan Stone
c83c365008 Cosmetic change: make a comment reference Sandy Bridge *Xeon*
Reviewed by:	sbruno
MFC after:	1 week
2013-04-12 20:43:14 +00:00
Sean Bruno
4b226201da Trailing whitespace cleanup along with 80 column enforcemnt.
Submitted by:	hiren.panchasara@gmail.com
Reviewed by:	sbruno@freebsd.org
Obtained from:	Yahoo! Inc.
MFC after:	2 weeks
2013-04-03 21:34:35 +00:00
Sean Bruno
cc0c1555d3 Update hwpmc to support Haswell class processors.
0x3C:      /* Per Intel document 325462-045US 01/2013. */

Add manpage to document all the goodness that is available in this
processor model.

Submitted by:	hiren panchasara <hiren.panchasara@gmail.com>
Reviewed by:	jimharris, sbruno
Obtained from:	Yahoo! Inc.
MFC after:	2 weeks
2013-03-28 19:15:54 +00:00
Attilio Rao
89f6b8632c Switch the vm_object mutex to be a rwlock. This will enable in the
future further optimizations where the vm_object lock will be held
in read mode most of the time the page cache resident pool of pages
are accessed for reading purposes.

The change is mostly mechanical but few notes are reported:
* The KPI changes as follow:
  - VM_OBJECT_LOCK() -> VM_OBJECT_WLOCK()
  - VM_OBJECT_TRYLOCK() -> VM_OBJECT_TRYWLOCK()
  - VM_OBJECT_UNLOCK() -> VM_OBJECT_WUNLOCK()
  - VM_OBJECT_LOCK_ASSERT(MA_OWNED) -> VM_OBJECT_ASSERT_WLOCKED()
    (in order to avoid visibility of implementation details)
  - The read-mode operations are added:
    VM_OBJECT_RLOCK(), VM_OBJECT_TRYRLOCK(), VM_OBJECT_RUNLOCK(),
    VM_OBJECT_ASSERT_RLOCKED(), VM_OBJECT_ASSERT_LOCKED()
* The vm/vm_pager.h namespace pollution avoidance (forcing requiring
  sys/mutex.h in consumers directly to cater its inlining functions
  using VM_OBJECT_LOCK()) imposes that all the vm/vm_pager.h
  consumers now must include also sys/rwlock.h.
* zfs requires a quite convoluted fix to include FreeBSD rwlocks into
  the compat layer because the name clash between FreeBSD and solaris
  versions must be avoided.
  At this purpose zfs redefines the vm_object locking functions
  directly, isolating the FreeBSD components in specific compat stubs.

The KPI results heavilly broken by this commit.  Thirdy part ports must
be updated accordingly (I can think off-hand of VirtualBox, for example).

Sponsored by:	EMC / Isilon storage division
Reviewed by:	jeff
Reviewed by:	pjd (ZFS specific review)
Discussed with:	alc
Tested by:	pho
2013-03-09 02:32:23 +00:00
Fabien Thomas
d49302aead Add a generic way to call per event allocate / release function.
Reviewed by:	mav
MFC after:	1 month
2013-03-05 10:18:48 +00:00
Alexander Motin
1af19ee4a2 Add support for good old 8192Hz profiling clock to software PMC.
Reviewed by:	fabient
2013-02-26 18:13:42 +00:00
Alexander Motin
8a4f65bc33 Change the way how software PMC updates counters.
This at least fixes -n option of pmcstat.

Reviewed by:	fabient
2013-02-26 13:59:39 +00:00
Sean Bruno
3f929d8cdd Update hwpmc to support the Xeon class of Ivybridge processors.
case 0x3E:      /* Per Intel document 325462-045US 01/2013. */

Add manpage to document all the goodness that is available in this
processor model.

No support for uncore events at this time.

Submitted by:	hiren panchasara <hiren.panchasara@gmail.com>
Reviewed by:	davide, jimharris, sbruno
Obtained from:	Yahoo! Inc.
MFC after:	2 weeks
2013-01-31 22:09:53 +00:00
Sean Bruno
ca57f64f7d Quiesce a couple of clang warnings
Submitted by:	hiren panchasara <hiren.panchasara@gmail.com>
Obtained from:	Yahoo! Inc
2013-01-12 18:30:52 +00:00
Attilio Rao
5584e91718 Fixup r240246: hwpmc needs to retain the pinning until ASTs are not
executed. This means past the point where userret() is generally
executed.

Skip the td_pinned check if a callchain tracing is currently happening
and add a more robust check to pmc_capture_user_callchain() in order to
catch td_pinned leak past ast() in hwpmc case.

Reported and tested by:	fabient
MFC after:	1 week
X-MFC:	r240246
2012-10-30 15:10:50 +00:00
Sean Bruno
cdfd0cc862 Cleanup and rename some variables in libpmc and hwpmc.
Submitted by:	hiren panchasara <hiren.panchasara@gmail.com>
Reviewed by:	jimharris@ sbruno@
Obtained from:	Yahoo! Inc.
MFC after:	2 weeks
2012-10-24 01:26:29 +00:00
Konstantin Belousov
5050aa86cf Remove the support for using non-mpsafe filesystem modules.
In particular, do not lock Giant conditionally when calling into the
filesystem module, remove the VFS_LOCK_GIANT() and related
macros. Stop handling buffers belonging to non-mpsafe filesystems.

The VFS_VERSION is bumped to indicate the interface change which does
not result in the interface signatures changes.

Conducted and reviewed by:	attilio
Tested by:	pho
2012-10-22 17:50:54 +00:00
Sean Bruno
fabe02f5f3 Update hwpmc to support the Xeon class of Sandybridge processors.
(Model 0x2D     /* Per Intel document 253669-044US 08/2012. */)

Add manpage to document all the goodness that is available in this
processor model.

No support for uncore events at this time.

Submitted by:	hiren panchasara <hiren.panchasara@gmail.com>
Reviewed by:	jimharris@ fabient@
Obtained from:	Yahoo! Inc.
MFC after:	  2 weeks
2012-10-19 17:01:27 +00:00
Andriy Gapon
e67c0426bc hwpmc amd_pcpu_fini: fix a bug in code locked under DEBUG
MFC after:	16 days
2012-09-18 13:33:39 +00:00
Attilio Rao
0a15e5d30d Remove all the checks on curthread != NULL with the exception of some MD
trap checks (eg. printtrap()).

Generally this check is not needed anymore, as there is not a legitimate
case where curthread != NULL, after pcpu 0 area has been properly
initialized.

Reviewed by:	bde, jhb
MFC after:	1 week
2012-09-13 22:26:22 +00:00
Fabien Thomas
35db642499 Complete and merge the list between Sandy/Ivy bridge of events
that can run on specific PMC.

MFC after:	1 month
2012-09-07 14:45:59 +00:00
Fabien Thomas
1e862e5ad0 Add Intel Ivy Bridge support to hwpmc(9).
Update offcore RSP token for Sandy Bridge.
Note: No uncore support.

Will works on Family 6 Model 3a.

MFC after: 1 month
Tested by: bapt, grehan
2012-09-06 13:54:01 +00:00
Davide Italiano
f39e915e19 Disable hwpmc(4) support for Intel Xeon Sandy Bridge (Model 0x2D).
Due to some differences in MSRs between Xeon Sandy Bridge and Core Sandy
Bridge (Model 0x2A), wrmsr() may generate in a GP# fault exception and so a
panic of the machine.

Approved by:		gnn (mentor)
MFC after:		3 days
2012-06-17 13:48:39 +00:00
Fabien Thomas
790fb4edf2 Add ARM callchain support for hwpmc.
Sponsored by: NETASQ
MFC after:	3 days
2012-06-13 06:38:25 +00:00
Fabien Thomas
4cc50ab413 Soft PMC support for ARM.
Callgraph is not captured, only current location.

Sample system wide profiling: "pmcstat -Sclock.hard -T"
2012-05-23 13:23:40 +00:00
Fabien Thomas
eecb732d59 Remove out of date KASSERT that fire with soft PMC.
MFC after:	1 week
2012-05-10 14:27:49 +00:00
George V. Neville-Neil
03963ef8d1 Fix so that ,usr and ,os work correctly with fixed function (IAF)
counters.

MFC after:	1 week
2012-05-02 16:23:36 +00:00