Commit Graph

211927 Commits

Author SHA1 Message Date
Jared McNeill
292e26ba55 Add pmic (AXP813) child node to r_rsb for Sinovoip BananaPi BPI-M3. 2016-05-14 23:36:00 +00:00
Konstantin Belousov
56e61f57b0 Eliminate pvh_global_lock from the amd64 pmap.
The only current purpose of the pvh lock was explained there
On Wed, Jan 09, 2013 at 11:46:13PM -0600, Alan Cox wrote:
> Let me lay out one example for you in detail.  Suppose that we have
> three processors and two of these processors are actively using the same
> pmap.  Now, one of the two processors sharing the pmap performs a
> pmap_remove().  Suppose that one of the removed mappings is to a
> physical page P.  Moreover, suppose that the other processor sharing
> that pmap has this mapping cached with write access in its TLB.  Here's
> where the trouble might begin.  As you might expect, the processor
> performing the pmap_remove() will acquire the fine-grained lock on the
> PV list for page P before destroying the mapping to page P.  Moreover,
> this processor will ensure that the vm_page's dirty field is updated
> before releasing that PV list lock.  However, the TLB shootdown for this
> mapping may not be initiated until after the PV list lock is released.
> The processor performing the pmap_remove() is not problematic, because
> the code being executed by that processor won't presume that the mapping
> is destroyed until the TLB shootdown has completed and pmap_remove() has
> returned.  However, the other processor sharing the pmap could be
> problematic.  Specifically, suppose that the third processor is
> executing the page daemon and concurrently trying to reclaim page P.
> This processor performs a pmap_remove_all() on page P in preparation for
> reclaiming the page.  At this instant, the PV list for page P may
> already be empty but our second processor still has a stale TLB entry
> mapping page P.  So, changes might still occur to the page after the
> page daemon believes that all mappings have been destroyed.  (If the PV
> entry had still existed, then the pmap lock would have ensured that the
> TLB shootdown completed before the pmap_remove_all() finished.)  Note,
> however, the page daemon will know that the page is dirty.  It can't
> possibly mistake a dirty page for a clean one.  However, without the
> current pvh global locking, I don't think anything is stopping the page
> daemon from starting the laundering process before the TLB shootdown has
> completed.
>
> I believe that a similar example could be constructed with a clean page
> P' and a stale read-only TLB entry.  In this case, the page P' could be
> "cached" in the cache/free queues and recycled before the stale TLB
> entry is flushed.

TLBs for addresses with updated PTEs are always flushed before pmap
lock is unlocked.  On the other hand, amd64 pmap code does not always
flushes TLBs before PV list locks are unlocked, if previously PTEs
were cleared and PV entries removed.

To handle the situations where a thread might notice empty PV list but
third thread still having access to the page due to TLB invalidation
not finished yet, introduce delayed invalidation.  Comparing with the
pvh_global_lock, DI does not block entered thread when
pmap_remove_all() or pmap_remove_write() (callers of
pmap_delayed_invl_wait()) are executed in parallel.  But _invl_wait()
callers are blocked until all previously noted DI blocks are leaved,
thus ensuring that neccessary TLB invalidations were performed before
returning from pmap_remove_all() or pmap_remove_write().

See comments for detailed description of the mechanism, and also for
the explanations why several pmap methods, most important
pmap_enter(), do not need DI protection.

Reviewed by:	alc, jhb (turnstile KPI usage)
Tested by:	pho (previous version)
Sponsored by:	The FreeBSD Foundation
Differential revision:	https://reviews.freebsd.org/D5747
2016-05-14 23:35:11 +00:00
Jared McNeill
eceba010ba Add and enable Allwinner RSB and AXP81x power management IC drivers. 2016-05-14 23:34:57 +00:00
Jared McNeill
ceba82fdf5 Add a basic driver for X-Powers AXP813 and AXP818 power management ICs.
This driver simply installs a shutdown event handler for handling
RB_POWEROFF at shutdown. Tested on a Sinovoip BananaPi BPI-M3.
2016-05-14 23:33:57 +00:00
Adrian Chadd
36fcc18d80 [bwn] add an implementation of "cordic" and imaginary math.
This is used by the PHY-N code.

Obtained from:	http://bcm-v4.sipsolutions.net/802.11/PHY/Cordic
2016-05-14 23:33:13 +00:00
Pedro F. Giffuni
5728318b35 Avoid NULL de-references.
CID:		271079
Obtained from:	NetBSD
MFC after:	2 weeks.
2016-05-14 23:32:03 +00:00
Enji Cooper
4a2b63d5bb Convert tok from enum tok to int32_t in function calls
get_token(..) returns int32_t, not enum tok, and in many cases tests for items
not in enum tok (e.g. '('). Make the typing consistent with get_token, which
includes a domino effect of changing enum tok to int32_t.

MFC after: 2 weeks
Sponsored by: EMC / Isilon Storage Division
2016-05-14 23:29:41 +00:00
Adrian Chadd
9193516e94 [bwn] TX logging / completion fixes
* Log the per-completion status out if requested
* If we get a PHY failure, the retrycnt is set to 0 and ack=0, so
  the logic was incorrect.  So, for ack=0, ensure we don't log
  a retrycnt of 0 (or rate control breaks) or a negative retrycnt
  (or rate control also breaks.)

Tested:

* BCM4321 (11abgn N-PHY), BCM4312 (LP-PHY)
2016-05-14 23:27:55 +00:00
Jared McNeill
4b9a54a9fc Add a driver for the Allwinner Reduced Serial Bus (RSB).
The RSB controller speaks a simplified two wire protocol at speeds up to
20MHz. It is used on sun8i and sun9i family SoCs to communicate with
power management ICs.

RSB isn't really I2C or SMBus, but the driver exposes an iicbus interface
to simplify power management IC drivers (which may need to support both
RSB and I2C connectivity).
2016-05-14 23:27:54 +00:00
Adrian Chadd
0cfd65ecdc [bwn] add in new microcode and phy initval information.
This is required for PHY-N and later hardware.

Tested:

* BCN4321 (11abgn), PHY-N
2016-05-14 23:23:50 +00:00
Jared McNeill
472c6f0685 Add node for A83T NMI interrupt controller. 2016-05-14 23:22:52 +00:00
Enji Cooper
5413861b16 Use a consistent errno save/restore pattern before running strtoul
- Save errno
- Set errno to 0
- Call strtoul
- Test errno (optional, but many calls to strtoul did this afterwards)

Some of the code was setting errno = 0 after calling strtoul, not setting
errno = 0, or setting errno to saved_errno after the call, but before the
test. These all have unwanted behavioral side-effects, depending on the
initial value of errno and whether or not the input to strtoul was correct
or incorrect.

MFC after: 3 weeks
Sponsored by: EMC / Isilon Storage Division
2016-05-14 23:22:38 +00:00
Pedro F. Giffuni
365cb451d3 routed(8): Use arc4random.
CID:		1305962
Obtained from:	NetBSD (CVS Rev. 1.34, Itojun)
2016-05-14 23:22:19 +00:00
Adrian Chadd
52bef765d7 [bwn] implement reset improvements in preparation for PHY-N support
* Ensure we set 20MHz wide channels (hard-coded) for PHY-N.
* Change the core rese tto take a flag saying "gmode" vesus uint32_t
  flags.  This is important for BCMA support where the "gmode" bit
  is different.
* Refactor out the mac-phy clock reset routine (usde by PHY-N).

Tested:

* BCM4321 (PHY-N), BCM4312 (PHY-LP)

TODO:

* Checkpoint test on PHY-G hardware, just to check.
2016-05-14 23:20:46 +00:00
Adrian Chadd
dc94ad18cd [bwn] use the shared bwn_sqrt() routine. 2016-05-14 23:13:44 +00:00
Enji Cooper
2c0046434b Do minimal work necessary to cure a -Wunused-but-set-variable warning from gcc
How errno is saved before and restored after strtoul calls needs a rethink

MFC after: 1 week
Reported by: gcc 5.x
Sponsored by: EMC / Isilon Storage Division
2016-05-14 23:13:23 +00:00
Adrian Chadd
baed0627b7 [bwn] disable bgscan for now.
I'll re-enable this when I've verified all of the locking / concurrency
access to the hardware is "right".

Tested:

* BCM4321 (PHY-N), BCM4312 (PHY-LP)
2016-05-14 23:10:47 +00:00
Adrian Chadd
c41639c2b7 [bwn] add in the new phy common and utils files.
They're not yet used by included code; that'll come next.
2016-05-14 23:08:34 +00:00
Pedro F. Giffuni
0b279f8c94 routed: Fix use after free.
For the multihomed case, ifp be used after being freed. NULL the value
after freeing it and avoid getting into the branch without reassigning
a new value.

CID:		272671
Obtained from:	NetBSD
MFC after:	2 weeks
2016-05-14 23:07:26 +00:00
Enji Cooper
54811dda50 Fix up r299764
I meant to use nitems, not sizeof(..) with the destination buffer. Using sizeof(..)
on a pointer will always truncate the output in the destination buffer incorrectly

Pointyhat to: ngie
MFC after: 1 week
X-MFC with: r299764
Sponsored by: EMC / Isilon Storage Division
2016-05-14 22:43:07 +00:00
Enji Cooper
896f12fec1 Use the size of the destination buffer instead of the malloc size, repeated, in order
to mute a -Wstrlcpy-strlcat-size warning

MFC after: 1 week
Reported by: clang
Sponsored by: EMC / Isilon Storage Division
2016-05-14 22:40:35 +00:00
Pedro F. Giffuni
562c5a82cb routed(8): use NULL instead of zero for pointers. 2016-05-14 22:40:08 +00:00
Enji Cooper
19ffd5ecda Mute sign compare warning by casting rc to u_int to match nbindings' type
rc cannot be negative -- that was already tested for earlier on in
the function

MFC after: 1 week
Reported by: clang, gcc
Sponsored by: EMC / Isilon Storage Division
2016-05-14 22:29:11 +00:00
Enji Cooper
715e3b39a6 Fix logically dead code pointed out by clang/Coverity
parse_context, parse_user_security: test for validity of results from
parse_ascii(..) with by casting to int32_t and comparing to -1; comparing
unsigned types to negative values will always be false.

Reported by: clang, Coverity
CID: 1011432, 1011433
MFC after: 3 weeks
Sponsored by: EMC / Isilon Storage Division
2016-05-14 22:04:44 +00:00
Enji Cooper
81910adfc4 Fix theoretical buffer overflow issues in snmp_oid2asn_oid
Increase the size of `string` by 1 to account for the '\0' terminator. In the event
that `str` doesn't contain any non-alpha chars, i would be set to MAXSTR, and
the subsequent strlcpy call would overflow by a character.

Remove unnecessary `string[i] = '\0'` -- this is already handled by strlcpy.

MFC after: 1 week
Reported by: clang
Sponsored by: EMC / Isilon Storage Division
2016-05-14 21:32:52 +00:00
Enji Cooper
78a780e3e5 Use the size of the destination buffer, not the source buffer.
Technically this is a no-op, but mute the clang warning in case the malloc call
above for fstring ever changes in the future

Reported by: clang
MFC after: 1 week
Sponsored by: EMC / Isilon Storage Division
2016-05-14 21:27:33 +00:00
Enji Cooper
6e229b2973 Mute -Wstrlcpy-strlcat-size warning by using nitems with the size of the buffer
This is a no-op as the malloc above set the size of the buffer to the size used
below, but this keeps things consistent in case the malloc call changes somehow.

MFC after: 1 week
Reported by: clang
Sponsored by: EMC / Isilon Storage Division
2016-05-14 20:58:34 +00:00
Enji Cooper
444991f1e6 Mark snmptoolctx unused in parse_authentication(..), parse_privacy(..),
parse_context(..), and parse_user_security(..).

MFC after: 1 week
Reported by: clang, gcc
Sponsored by: EMC / Isilon Storage Division
2016-05-14 20:33:42 +00:00
Enji Cooper
4a8c12cd34 parse_ascii: make count size_t to mute a -Wsign-compare issue
count is always unsigned.

MFC after: 1 week
Sponsored by: EMC / Isilon Storage Division
2016-05-14 20:31:12 +00:00
Enji Cooper
9a3ebeefc0 Sort variables in parse_ascii(..) per style(9)
MFC after: 1 week
Sponsored by: EMC / Isilon Storage Division
2016-05-14 20:28:23 +00:00
Enji Cooper
031987d916 Use calloc instead of memset(.., 0, ..) + malloc
MFC after: 1 week
Sponsored by: EMC / Isilon Storage Division
2016-05-14 20:25:14 +00:00
Adrian Chadd
c68e865e8f [bwn] begin migrating PHY common routines into if_bwn_phy_common.[ch].
This isn't compiled in yet; so some code here duplicates what
is in the existing code.  I'll migrate it all out in subsequent
commits.

Obtained from:	b43 (definitions), bcm-v4 specifications website
2016-05-14 20:11:48 +00:00
Adrian Chadd
020cb2200b [bwn] add Q52 macros.
The PHY-N code uses a different format for gain values, so these macros
are used for converting to/from and print out values.
2016-05-14 20:09:37 +00:00
Oleksandr Tymoshenko
0cc376c134 Use OF_prop_free instead of direct call to free(9)
Reviewed by:	jhibbits
2016-05-14 20:06:38 +00:00
Oleksandr Tymoshenko
68dd3f144c Use OF_prop_free instead of direct call to free(9)
Reviewed by:	sgalabov
2016-05-14 20:05:35 +00:00
Adrian Chadd
6699a81195 [bwn] add BCMA chip identifiers.
This will eventually live in sys/dev/bhnd/, but I won't use that until
we migrate the whole driver over.

So, this'll live here for now.

Obtained from:	Linux b43 (definitions)
2016-05-14 20:03:24 +00:00
Rick Macklem
1390cca2b1 Fix fuse to use DIRECT_IO when required.
When a file is opened write-only and a partial block was written,
buffered I/O would try and read the whole block in. This would
result in a hung thread, since there was no open (fuse filehandle)
that allowed reading. This patch avoids the problem by forcing
DIRECT_IO for this case.
It also sets DIRECT_IO when the file system specifies the FN_DIRECTIO
flag in its reply to the open.

Tested by:	nishida@asusa.net, freebsd@moosefs.com
PR:		194293, 206238
MFC after:	2 weeks
2016-05-14 20:03:22 +00:00
Adrian Chadd
93e99e4f1a [bwn] add more debugging bits.
I'm hoping to migrate the device_printf() bits out into macros so we can
control it later.

Also, add some new debug sections that I'll soon be using.
2016-05-14 20:02:02 +00:00
Adrian Chadd
7780dd710c [bwn] migrate sqrt and add another couple of util routines.
bwn_sqrt() is in the PHY-LP code but is also needed by the upcoming
PHY-N support.

The other two routines are used by the PHY-N code.

The next commit will introduce it into the compile and pull bwn_sqrt()
out of the PHY-LP source.
2016-05-14 19:52:04 +00:00
Jared McNeill
f4f53c0a5a Add DTS files for the Allwinner A83T SoC and the Sinovoip BananaPi BPI-M3
development board.
2016-05-14 18:47:36 +00:00
Oleksandr Tymoshenko
27b917c85e Use OF_prop_free instead of direct call to free(9) 2016-05-14 18:44:30 +00:00
John Baldwin
fdce57a042 Add an EARLY_AP_STARTUP option to start APs earlier during boot.
Currently, Application Processors (non-boot CPUs) are started by
MD code at SI_SUB_CPU, but they are kept waiting in a "pen" until
SI_SUB_SMP at which point they are released to run kernel threads.
SI_SUB_SMP is one of the last SYSINIT levels, so APs don't enter
the scheduler and start running threads until fairly late in the
boot.

This change moves SI_SUB_SMP up to just before software interrupt
threads are created allowing the APs to start executing kernel
threads much sooner (before any devices are probed).  This allows
several initialization routines that need to perform initialization
on all CPUs to now perform that initialization in one step rather
than having to defer the AP initialization to a second SYSINIT run
at SI_SUB_SMP.  It also permits all CPUs to be available for
handling interrupts before any devices are probed.

This last feature fixes a problem on with interrupt vector exhaustion.
Specifically, in the old model all device interrupts were routed
onto the boot CPU during boot.  Later after the APs were released at
SI_SUB_SMP, interrupts were redistributed across all CPUs.

However, several drivers for multiqueue hardware allocate N interrupts
per CPU in the system.  In a system with many CPUs, just a few drivers
doing this could exhaust the available pool of interrupt vectors on
the boot CPU as each driver was allocating N * mp_ncpu vectors on the
boot CPU.  Now, drivers will allocate interrupts on their desired CPUs
during boot meaning that only N interrupts are allocated from the boot
CPU instead of N * mp_ncpu.

Some other bits of code can also be simplified as smp_started is
now true much earlier and will now always be true for these bits of
code.  This removes the need to treat the single-CPU boot environment
as a special case.

As a transition aid, the new behavior is available under a new kernel
option (EARLY_AP_STARTUP).  This will allow the option to be turned off
if need be during initial testing.  I plan to enable this on x86 by
default in a followup commit in the next few days and to have all
platforms moved over before 11.0.  Once the transition is complete,
the option will be removed along with the !EARLY_AP_STARTUP code.

These changes have only been tested on x86.  Other platform maintainers
are encouraged to port their architectures over as well.  The main
things to check for are any uses of smp_started in MD code that can be
simplified and SI_SUB_SMP SYSINITs in MD code that can be removed in
the EARLY_AP_STARTUP case (e.g. the interrupt shuffling).

PR:		kern/199321
Reviewed by:	markj, gnn, kib
Sponsored by:	Netflix
2016-05-14 18:22:52 +00:00
Jared McNeill
c9aad79aa9 Add allwinner,sun8i-a83t-i2c to the list of compatible devices. 2016-05-14 18:02:47 +00:00
Michael Tuexen
574679afe9 Fix a locking bug which only shows up on Mac OS X.
MFC after: 1 week
2016-05-14 13:44:49 +00:00
Jared McNeill
3e104ce8ba Update comment at top of file to mention all currently supported Allwinner
SoCs. Previously mentioned A20 and A31, added A31S, A83T, and H3.
2016-05-14 10:39:57 +00:00
Konstantin Belousov
d21ea7daaa Add thr*.2 and _umtx_op.2 manpages to the build.
Sponsored by:	The FreeBSD Foundation
2016-05-14 09:43:28 +00:00
Bjoern A. Zeeb
9e1252ae20 Revert r299739. That did not make it better.
Instead disconnect gpiokeys from the build until it's fixed and buildable;
the SUBDIR list was not ordered properly anyway ;-)
2016-05-14 09:39:21 +00:00
Bjoern A. Zeeb
404c979523 Blind long shot. Add ofw_gpiobus.c to the SRCS list in the hope to
make the remaining MIPS kernels compile which set MODULES_OVERRIDE="gpio..."
2016-05-14 09:18:50 +00:00
Bjoern A. Zeeb
b3b9415f8f Update file list for sfgxe(4) again and hey, my amd64 kernels compile again. 2016-05-14 08:55:15 +00:00
Bjoern A. Zeeb
2e9090dfbe Revert parts of r299575 in order to make more MIPS kernels build
again hopefully.
Rather than blindly removing a supposedly unused variable as reported by
the Clang Static Analyzer, inspect the code and hide them with proper
#ifdefs as they are used in certain conditional parts of the code.
2016-05-14 08:54:34 +00:00