Commit Graph

1410 Commits

Author SHA1 Message Date
Andrew Turner
474c444e04 Move the arm64 userspace access checks to macros
In the functions that copy between userspace and kernel space we check the
user space address is valid before performing the copy. These are mostly
identical within each type of function so create two macros to perform the
check.

Obtained from:	CheriBSD
Sponsored by:	Innovate UK
2020-10-19 12:06:16 +00:00
Mitchell Horne
3c2af8a31f arm64: export a few more HWCAPs
These were missed in the previous pass. The extensions (partially)
supported by this change are:
 - ARMv8.2-FHM, Floating-point multiplication variant
 - ARMv8.4-LSE, Large System Extensions
 - ARMv8.4-DIT, Data Independent Timing instructions

Reviewed by:	andrew, markj
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D26707
2020-10-16 13:37:58 +00:00
Mitchell Horne
0387f2aacb Update the ID_AA64MMFR2_EL1 register definitions
This brings these definitions in sync with the ARMv8.6 version of the
architecture reference manual.

Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D26706
2020-10-16 13:35:29 +00:00
Mitchell Horne
ce4900bc8a Simplify preload_dump() condition
Hiding this feature behind RB_VERBOSE is gratuitous. The tunable is enough
to limit its use to only those who explicitly request it.

Suggested by:	kevans
2020-10-15 20:21:15 +00:00
D Scott Phillips
6527b9baef arm64: Increase NIRQ to 16k
Ampere Altra in a dual socket configuration has 12 ITSes for the
12 PCIe root complexes. The NIRQ interrupts are statically split
between each child of the gic bus, so here we increase that
value. 16k is enough for

  (#cpus * #its * max_pcie_bifurcation) LPIs + (#SPIs and #PPIs)

Reviewed by:	jhb
Approved by:	scottl (implicit)
MFC after:	1 week
Sponsored by:	Ampere Computing
Differential Revision:	https://reviews.freebsd.org/D26766
2020-10-15 03:12:00 +00:00
Konstantin Belousov
6f3b523c9a Avoid dump_avail[] redefinition.
Move dump_avail[] extern declaration and inlines into a new header
vm/vm_dumpset.h.  This fixes default gcc build for mips.

Reviewed by:	alc, scottph
Tested by:	kevans (previous version)
Sponsored by:	The FreeBSD Foundation
Differential revision:	https://reviews.freebsd.org/D26741
2020-10-14 22:51:40 +00:00
Andrew Turner
3d839d4bc3 Remove direct user access from the arm64 copyinstr
These already use the load variant that simulates userspace access.
Remove the macros that enable normal loads and stores from userspace
as they are unneeded.

Sponsored by:	Innovate UK
2020-10-14 15:31:42 +00:00
Andrew Turner
f56a08c810 Fix write only mappings on arm64
When trapping on a wrote access to a buffer the kernel has mapped as write
only we should only pass the VM_PROT_WRITE flag. Previously the call to
vm_fault_trap as the VM_PROT_READ flag was unexpected.

Reported by:	manu
Sponsored by:	Innovate UK
2020-10-13 10:26:15 +00:00
Emmanuel Vadot
7113afc84c 10Gigabit Ethernet driver for AMD SoC
This patch has the driver for 10Gigabit Ethernet controller in AMD
SoC. This driver is written compatible to the Iflib framework. The
existing driver is for the old version of hardware. The submitted
driver here is for the recent versions of the hardware where the Ethernet
controller is PCI-E based.

Submitted by:	Rajesh Kumar <rajesh1.kumar@amd.com>
MFC after:	1 month
Relnotes:	yes
Differential Revision:	https://reviews.freebsd.org/D25793
2020-10-11 16:01:16 +00:00
Conrad Meyer
f8e8a06d23 random(4) FenestrasX: Push root seed version to arc4random(3)
Push the root seed version to userspace through the VDSO page, if
the RANDOM_FENESTRASX algorithm is enabled.  Otherwise, there is no
functional change.  The mechanism can be disabled with
debug.fxrng_vdso_enable=0.

arc4random(3) obtains a pointer to the root seed version published by
the kernel in the shared page at allocation time.  Like arc4random(9),
it maintains its own per-process copy of the seed version corresponding
to the root seed version at the time it last rekeyed.  On read requests,
the process seed version is compared with the version published in the
shared page; if they do not match, arc4random(3) reseeds from the
kernel before providing generated output.

This change does not implement the FenestrasX concept of PCPU userspace
generators seeded from a per-process base generator.  That change is
left for future discussion/work.

Reviewed by:	kib (previous version)
Approved by:	csprng (me -- only touching FXRNG here)
Differential Revision:	https://reviews.freebsd.org/D22839
2020-10-10 21:52:00 +00:00
Warner Losh
7e46dafa58 Create in-tree LINT files
Now that config(8) has supported include for 19 years, transition to
including the NOTES files. include support didn't exist at the time,
nor did the envvar stuff recently added. Now that it does, eliminate
the building of LINT files by just including everything you need.

Note: This may cause conflicts with updating in some cases.
	find sys -name LINT\* -rm
is suggested across this commit to remove the generated LINT
files.

Reviewed by: kevans
Differential Revision: https://reviews.freebsd.org/D26540
2020-10-09 01:48:14 +00:00
Mitchell Horne
22e6a67086 Add a routine to dump boot metadata
The boot metadata (also referred to as modinfo, or preload metadata)
provides information about the size and location of the kernel,
pre-loaded modules, and other metadata (e.g. the EFI framebuffer) to be
consumed during by the kernel during early boot. It is encoded as a
series of type-length-value entries and is usually constructed by
loader(8) and passed to the kernel. It is also faked on some
architectures when booted by other means.

Although much of the module information is available via kldstat(8),
there is no easy way to debug the metadata in its entirety. Add some
routines to parse this data and allow it to be printed to the console
during early boot or output via a sysctl.

Since the output can be lengthly, printing to the console is gated
behind the debug.dump_modinfo_at_boot kenv variable as well as the
BOOTVERBOSE flag. The sysctl to print the metadata is named
debug.dump_modinfo.

Reviewed by:	tsoome
Sponsored by:	NetApp, Inc.
Sponsored by:	Klara, Inc.
Differential Revision:	https://reviews.freebsd.org/D26687
2020-10-08 18:02:05 +00:00
Mitchell Horne
8481aab1ac Print symbol index for unsupported relocation types
It is unlikely, but possible, that an unrecognized or unsupported
relocation type is encountered while trying to load a kernel module. If
this occurs we should offer the symbol index as a hint to the user.

While here, fix some small style issues.

Reviewed by:	markj, kib (amd64 part, in D26701)
Sponsored by:	NetApp, Inc.
Sponsored by:	Klara, Inc.
2020-10-07 18:48:10 +00:00
Edward Tomasz Napierala
2622708419 Tweak arm64's cpu_fetch_syscall_args(). This should make it possible
for the compiler to inline the memcpy().

Reviewed by:	andrew
Sponsored by:	DARPA
Differential Revision:	https://reviews.freebsd.org/D26629
2020-10-05 18:46:14 +00:00
Emmanuel Vadot
90b8c0ea10 Fix LINT: Add backlight to NOTES 2020-10-02 20:52:09 +00:00
Ed Maste
92d47dce78 Add cd device to arm64 GENERIC
Big-iron arm64 machines might have a CD, possibly provided by some IPMI
emulation.

Reported by:	scottph
2020-10-01 13:29:29 +00:00
Mitchell Horne
fe9602fbf8 arm64: set the correct HWCAP
This appears to be a typo. The AdvSIMD field encodes support for
half-precision floating point SIMD instructions, which corresponds to
HWCAP_ASIMDHP, not HWCAP_ASIMDDP.

MFC after:	3 days
Sponsored by:	The FreeBSD Foundation
2020-09-29 23:21:56 +00:00
Michal Meloun
722779c7dd Fix booting arm64 EFI with LINUX_BOOT_ABI enabled.
Use address of the pointer passed to kernel to determine whether the pointer
is a FDT block (physical address) or a module pointer (virtual kernel address).
This fragment was supposed to be committed before r366196, but I accidentally
skipped it in a patch series.

Reported by:	bz
2020-09-28 09:16:27 +00:00
Edward Tomasz Napierala
1e2521ffae Get rid of sa->narg. It serves no purpose; use sa->callp->sy_narg instead.
Reviewed by:	kib
Sponsored by:	DARPA
Differential Revision:	https://reviews.freebsd.org/D26458
2020-09-27 18:47:06 +00:00
Michal Meloun
ad86fd010c Check the result of the function, not the pointer to it. 2020-09-27 16:15:03 +00:00
Michal Meloun
1b5a4fc401 Add LINUX_BOOT_ABI back to arm64 GENERIC kernel.
It was removed in r355289 but forgot to return it back when new u-boot booti
support was committed.  Although booti is not the preferred method of
booting the kernel, it is very useful for the initial phase of porting
FreeBSD to a new platform or booting the kernel on various embedded boards
in an industrial environment.
2020-09-27 10:15:03 +00:00
Michal Meloun
f10ab2d5a9 Reapply r366193 with proper commit log.
Don't map same physical memory multiple times with different cache attributes.
This is explicitly stated as architectural undefined behavior, leading to
coherency issues sooner or later.
2020-09-27 09:27:39 +00:00
Michal Meloun
19fd4977f2 Revert r366193, it was committed with unsaved commit log. 2020-09-27 09:24:31 +00:00
Michal Meloun
7b34701e31 Don't map same physical memory multiple times with different cache attributes.
This is explicitly stated as architectural undefined behavior, leadint to
coherencz issues sonner or later.
2020-09-27 09:14:16 +00:00
Michal Meloun
0e417b55d5 Don't try to print EFI memeory map if it doesn't exist.
MFC after: 1 week
2020-09-27 09:12:36 +00:00
Edward Tomasz Napierala
0c5bd5f993 Regen after r366145.
Sponsored by:	DARPA
2020-09-25 10:05:38 +00:00
Andrew Turner
122e47836e Clean up the arm64 bus_dma_run_filter
- We can exit the loop as soon as the filter check passes.
 - The alignment check has already passed so there is no need to also run
   it here.

Sponsored by:	Innovate UK
2020-09-24 10:42:28 +00:00
Andrew Turner
ec9d068513 Ensure arm64 DMA alignment is passed from parents to children
This ensures the alignment check will take these alignments into account.

Sponsored by:	Innovate UK
2020-09-24 10:40:49 +00:00
Andrew Turner
2e3b7d8041 Bounce in more cases in the arm64 busdma
We need to use a bounce buffer when the memory we are operating on is not
aligned to a cacheline, and not aligned to the maps alignment.

The former is to stop other threads from dirtying the cacheline while we
are performing DMA operations with it. The latter is to check memory
passed in by a driver is correctly aligned for the device.

Reviewed by:	mmel
Sponsored by:	Innovate UK
Differential Revision:	https://reviews.freebsd.org/D26496
2020-09-24 07:17:05 +00:00
Andrew Turner
f0e50a4416 Ensure we always align and size arm64 busdma allocations to a cacheline
This will ensure nothing modifies the cacheline while DMA is in progress
so we won't need to bounce the data.

Reviewed by:	mmel
Sponsored by:	Innovate UK
Differential Revision:	https://reviews.freebsd.org/D26495
2020-09-24 07:13:13 +00:00
Andrew Turner
0aaa66cc79 Add a coherent flag on the arm64 dma map struct
Use it to decide if we can skip cache management.

While here remove the DMAMAP_COULD_BOUNCE flag as it's unneeded.

Reviewed by:	mmel
Sponsored by:	Innovate UK
Differential Revision:	https://reviews.freebsd.org/D26494
2020-09-24 07:07:54 +00:00
Andrew Turner
66cbbb75b2 Add bounce helpers to the arm64 busdma
Add helper functions to the arm64 busdma for common cases of checking if
we may need to bounce, and if we must bounce for a given address.

These will be expanded later as we handle cache-misaligned memory.

Reported by:	mmel
Sponsored by:	Innovate UK
Differential Revision:	https://reviews.freebsd.org/D26493
2020-09-24 07:03:26 +00:00
Mark Johnston
78257765f2 Add a vmparam.h constant indicating pmap support for large pages.
Enable SHM_LARGEPAGE support on arm64.

Reviewed by:	alc, kib
Sponsored by:	Juniper Networks, Inc., Klara, Inc.
Differential Revision:	https://reviews.freebsd.org/D26467
2020-09-23 19:34:21 +00:00
Mark Johnston
4168aedcde Add largepage support to the arm64 pmap.
Reviewed by:	alc, kib
Sponsored by:	Juniper Networks, Inc., Klara, Inc.
Differential Revision:	https://reviews.freebsd.org/D26466
2020-09-23 19:33:47 +00:00
D Scott Phillips
de03184698 arm64/pmap: Sparsify pv_table
Reviewed by:	markj, kib
Approved by:	scottl (implicit)
MFC after:	1 week
Sponsored by:	Ampere Computing, Inc.
Differential Revision:	https://reviews.freebsd.org/D26132
2020-09-21 22:23:57 +00:00
D Scott Phillips
00e6614750 Sparsify the vm_page_dump bitmap
On Ampere Altra systems, the sparse population of RAM within the
physical address space causes the vm_page_dump bitmap to be much
larger than necessary, increasing the size from ~8 Mib to > 2 Gib
(and overflowing `int` for the size).

Changing the page dump bitmap also changes the minidump file
format, so changes are also necessary in libkvm.

Reviewed by:	jhb
Approved by:	scottl (implicit)
MFC after:	1 week
Sponsored by:	Ampere Computing, Inc.
Differential Revision:	https://reviews.freebsd.org/D26131
2020-09-21 22:21:59 +00:00
D Scott Phillips
ab041f713a Move vm_page_dump bitset array definition to MI code
These definitions were repeated by all architectures, with small
variations. Consolidate the common definitons in machine
independent code and use bitset(9) macros for manipulation. Many
opportunities for deduplication remain in the machine dependent
minidump logic. The only intended functional change is increasing
the bit index type to vm_pindex_t, allowing the indexing of pages
with address of 8 TiB and greater.

Reviewed by:	kib, markj
Approved by:	scottl (implicit)
MFC after:	1 week
Sponsored by:	Ampere Computing, Inc.
Differential Revision:	https://reviews.freebsd.org/D26129
2020-09-21 22:20:37 +00:00
Mark Johnston
a9cf0eebb3 Weaken assertions in pmap_l1_to_l2() and pmap_l2_to_l3().
pmap_update_entry() will temporarily clear the valid bit of page table
entries in order to satisfy the arm64 pmap's break-before-make
constraint.  pmap_kextract() may operate concurrently on kernel page
table pages, introducing windows where the assertions added in r365879
may fail incorrectly since they implicitly assert that the valid bit is
set.  Modify the assertions to handle this.

Reviewed by:	andrew, mmel (previous version)
Reviewed by:	alc, kib
Reported by:	mmel, scottph
MFC with:	r365879
2020-09-21 22:19:21 +00:00
Michal Meloun
6507a8fecb Adjust DMA alignment for USB stack.
It should be at least as large as the maximum value of caheline size
for currently known CPUs.

MFC after:	2 weeks
2020-09-20 17:28:24 +00:00
Michal Meloun
b8bfffc1b6 Implement workaround for broken access to configuration space.
Due to a HW bug in the RockChip PCIe implementation, attempting to access
a non-existent register in the configuration space will throw an exception.
Use new bus functions bus_peek() and bus_poke() to overcomme this limitation.
2020-09-19 11:27:16 +00:00
Michal Meloun
95a85c125d Add NetBSD compatible bus_space_peek_N() and bus_space_poke_N() functions.
One problem with the bus_space_read_N() and bus_space_write_N() family of
functions is that they provide no protection against exceptions which can
occur when no physical hardware or device responds to the read or write
cycles. In such a situation, the system typically would panic due to a
kernel-mode bus error. The bus_space_peek_N() and bus_space_poke_N() family
of functions provide a mechanism to handle these exceptions gracefully
without the risk of crashing the system.

Typical example is access to PCI(e) configuration space in bus enumeration
function on badly implemented PCI(e) root complexes (RK3399 or Neoverse
N1 N1SDP and/or access to PCI(e) register when device is in deep sleep state.

This commit adds a real implementation for arm64 only. The remaining
architectures have bus_space_peek()/bus_space_poke() emulated by using
bus_space_read()/bus_space_write() (without exception handling).

MFC after:	1 month
Reviewed by:	kib
Differential Revision:	https://reviews.freebsd.org/D25371
2020-09-19 11:06:41 +00:00
Mark Johnston
d99cb9802b Assert we are not traversing through superpages in the arm64 pmap.
Reviewed by:	alc, andrew
MFC after:	1 week
Sponsored by:	Juniper Networks, Inc., Klara, Inc.
Differential Revision:	https://reviews.freebsd.org/D26465
2020-09-18 12:37:41 +00:00
Edward Tomasz Napierala
70890254b3 Get rid of sv_errtbl and SV_ABI_ERRNO().
Reviewed by:	kib
Sponsored by:	DARPA
Differential Revision:	https://reviews.freebsd.org/D26388
2020-09-17 11:39:33 +00:00
Edward Tomasz Napierala
c26391f4dd Move SV_ABI_ERRNO translation into linux-specific code, to simplify
the syscall path and declutter it a bit.  No functional changes intended.

Reviewed by:	kib (earlier version)
MFC after:	2 weeks
Sponsored by:	DARPA
Differential Revision:	https://reviews.freebsd.org/D26378
2020-09-15 16:41:21 +00:00
Andrew Turner
d6aa5fe5eb Use ATTR_DEFAULT in the arm64 locore.S
We can use ATTR_DEFAULT directly in locore.S as it fits within an orr
instruction operand.

Sponsored by:	Innovate UK
2020-09-15 14:15:04 +00:00
Scott Long
74c781ed91 Refine the busdma template interface. Provide tools for filling in fields
that can be extended, but also ensure compile-time type checking.  Refactor
common code out of arch-specific implementations.  Move the mpr and mps
drivers to this new API.  The template type remains visible to the consumer
so that it can be allocated on the stack, but should be considered opaque.
2020-09-14 05:58:12 +00:00
Andrew Turner
15fe2adacb Move the pl061 acpi attachment earlier
As the pl061 driver can be an interrupt controller attach it earlier in the
boot so other drivers can use it.

Use a new GPIO xref to not conflict with the existing root interrupt
controller.

Sponsored by:	Innovate UK
2020-09-10 14:58:46 +00:00
Mitchell Horne
752eb6a995 arm64: export new HWCAP features
Expose some of the new HWCAP features added in r65304. This includes the
addition of elf_hwcap2 into the sysvec, and a separate function to parse
for those features.

This only exposes features which require no further configuration, e.g.
indicating the presence of certain instructions. Larger features (SVE)
will not be advertised until we actually support them. The exact list of
features/extensions this patch exposes is:
  - ARMv8.0-DGH
  - ARMv8.0-SB
  - ARMv8.2-BF16
  - ARMv8.2-DCCVADP
  - ARMv8.2-I8MM
  - ARMv8.4-LRCPC
  - ARMv8.5-CondM
  - ARMv8.5-FRINT
  - ARMv8.5-RNG
  - PSTATE.SSBS

While here, annotate elf_hwcap and elf_hwcap2 as __read_frequently, and
move the declarations to the machine/md_var.h header.

Submitted by:	mikael@ (D22314 portion)
MFC after:	2 weeks
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D26031
Differential Revision:	https://reviews.freebsd.org/D22314
2020-09-08 15:36:38 +00:00
Mitchell Horne
d81d009c6c arm64: fix incorrect HWCAP definitions
FreeBSD exports CPU features as bits in the AT_HWCAP and AT_HWCAP2
vectors via elf_aux_info(3). This interface is similar to getauxval(3)
on Linux, and for simplicity to consumers we try to maintain an
identical set of feature flags on arm64.

The first batch of AT_HWCAP flags were added in r350166, corresponding
to definitions that already existed in Linux. Unfortunately, one flag
was missed, and a portion of the values are shifted one bit to the right
as a result.

Add the missing definition for HWCAP_ASIMDHP, and adjust the affected
values to match their Linux counterparts.

Although this is an ABI-breaking change, there is no plan to provide
compat code for old binaries. An audit of our ports tree and other
software via Debian code search indicates that there are not yet any
consumers of this interface for FreeBSD/arm64.

Bump __FreeBSD_version to be on the safe side, in case compat code needs
to be added in the future.

Reviewed by:	emaste, manu
MFC after:	2 weeks
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D26329
2020-09-08 15:08:20 +00:00
Andrew Turner
1fc1a22868 Add a GPIO driver for the Arm pl061 controller
A PL061 is a simple 8 pin GPIO controller. This GPIO device is used to
signal an internal request for shutdown on some virtual machines including
Arm-based Amazon EC2 instances.

Submitted by:	Ali Saidi <alisaidi_amazon.com> (previouss version)
Reviewed by:	Ali Saidi, manu
Differential Revision:	https://reviews.freebsd.org/D24065
2020-09-08 11:35:35 +00:00
Andriy Gapon
d9a65ba85b Allwinner USB DRD support (musb_otg)
Allwinner USB DRD is based on the Mentor USB OTG controller, with a
different register layout and a few missing registers.

The code is by Andrew Turner (andrew).

Reviewed by:	hselasky, manu
Obtained from:	andrew
MFC after:	5 weeks
Differential Revision: https://reviews.freebsd.org/D5881
2020-09-07 06:39:00 +00:00
Mitchell Horne
7ea40e1dbf arm64: update the set of HWCAP definitions
This is in sync with what is defined for Linux 5.8. Note that all bits
in HWCAP are exhausted, and HWCAP2 has been added.

This also revealed an error in some of the existing definitions. We are
missing HWCAP_ASIMDHP, and as a result a portion of the HWCAP values are
shifted right by one bit. This will be fixed in an upcoming change, but
the values being added now are compatible with what Linux defines.

Reviewed by:	emaste, markj, manu
MFC after:	1 week
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D26030
2020-09-03 17:07:58 +00:00
Andrew Turner
857ab36fc2 Switch to an empty ttbr0 pagetable when the MMU is enabled
We don't need these pagetables after the early boot. Remove the chance we
write to memory we didn't expect to and remove architectural undefined
behaviour.

Reviewed by:	alc (earlier version), mmel
Sponsored by:	Innovate UK
Differential Revision:	https://reviews.freebsd.org/D22606
2020-09-03 10:11:12 +00:00
Mark Johnston
847ab36bf2 Include the psind in data returned by mincore(2).
Currently we use a single bit to indicate whether the virtual page is
part of a superpage.  To support a forthcoming implementation of
non-transparent 1GB superpages, it is useful to provide more detailed
information about large page sizes.

The change converts MINCORE_SUPER into a mask for MINCORE_PSIND(psind)
values, indicating a mapping of size psind, where psind is an index into
the pagesizes array returned by getpagesizes(3), which in turn comes
from the hw.pagesizes sysctl.  MINCORE_PSIND(1) is equal to the old
value of MINCORE_SUPER.

For now, two bits are used to record the page size, permitting values
of MAXPAGESIZES up to 4.

Reviewed by:	alc, kib
Sponsored by:	Juniper Networks, Inc.
Sponsored by:	Klara, Inc.
Differential Revision:	https://reviews.freebsd.org/D26238
2020-09-02 18:16:43 +00:00
Mark Johnston
2d838cd867 Add the MEM_EXTRACT_PADDR ioctl to /dev/mem.
This allows privileged userspace processes to find information about the
physical page backing a given mapping.  It is useful in applications
such as DPDK which perform some of their own memory management.

Reviewed by:	kib, jhb (previous version)
MFC after:	2 weeks
Sponsored by:	Juniper Networks, Inc.
Sponsored by:	Klara Inc.
Differential Revision:	https://reviews.freebsd.org/D26237
2020-09-02 18:12:47 +00:00
Andrew Turner
b148010b6a Partially revert r365069.
This whitespace was intentionally added to help differentiate the different
register groups within this file.

While here add missing whitespace from earlier in the file,

Sponsored by:	Innovate UK
2020-09-02 09:04:08 +00:00
Mateusz Guzik
50cedfede3 arm64: clean up empty lines in .c and .h files 2020-09-01 21:18:06 +00:00
Andrew Turner
a48cf24742 Ensure the tlbi has completed before setting SCTLR
When enabling the MMU on arm64 we need to ensure the tlb invalidation has
completed before setting the enable bit in the SCTLR register.

Reported by:	alc
Sponsored by:	Innovate UK
2020-09-01 14:50:43 +00:00
Andrew Turner
21f81763b3 Support stage 2 arm64 pmap in more places
Add support for stage 2 pmap to pmap_pte_dirty, pmap_release, and more
of pmap_enter. This adds support in all placess I have hit while testing
bhyve ehile faulting pages in as needed.

Sponsored by:	Innovate UK
Differential Revision:	https://reviews.freebsd.org/D26065
2020-09-01 11:02:43 +00:00
Matt Macy
6dfd7f4bc9 ZFS: add to arm64 NOTES to minimize potential for missing symbols 2020-08-28 19:02:05 +00:00
D Scott Phillips
d4d2928a3f arm64: Increase dmap size to 95 TiB
The Ampere Altra has physical memory populated sparsely within the
physical address space. Increase the size of the dmap to cover all
physical memory.

Reviewed by:	andrew
Approved by:	scottl (implicit)
MFC after:	1 week
Sponsored by:	Ampere Computing, Inc.
Differential Revision:	https://reviews.freebsd.org/D26134
2020-08-26 02:13:27 +00:00
D Scott Phillips
dd6fd1d430 arm64/acpi: Give the real PA limit to ACPI
Read PA bits from ID_AA64MMFR0_EL1.PARange.

Reviewed by:	andrew, markj
Approved by:	scottl (implicit)
MFC after:	1 week
Sponsored by:	Ampere Computing, Inc.
Differential Revision:	https://reviews.freebsd.org/D26133
2020-08-26 02:12:15 +00:00
D Scott Phillips
b71d94209e arm64: Make local stores observable before sending IPIs
Add a synchronizing instruction to flush and wait until the local
CPU's writes are observable to other CPUs before sending IPIs.

This fixes an issue where recipient CPUs doing a rendezvous could
enter the rendezvous handling code before the initiator's writes
to the smp_rv_* variables were visible. This manifested as a
system hang, where a single CPU's increment of smp_rv_waiters[0]
actually happened "before" the initiator's zeroing of that field,
so all CPUs were stuck with the field appearing to be at
ncpus - 1.

Reviewed by:	andrew, markj
Approved by:	scottl (implicit)
MFC after:	1 week
Sponsored by:	Ampere Computing, Inc.
Differential Revision:	https://reviews.freebsd.org/D25798
2020-08-26 02:04:04 +00:00
Konstantin Belousov
0cad2aa2dd Pass pointers to info parsed from notes, to brandinfo->header_supported filter.
Currently, we parse notes for the values of ELF FreeBSD feature flags
and osrel.  Knowing these values, or knowing that image does not carry
the note if pointers are NULL, is useful to decide which ABI variant
(brand) we want to activate for the image.

Right now this is only a plumbing change

Tested by:	pho
Sponsored by:	The FreeBSD Foundation
Differential revision:	https://reviews.freebsd.org/D25273
2020-08-23 20:06:55 +00:00
Konstantin Belousov
e3cf75826d Style. 2020-08-23 20:05:35 +00:00
Ed Maste
c078c3fd69 acpi_iort: fix mapping end calculation
According to the ARM Design Document "IO Remapping Table Platform"
(DEN 0049D), the "Number of IDs" field of the ID mapping format means
"The number of IDs in the range minus one".

Submitted by:	Greg V <greg@unrelenting.technology>
Reviewed by:	andrew
Differential Revision:	https://reviews.freebsd.org/D25179
2020-08-22 14:39:14 +00:00
Mark Johnston
ee4df38d02 Remove an unused parameter from map_table().
MFC after:	1 week
Sponsored by:	The FreeBSD Foundation
2020-08-20 00:38:32 +00:00
Alexander Motin
8f6355b51d Remove some noisy ACPI tables messages from verbose dmesg.
Those messages were printed hundreds of times during boot, often multiple
times for each table.  We already print information about the tables in
more organized form once to not duplicate it when random ACPI drivers are
attaching.

MFC after:	1 week
2020-08-19 16:09:36 +00:00
Mateusz Guzik
a125ed50a6 linux: add sysctl compat.linux.use_emul_path
This is a step towards facilitating jails with only Linux binaries.
Supporting emul_path adds path lookups which are completely spurious
if the binary at hand runs in a Linux-based root directory.

It defaults to on (== current behavior).

make -C /root/linux-5.3-rc8 -s -j 1 bzImage:

use_emul_path=1: 101.65s user 68.68s system 100% cpu 2:49.62 total
use_emul_path=0: 101.41s user 64.32s system 100% cpu 2:45.02 total
2020-08-18 22:04:22 +00:00
Mateusz Guzik
d5e3895ea4 linux: consistently use LFREEPATH instead of open-coding it 2020-08-18 22:03:55 +00:00
Mitchell Horne
3d89a9759f arm64: parse HWCAP values using user_cpu_desc
The hard work of parsing fields per-CPU, handling heterogeneous
features, and excluding features from userspace is already done by
update_special_regs. We can build our set of HWCAPs from the result.

This exposed a small bug in update_special_regs, in which the
generated bitmask was not wide enough, and as a result some bits
weren't being exposed in user_cpu_desc. Fix this.

While here, adjust some formatting.

Reviewed by:	andrew
MFC after:	2 weeks
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D26069
2020-08-15 15:06:39 +00:00
Mitchell Horne
6194973636 arm64: update instruction set attribute register definitions
This adds definitions for the latest additions to the AA64ISAR[01] ID
registers. This brings these registers in sync with ARMv8.6 initial spec
release.

An future change will parse many of these fields for HWCAP features.

Reviewed by:	andrew, manu, markj (all previous versions)
MFC after:	2 weeks
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D26029
2020-08-15 14:57:53 +00:00
Andrew Turner
da11e1f9ee Add support for Cortex-A76/Neoverse-N1 to hwpmc
This adds support for the Cortex-A76 and Neoverse-N1 PMU counters to pmc.

While here add more PMCR_IDCODE values and check the implementers code is
correct before setting the PMU type.

Reviewed by:	bz, emaste (looks reasonable to me)
Sponsored by:	Innovate UK
Differential Revision:	https://reviews.freebsd.org/D25959
2020-08-12 10:17:17 +00:00
Oleksandr Tymoshenko
824cfb4729 Improve Rockchip's integration of if_dwc
- Do not rely on U-Boot for clocks configuration, enable and set frequencies
    in the driver's attach method.
- Adjust MAC settings according to detected linespeed on RK3399 and RK3328.
- Add support for RMII PHY mode on RK3328.

Reviewed by:	manu
Differential Revision:	https://reviews.freebsd.org/D26006
2020-08-10 19:37:06 +00:00
Mateusz Guzik
0ef3c62577 arm64: fix uintfptr_t
Fixes compilation after r363932
2020-08-05 22:09:57 +00:00
Oleksandr Tymoshenko
5414a8285f Add clocks for ethernet controllers on RK3328
Reviewed by:	manu
Differential Revision:	https://reviews.freebsd.org/D25918
2020-08-05 18:22:24 +00:00
Oleksandr Tymoshenko
ff06230e67 Add flag for SYSCON-controlled clocks on Rockhip platform
Ethernet clocks on RK3328 are controlled by SYSCON registers, so add
RK_CLK_COMPOSITE_GRF flag to indicate that clock node should access grf
registers instead of CRU's

Reviewed by:	manu
Differential Revision:	https://reviews.freebsd.org/D25918
2020-08-05 18:21:22 +00:00
Andrew Turner
c085d2ea97 Add DDB_CTF to the arm64 and riscv kernel configs
This allows DTrace fbt probes to find arguments.

Sponsored by:	Innovate UK
2020-08-05 11:54:51 +00:00
Alexander Motin
855e49f3b0 Add initial driver for ACPI Platform Error Interfaces.
APEI allows platform to report different kinds of errors to OS in several
ways.  We've found that Supermicro X10/X11 motherboards report PCIe errors
appearing on hot-unplug via this interface using NMI.  Without respective
driver it ended up in kernel panic without any additional information.

This driver introduces support for the APEI Generic Hardware Error Source
reporting via NMI, SCI or polling.  It decodes the reported errors and
either pass them to pci(4) for processing or just logs otherwise.  Errors
marked as fatal still end up in kernel panic, but some more informative.

When somebody get to native PCIe AER support implementation both of the
reporting mechanisms should get common error recovery code.  Since in our
case errors happen when the device is already gone, there is nothing to
recover, so the code just clears the error statuses, practically ignoring
the otherwise destructive NMIs in nicer way.

MFC after:	2 weeks
Relnotes:	yes
Sponsored by:	iXsystems, Inc.
2020-07-27 21:19:41 +00:00
Alex Richardson
b798ef6490 Include TMPFS in all the GENERIC kernel configs
Being able to use tmpfs without kernel modules is very useful when building
small MFS_ROOT kernels without a real file system.
Including TMPFS also matches arm/GENERIC and the MIPS std.MALTA configs.

Compiling TMPFS only adds 4 .c files so this should not make much of a
difference to NO_MODULES build times (as we do for our minimal RISC-V
images).

Reviewed By: br (earlier version for riscv), brooks, emaste
Differential Revision: https://reviews.freebsd.org/D25317
2020-07-24 08:40:04 +00:00
John Baldwin
d7d14db9c5 Set si_trapno to the exception code from esr.
Reviewed by:	kib
Sponsored by:	DARPA
Differential Revision:	https://reviews.freebsd.org/D25771
2020-07-23 21:40:03 +00:00
John Baldwin
a1119d08b9 Add missing space after switch.
Reviewed by:	br, emaste
Sponsored by:	DARPA
Differential Revision:	https://reviews.freebsd.org/D25778
2020-07-22 22:51:14 +00:00
Edward Tomasz Napierala
3e9a214260 Regen after r363304.
MFC after:	2 weeks
Sponsored by:	The FreeBSD Foundation
2020-07-18 11:31:31 +00:00
Edward Tomasz Napierala
8d1d017175 Add a trivial linux(4) splice(2) implementation, which simply
returns EINVAL.  Fixes grep (grep-3.1-2build1).

PR:		kern/218699
Reported by:	avos
Reviewed by:	emaste
MFC after:	2 weeks
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D25636
2020-07-18 11:28:40 +00:00
Ruslan Bukin
f3856e6881 Add acpi_iort_map_pci_smmuv3().
This new function allows us to find the SMMU instance assigned
for a particular PCI RID.

Reviewed by:	andrew
Sponsored by:	DARPA, AFRL
Differential Revision:	https://reviews.freebsd.org/D25687
2020-07-17 14:51:51 +00:00
Mark Johnston
e64080e79c Switch from SCTP to SCTP_SUPPORT in GENERIC configs.
This removes SCTP from in-tree kernel configuration files.  Now, SCTP
can be enabled by simply loading the module, as discussed on
freebsd-net@.

Reviewed by:	tuexen
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D25611
2020-07-16 15:09:04 +00:00
Andrew Turner
a7f1b0cac9 Print the arm64 registers in more exception handling panics
It can be useful to get a dump of all registers when investigating why we
received an exception that we are unable to handle. In these cases we
already call panic, however we don't always print the registers.

Add calls to print_registers and print esr and far when applicable.

Sponsored by:	Innovate UK
2020-07-14 18:50:48 +00:00
Mark Johnston
b356ddf076 Add a driver for the SafeXcel EIP-97.
The EIP-97 is a packet processing module found on the ESPRESSObin.  This
commit adds a crypto(9) driver for the crypto and hash engine in this
device.  An initial skeleton driver that could attach and submit
requests was written by loos and others at Netgate, and the driver was
finished by me.

Support for separate AAD and output buffers will be added in a separate
commit, to simplify merging to stable/12 (where those features don't
exist).

Reviewed by:	gnn, jhb
Feedback from:	andrew, cem, manu
MFC after:	1 week
Sponsored by:	Rubicon Communications, LLC (Netgate)
Differential Revision:	https://reviews.freebsd.org/D25417
2020-07-14 14:09:29 +00:00
Mark Johnston
329d975c0c Print arm64 physmem info during boot.
PR:		243682
Reviewed by:	andrew, emaste
MFC after:	1 week
Event:		July 2020 Bugathon
Differential Revision:	https://reviews.freebsd.org/D25625
2020-07-13 17:05:44 +00:00
Andrew Turner
fcf7a48191 Rerun kernel ifunc resolvers after all CPUs have started
On architectures that use RELA relocations it is safe to rerun the ifunc
resolvers on after all CPUs have started, but while they are sill parked.

On arm64 with big.LITTLE this is needed as some SoCs have shipped with
different ID register values the big and little clusters meaning we were
unable to rely on the register values from the boot CPU.

Add support for rerunning the resolvers on arm64 and amd64 as these are
both RELA using architectures.

Reviewed by:	kib
Sponsored by:	Innovate UK
Differential Revision:	https://reviews.freebsd.org/D25455
2020-07-05 14:38:22 +00:00
Andrew Turner
e4fc3b653a Read the CPU 0 arm64 ID registers early in initarm
We also update the kernel view early in the boot. This will allow the
use of the common kernel view in ifunc resolvers.

Sponsored by:	Innovate UK
2020-07-01 16:57:57 +00:00
Andrew Turner
eeada9221b Move ID reading signatures to a better header
The functions to read the common user and kernel ID registers should be
in cpu.h rather than undefined.h as they are related to CPU details and
used by undefined instruction handlers.

Sponsored by:	Innovate UK
2020-07-01 16:17:51 +00:00
Andrew Turner
9eb07d5627 Read the arm64 ID registers earlier in the boot process.
Also move parsing the registers to just after the secondary CPUs have
started. This means the kernel register view from all CPUs is available
after the CPU SYSINITs have finished, e.g. for use by ifunc resolvers.

Sponsored by:	Innovate UK
Differential Revision:	https://reviews.freebsd.org/D25505
2020-07-01 15:17:45 +00:00
Oleksandr Tymoshenko
94bc2117b4 Add i.MX 8M Quad support
- Add CCM driver and clocks implementations for i.MX 8M
- Add GPC driver for iMX8
- Add clock tree for i.MX 8M Quad
- Add clocks support and new compat strings (where required) for existing i.MX 6 UART, I2C, and GPIO drivers
- Enable aarch64-compatible drivers form i.MX 6 in arm64 GENERIC kernel config
- Add dtb/imx8 kernel module with DTBs for Nitrogen8M and iMX8MQ EVK

With this patch both Nitrogen8M and iMX8MQ EVK boot with NFS root up to multiuser login prompt

Reviewed by:	manu
Differential Revision:	https://reviews.freebsd.org/D25274
2020-07-01 00:33:16 +00:00
Ruslan Bukin
1ea7952510 Coresight: provide device_attach method for FDT bus.
Sponsored by:	DARPA, AFRL
2020-06-29 12:59:09 +00:00
Andrew Turner
b639b3b195 Fix the spelling of identify in the arm64 identcpu code
Sponsored by:	Innovate UK
2020-06-29 09:37:07 +00:00
Andrew Turner
45e999d918 Create a kernel arm64 ID register view
In preparation for using ifuncs in the kernel is is useful to have a common
view of the arm64 ID registers across all CPUs. Add this and extract the
logic for finding the lower value of two fields to a new helper function.

Sponsored by:	Innovate UK
Differential Revision:	https://reviews.freebsd.org/D25463
2020-06-29 09:08:36 +00:00
Kyle Evans
5403f186a7 linuxolator: implement memfd_create syscall
This effectively mirrors our libc implementation, but with minor fudging --
name needs to be copied in from userspace, so we just copy it straight into
stack-allocated memfd_name into the correct position rather than allocating
memory that needs to be cleaned up.

The sealing-related fcntl(2) commands, F_GET_SEALS and F_ADD_SEALS, have
also been implemented now that we support them.

Note that this implementation is still not quite at feature parity w.r.t.
the actual Linux version; some caveats, from my foggy memory:

- Need to implement SHM_GROW_ON_WRITE, default for memfd (in progress)
- LTP wants the memfd name exposed to fdescfs
- Linux allows open() of an fdescfs fd with O_TRUNC to truncate after dup.
  (?)

Interested parties can install and run LTP from ports (devel/linux-ltp) to
confirm any fixes.

PR:		240874
Reviewed by:	kib, trasz
Differential Revision:	https://reviews.freebsd.org/D21845
2020-06-29 03:09:14 +00:00
Oleksandr Tymoshenko
4c95d46303 Configure rx_delay/tx_delay values for RK3399/RK3328 GMAC
For 1000Mb mode to work reliably TX/RX delays need to be configured
between the TX/RX clock and the respective signals on the PHY
to compensate for differing trace lengths on the PCB.

Reviewed by:	manu
MFC after:	1 week
2020-06-28 21:11:10 +00:00
Andrew Turner
23e42a83c1 Use EFI memory map to determine attributes for Acpi mappings on arm64.
AcpiOsMapMemory is used for device memory when e.g. an _INI method wants
to access physical memory, however, aarch64 pmap_mapbios is hardcoded to
writeback. Search for the correct memory type to use in pmap_mapbios.

Submitted by:	Greg V <greg_unrelenting.technology>
Differential Revision:	https://reviews.freebsd.org/D25201
2020-06-28 15:03:07 +00:00
Edward Tomasz Napierala
a39cdcd7e7 Regen.
MFC after:	2 weeks
Sponsored by:	The FreeBSD Foundation
2020-06-27 14:43:29 +00:00
Edward Tomasz Napierala
308e194cbf Add proper types for linux message queue syscalls; mostly taken
from 32-bit Linuxulator.

MFC after:	2 weeks
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D25386
2020-06-27 14:42:08 +00:00
Edward Tomasz Napierala
36507f85dc Add syscall definitions for linux xattr syscalls.
MFC after:	2 weeks
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D25387
2020-06-27 14:39:44 +00:00
Edward Tomasz Napierala
8036e7876d Adjust types of linuxulator syscalls, to match include/linux/syscalls.h
in vanilla Linux git tree.

Reviewed by:	markj
MFC after:	2 weeks
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D25385
2020-06-27 14:37:36 +00:00
Ed Maste
e46cf959d6 arm64 armreg.h: fix TCR_TBI1 definition
Submitted by:	Greg V <greg@unrelenting.technology>
Differential Revision:	https://reviews.freebsd.org/D25411
2020-06-23 15:32:05 +00:00
Brandon Bergren
40b664f64b [PowerPC] More relocation fixes
It turns out relocating the symbol table itself can cause issues, like fbt
crashing because it applies the offsets to the kernel twice.

This had been previously brought up in rS333447 when the stoffs hack was
added, but I had been unaware of this and reimplemented symtab relocation.

Instead of relocating the symbol table, keep track of the relocation base
in ddb, so the ddb symbols behave like the kernel linker-provided symbols.

This is intended to be NFC on platforms other than PowerPC, which do not
use fully relocatable kernels. (The relbase will always be 0)

 * Remove the rest of the stoffs hack.
 * Remove my half-baked displace_symbol_table() function.
 * Extend ddb initialization to cope with having a relocation offset on the
   kernel symbol table.
 * Fix my kernel-as-initrd hack to work with booke64 by using a temporary
   mapping to access the data.
 * Fix another instance of __powerpc__ that is actually RELOCATABLE_KERNEL.
 * Change the behavior or X_db_symbol_values to apply the relocation base
   when updating valp, to match link_elf_symbol_values() behavior.

Reviewed by:	jhibbits
Sponsored by:	Tag1 Consulting, Inc.
Differential Revision:	https://reviews.freebsd.org/D25223
2020-06-21 03:39:26 +00:00
Edward Tomasz Napierala
bafd96b8dd Regen after r362440.
MFC after:	2 weeks
Sponsored by:	The FreeBSD Foundation
2020-06-20 18:31:02 +00:00
Edward Tomasz Napierala
52c81be11a Add linux_madvise(2) instead of having Linux apps call the native
FreeBSD madvise(2) directly.  While some of the flag values match,
most don't.

PR:		kern/230160
Reported by:	markj
Reviewed by:	markj
Discussed with:	brooks, kib
MFC after:	2 weeks
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D25272
2020-06-20 18:29:22 +00:00
Michal Meloun
188aee740f Finish renaming in if_dwc.
By using DWC TRM terminology, normal descriptor format should be named
extended and alternate descriptor format should be named normal.

Should not been functional change.

MFC after:	4 weeks
2020-06-19 18:34:27 +00:00
Michal Meloun
a67687fcd8 Use native-sized accesses when accessing memory from kdb.
Not all MMIO mapped devices supports byte access.

MFC after:	4 weeks
2020-06-19 16:26:42 +00:00
Mike Karels
349eddbd07 Add support for bcm54213PE in brgphy.
This chip is used in the Rasperry Pi 4, and is supported by the if_genet
driver. Currently we use the ukphy mii driver, this patch switches over
to the brgphy mii driver instead. To support the rgmii-rxid phy mode,
which is now the default in the Linux dtb, we add support for clock
skewing.

These changes are taken from OpenBSD and NetBSD, except for the bailout
in brgphy_bcm54xx_clock_delay() in rgmii mode, which was found necessary
after testing.

Submitted by:	Robert Crowston, crowston at protomail.com
Differential Revision:	https://reviews.freebsd.org/D25251
2020-06-18 23:57:10 +00:00
Andrew Turner
3a6413d81e Support pmap_extract_and_hold on arm64 stage 2 mappings
Sponsored by:	Innovate UK
Differential Revision:	https://reviews.freebsd.org/D24469
2020-06-17 19:45:05 +00:00
Ruslan Bukin
c9ea007c3b Complete the ACPI support for ARM Coresight:
o Parse the ACPI DSD (Device Specific Data) graph property and record
  device connections.
o Split-out FDT support to a separate file.
o Get the corresponding (FDT/ACPI) Coresight platform data in
  the device drivers.

Sponsored by:	DARPA, AFRL
2020-06-17 15:54:51 +00:00
Andrew Turner
f3e9395d0c Add all the TCR_EL1 fields
These will be used when adding support for new Armv8 extensions.

Sponsored by:	Innovate UK
2020-06-17 11:56:10 +00:00
Ruslan Bukin
72842e4697 Coresight replicator:
o Add a header file;
o Split-out FDT attachment to a separate file;
o Add ACPI attachment.

Sponsored by:	DARPA, AFRL
2020-06-12 17:31:38 +00:00
Ruslan Bukin
a132ec9f8a ARM Coresight Trace Memory Controller (TMC):
o Split-out FDT attachment to a separate file;
o Add ACPI attachment.

Sponsored by:	DARPA, AFRL
2020-06-12 13:59:58 +00:00
Andrew Turner
400c0119a7 Teach the arm64 vfp.h about struct thread.
Ensure struct thread is defined in vfp.h. In some cases it is not and stops
the kernel from building.

Sponsored by:	Innovate UK
2020-06-12 10:43:21 +00:00
Ruslan Bukin
d06110e566 Shorten the filename of the coresight replicator driver.
Sponsored by:	DARPA, AFRL
2020-06-11 21:52:06 +00:00
Ruslan Bukin
5637d889e3 ARM Coresight Funnel device:
o Split-out FDT attachment to a separate file;
o Add ACPI attachment;
o Add support for the Static Funnel device.

Sponsored by:	DARPA, AFRL
2020-06-10 14:28:36 +00:00
Ruslan Bukin
b6f7bae402 ARM Embedded Trace Macrocell v4.x driver:
o Split-out FDT attachment to a separate file;
o Add ACPI attachment.

Sponsored by:	DARPA, AFRL
2020-06-09 16:43:16 +00:00
Ruslan Bukin
b65c190c40 Fix style: wrap long lines.
Sponsored by:	DARPA, AFRL
2020-06-09 16:06:10 +00:00
Ruslan Bukin
b1670691e8 Rename coresight drivers: use underscores in filenames.
Sponsored by:	DARPA, AFRL
2020-06-09 15:56:41 +00:00
Mitchell Horne
cd9207569f Remove remnant of arm's ELF trampoline
The trampoline code used for loading gzipped a.out kernels on arm was
removed in r350436. A portion of this code allowed for DDB to find the
symbol tables when booting without loader(8), and some of this was
untouched in the removal. Remove it now.

Differential Revision:	https://reviews.freebsd.org/D24950
2020-05-31 14:43:04 +00:00
Mike Karels
51cefda170 genet: workaround for problem with ICMPv6 echo replies
The ICMPv6 echo reply is constructed with the IPv6 header too close to
the beginning of a packet for an Ethernet header to be prepended, so we
end up with an mbuf containing just the Ethernet header.  The GENET
controller doesn't seem to handle this, with or without transmit checksum
offload.  At least until we have chip documentation, do a pullup to
satisfy the chip.  Hopefully this can be fixed properly in the future.
2020-05-30 02:09:36 +00:00
Mike Karels
0add2a5229 genet: fix issues with transmit checksum offload
Fix problem with ICMP echo replies: check only deferred data checksum
flags, and not the received checksum status bits, when checking whether
a packet has a deferred checksum; otherwise echo replies are corrupted
because the received checksum status bits are still present.

Fix some unhandled cases in packet shuffling for checksum offload.
2020-05-30 02:02:34 +00:00
Andrew Turner
2cb0e95f48 Support creating and using arm64 pmap at stage 2
Add minimal support for creating stage 2 IPA -> PA mappings. For this we
need to:

 - Create a new vmid set to allocate a vmid for each Virtual Machine
 - Add the missing stage 2 attributes
 - Use these in pmap_enter to create a new mapping
 - Handle stage 2 faults

The vmid set is based on the current asid set that was generalised in
r358328. It adds a function pointer for bhyve to use when the kernel needs
to reset the vmid set. This will need to call into EL2 and invalidate the
TLB.

The stage 2 attributes have been added. To simplify setting these fields
two new functions are added to get the memory type and protection fields.
These are slightly different on stage 1 and stage 2 tables. We then use
them in pmap_enter to set the new level 3 entry to be stored.

The D-cache on all entries is cleaned to the point of coherency. This is
to allow the data to be visible to the VM. To allow for userspace to load
code when creating a new executable entry an invalid entry is created. When
the VM tried to use it the I-cache is invalidated. As the D-cache has
already been cleaned this will ensure the I-cache is synchronised with the
D-cache.

When the hardware implements a VPIPT I-cache we need to either have the
correct VMID set or invalidate it from EL2. As the host kernel will have
the wrong VMID set we need to call into EL2 to clean it. For this a second
function pointer is added that is called when this invalidation is needed.

Sponsored by:	Innovate UK
Differential Revision:	https://reviews.freebsd.org/D23875
2020-05-27 08:00:38 +00:00
Eric Joyner
71d104536b ice(4): Introduce new driver for Intel E800 Ethernet controllers
The ice(4) driver is the driver for the Intel E8xx series Ethernet
controllers; currently with codenames Columbiaville and
Columbia Park.

These new controllers support 100G speeds, as well as introducing
more queues, better virtualization support, and more offload
capabilities. Future work will enable virtual functions (like
in ixl(4)) and the other functionality outlined above.

For full functionality, the kernel should be compiled with
"device ice_ddp" like in the amd64 NOTES file, and/or
ice_ddp_load="YES" should be added to /boot/loader.conf so that
the DDP package file included in this commit can be downloaded
to the adapter. Otherwise, the adapter will fall back to a single
queue mode with limited functionality.

A man page for this driver will be forthcoming.

MFC after:	1 month
Relnotes:	yes
Sponsored by:	Intel Corporation
Differential Revision:	https://reviews.freebsd.org/D21959
2020-05-26 23:35:10 +00:00
Conrad Meyer
852c303b61 copystr(9): Move to deprecate (attempt #2)
This reapplies logical r360944 and r360946 (reverting r360955), with fixed
copystr() stand-in replacement macro.  Eventually the goal is to convert
consumers and kill the macro, but for a first step it helps if the macro is
correct.

Prior commit message:

Unlike the other copy*() functions, it does not serve to copy from one
address space to another or protect against potential faults.  It's just
an older incarnation of the now-more-common strlcpy().

Add a coccinelle script to tools/ which can be used to mechanically
convert existing instances where replacement with strlcpy is trivial.
In the two cases which matched, fuse_vfsops.c and union_vfsops.c, the
code was further refactored manually to simplify.

Replace the declaration of copystr() in systm.h with a small macro
wrapper around strlcpy (with correction from brooks@ -- thanks).

Remove N redundant MI implementations of copystr.  For MIPS, this
entailed inlining the assembler copystr into the only consumer,
copyinstr, and making the latter a leaf function.

Reviewed by:		jhb (earlier version)
Discussed with:		brooks (thanks!)
Differential Revision:	https://reviews.freebsd.org/D24672
2020-05-25 16:40:48 +00:00
Marcin Wojtas
1e6005d807 Introduce VF610 I2C controller support.
NXP LS1046A contains I2C controller compatible with Vybrid VF610.
Existing Vybrid MVF600 driver can be used to support it. For that purpose
declare driver as ofw_iicbus and add methods associated with ofw_iicbus.

For VF610 add dynamic clock prescaler calculation using clock information
from clock driver and clock frequency requested in device tree.

On the occasion add detach function and add additional error handling
in i2c_attach function.

Submitted by: Dawid Gorecki <dgr@semihalf.com>
Reviewed by: manu
Obtained from: Semihalf
Sponsored by: Alstom Group
Differential Revision: https://reviews.freebsd.org/D24361
2020-05-25 15:21:38 +00:00
Marcin Wojtas
a5dfa67db1 Add GPIO support for QorIQ boards.
This patch adds a GPIO controller support targeted for NXP LS1046A
SoC. The driver implements the following features:
 * setting direction of each pin (IN or OUT)
 * setting the mode of output pins (PUSHPULL or OPENDRAIN)
 * setting the state of each output pin (1 or 0)
 * reading the state of each input pin (1 or 0)

Submitted by: Kamil Koczurek <kek@semihalf.com>
              Dawid Gorecki <dgr@semihalf.com>
Reviewed by: manu
Obtained from: Semihalf
Sponsored by: Alstom Group
Differential Revision: https://reviews.freebsd.org/D24353
2020-05-25 14:55:37 +00:00
Marcin Wojtas
eacff8a248 Add LS1046A clockgen driver.
Driver provides probe and attach functions for LS1046A clockgen and passes
configuration information to QorIQ clockgen class. It may be used as
a reference implementation for different QorIQ clockgen devices.

Submitted by: Dawid Gorecki <dgr@semihalf.com>
Reviewed by: mmel, manu
Obtained from: Semihalf
Sponsored by: Alstom Group
Differential Revision: https://reviews.freebsd.org/D24352
2020-05-25 14:45:18 +00:00
Marcin Wojtas
b8cb0864dc Add QorIQ platform clockgen driver.
This patch adds classes and functions that can be used with various NXP
QorIQ Layerscape SoCs.

As for the clock topology - there is single platform PLL, which supplies
clocks for the peripheral bus and additional PLLs for CPU cores. There
can be multiple core PLLs (For example - LS1046A has two PLLs - CGAPLL1
and CGAPLL2). Each PLL has fixed dividers on output. The core PLLs
are not accessible from dts.

This is a preparation patch for NXP LS1046A SoC support.

Submitted by: Dawid Gorecki <dgr@semihalf.com>
Reviewed by: mmel
Obtained from: Semihalf
Sponsored by: Alstom Group
Differential Revision: https://reviews.freebsd.org/D24351
2020-05-25 14:31:32 +00:00
Andrew Turner
ad020198ff Stop performing a full icache sync when the DIC and IDC flags are set
The DIC and IDC bits in the CTR_EL0 register signal to the kernel when it
can relax the instruction cache synchronisation operations. The IDC bit
means we can relax cleaning the data cache to the point of unification
while the DIC bit means we don't need to invalidate the instruction cache
for data coherence. In both cases an appropriate barrier is still needed.

For now only implement the case where both bits are set, as is the case
on the Neoverse-N1 as used in the Amazon AWS Graviton 2 CPU. Note that
this behaviour is a optional on the N1 so we may later need to implement
only one or the other bit being set.

There is a tunable to disable each flag on boot.

Testing on a 4 core Graviton 2 instance found a significant improvement
in sys and real time when running "make buildkernel -j4", with no
significant difference in user time.

Reviewed by:	markj
Sponsored by:	Innovate UK
Differential Revision:	https://reviews.freebsd.org/D24853
2020-05-19 16:04:27 +00:00
Andrew Turner
13628ada98 Create MSI/MSI-X isrcs as needed in the GICv3 ITS driver
Previously we would create an isrc for each MSI/MSI-X interrupt. This
causes issues for other interrupt sources in the system, e.g. a GPIO
driver, as they may be unable to allocate interrupts. This works around
this by allocating the isrc only when needed.

Reported by:	alisaidi@amazon.com
Reviewed by:	mmel
Sponsored by:	Innovaate UK
Differential Revision:	https://reviews.freebsd.org/D24876
2020-05-19 15:27:20 +00:00
Andrew Turner
fd1f4df2be Remove arm64_idcache_wbinv_range as it's unused.
Sponsored by:	Innovate UK
2020-05-15 13:33:48 +00:00
Mark Johnston
e76aab6ae2 Call acpi_pxm_set_proximity_info() slightly earlier on x86.
This function is responsible for setting pc_domain in each pcpu
structure.  Call it from the main function that starts APs, rather than
a separate SYSINIT.  This makes it easier to close the window where
UMA's per-CPU slab allocator may be called while pc_domain is
uninitialized.  In particular, the allocator uses pc_domain to allocate
domain-local pages, so allocations before this point end up using domain
0 for everything.

Reviewed by:	kib
MFC after:	1 week
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D24757
2020-05-14 16:07:27 +00:00
Andrew Turner
bf610960c6 Fix the name reported when the core supports a 64-bit CCIDX 2020-05-12 21:00:13 +00:00
Conrad Meyer
051fc58cb3 Revert r360944 and r360946 until reported issues can be resolved
Reported by:	cy
2020-05-12 04:34:26 +00:00
Conrad Meyer
580744621f copystr(9): Move to deprecate [2/2]
Unlike the other copy*() functions, it does not serve to copy from one
address space to another or protect against potential faults.  It's just
an older incarnation of the now-more-common strlcpy().

Add a coccinelle script to tools/ which can be used to mechanically
convert existing instances where replacement with strlcpy is trivial.
In the two cases which matched, fuse_vfsops.c and union_vfsops.c, the
code was further refactored manually to simplify.

Replace the declaration of copystr() in systm.h with a small macro
wrapper around strlcpy.

Remove N redundant MI implementations of copystr.  For MIPS, this
entailed inlining the assembler copystr into the only consumer,
copyinstr, and making the latter a leaf function.

Reviewed by:	jhb
Differential Revision:	https://reviews.freebsd.org/D24672
2020-05-11 22:57:21 +00:00
Mark Johnston
1a5b3b5102 Simplify arm64's pmap_bootstrap() a bit.
locore constructs an L2 page mapping the kernel and preloaded data
starting a KERNBASE (the same as VM_MIN_KERNEL_ADDRESS on arm64).
initarm() and pmap_bootstrap() use the preloaded metadata to
tell it where it can start allocating from.

pmap_bootstrap() currently iterates over the L2 page to find the last
valid entry, but doesn't do anything with the result.  Remove the loop
and zap some now-unused local variables.

MFC after:	2 weeks
Sponsored by:	Juniper Networks, Klara Inc.
Differential Revision:	https://reviews.freebsd.org/D24559
2020-05-06 15:01:06 +00:00
Michal Meloun
015f223e0b Export tracing facility of GIC500 ITS block.
Possibility of tracing of processing message based interrupts is very
useful for debugging of PCIe driver, mainly for its MSI part.

MFC after: 1 week
2020-04-29 14:31:25 +00:00
Michal Meloun
726122cfda Don't try to re-initialize already preseted regulator.
Don't set initial voltage for regulators having their voltage already
in allowed range. As side effect of this change, we don't try to set
initial voltage for fixed voltage regulators - these don't have impemented
voltage set  method so their initialization has always failed.

MFC after:	3 weeks
2020-04-29 13:45:21 +00:00
Michal Meloun
4c291cb857 Multiple fixes for rockchip iodomain driver:
- always initialize selector of voltage signaling standard.
  Various versions of U-boot leaves voltage signaling standard settings
  for PMUIO2 domain in different state.  Always initialize it
  into expected state.
- start the driver as early as possible, the IO domains should be
  initialized before other drivers are attached.
- rename RK3399 register to its name founds in TRM.

This is the second part of fixes for serial port corruption observed after
DT 5.6 import.

Reviewed by:	manu
MFC after:	1 week
2020-04-29 13:43:15 +00:00
Emmanuel Vadot
1dc1adf0a4 arm64: rockchip: rk805: Use a tailq for the attached regulator
Store the attached regulator in a tailq to later find them in ofw_map.
While here, do not attempt to attach a regulator without a name, a node
might exists but if it doesn't have a name the regulator is unused.

MFC after:	1 month
2020-04-25 15:34:48 +00:00
Michal Meloun
a3fc40936a Reorder initialization steps for given pin.
If pin is switched from fixed function to GPIO, it should have prepared
direction, pull-up/down and default value before function gets switched.
Otherwise we may produce unwanted glitch on output pin.
Right order of drive strength settings is questionable, but I think that
is slightly safer to do it also before function switch.

This fixes serial port corruption observed after DT 5.6 import.

MFC after:	1 week
2020-04-25 09:17:49 +00:00
Mark Johnston
b6fd3860b5 Fix handling of 1GB mappings in the arm64 minidump code.
For such mappings we need to dump 512 page table pages, not one, and
they need to be included in the pmap size recorded in the minidump
header.

MFC after:	2 weeks
Sponsored by:	Juniper Networks, Klara Inc.
2020-04-24 18:47:57 +00:00
Mark Johnston
1d6638472b Remove an obsolete TODO comment from several minidump implementations.
The comment referenced a non-existent function, and these minidump
implementations already buffer discontiguous physical data pages by
mapping them into a single VA range that gets passed to the dump device,
so there is no real advantage in batching calls to blk_write().

The RISC-V and MIPS minidump implementations still write a page at a
time and so would benefit from some form of batching.

MFC after:	2 weeks
Sponsored by:	Juniper Networks, Klara Inc.
2020-04-24 18:47:42 +00:00
Emmanuel Vadot
fb0d255111 arm64: rockchip: Fix TSADC on RK3328
The TSADC familiy is a little bit more complex than V2 and V3.
Early revision do not use syscon and do not use qsel (RK3288).
Next revision still do not use syscon but uses qsel (RK3328).
Final revision use both.

Submitted by:	peterj
MFC after:	1 month
2020-04-23 19:16:20 +00:00
Mike Karels
2cd0c52978 Add genet driver for Raspberry Pi 4B Ethernet
Add driver for Broadcom "GENET" version 5, as found in BCM-2711 on
Raspberry Pi 4B. The driver is derived in part from the bcmgenet.c
driver in NetBSD, along with bcmgenetreg.h.

Reviewed by:	manu
Obtained from:	in part from NetBSD
Relnotes:	yes, note addition
Differential Revision:	https://reviews.freebsd.org/D24436
2020-04-22 00:42:10 +00:00
Mitchell Horne
49439183ce Convert arm's physmem interface to MI code
The arm_physmem interface found in arm's MD code provides a convenient
set of routines for adding/excluding physical memory regions and
initializing important kernel globals such as Maxmem, realmem,
phys_avail[], and dump_avail[]. It is especially convenient for FDT
systems, since we can use FDT parsing functions and pass the result
directly to one of these physmem routines. This interface is already in
use on arm and arm64, and can be used to simplify this early
initialization on RISC-V as well.

This requires only a couple trivial changes:
  - Move arm_physmem_kernel_addr to arm/machdep.c. It is unused on arm64,
    and manipulated entirely in arm MD code.
  - Convert arm32_btop/arm64_btop to atop. This is equivalently defined
    on all architectures.
  - Drop the "arm" prefix.

Reviewed by:	manu, emaste ("looks reasonable")
MFC after:	2 weeks
Differential Revision:	https://reviews.freebsd.org/D24153
2020-04-19 00:12:30 +00:00