Three copies of the linuxulator linux_sysvec.c contained identical
BSD to Linux errno translation tables, and future work to support other
architectures will also use the same table. Move the table to a common
file to be used by all. Make it 'const int' to place it in .rodata.
(Some existing Linux architectures use MD errno values, but x86 and Arm
share the generic set.)
This change should introduce no functional change; a followup will add
missing errno values.
MFC after: 3 weeks
Sponsored by: Turing Robotic Industries Inc.
Differential Revision: https://reviews.freebsd.org/D14665
Two copies of chacha20 were imported into the tree on Apr 15 2017 (r316982)
and Apr 16 2017 (r317015). Only the latter is actually used by anything, so
just go ahead and garbage collect the unused version while it's still only
in CURRENT.
I'm not making any judgement on which implementation is better. If I pulled
the wrong one, feel free to swap the existing implementation out and replace
it with the other code (conforming to the API that actually gets used in
randomdev, of course). We only need one generic implementation.
Sponsored by: Dell EMC Isilon
The TOE engine in Chelsio T6 adapters supports offloading of TLS
encryption and TCP segmentation for offloaded connections. Sockets
using TLS are required to use a set of custom socket options to upload
RX and TX keys to the NIC and to enable RX processing. Currently
these socket options are implemented as TCP options in the vendor
specific range. A patched OpenSSL library will be made available in a
port / package for use with the TLS TOE support.
TOE sockets can either offload both transmit and reception of TLS
records or just transmit. TLS offload (both RX and TX) is enabled by
setting the dev.t6nex.<x>.tls sysctl to 1 and requires TOE to be
enabled on the relevant interface. Transmit offload can be used on
any "normal" or TLS TOE socket by using the custom socket option to
program a transmit key. This permits most TOE sockets to
transparently offload TLS when applications use a patched SSL library
(e.g. using LD_LIBRARY_PATH to request use of a patched OpenSSL
library). Receive offload can only be used with TOE sockets using the
TLS mode. The dev.t6nex.0.toe.tls_rx_ports sysctl can be set to a
list of TCP port numbers. Any connection with either a local or
remote port number in that list will be created as a TLS socket rather
than a plain TOE socket. Note that although this sysctl accepts an
arbitrary list of port numbers, the sysctl(8) tool is only able to set
sysctl nodes to a single value. A TLS socket will hang without
receiving data if used by an application that is not using a patched
SSL library. Thus, the tls_rx_ports node should be used with care.
For a server mostly concerned with offloading TLS transmit, this node
is not needed as plain TOE sockets will fall back to software crypto
when using an unpatched SSL library.
New per-interface statistics nodes are added giving counts of TLS
packets and payload bytes (payload bytes do not include TLS headers or
authentication tags/MACs) offloaded via the TOE engine, e.g.:
dev.cc.0.stats.rx_tls_octets: 149
dev.cc.0.stats.rx_tls_records: 13
dev.cc.0.stats.tx_tls_octets: 26501823
dev.cc.0.stats.tx_tls_records: 1620
TLS transmit work requests are constructed by a new variant of
t4_push_frames() called t4_push_tls_records() in tom/t4_tls.c.
TLS transmit work requests require a buffer containing IVs. If the
IVs are too large to fit into the work request, a separate buffer is
allocated when constructing a work request. This buffer is associated
with the transmit descriptor and freed when the descriptor is ACKed by
the adapter.
Received TLS frames use two new CPL messages. The first message is a
CPL_TLS_DATA containing the decryped payload of a single TLS record.
The handler places the mbuf containing the received payload on an
mbufq in the TOE pcb. The second message is a CPL_RX_TLS_CMP message
which includes a copy of the TLS header and indicates if there were
any errors. The handler for this message places the TLS header into
the socket buffer followed by the saved mbuf with the payload data.
Both of these handlers are contained in tom/t4_tls.c.
A few routines were exposed from t4_cpl_io.c for use by t4_tls.c
including send_rx_credits(), a new send_rx_modulate(), and
t4_close_conn().
TLS keys for both transmit and receive are stored in onboard memory
in the NIC in the "TLS keys" memory region.
In some cases a TLS socket can hang with pending data available in the
NIC that is not delivered to the host. As a workaround, TLS sockets
are more aggressive about sending CPL_RX_DATA_ACK messages anytime that
any data is read from a TLS socket. In addition, a fallback timer will
periodically send CPL_RX_DATA_ACK messages to the NIC for connections
that are still in the handshake phase. Once the connection has
finished the handshake and programmed RX keys via the socket option,
the timer is stopped.
A new function select_ulp_mode() is used to determine what sub-mode a
given TOE socket should use (plain TOE, DDP, or TLS). The existing
set_tcpddp_ulp_mode() function has been renamed to set_ulp_mode() and
handles initialization of TLS-specific state when necessary in
addition to DDP-specific state.
Since TLS sockets do not receive individual TCP segments but always
receive full TLS records, they can receive more data than is available
in the current window (e.g. if a 16k TLS record is received but the
socket buffer is itself 16k). To cope with this, just drop the window
to 0 when this happens, but track the overage and "eat" the overage as
it is read from the socket buffer not opening the window (or adding
rx_credits) for the overage bytes.
Reviewed by: np (earlier version)
Sponsored by: Chelsio Communications
Differential Revision: https://reviews.freebsd.org/D14529
ConnectX-4/5 devices in mlx5core.
The dump is obtained by reading a predefined register map from the
non-destructive crspace, accessible by the vendor-specific PCIe
capability (VSC). The dump is stored in preallocated kernel memory and
managed by the mlx5tool(8), which communicates with the driver using a
character device node.
The utility allows to store the dump in format
<address> <value>
into a file, to reset the dump content, and to manually initiate the
dump.
A call to mlx5_fwdump() should be added at the places where a dump
must be fetched automatically. The most likely place is right before a
firmware reset request.
Submitted by: kib@
MFC after: 1 week
Sponsored by: Mellanox Technologies
Add the ability to access the vendor specific space gateway in order
to support reading and writing data into the different configuration
domains.
Submitted by: Matthew Finlay <matt@mellanox.com>
MFC after: 1 week
Sponsored by: Mellanox Technologies
ECN configuration and statistics is available through a set of sysctl(8)
nodes under sys.class.infiniband.mlx5_X.cong . The ECN configuration
nodes can also be used as loader tunables.
MFC after: 1 week
Sponsored by: Mellanox Technologies
imcsmb(4) provides smbus(4) support for the SMBus controller functionality
in the integrated Memory Controllers (iMCs) embedded in Intel Sandybridge-
Xeon, Ivybridge-Xeon, Haswell-Xeon, and Broadwell-Xeon CPUs. Each CPU
implements one or more iMCs, depending on the number of cores; each iMC
implements two SMBus controllers (iMC-SMBs).
*** IMPORTANT NOTE ***
Because motherboard firmware or the BMC might try to use the iMC-SMBs for
monitoring DIMM temperatures and/or managing an NVDIMM, the driver might
need to temporarily disable those functions, or take a hardware interlock,
before using the iMC-SMBs. Details on how to do this may vary from board to
board, and the procedure may be proprietary. It is strongly suggested that
anyone wishing to use this driver contact their motherboard vendor, and
modify the driver as described in the manual page and in the driver itself.
(For what it's worth, the driver as-is has been tested on various SuperMicro
motherboards.)
Reviewed by: avg, jhb
MFC after: 1 week
Relnotes: yes
Sponsored by: Panasas
Differential Revision: https://reviews.freebsd.org/D14447
Discussed with: avg, ian, jhb
Tested by: allanjude (previous version), Panasas
the iicbus module for FDT-based systems.
The primary motivation for this is that host controller drivers which
declare DRIVER_MODULE(ofw_iicbus, thisdriver, etc, etc) now only need a
single MODULE_DEPEND(thisdriver, ofw_iicbus) for runtime linking to resolve
all the symbols. With ofw_iicbus and iicbus in separate modules, drivers
would need to declare a MODULE_DEPEND() on both, because symbol lookup is
non-recursive through the dependency chain. Requiring a driver to have
MODULE_DEPENDS() on both amounts to requiring the drivers to understand the
kobj inheritence details of how ofw_iicbus is implemented, which seems like
something they shouldn't have to know (and could even change some day).
Also, this is somewhat analogous to how the drivers get built when compiled
into the kernel. You don't have to ask for ofw_iicbus separately, it just
gets built in along with iicbus when option FDT is in effect.
A super-set of the functionality of jedec_ts(4). jedec_dimm(4) reports asset
information (Part Number, Serial Number) encoded in the "Serial Presence
Detect" (SPD) data on JEDEC DDR3 and DDR4 DIMMs. It also calculates and
reports the memory capacity of the DIMM, in megabytes. If the DIMM includes
a "Thermal Sensor On DIMM" (TSOD), the temperature is also reported.
Reviewed by: cem
MFC after: 1 week
Relnotes: yes
Sponsored by: Panasas
Differential Revision: https://reviews.freebsd.org/D14392
Discussed with: avg, cem
Tested by: avg, cem (previous version, no semantic changes)
Add chvgpio(4) driver for Intel Z8xxx SoC family. This product
was formerly known as Cherry Trail but Linux and OpenBSD drivers
refer to it as Cherry View. This driver is derived from OpenBSD
one so the name is kept for alignment with another BSD system.
Submitted by: Tom Jones <tj@enoti.me>
Reviewed by: gonzo, wblock(man page)
MFC after: 2 weeks
Differential Revision: https://reviews.freebsd.org/D13086
Having these compiled into the module causes the kobj method descriptors
to be resolved incorrectly (by the compile-time linker instead of the
kernel linker), which then leads to hours of frustrating debugging.
This adds sys/modules/imx with a SUBDIR makefile to make the whole
collection of modules that are specific to these SoCs. Initially, that
"whole collection" consists of the if_ffec and imx_i2c drivers.
The if_ffec driver is referenced in its existing home in ../ffec rather
than moving it into the imx directory, because it's used by powerpc too,
but it is no longer built for all armv6/7 systems.
The imx_i2c driver is newly added as a module.
compilation under FreeBSD. The mthca driver was temporarily removed as
part of the Linux 4.9 RoCE/infinband upgrade.
Top commit in Linux source tree:
69973b830859bc6529a7a0468ba0d80ee5117826
Sponsored by: Mellanox Technologies
o added struct ipfw_dyn_info that keeps all needed for ipfw_chk and
for dynamic states implementation information;
o added DYN_LOOKUP_NEEDED() macro that can be used to determine the
need of new lookup of dynamic states;
o ipfw_dyn_rule now becomes obsolete. Currently it used to pass
information from kernel to userland only.
o IPv4 and IPv6 states now described by different structures
dyn_ipv4_state and dyn_ipv6_state;
o IPv6 scope zones support is added;
o ipfw(4) now depends from Concurrency Kit;
o states are linked with "entry" field using CK_SLIST. This allows
lockless lookup and protected by mutex modifications.
o the "expired" SLIST field is used for states expiring.
o struct dyn_data is used to keep generic information for both IPv4
and IPv6;
o struct dyn_parent is used to keep O_LIMIT_PARENT information;
o IPv4 and IPv6 states are stored in different hash tables;
o O_LIMIT_PARENT states now are kept separately from O_LIMIT and
O_KEEP_STATE states;
o per-cpu dyn_hp pointers are used to implement hazard pointers and they
prevent freeing states that are locklessly used by lookup threads;
o mutexes to protect modification of lists in hash tables now kept in
separate arrays. 65535 limit to maximum number of hash buckets now
removed.
o Separate lookup and install functions added for IPv4 and IPv6 states
and for parent states.
o By default now is used Jenkinks hash function.
Obtained from: Yandex LLC
MFC after: 42 days
Sponsored by: Yandex LLC
Differential Revision: https://reviews.freebsd.org/D12685
FreeBSD boots on this board, but the ethernet switch is not currently
supported, resulting in no ethernet.
A U-Boot port will be added once the ethernet switch is at least basically
supported, but we add its DTS to the build here to lower the barrier-to-boot
while work is underway.
- Remove the shim interface that allowed bwn(4) to use either siba_bwn or
bhnd(4), replacing all siba_bwn calls with their bhnd(4) bus equivalents.
- Drop the legay, now-unused siba_bwn bus driver.
- Clean up bhnd(4) board flag defines referenced by bwn(4).
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D13518
instead of frobbing the registers directly.
As a hack the bcm2835_pwm kmod presently ignores the 'status="disabled"'
in the RPI3 DTB, assuming that if you load the kld you probably
want the PWM to work.
The logical result of a right shift >= the width of a type is zero, but our
compiler decides this is a warning (and thus, error). Just remove ccp(4)
from i386.
Reported by: cy
Sponsored by: Dell EMC Isilon
* Registers TRNG source for random(4)
* Finds available queues, LSBs; allocates static objects
* Allocates a shared MSI-X for all queues. The hardware does not have
separate interrupts per queue. Working interrupt mode driver.
* Computes SHA hashes, HMAC. Passes cryptotest.py, cryptocheck tests.
* Does AES-CBC, CTR mode, and XTS. cryptotest.py and cryptocheck pass.
* Support for "authenc" (AES + HMAC). (SHA1 seems to result in
"unaligned" cleartext inputs from cryptocheck -- which the engine
cannot handle. SHA2 seems to work fine.)
* GCM passes for block-multiple AAD, input lengths
Largely based on ccr(4), part of cxgbe(4).
Rough performance averages on AMD Ryzen 1950X (4kB buffer):
aesni: SHA1: ~8300 Mb/s SHA256: ~8000 Mb/s
ccp: ~630 Mb/s SHA256: ~660 Mb/s SHA512: ~700 Mb/s
cryptosoft: ~1800 Mb/s SHA256: ~1800 Mb/s SHA512: ~2700 Mb/s
As you can see, performance is poor in comparison to aesni(4) and even
cryptosoft (due to high setup cost). At a larger buffer size (128kB),
throughput is a little better (but still worse than aesni(4)):
aesni: SHA1:~10400 Mb/s SHA256: ~9950 Mb/s
ccp: ~2200 Mb/s SHA256: ~2600 Mb/s SHA512: ~3800 Mb/s
cryptosoft: ~1750 Mb/s SHA256: ~1800 Mb/s SHA512: ~2700 Mb/s
AES performance has a similar story:
aesni: 4kB: ~11250 Mb/s 128kB: ~11250 Mb/s
ccp: ~350 Mb/s 128kB: ~4600 Mb/s
cryptosoft: ~1750 Mb/s 128kB: ~1700 Mb/s
This driver is EXPERIMENTAL. You should verify cryptographic results on
typical and corner case inputs from your application against a known- good
implementation.
Sponsored by: Dell EMC Isilon
Differential Revision: https://reviews.freebsd.org/D12723
Since r326501 which added COMPAT_FREEBSD32 to the GENERIC config for arm64,
we need to build systrace_freebsd32, since dtraceall depends on it.
Reviewed by: ed, gnn
Differential Revision: https://reviews.freebsd.org/D13670
The ep(4) driver is the only consumer of the two functions from
elink.c. I removed the standalone module as well, and most likely,
the module metadata is not needed anywhere, but this is for later
cleanup.
Discussed with: imp, jhb
Sponsored by: The FreeBSD Foundation
Initial update to the ixgbe PF and VF drivers to support the iflib interface.
The PF driver version is bumped to 4.0.0, and the VF driver version is bumped to 2.0.0.
Special thanks to sbruno@ for the support in helping make this conversion happen.
Submitted by: Jeb Cramer <cramerj@intel.com>, Krzysztof Galazka (Chris) <krzysztof.galazka@intel.com>, Piotr Pietruszewski <piotr.pietruszewski@intel.com>
Reviewed by: sbruno@, shurd@, #IntelNetworking
Tested by: Jeffrey Pieper <jeffrey.e.pieper@intel.com>, Sergey Kozlov <kozlov.sergey.404@gmail.com>
Sponsored by: Limelight Networks, Intel Corporation
Differential Revision: https://reviews.freebsd.org/D11727
sinovoip-bpi-m3.dts was disconnected from the build in r324822. Since then,
a CCU driver has been added and several other changes have been made to
make us compatible with upstream DTS for this board.
Add links for older DTB that might be used: our u-boot port was expecting
sinovoip-bpi-m3.dtb up until ports r455629, and our u-boot will not be
switching to the upstream name (sun8i-a83t-bananapi-m3) quite yet.
Discussed with: manu
The OBJS_DEPEND_GUESS mechanism was making vmx_genassym.o depend
on all headers along with vmx_assym.h, though vmx_assym.h depends
on having vmx_genassym.o present to generate. Moving the headers
to DPSRCS is enough to resolve the issue as they will no longer
be implicit dependencies for all objects. Because of this we
need explicit OBJS_DEPEND_GUESS entries to ensure the headers
are generated when needed for the *_support.o files that need
them.
X-MFC-With: r326552
MFC after: 2 weeks
Sponsored by: Dell EMC
Currently, bwn(4) relies on the siba_bwn(4) bus driver to provide support
for the on-chip SSB interconnect found in Broadcom's older PCI(e) Wi-Fi
adapters. Non-PCI Wi-Fi adapters, as well as the newer BCMA interconnect
found in post-2009 Broadcom Wi-Fi hardware, are not supported by
siba_bwn(4).
The bhnd(4) bus driver (also used by the FreeBSD/MIPS Broadcom port)
provides a unified kernel interface to a superset of the hardware supported
by siba_bwn; by attaching bwn(4) via bhnd(4), we can support both modern
PCI(e) Wi-Fi devices based on the BCMA backplane interconnect, as well as
Broadcom MIPS WiSoCs that include a D11 MAC core directly attached to their
SSB or BCMA backplane.
This diff introduces opt-in bwn(4) support for bhnd(4) by providing:
- A small bwn(4) driver subclass, if_bwn_bhnd, that attaches via
bhnd(4) instead of siba_bwn(4).
- A bhndb(4)-based PCI host bridge driver, if_bwn_pci, that optionally
probes at a higher priority than the siba_bwn(4) PCI driver.
- A set of compatibility shims that perform translation of bwn(4)'s
siba_bwn function calls into their bhnd(9) API equivalents when bwn(4)
is attached via a bhnd(4) bus parent. When bwn(4) is attached via
siba_bwn(4), all siba_bwn function calls are simply passed through to
their original implementations.
To test bwn(4) with bhnd(4), place the following lines in loader.conf(5):
hw.bwn_pci.preferred="1"
if_bwn_pci_load="YES
bwn_v4_ucode_load="YES"
bwn_v4_lp_ucode_load="YES"
To verify that bwn(4) is using bhnd(4), you can check dmesg:
bwn0: <Broadcom 802.11 MAC/PHY/Radio, rev 15> ... on bhnd0
... or devinfo(8):
pcib2
pci2
bwn_pci0
bhndb0
bhnd0
bwn0
...
bwn(4)/bhnd(4) has been tested for regressions with most chipsets currently
supported by bwn(4), including:
- BCM4312
- BCM4318
- BCM4321
With minimal changes to the DMA code (not included in this commit), I was
also able to test support for newer BCMA devices by bringing up basic
working Wi-Fi on two previously unsupported, BCMA-based N-PHY chipsets:
- BCM43224
- BCM43225
Approved by: adrian (mentor, implicit)
Sponsored by: The FreeBSD Foundation & Plausible Labs
Differential Revision: https://reviews.freebsd.org/D13041
This change adds an implementation of a sysent for running CloudABI
armv6 and armv7 binaries on FreeBSD/arm64. It is a somewhat literal copy
of the armv6 version, except that it's been patched up to use the proper
registers.
Just like for cloudabi32.ko on FreeBSD/amd64, we make use of a vDSO that
automatically pads system call parameters to 64-bit value. These are
stored in a buffer on the stack, meaning we need to use copyin() and
copyout() unconditionally.
Very early BHND Wi-Fi devices (e.g. BCM4318) do not support any form of
dynamic clock control; on these devices, any PMU requests that cannot be
met by the device's fixed clock state will return an appropriate error
code.
Approved by: adrian (mentor, implicit)
Sponsored by: The FreeBSD Foundation
Mainly focus on files that use BSD 2-Clause license, however the tool I
was using misidentified many licenses so this was mostly a manual - error
prone - task.
The Software Package Data Exchange (SPDX) group provides a specification
to make it easier for automated tools to detect and summarize well known
opensource licenses. We are gradually adopting the specification, noting
that the tags are considered only advisory and do not, in any way,
superceed or replace the license texts.
No functional change intended.
This commit merges projects/bsd_rdma_4_9 to head.
List of kernel sources used:
============================
1) kernel sources were cloned from git://github.com/torvalds/linux.git
Top commit 69973b830859bc6529a7a0468ba0d80ee5117826 - tag: v4.9, linux-4.9
2) krping was cloned from https://github.com/larrystevenwise/krping
Top commit 292a2f1abf0348285e678a82264740d52e4dcfe4
List of userspace sources used:
===============================
1) rdma-core was cloned from https://github.com/linux-rdma/rdma-core.git
Top commit d65138ef93af30b3ea249f3a84aa6a24ba7f8a75
2) OpenSM was cloned from git://git.openfabrics.org/~halr/opensm.git
Top commit 85f841cf209f791c89a075048a907020e924528d
3) libibmad was cloned from git://git.openfabrics.org/~iraweiny/libibmad.git
Tag 1.3.13 with some additional patches from Mellanox.
4) infiniband-diags was cloned from git://git.openfabrics.org/~iraweiny/infiniband-diags.git
Tag 1.6.7 with some additional patches from Mellanox.
NOTES:
======
1) The mthca driver has been removed in kernel and in userspace.
2) All GPLv2 only sources have been removed and where applicable
rewritten from scratch under a BSD license.
3) List of fully supported drivers in userspace and kernel:
a) iw_cxgbe (Chelsio)
b) mlx4ib (Mellanox)
c) mlx5ib (Mellanox)
4) WITH_OFED=YES is still required by make in order to build
OFED userspace and kernel code.
5) Full support has been added for routable RoCE, RoCE v2.
Sponsored by: Mellanox Technologies
The recently imported cloudabi_vdso_armv6_on_64bit.S should be the vDSO
for 32-bit processes when being run on FreeBSD/arm64. This vDSO ensures
that all system call arguments are padded to 64 bits, so that they can
be used by the kernel to call into most of the native implementations
directly.
The driver is functional on both BHND Wi-Fi adapters and MIPS SoCs, but
does not currently include support for features not required by bwn(4),
including GPIO interrupt handling.
Approved by: adrian (mentor, implicit)
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D12708
The bwn(4) driver requires a number of extensions to the bhnd(4) PMU
interface to support external configuration of PLLs, LDOs, and other
parameters that require chipset or PHY-specific workarounds.
These changes add support for:
- Writing raw voltage register values to PHY-specific LDO regulator
registers (required by LP-PHY).
- Enabling/disabling PHY-specific LDOs (required by LP-PHY)
- Writing to arbitrary PMU chipctrl registers (required for common PHY PLL
reset support).
- Requesting chipset/PLL-specific spurious signal avoidance modes.
- Querying clock frequency and latency.
Additionally, rather than updating legacy PWRCTL support to conform to the
new PMU interface:
- PWRCTL API is now provided by a bhnd_pwrctl_if.m interface.
- Since PWRCTL is only found in older SSB-based chipsets, translation from
bhnd(4) bus APIs to corresponding PWRCTL operations is now handled
entirely within the siba(4) driver.
- The PWRCTL-specific host bridge clock gating APIs in bhnd_bus_if.m have
been lifted out into a standalone bhnd_pwrctl_hostb_if.m interface.
Approved by: adrian (mentor, implicit)
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D12664
the system time.
As we seem to only read this time on boot, and this is the only source of
time on many arm64 machines we need to enable this by default there. As
this is not always the case with U-Boot firmware, or when we have been
booted from a non-UEFI environment we only enable the device driver when
the Runtime Services are present and reading the time doesn't result in an
error.
PR: 212185
Reviewed by: imp, kib
Tested by: emaste
Relnotes: yes
Sponsored by: DARPA, AFRL
Differential Revision: https://reviews.freebsd.org/D12650
IPsec support can be loaded as kernel module, thus do not depend from
kernel option IPSEC and always build O_IPSEC opcode implementation as
enabled.
Obtained from: Yandex LLC
MFC after: 1 week
Sponsored by: Yandex LLC
Background:
The coming ibcore update forces an update of mlx4ib(4) which in turn requires
an updated mlx4 core module. This also affects the mlx4en(4) module because
commonly used APIs are updated. This commit is a middle step updating the
mlx4 modules towards the new ibcore.
This change contains no major new features.
Changes in mlx4:
a) Improved error handling when mlx4 PCI devices are
detached inside VMs.
b) Major update of codebase towards Linux 4.9.
Changes in mlx4ib(4):
a) Minimal changes needed in order to compile using the
updated mlx4 core APIs.
Changes in mlx4en(4):
a) Update flow steering code in mlx4en to use new APIs for
registering MAC addresses and IP addresses.
b) Update all statistics counters to be 64-bit.
c) Minimal changes needed in order to compile using the
updated mlx4 core APIs.
Sponsored by: Mellanox Technologies
MFC after: 1 week
the coming ibcore and mlx5ib updates in order to support traffic redirection
to so-called raw ethernet QPs.
Remove unused E-switch related routines and files while at it.
Sponsored by: Mellanox Technologies
MFC after: 1 week
mbpool existed to support NICs with memory interfaces and all remaining
comsumers were removed earlier this year with NATM.
Reviewed by: jhb
Sponsored by: DARPA, AFRL
Differential Revision: https://reviews.freebsd.org/D10513
this is more friendly to the tree.
Tested this with loader.conf:if_igb_load="YES" and it does the right
thing.
Submitted by: Ian Lepore <ian@freebsd.org>
mapping. This uses the new common code shared with amd64.
The RTC should only be accessed via EFI. There is no locking around it as
the spec only has this as a requirement for the PC-AT CMOS device.
Reviewed by: kib, imp
Sponsored by: DARPA, AFRL
Differential Revision: https://reviews.freebsd.org/D12595
end up with non-standard DESTDIR information in its symlink. This
can happen very trivially if the release scripts are used.
Sponsored by: Limelight Networks
Changes since 1.16.26.0 for all three firmwares are listed below. This
list was obtained from the Release Notes of the Chelsio Unified Wire
v3.5.05 release for Linux.
T6 Firmware
++++++++++++
================================================================================
Version : 1.16.63.0
Date : 09/29/2017
================================================================================
Fixes
-----
BASE:
- Fixed a fw crash when configured traffic rate limit is less than 10kbps.
- Fixed traffic rate limiting for smaller traffic rate value.
ETH:
- Fixed 40G link failure when interface is toggled.
- Fixed adapter crash when interface is toggled during traffic.
- Fixed 25G link failure when PEER only supports consortium mode autoneg
for 25G.
- Fixed 100G optics link failure when cable is plugged in after bringing up
the interface.
- Enable RS FEC as default if speed is 100G.
- Fixed DCBX configuration refresh failure.
OFLD
- Fixed 0B iWARP ingress read failure.
- Fixed iWARP SRQ reuse failure.
FOiSCSI:
- Fixed vlan interface ping failure.
- Fixed target discovery failures.
- Fixed mutual chap login failure.
================================================================================
Version : 1.16.59.0
Date : 09/05/2017
================================================================================
FIXES
-----
BASE:
- Fixed fw crash caused by MC parity error in SO adapters.
- Generate Timer0Int interrupt if fw crashes due to unaligned access error. Host
driver must look into PCIE_FW register to see if any fw fatal error has
encountered. If PCIE_FW doesn't indicate any error then driver must ignore this
interrupt.
- Fixed receive buffer threshold settings which was resulting in error frames on
receive side.
ETH:
- Fixed an issue in connection traffic shaping when
FLOWC_WR->FW_FLOWC_MNEM_SCHEDCLASS is not received in first WR on the connection.
- Fixed link failure when speed is changed from 10G-1G-10G due to incorrect flag
check.
- Fixed improper LED behaviour for blink test and when traffic is running.
- Removed storage of previous fec settings from fw. Driver needs to pass the user
settings whenever a new module is plugged in as fw resets these when a module is
unplugged.
OFLD
- OVS offload: TP cache is flushed periodically to get the accuate filters stats
(hit count).
ENHANCEMENTS
------------
BASE:
- Ring backbone feature added. New FW_PARAMS_PARAM_DEV_RING_BACKBONE param type
added to query and enable ring backbone support.
- VNI support added for filtering. New entry_type FW_VI_MAC_TYPE_EXACTMAC_VNI
added to FW_VI_MAC_CMD.
- Added new API FW_PARAM_PARAM_DEV_MPSBGMAP to read the priority to buffer group
mapping for the ports.
- FW_PARAMS_PARAM_DEV_TPCHMAP API added to read the port to channel mapping.
- HMA (Host memory access) support added. New FW_HMA_CMD and
FW_PARAMS_PARAM_DEV_HMA_SIZE added to query and configure the HMA. It
enables the memfree support (256 connections) for iwarp.
- PTP support enabled.
ETH:
- Added consortium mode 50G support.
- Added the ability to allow only selected speeds to be advertised during auto
negotiation.
- Increased port capability from 16 to 32 bits to support more speeds.
FW_PARAMS_PARAM_PFVF_PORT_CAPS32 added to query whether fw supports 16 or 32
bit port capability.
OFLD:
- RDMA Write with immediate support added (iwarp 2.0 feature)
- FW_TLS_KEYCTX_TX_WR removed and security key management moved to driver.
- 256 offloaded connections support for iwarp on SO adapters.
iSCSI:
- New param FW_PARAMS_PARAM_DEV_PPOD_EDRAM added for iscsi ppod configuration
in EDRAM (performance improvement).
FOiSCSI:
- iSCSI Command offload target support added.
FOFCoE:
- FCoE support enabled.
================================================================================
Version : 1.16.43.0
Date : 05/05/2017
================================================================================
FIXES
-----
BASE:
- Fixed default DCB mode to AUTO.
- Fixed DCBX bugs when AUTO mode is configured in config file.
- Fixed an issue where even after removing PFC from switch, PFC wasn't getting
reset.
- Fixed DDR3/DDR4 ECC errors.
- Fixed an FLR issue where FLR completion was going to host before FLR
processing is finished in fw.
ETH:
- Fixed bug in writing multi-bytes using i2c interface.
- Fixed the link failure when optical cable is inserted into the QSA module
after loading the driver.
- Fixed false link up when peer interface was brought down.
- Enabling RS FEC by default for 100Gbase-SR4 according to 802.3BJ standard.
- Fixed bugs related to negotiated fec based local/peer fec ability and request.
- Fixed auto-neg failure with few switches.
- T6 Performance improvement fixes.
OFLD
- Fixed an extra credit issue if FW_RI_TYPE_FINI is delayed in fw due to
backpressure.
- Added a new queue type FW_IQ_TYPE_VF_CQ to handle the FW_PARAMS_PARAM_DMAQ*
commands. queue type will be part of the FW_PARAMS_PARAM_DMAQ_IQ_INTIDX
value. Used in guest RDMA (RDMA from VM/VF) usecase.
- T6 Crypto Coprocessor mode bug fixes.
- T6 Crypto TLS-inline mode bug fixes.
ENHANCEMENTS
------------
BASE:
- Added new API FW_PARAM_PARAM_DEV_MPSBGMAP to read the priority to buffer
group mapping for the ports.
ETH:
- Added broadcom consortium next page support for 25G CR.
This can be enabled using flags=an_brcm option in the t6-config.txt file.
- Added spider mode support.
- Added support for 10G-BaseT converter sfp+ module.
- Added support for additional 25G/100G cables.
- Added support to enable/disable auto-neg using ethtool.
================================================================================
Version : 1.16.33.0
Date : 02/24/2017
================================================================================
Fixes
-----
BASE:
- Fixed DDR4 uncorrectable errors.
ETH:
- Enabled link auto negotiation (AN) by default in config file.
- Added AN and FEC control api. Host driver and application can enable/disable
AN and FEC.
ENHANCEMENTS
------------
BASE:
- Enabled High priorty filter.
- Added T6425 adapter support.
ETH:
- Added new workrequest ETH_TX_PKTS2_WR (see fw api document for more details).
================================================================================
Version : 1.16.29.0
Date : 01/27/2017
================================================================================
FIXES
-----
BASE:
- Set multiple fec values only if AN is enabled in config file and when module
is connected.
- Fixed intermittent DDR3/4 ECC errors.
- max number of ethctrl queue in VF set to 2 (reverted the last change
because it causes problem in VF drivers).
ETH:
- Made devlog more verbose by printing cable information in redable form.
- Updated AN settings to work with more 25G/100G switches.
- Added support for more SFP28/QSFP28 cables.
- Fixed an issue of link going down after few hours of idle time.
OFLD:
- Fixed an issue in TLS which was causing fw crash on running TLS traffic.
FOiSCSI:
- Fixed the failure of PXE boot OS install on an iscsi lun.
ENHANCEMENTS
------------
OFLD:
- Added filtering support for NAT. New WR FW_FILTER2_WR and
FW_PARAMS_PARAM_DEV_FILTER2_WR added for the same.
- Added RDMA guest mode (mode 3 or RDMA from VF) support.
================================================================================
T5 Firmware
++++++++++++
================================================================================
Version : 1.16.63.0
Date : 09/29/2017
================================================================================
Fixes
-----
BASE:
- Fixed offload memory overcommit in case of SO adapter.
ETH:
- Fixed DCBX configuration refresh failure.
OFLD
- Fixed 0B iWARP ingress read failure.
FOiSCSI:
- Fixed vlan interface ping failure.
================================================================================
Version : 1.16.59.0
Date : 09/05/2017
================================================================================
FIXES
-----
BASE:
- Fixed an FLR issue which was causing error when VF attached VM was powered on.
ETH:
- Fixed an issue in connection traffic shaping when
FLOWC_WR->FW_FLOWC_MNEM_SCHEDCLASS is not received in first WR on the connection.
- Fixed link failure when speed is changed from 10G-1G-10G due to incorrect flag
check.
- Fixed T580 link failure with few switches which take more time for
establishing link.
ENHANCEMENTS
------------
BASE:
- Ring backbone feature added. New FW_PARAMS_PARAM_DEV_RING_BACKBONE param type
added to query and enable ring backbone support.
- Added new API FW_PARAM_PARAM_DEV_MPSBGMAP to read the priority to buffer group
mapping for the ports.
- FW_PARAMS_PARAM_DEV_TPCHMAP API added to read the port to channel mapping.
FOiSCSI:
- iSCSI Command offload target support added.
================================================================================
Version : 1.16.43.0
Date : 05/05/2017
================================================================================
FIXES
-----
BASE:
- Fixed default DCB mode to AUTO.
- Fixed DCBX bugs when AUTO mode is configured in config file.
- Fixed an issue where even after removing PFC from switch, PFC wasn't getting
reset.
ETH:
- Fixed bug in writing multi-bytes using i2c interface.
- Fixed the link failure when optical cable is inserted into the QSA module
after loading the driver.
OFLD
- Fixed an extra credit issue if FW_RI_TYPE_FINI is delayed in fw due to
backpressure.
- Added a new queue type FW_IQ_TYPE_VF_CQ to handle the FW_PARAMS_PARAM_DMAQ*
commands. queue type will be part of the FW_PARAMS_PARAM_DMAQ_IQ_INTIDX
value. Used in guest RDMA (RDMA from VM/VF) usecase.
ENHANCEMENTS
------------
BASE:
- Added new API FW_PARAM_PARAM_DEV_MPSBGMAP to read the priority to buffer
group mapping for the ports.
================================================================================
Version : 1.16.33.0
Date : 02/24/2017
================================================================================
ENHANCEMENTS
------------
ETH:
- Added new workrequest ETH_TX_PKTS2_WR (see fw api document for more details).
================================================================================
Version : 1.16.29.0
Date : 01/27/2017
================================================================================
FIXES
-----
BASE:
- max number of ethctrl queue in VF set to 2 (reverted the last change
because it causes problem in VF drivers).
FOiSCSI:
- Fixed the failure of PXE boot OS install on an iscsi lun.
ENHANCEMENTS
------------
OFLD:
- Added filtering support for NAT. New WR FW_FILTER2_WR and
FW_PARAMS_PARAM_DEV_FILTER2_WR added for the same.
- Added RDMA guest mode (mode 3 or RDMA from VF) support.
================================================================================
T4 Firmware
+++++++++++
================================================================================
Version : 1.16.63.0
Date : 09/29/2017
================================================================================
Fixes
-----
ETH:
- Fixed DCBX configuration refresh failure.
FOiSCSI:
- Fixed vlan interface ping failure.
================================================================================
Version : 1.16.59.0
Date : 09/05/2017
================================================================================
FIXES
-----
ETH:
- Fixed an issue in connection traffic shaping when
FLOWC_WR->FW_FLOWC_MNEM_SCHEDCLASS is not received in first WR on the connection.
ENHANCEMENTS
------------
BASE:
- FW_PARAMS_PARAM_DEV_TPCHMAP API added to read the port to channel mapping.
================================================================================
Version : 1.16.43.0
Date : 05/05/2017
================================================================================
FIXES
-----
BASE:
- Fixed default DCB mode to AUTO.
- Fixed DCBX bugs when AUTO mode is configured in config file.
- Fixed an issue where even after removing PFC from switch, PFC wasn't getting
reset.
ETH:
- Fixed bug in writing multi-bytes using i2c interface.
OFLD
- Fixed an extra credit issue if FW_RI_TYPE_FINI is delayed in fw due to
backpressure.
- Added a new queue type FW_IQ_TYPE_VF_CQ to handle the FW_PARAMS_PARAM_DMAQ*
commands. queue type will be part of the FW_PARAMS_PARAM_DMAQ_IQ_INTIDX
value. Used in guest RDMA (RDMA from VM/VF) usecase.
ENHANCEMENTS
------------
BASE:
- Added new API FW_PARAM_PARAM_DEV_MPSBGMAP to read the priority to buffer
group mapping for the ports.
Obtained from: Chelsio Communications
MFC after: 2 weeks
Sponsored by: Chelsio Communications
Make armv7 as a new MACHINE_ARCH.
Copy all the places we do armv6 and add armv7 as basically an
alias. clang appears to generate code for armv7 by default. armv7 hard
float isn't supported by the the in-tree gcc, so it hasn't been
updated to have a new default.
Support armv7 as a new valid MACHINE_ARCH (and by extension
TARGET_ARCH).
Add armv7 to the universe build.
Differential Revision: https://reviews.freebsd.org/D12010
machine independent parts of the existing code to a new file that can be
shared between amd64 and arm64.
Reviewed by: kib (previous version), imp
Sponsored by: DARPA, AFRL
Differential Revision: https://reviews.freebsd.org/D12434
7431 ZFS Channel Programs
illumos/illumos-gate@dfc115332cdfc115332chttps://www.illumos.org/issues/7431
ZFS channel programs (ZCP) adds support for performing compound ZFS
administrative actions via Lua scripts in a sandboxed environment (with time
and memory limits).
This initial commit includes both base support for running ZCP scripts, and a
small initial library of API calls which support getting properties and
listing, destroying, and promoting datasets.
Testing: in addition to the included unit tests, channel programs have been in
use at Delphix for several months for batch destroying filesystems. The
dsl_destroy_snaps_nvl() call has also been replaced with
Reviewed by: Matthew Ahrens <mahrens@delphix.com>
Reviewed by: George Wilson <george.wilson@delphix.com>
Reviewed by: John Kennedy <john.kennedy@delphix.com>
Reviewed by: Dan Kimmel <dan.kimmel@delphix.com>
Approved by: Garrett D'Amore <garrett@damore.org>
Author: Chris Williamson <chris.williamson@delphix.com>
8552 ZFS LUA code uses floating point math
illumos/illumos-gate@916c8d8811916c8d8811https://www.illumos.org/issues/8552
In the LUA interpreter used by "zfs program", the lua format() function
accidentally includes support for '%f' and friends, which can cause compilation
problems when building on platforms that don't support floating-point math in
the kernel (e.g. sparc). Support for '%f' friends (%f %e %E %g %G) should be
removed, since there's no way to supply a floating-point value anyway (all
numbers in ZFS LUA are int64_t's).
Reviewed by: Yuri Pankov <yuripv@gmx.com>
Reviewed by: Igor Kozhukhov <igor@dilos.org>
Approved by: Dan McDonald <danmcd@joyent.com>
Author: Matthew Ahrens <mahrens@delphix.com>
8590 memory leak in dsl_destroy_snapshots_nvl()
illumos/illumos-gate@e6ab4525d1e6ab4525d1https://www.illumos.org/issues/8590
In dsl_destroy_snapshots_nvl(), "snaps_normalized" is not freed after it is
added to "arg".
Reviewed by: Pavel Zakharov <pavel.zakharov@delphix.com>
Reviewed by: Steve Gonczi <steve.gonczi@delphix.com>
Reviewed by: George Wilson <george.wilson@delphix.com>
Approved by: Dan McDonald <danmcd@joyent.com>
Author: Matthew Ahrens <mahrens@delphix.com>
FreeBSD notes:
- zfs-program.8 manual page is taken almost as is from the vendor repository,
no FreeBSD-ification done
- fixed multiple instances of NULL being used where an integer is expected
- replaced ETIME and ECHRNG with ETIMEDOUT and EDOM respectively
This commit adds a modified version of Lua 5.2.4 under
sys/cddl/contrib/opensolaris/uts/common/fs/zfs/lua, mirroring the
upstream. See README.zfs in that directory for the description of Lua
customizations.
See zfs-program.8 on how to use the new feature.
MFC after: 5 weeks
Relnotes: yes
Differential Revision: https://reviews.freebsd.org/D12528
parser.
This allows us to use the EROM parser API in cases where the standard bus
space I/O APIs are unsuitable. In particular, this will allow us to parse
the device enumeration table directly from bhndb(4) drivers, prior to
full attach and configuration of the bridge.
Approved by: adrian (mentor)
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D12510
Some x86 class CPUs have accelerated intrinsics for SHA1 and SHA256.
Provide this functionality on CPUs that support it.
This implements CRYPTO_SHA1, CRYPTO_SHA1_HMAC, and CRYPTO_SHA2_256_HMAC.
Correctness: The cryptotest.py suite in tests/sys/opencrypto has been
enhanced to verify SHA1 and SHA256 HMAC using standard NIST test vectors.
The test passes on this driver. Additionally, jhb's cryptocheck tool has
been used to compare various random inputs against OpenSSL. This test also
passes.
Rough performance averages on AMD Ryzen 1950X (4kB buffer):
aesni: SHA1: ~8300 Mb/s SHA256: ~8000 Mb/s
cryptosoft: ~1800 Mb/s SHA256: ~1800 Mb/s
So ~4.4-4.6x speedup depending on algorithm choice. This is consistent with
the results the Linux folks saw for 4kB buffers.
The driver borrows SHA update code from sys/crypto sha1 and sha256. The
intrinsic step function comes from Intel under a 3-clause BSDL.[0] The
intel_sha_extensions_sha<foo>_intrinsic.c files were renamed and lightly
modified (added const, resolved a warning or two; included the sha_sse
header to declare the functions).
[0]: https://software.intel.com/en-us/articles/intel-sha-extensions-implementations
Reviewed by: jhb
Sponsored by: Dell EMC Isilon
Differential Revision: https://reviews.freebsd.org/D12452
other kernel infrastructure changes.
Note that this doesn't affect the base cxgb(4) NIC driver for T3 at all.
MFC after: No MFC.
Sponsored by: Chelsio Communications
This module is specific to a single Marvel board that we currently
only support in 64-bit mode. Remove it from the build otherwise. It
likely should be completely removed, but this unbreaks x86 building.
Noticed by: sbruno@
This patch adds support for UART in Armada 3700 family.
It exposes both low-level UART interface, as well as
standard driver methods.
Submitted by: Patryk Duda <pdk@semihalf.com>
Obtained from: Semihalf
Sponsored by: Semihalf
Differential Revision: https://reviews.freebsd.org/D12250
Turn on the required options in the ERL config file, and ensure
that the fbt module is listed as a dependency for mips in
the modules/dtrace/dtraceall/dtraceall.c file.
PR: 220346
Reviewed by: gnn, markj
MFC after: 2 weeks
Differential Revision: https://reviews.freebsd.org/D12227
AMD Family 17h CPUs have an internal network used to communicate between
the host CPU and the PSP and SMU coprocessors. It exposes a simple
32-bit register space.
Reviewed by: avg (no +1), mjoras, truckman
Sponsored by: Dell EMC Isilon
Differential Revision: https://reviews.freebsd.org/D12217
This driver supports both NTB-to-NTB and NTB-to-Root Port modes (though
the second with predictable complications on hot-plug and reboot events).
I tested it with PEX 8717 and PEX 8733 chips, but expect it should work
with many other compatible ones too. It supports up to two NT bridges
per chip, each of which can have up to 2 64-bit or 4 32-bit memory windows,
6 or 12 scratchpad registers and 16 doorbells. There are also 4 DMA engines
in those chips, but they are not yet supported.
While there, rename Intel NTB driver from generic ntb_hw(4) to more specific
ntb_hw_intel(4), so now it is on par with this new ntb_hw_plx(4) driver and
alike to Linux naming.
MFC after: 2 weeks
Sponsored by: iXsystems, Inc.
These firmwares come from a pre-release snapshot. The final firmwares
in this Chelsio release cycle will likely be .61.0 or later and those
will be the next "long lived" firmwares in FreeBSD head and stable
branches. .59 is being provided in head (only) for wider test exposure.
Obtained from: Chelsio Communications
Sponsored by: Chelsio Communications
Remote DMA over Converged Ethernet, RoCE, for the ConnectX-4 series of
PCI express network cards.
There is currently no user-space support and this driver only supports
kernel side non-routable RoCE V1. The krping kernel module can be used
to test this driver. Full user-space support including RoCE V2 will be
added as part of the ongoing upgrade to ibcore from Linux 4.9. Otherwise
this driver is feature equivalent to mlx4ib(4). The mlx5ib(4) kernel
module will only be built when WITH_OFED=YES is specified.
MFC after: 2 weeks
Sponsored by: Mellanox Technologies
sysctls to display stats, stats polled every 2 seconds
Modify QLA_LOCK()/QLA_UNLOCK() to not sleep after acquiring mtx_lock
Add support to turn OFF/ON error recovery following heartbeat failure for
debug purposes.
Set default max values to 32 Tx/Rx/SDS rings
MFC after:5 days
Using latest U-Boot for RPI 1 or 2 the DTB loaded by the firmware is discarded.
The DTB was previously patched by the firmware to contain the DMA channel mask.
DTB provided by the rpi firmware or DTS in the Linux tree contain the raw value
directly. Do the same for our DTS as we cannot switch to the upstream ones yet.
Not having the DMA channel mask setup properly cause mmc not to be detected
(and probably other problems on driver using DMA).
Also, add links for rpi dtb to the name used by u-boot. This way the dtb can be
loaded by ubldr using the U-Boot env variable fdtfile.
Tested On: RPI B Rev2, RPI Zero, RPI 2 v1.1 RPI 2 v1.2
Thanks to Sylvain Garrigues <sylvain@sylvaingarrigues.com> for the help.
PR: 218344
Intel SGX allows to manage isolated compartments "Enclaves" in user VA
space. Enclaves memory is part of processor reserved memory (PRM) and
always encrypted. This allows to protect user application code and data
from upper privilege levels including OS kernel.
This includes SGX driver and optional linux ioctl compatibility layer.
Intel SGX SDK for FreeBSD is also available.
Note this requires support from hardware (available since late Intel
Skylake CPUs).
Many thanks to Robert Watson for support and Konstantin Belousov
for code review.
Project wiki: https://wiki.freebsd.org/Intel_SGX.
Reviewed by: kib
Relnotes: yes
Sponsored by: DARPA, AFRL
Differential Revision: https://reviews.freebsd.org/D11113
- Add FDT probe code.
- Do i2c transfers with exclusive bus ownership.
- Use config_intrhook_oneshot() to defer chip setup because some i2c
busses can't do transfers without interrupts.
- Add a detach() routine.
- Add to module build.
This driver supports only basic timekeeping functionality. It completely
replaces the ds133x driver. It can also replace the ds1374 driver, but that
will take a few other changes in MIPS code and config, and will be committed
separately. It does NOT replace the existing ds1307 driver, which provides
access to some of the extended features on the 1307 chip, such as controlling
the square wave output signal. If both ds1307 and ds13rtc drivers are
present, the ds1307 driver will outbid and win control of the device.
This driver can be configured with FDT data, or by using hints on non-FDT
systems. In addition to the standard hints for i2c devices, it requires
a "chiptype" string of the form "dallas,ds13xx" where 'xx' is the chip id
(i.e., the same format as FDT compat strings).
TCP connections (order of tens of thousands), with predominantly Transmits.
Choice to perform receive operations either in IThread or Taskqueue Thread.
Submitted by:Vaishali.Kulkarni@cavium.com
MFC after:5 days
o Replace __riscv64 with (__riscv && __riscv_xlen == 64)
This is required to support new GCC 7.1 compiler.
This is compatible with current GCC 6.1 compiler.
RISC-V is extensible ISA and the idea here is to have built-in define
per each extension, so together with __riscv we will have some subset
of these as well (depending on -march string passed to compiler):
__riscv_compressed
__riscv_atomic
__riscv_mul
__riscv_div
__riscv_muldiv
__riscv_fdiv
__riscv_fsqrt
__riscv_float_abi_soft
__riscv_float_abi_single
__riscv_float_abi_double
__riscv_cmodel_medlow
__riscv_cmodel_medany
__riscv_cmodel_pic
__riscv_xlen
Reviewed by: ngie
Sponsored by: DARPA, AFRL
Differential Revision: https://reviews.freebsd.org/D11901
debug (cudbg) code, hooked up to the main driver via an ioctl.
The ioctl can be used to collect the chip's internal state in a
compressed dump file. These dumps can be decoded with the "view"
component of cudbg.
Obtained from: Chelsio Communications
MFC after: 2 months
Sponsored by: Chelsio Communications
Propagate warning flags from kern.opts.mk and then fix minor -Werror
issues when building with gcc from -Wredundant-decls, -Wnested-externs,
-Wuninitialized.
Reviewed by: davidcs
Approved by: markj (mentor)
Sponsored by: Dell EMC Isilon
Differential Revision: https://reviews.freebsd.org/D11413
This also avoids compiling in pci_iov support into the kernel if_ixoif
the PCI_IOV option is disabled.
Reviewed by: rstone
Sponsored by: Dell EMC Isilon
Differential Revision: https://reviews.freebsd.org/D11573
This emulated device attaches to the ISA bus and registers itself as
HBA supporting MMC/SD cards. This allows to develop and test MMC XPT
and MMC / SDIO peripheral drivers even in the VM such as bhyve.
Submitted by: Ilya Babulin
Implement the MMC/SD/SDIO protocol within a CAM framework. CAM's
flexible queueing will make it easier to write non-storage drivers
than the legacy stack. SDIO drivers from both the kernel and as
userland daemons are possible, though much of that functionality will
come later.
Some of the CAM integration isn't complete (there are sleeps in the
device probe state machine, for example), but those minor issues can
be improved in-tree more easily than out of tree and shouldn't gate
progress on other fronts. Appologies to reviews if specific items
have been overlooked.
Submitted by: Ilya Bakulin
Reviewed by: emaste, imp, mav, adrian, ian
Differential Review: https://reviews.freebsd.org/D4761
merge with first commit, various compile hacks.
Includes:
- Support for X550EM devices.
- Support for Bypass adapters.
- Flow Director code moved to separate files
- SR-IOV code moved to separate files
- Netmap code moved to separate files
Differential Revision: https://reviews.freebsd.org/D11232
Submitted by: Jeb Cramer <cramerj@intel.com>
Reviewed by: erj@
Tested by: Jeff Pieper <jeffrey.e.pieper@intel.com>
Sponsored by: Intel Corporation
This patch was inspired by an opposite change made to shrink the code
for the boot loader.
On my i7-4770, it increases the skein1024 speed from 470 to 550 MB/s
Reviewed by: sbruno
MFC after: 1 month
Sponsored by: ScaleEngine Inc.
Differential Revision: https://reviews.freebsd.org/D7824
H2+ SoC is a stripped down version of H3 without gigabit ethernet and 4K HDMI.
Also add sun8i-h2-plus-orangepi-zero.dts to the build as we run on this board.
From the linux tune2fs(8) manpage:
"Allow the kernel to initialize bitmaps and inode tables and keep a high
watermark for the unused inodes in a filesystem, to reduce e2fsck(8) time.
This first e2fsck run after enabling this feature will take the full time,
but subsequent e2fsck runs will take only a fraction of the original time,
depending on how full the file system is."
Submitted by: Fedor Uporov
Differential Revision: https://reviews.freebsd.org/D11211
