Commit Graph

1404 Commits

Author SHA1 Message Date
Alexander Motin
dd3ebdba6f Add PCI IDs for the Intel ICH9M SATA controllers.
MFC after:	2 weeks
2011-12-14 13:12:55 +00:00
Alexander Motin
c8973d9e6c Add hw.ahci.force tunable to control whether AHCI drivers should attach
to known AHCI-capable chips (AMD/NVIDIA), configured for legacy emulation.

Enabled by default to get additional performance and functionality of AHCI
when it can't be enabled by BIOS. Can be disabled to honor BIOS settings if
needed for some reason.

MFC after:	1 month
2011-12-02 12:52:33 +00:00
Hans Petter Selasky
3b12bdb58f Rename device_delete_all_children() into device_delete_children().
Suggested by:	jhb @ and marius @
MFC after:	1 week
2011-11-22 21:56:55 +00:00
Hans Petter Selasky
11bcf702f4 Move the device_delete_all_children() function from usb_util.c
to kern/subr_bus.c. Simplify this function so that it no longer
depends on malloc() to execute. Identify a few other places where
it makes sense to use device_delete_all_children().

MFC after:	1 week
2011-11-19 10:11:50 +00:00
Ed Schouten
6472ac3d8a Mark all SYSCTL_NODEs static that have no corresponding SYSCTL_DECLs.
The SYSCTL_NODE macro defines a list that stores all child-elements of
that node. If there's no SYSCTL_DECL macro anywhere else, there's no
reason why it shouldn't be static.
2011-11-07 15:43:11 +00:00
Marius Strobl
741d3d922c In r225931 I've missed the only other driver using the pointer returned
by rman_get_virtual(9) to access device registers sparc64 currently cares
about.
Ideally ata(4) should just be converted to access these using bus_space(9)
read/write functions instead as there's really no reason to do it the
former way. However, this part of ata-siliconimage.c should go away in
favor of siis(4) sooner or later anyway and I don't have the hardware to
actually test the SX4 bits of ata-promise.c.
Also ideally the other architectures should also properly handle the
BUS_SPACE_MAP_LINEAR flag of bus_space_map(9) so this code wouldn't need
to be #ifdef'ed.
2011-11-01 17:57:21 +00:00
Alexander Motin
c779dc1485 Some dmesg cosmetics:
- for the legacy PCI ATA channels move channel number out of the device
description, same as it is for ahci(4), siis(4) and mvs(4);
 - add device description for the ISA ATA channels.
2011-10-24 08:47:23 +00:00
Craig Rodrigues
8d1a3b6998 Add a "kern.features.ata_cam" sysctl in the kernel when the ATA_CAM kernel
option is defined.  This sysctl can be queried by feature_present(3).

Query for this feature in /sbin/atacontrol and /usr/sbin/burncd.
If these utilities detect that ATA_CAM is enabled, then these utilities
will error out.  These utilities are compatible with the old ATA
driver, but are incomptible with the new ATA_CAM driver.  By erroring out,
we give end-users an idea as to what remedies to use, and reduce the need for them
to file PR's.  For atacontrol, camcontrol must be used instead,
and for burncd, alternative utilties from the ports collection must be used
such as sysutils/cdrtools.

In future, maybe someone can re-write burncd to work with ATA_CAM,
but at least for now, we give a somewhat useful error message to end users.

PR:		160979
Reviewed by:	jh, Arnaud Lacombe <lacombar at gmail dot com>
Reported by:	Joe Barbish <fbsd8 at a1poweruser dot com>
MFC after:	3 days
2011-10-09 21:42:02 +00:00
Wesley Shields
28d35e546e Fix a typo in a comment.
Approved by:	kib@
2011-10-06 16:13:47 +00:00
Alexander Motin
df6f430410 Do not force AHCI mode on NVIDIA MCP89 SATA controllers. Recent Apple
Mac with this chipset does not initialize AHCI mode unless it is started
from EFI loader.  However, legacy ATA mode works.

Submitted by:	jkim@ (original version)
Approved by:	re (kib)
MFC after:	1 week
2011-08-02 11:07:47 +00:00
Alexander Motin
dd60e051f7 - Use mutex to serialize index/data register pair usage, when
accessing SATA registers. Unserialized access under heavy load caused
wrong speed reporting and potentially could cause device loss.
 - To free memory and other resources (including above), allocated
during chipinit() method call on attach, add new chipdeinit() method,
called during driver detach.

Submitted by:   Andrew Boyer <aboyer@averesystems.com> (initial version)
Approved by:	re (kib)
MFC after:	1 week
2011-07-22 16:37:04 +00:00
Alexander Motin
e292b310e9 Skip BAR(5) usage for SATA registers access on ICH8M Apples, because for
some reason it causes system lock up. Linux does the same.

MFC after:	1 week
2011-06-14 20:30:15 +00:00
Alexander Motin
0eac2d6be3 Intel NM10 chipset's SATA controller has same PCI ID and revision as ICH7's,
but has only 2 SATA ports instead of 4. The worst part is that SStatus and
SError registers for missing ports are not implemented and return wrong
values (0xffffffff), that caused infinite reset loop.

Just ignore that SError value while I found no better way to identify them.
2011-06-09 16:30:13 +00:00
Jack F Vogel
73e3bb6563 Chipset support for the new Intel Panther Point PCH, thanks
to Seth Heasley for preparing the changes.
2011-05-11 20:31:27 +00:00
Alexander Motin
c7dd7de64d According to ATA specifications, when ATAPI master is the only device, it
should respond with all zeroes to any access to slave registers. Test with
PATA devices confirmed such behavior. Unluckily, Intel SATA controllers in
legacy emulation mode behave differently, not making any difference between
ATA and ATAPI devices. It causes false positive slave device detection and,
as result, command timeouts.

To workaround this problem, mask result of legacy-emulated soft-reset with
the device presence information received from the SATA-specific registers.
2011-04-21 20:56:34 +00:00
Alexander Motin
53479021ba - Fix mapping of the last two SATA ports on 6-port Intel controllers.
This improves hard-reset and hot-plug on these ports.
 - Device with ID 0x29218086 is a 2-port variant of ICH9 in legacy mode.
Skip probing for nonexistent slave devices there.
2011-04-21 11:44:16 +00:00
Alexander Motin
f8c9d0d8c8 Use periodic status polling added at r214671 only in ATA_CAM mode. Legacy
mode won't receive much benefit from it due to its hot-plug limitations.
2011-04-21 09:02:19 +00:00
Alexander Motin
2ef549f3e8 Make PATA-like soft-reset in ata(4) more strict in checking disk signature.
It allows to avoid false positive device detection under Xen, that caused
long probe delays due to subsequent IDENTIFY command timeouts.

MFC after:	1 month
2011-04-21 07:26:14 +00:00
Alexander Motin
f3c987e58e Implement automatic SCSI sense fetching for ata(4) in ATA_CAM mode.
While it could be successfully done by CAM error recovery code, I was
told by several people that it is also a SIM obligation.
2011-04-12 09:55:24 +00:00
Marius Strobl
20359f8025 Add missing bus_dmamap_sync() calls for the work DMA map.
MFC after:	2 weeks
2011-03-06 13:08:25 +00:00
Marius Strobl
c3719ff443 Add missing bus_dmamap_sync() calls for the work DMA map.
MFC after:	2 weeks
2011-03-06 13:06:41 +00:00
Marius Strobl
1ae5318fe8 - Allocate the DMA memory used for the work area as coherent as at least
the ataahci(4) and atamarvell(4) drivers share it between the host and
  the controller.
- Spell some zeros as BUS_DMA_WAITOK when used as bus_dmamem_alloc() flags.

MFC after:	2 weeks
2011-03-06 12:54:00 +00:00
Nathan Whitehorn
65cb6238bd Add the disk ident and a human-meaningful description (here, the disk model
string) to the geom_disk config XML so that they are easily accessible from
userland.

MFC after:	1 week
2011-02-26 14:58:54 +00:00
Jack F Vogel
bf0477b215 Support for the new Patsburg PCH chipset:
- SMBus Controller
     - SATA Controller
     - HD Audio Controller
     - Watchdog Controller

Thanks to Seth Heasley (seth.heasley@intel.com) for providing us code.

MFC after 3 days
2011-02-01 01:05:11 +00:00
Jack F Vogel
d5267ede37 Support for the new DH89xxCC PCH chipset including:
- SATA controller
      - Watchdog timer
      - SMBus controller
2011-01-31 18:41:52 +00:00
Alexander Motin
f1bfc8aba8 ICH7 SATA controller in legacy mode can provide access to SATA registers
via AHCI-like memory resource at BAR(5). Use it if BIOS was so kind to
allocate memory for that BAR. This allows hot-plug support and connection
speed reporting.

MFC after:	2 weeks
2011-01-24 09:24:20 +00:00
Marius Strobl
1510a2b019 Several chipset drivers alter parameters relevant for the DMA tag creation,
i.e. alignment, max_address, max_iosize and segsize (only max_address is
thought to have an negative impact regarding this issue though), after
calling ata_dmainit() either directly or indirectly so these values have
no effect or at least no effect on the DMA tags and the defaults are used
for the latter instead. So change the drivers to set these parameters
up-front and ata_dmainit() to honor them.

Reviewd by:	mav
MFC after:	1 month
2010-11-28 18:53:29 +00:00
Alexander Motin
8a1d183fb7 Do hard reset before soft reset for SATA channels. Soft reset reported to be
not enough to restore device readiness in some situations.

Tested by: 	Roger Hammerstein <cheeky.m@live.com> on ServerWorks HT1000.
2010-11-27 07:03:31 +00:00
Alexander Motin
95e97044c7 Make ATA_CAM wrapper to report SATA power management capabilities to CAM to
make it configure device to initiate transitions if controller configured
to accept them. This makes hint.ata.X.pm_level=1 mode working.
2010-11-18 19:28:45 +00:00
Alexander Motin
5c2a4ae217 Even if we are skipping SATA hard reset - set power management bits in
SControl register. This should make things consistent and help to avoid
unexpected PHY events that I've noticed in some cases on VIA controllers.
2010-11-18 11:58:17 +00:00
Alexander Motin
1f6aa21d47 Record that there is no devices if SATA reset found none. 2010-11-18 10:34:18 +00:00
Alexander Motin
ee597c8246 Some VIA SATA controllers provide access to non-standard SATA registers via
PCI config space. Use them to implement hot-plug and link speed reporting.
Tested on ASRock PV530 board with VX900 chipset.
2010-11-18 08:03:40 +00:00
Alexander Motin
040545848d Add IDs for VIA VX900 chipset SATA controller.
(Missed part of r215428)
2010-11-17 17:52:04 +00:00
Alexander Motin
2cbfd42740 Add IDs for VIA VX900 chipset SATA controller.
MFC after:	1 week
2010-11-17 16:17:35 +00:00
Rebecca Cran
b1ce21c6ef Fix typos.
PR:	bin/148894
Submitted by:	olgeni
2010-11-09 10:59:09 +00:00
Alexander Motin
ba3a999598 Teach ahci(4), siis(4) and ATA_CAM ata(4) wrapper report to CAM residual
I/O length on underruns, that often happens for some SCSI commands.
2010-11-08 15:36:15 +00:00
Alexander Motin
285ba17329 Mark command submission timeouts as timeouts. This should trigger device
resets and increase chances of getting device back again.
2010-11-06 19:11:49 +00:00
Alexander Motin
618c8d01f2 Add support for odd-sized PIO transfers, sometimes used by ATAPI. 2010-11-06 14:22:50 +00:00
Alexander Motin
82d2b37bc0 Remove stale line, accidentally slipped into r214016.
MFC after:	3 days
2010-11-02 09:31:24 +00:00
Alexander Motin
bda55b6adb Set of legacy mode SATA enchancements:
- Implement proper combined mode decoding for Intel controllers to properly
identify SATA and PATA channels and associate ATA channels with SATA ports.
This fixes wrong reporting and in some cases hard resets to wrong SATA ports.
- Improve SATA registers support to handle hot-plug events and potentially
interface errors. For ICH5/6300ESB chipsets these registers accessible via
PCI config space. For later ones they may be accessible via PCI BAR(5).
- For controllers not generating interrupts on hot-plug events, implement
periodic status polling. Use it to detect hot-plug on Intel and VIA
controllers. Same probably could also be used for Serverworks and SIS.
2010-10-18 11:30:13 +00:00
Alexander Motin
ba8834a379 Revert r132291.
Restore setting PIO/WDMA timings for VIA UDMA133 controllers.
Linux disables only AST register writing there, but no all timings.
2010-09-30 16:09:52 +00:00
Alexander Motin
433d4558c1 Add missing le32toh(), same as recently done in ata-siliconimage.c. 2010-09-24 07:14:14 +00:00
Jayachandran C.
831826341b Add missing byteswap, works on big endian systems now (tested on Netlogic
XLS MIPS processor).

Submitted by:	Sreekanth M. S. <kanthms at netlogicmicro dot com>
Reviewed by:	mav
2010-09-23 05:17:36 +00:00
Nathan Whitehorn
c14e163ad1 Fix a problem where device detection would work unreliably on Serverworks
K2 SATA controllers. The chip's status register must be read first, and
as a long, for other registers to be correctly updated after a command, and
this includes the command sequence in device detection as well as the
previously handled case after interrupts. While here, clean up some
previous hacks related to this controller.

Reported by:	many
Reviewed by:	mav
MFC after:	3 weeks
2010-09-09 13:17:30 +00:00
Alexander Motin
a6c48c7c72 Add fix for SiI3114 and SiI3512 chips bug, which caused sending R_ERR in
response to DMA activate FIS under certain circumstances. This is
recommended fix from chip datasheet. If triggered, this bug most likely
cause write command timeout.

MFC after:	2 weeks
2010-09-02 12:32:29 +00:00
Alexander Motin
a250a687f7 SATA1.x SiliconImage controllers on power-on reset TFD Status register into
value 0xff. On hot-plug this value confuses ata_generic_reset() device
presence detection logic. As soon as we already know drive presence from
SATA hard reset, hint ata_generic_reset() to wait for device signature
until success or full timeout.
2010-09-02 11:18:43 +00:00
Alexander Motin
901c71c704 Increase device reset timeout from 10 to 15 seconds, same as in ahci(4).
Some devices found need about 10-12 seconds to spinup.
2010-09-01 06:43:41 +00:00
Alexander Motin
bfc8500c34 Add Intel Cougar Point PCH SATA Controller DeviceIDs. Correct some existing
entries for Intel Ibex Peak (5 Series/3400 Series) PCH SATA controllers.

Submitted by:	jfv@
MFC after:	1 week
2010-08-28 07:10:51 +00:00
Alexander Motin
8edcf69406 Export PCI IDs of ATA/SATA controllers through CAM and ata(4) layers to
GEOM. This information needed for proper soft-RAID's on-disk metadata
reading and writing.
2010-07-25 15:43:52 +00:00
Alexander Motin
e064bdc08a Make legacy ATA emulation detection more strict. This should fix false
positive legacy detection and attach failure/panic for Marvell 88SX6141
controller and potentially some others.

PR:		kern/145064
2010-07-16 17:27:43 +00:00
Alexander Motin
6332c92180 Improve interrupt setup errors handling. 2010-07-16 10:05:00 +00:00
Alexander Motin
b6ef82a03b Disable multi-sector PIO transfers if ATA_SET_MULTI command failed.
Submitted by:	Mikolaj Golub on fs@
2010-07-13 06:42:47 +00:00
Alexander Motin
cd646aba81 Revert and remake r209883:
Do not grab lock while setting up interrupt, as it causes LOR with
allocation code. Instead make interrupt handler check that CAM bus
initialization completed before touching it.

While there, slightly improve attach errors handling.

Reported by:	kib
2010-07-12 12:16:11 +00:00
Alexander Motin
aecfe194a9 If ata_sata_phy_reset() failed and ata_generic_reset() is not called, mark
channel as having no devices connected. This improves hot-unplug operation
on legacy-emulating SATA controllers.
2010-07-10 15:36:27 +00:00
Alexander Motin
663c22a27d On attach, grab channel lock before setting up interrupt. This fixes crash
in ATA_CAM mode if phy connect event arrive before CAM bus initialization
completed.
2010-07-10 15:27:27 +00:00
Alexander Motin
9a9bce34f1 Make hw.ata.ata_dma_check_80pin tunable affect not only device side, but
also controller side cable checks. Make respective sysctl writable.

PR:		kern/143462
2010-07-10 13:46:14 +00:00
Warner Losh
2a08b0b7a1 Add a safety-belt. If the identified disk has 0 blocks, don't attach
it.  This can happen in some cases when plugging in SD/SmartCard PC
Cards with empty slots.  It is better to detect this bogosity, and
refuse to attach rather than panic with a division by zero (in one of
many places) down stream.
2010-07-04 07:42:52 +00:00
Warner Losh
907659f0dc Minor formatting nits. 2010-07-04 05:58:17 +00:00
Alexander Motin
7ce1f3e580 Add ata(4) ability to limit initial ATA mode for devices via device hints.
After boot this mode can be changed with atacontrol/camcontrol as usual.
It works for both legacy and ATA_CAM wrapper mode.

PR:		kern/123980
2010-07-03 14:14:42 +00:00
Nathan Whitehorn
7248ea35ca Following r209299, level interrupts are low by default on PPC, so remove
the hack here to reprogram the interrupt for K2 SATA devices.
2010-06-18 14:17:45 +00:00
Nathan Whitehorn
351129c7bb Some revisions of the Serverworks K2 SATA controller have a data
corruption bug where if an ATA command is issued before DMA is started,
data will become available to the controller before it knows what to do
with it. This results in either data corruption or a controller crash.

This patch remedies the problem by adopting the workaround employed
by Linux and Darwin: starting the DMA engine prior to sending the ATA
command.

Observer on:	Xserve G5
Reviewed by:	mav
MFC after:	1 week
2010-06-06 14:09:48 +00:00
Nathan Whitehorn
33520e90b2 Correct the comment. We now use level low instead of edge high for this
interrupt.
2010-06-05 16:27:15 +00:00
Nathan Whitehorn
ff6f4d01f1 Partially revert r208162 while waiting for review on a more comprehensive
fix. On Apple OpenPICs, the low/high bit of the interrupt sense is only
respected for interrupt 0. We currently erroneously program all OpenPIC
interrupts level high instead of level low by default, which only matters
for some G5 systems where the SATA controllers use IRQ 0.

This change is a quick fix that will be reverted once the effect of
changing the default interrupt sense on embedded systems is known.

MFC after:	3 days
2010-06-05 16:25:25 +00:00
Alexander Motin
20b964467e Fix possible use after free.
Found with:   Coverity Prevent(tm)
CID:          4634
2010-06-05 08:58:03 +00:00
Alexander Motin
c25d9e1d96 Fix use after free on error.
Found with:   Coverity Prevent(tm)
CID:          4722
2010-06-05 08:44:40 +00:00
Alexander Motin
6ee9deb145 Fix PCH chipset IDs. They are 0x3bxx, not 0x3axx.
Pointy hat to:	me
2010-06-04 07:35:59 +00:00
Alexander Motin
445cc79ca9 Report ATA/SATA channel number to NewBus at location string. 2010-05-22 07:32:47 +00:00
Alexander Motin
6533cd198d Improve suspend/resume support. Make sure controller is idle on suspend
and reset it on resume.
2010-05-21 13:29:28 +00:00
Marius Strobl
4461491b3e Change ad_firmware_geom_adjust() to operate on a struct disk * only and
hook it up to ada(4) also. While at it, rename *ad_firmware_geom_adjust()
to *ata_disk_firmware_geom_adjust() etc now that these are no longer
limited to ad(4).

Reviewed by:	mav
MFC after:	3 days
2010-05-20 12:46:19 +00:00
Nathan Whitehorn
4dea0435b5 Relocate interrupt sense setting for K2 SATA from the ATA driver to the
OFW PCI layer and read the sense directly from the device tree instead
of guessing.

MFC after:	1 week
2010-05-16 17:55:09 +00:00
Alexander Motin
5b228a7a86 Add Target/LUN ID checks. 2010-04-30 08:37:00 +00:00
Alexander Motin
22b9488310 Mark ATA channel as idle on timeout in non-ATA_CAM mode.
This should fix possible duplicate request completion.

Submitted by:	mjacob
2010-04-26 11:58:15 +00:00
Alexander Motin
b9f59cca0d For early ALI chips do not announce I/O sizes that require unsupported
48bit DMA commands.
2010-04-14 15:29:32 +00:00
Alexander Motin
9b07950346 Include opt_ata.h, as some structures here depending on ATA_CAM option.
This fixes ATA_CAM with atamvsata and probably some other drivers.
2010-03-31 07:20:10 +00:00
Alexander Motin
d542863e48 Use last 16 bytes of serial number in metadata instead of first ones,
same as Intel MatrixRAID does.

PR:		kern/124064
2010-03-26 10:18:19 +00:00
Alexander Motin
2d6d3b6d73 Mask disk_idx to avoid panic because of extra bits set.
PR:		kern/102211
Submitted by:	yoichi
2010-03-12 07:49:10 +00:00
Alexander Motin
f60d46f99a - Add ALI M5228 PATA ID.
- Add missed DMA initialization for ALI SATA chips.
2010-03-01 07:32:49 +00:00
Alexander Motin
5261b668c1 Fix recursive lock attempt on hot-plug event in non-ATA_CAM mode. 2010-02-23 16:39:53 +00:00
Alexander Motin
41a11d8753 Oops! Wrong word order. :( 2010-02-22 17:34:35 +00:00
Alexander Motin
6f2c1316f0 Add Intel PCH SATA controller IDs. 2010-02-22 16:27:47 +00:00
Alexander Motin
6a5d28b93a Improve output for controllers that doesn't report SATA speed. 2010-02-22 10:45:40 +00:00
Alexander Motin
a4271edc11 Report SATA300 chips also as SATA. 2010-02-05 14:41:18 +00:00
Alexander Motin
8c38cd7ceb Implement poll method for atapicam.
It is not perfect, but better then nothing.
2010-02-03 21:45:09 +00:00
Alexander Motin
fff784a8da Report to CAM unit number of underlying ataX bus device, instead of this
atapicamX. It is more apropriate and useful together with "ata" name.
2010-02-03 21:26:54 +00:00
Alexander Motin
4cca153030 - Give ATA/SATA SIMs info about ATAPI packet size, supported by device.
- Make ATA XPT to reject longer SCSI CDBs then supported by device, or
any SCSI CDBs, if device doesn't support ATAPI.
2010-02-02 11:09:28 +00:00
Alexander Motin
e024cf2af0 NetCell is a PCI hardware RAID without cable and mode setting. 2010-02-01 15:22:22 +00:00
Alexander Motin
83c5d981ac MFp4: Large set of CAM inprovements.
- Unify bus reset/probe sequence. Whenever bus attached at boot or later,
CAM will automatically reset and scan it. It allows to remove duplicate
code from many drivers.
- Any bus, attached before CAM completed it's boot-time initialization,
will equally join to the process, delaying boot if needed.
- New kern.cam.boot_delay loader tunable should help controllers that
are still unable to register their buses in time (such as slow USB/
PCCard/ CardBus devices), by adding one more event to wait on boot.
- To allow synchronization between different CAM levels, concept of
requests priorities was extended. Priorities now split between several
"run levels". Device can be freezed at specified level, allowing higher
priority requests to pass. For example, no payload requests allowed,
until PMP driver enable port. ATA XPT negotiate transfer parameters,
periph driver configure caching and so on.
- Frozen requests are no more counted by request allocation scheduler.
It fixes deadlocks, when frozen low priority payload requests occupying
slots, required by higher levels to manage theit execution.
- Two last changes were holding proper ATA reinitialization and error
recovery implementation. Now it is done: SATA controllers and Port
Multipliers now implement automatic hot-plug and should correctly
recover from timeouts and bus resets.
- Improve SCSI error recovery for devices on buses without automatic sense
reporting, such as ATAPI or USB. For example, it allows CAM to wait, while
CD drive loads disk, instead of immediately return error status.
- Decapitalize diagnostic messages and make them more readable and sensible.
- Teach PMP driver to limit maximum speed on fan-out ports.
- Make boot wait for PMP scan completes, and make rescan more reliable.
- Fix pass driver, to return CCB to user level in case of error.
- Increase number of retries in cd driver, as device may return several UAs.
2010-01-28 08:41:30 +00:00
Alexander Motin
6d21c943a3 Add one more type cast, missed in r203043. 2010-01-27 06:28:16 +00:00
Alexander Motin
a868f1265e Do not place fake interrupt register on chip.
Now we have better place for it.
2010-01-26 20:27:20 +00:00
Alexander Motin
8abceb703e Restore SATA speed reporting, broken by ATA_CAM changes. 2010-01-26 16:18:45 +00:00
Alexander Motin
ad753ac2a7 Clear ch->devices, if hard-reset failed.
This makes hot-plug work nicely.

HW donated by:	James R. Van Artsdalen
2010-01-26 16:05:49 +00:00
Alexander Motin
6268666c1b Add support for SATA part of Marvell 88SE912x controllers to ahci(4).
Limit early revisions from 6Gb/s to 3Gb/s by default, or they negotiate
only 1.5Gbps, when 3Gb/s devices connected.

Add dummy driver for PATA part of these controllers, preventing generic
driver attach them. It causes system freeze when SATA controller used after
PATA was touched.
2010-01-26 15:25:24 +00:00
Rui Paulo
4135f5cf7d Make ata_getrev() an optional method by implementing ata_null_getrev().
This fixes a bogus '???' boot message on Cambria boards with a CompactFlash
card.

Reviewed by:	mav
2010-01-20 14:29:55 +00:00
Alexander Motin
2d0163ee22 Report which of IXP700 legacy ATA channels is SATA. 2010-01-10 11:02:10 +00:00
Alexander Motin
0025eb12c8 - Report SATA in legacy emulation mode still as SATA.
- Make ATA XPT able to handle such case.
2010-01-10 09:20:56 +00:00
Martin Blapp
c2ede4b379 Remove extraneous semicolons, no functional changes.
Submitted by:	Marc Balmer <marc@msys.ch>
MFC after:	1 week
2010-01-07 21:01:37 +00:00
Alexander Motin
7aab51b33e Add support for Intel SCH PATA controller.
PR:		kern/140251
2009-12-22 19:48:06 +00:00
Alexander Motin
922706175e Spell AMD properly. 2009-12-21 21:47:33 +00:00
Alexander Motin
c357f2c827 Add VIA CX700/VX800 chipsets SATA/PATA support.
PR:		kern/121521
Tested by:	Alex Deiter
2009-12-20 16:23:11 +00:00
Alexander Motin
1905fcfe0a Fairly set master/slave shared PIO/WDMA timings on ITE 821x controllers.
Previous implementation could only limit mode, but not rise it back.
2009-12-20 15:03:57 +00:00
Alexander Motin
6988053e0e Serverworks OSB4 has no 0x4a (piomode) register, do not touch it.
Also OSB4 has some problems with UDMA transfers, limit it to WDMA2.
2009-12-17 23:42:09 +00:00
Alexander Motin
8bff82df5a Large I/Os on Promise controllers reported to cause UDMA ICRC errors and
subsequent timeouts. Restore previous limit for now, at least until
I will have hardware to experiment.

PR:             kern/141438
2009-12-16 17:42:02 +00:00
Marius Strobl
e29c870781 Set ATA_CHECKS_CABLE when appropriate.
Reviewed by:	mav
MFC after:	1 week
2009-12-14 21:11:50 +00:00
Marius Strobl
74f5b28a4d Only set ATA_CHECKS_CABLE for chip versions that actually support
cable detection, i.e. neither for ALI_OLD nor for ALI_NEW revisions
>= 0xc7.

MFC after:	1 week
2009-12-13 20:36:42 +00:00
Marius Strobl
affcd29e6a Properly support M5229 revision 0xc7 and 0xc8:
- These revisions no longer have cable detection capability.
- The UDMA support bit of register 0x4b has been dropped without an
  replacement.
- According to Linux it's crucial for working ATAPI DMA support to
  also set the reserved bit 1 of regsiter 0x53 with these revisions.

MFC after:	1 week
2009-12-13 18:42:06 +00:00
Marius Strobl
4640fdb5b6 Specify the capability and media bits of the capabilities page in
native, i.e. big-endian, format and convert as appropriate like we
also do with the multibyte fields of the other pages. This fixes
the output of acd_describe() to match reality on big-endian machines
without breaking it on little-endian ones. While at it, also convert
the remaining multibyte fields of the pages read although they are
currently unused for consistency and in order to prevent possible
similar bugs in the future.

MFC after:	1 week
2009-12-13 18:26:19 +00:00
Marius Strobl
0966baf709 Unbreak the ata_atapi() usage. Since r200171 the mode setting functions
get a ata_device type device passed instead of a ata_channel one, thus
ata_atapi() has to be adjusted accordingly.

Reviewed by:	mav
MFC after:	3 days
2009-12-13 00:13:21 +00:00
Alexander Motin
c2023eeaad CFA support doesn't exclude FLUSH support.
Submitted by:	Grzegorz Bernacki
2009-12-11 16:32:59 +00:00
Takanori Watanabe
28336d6080 Add module dependency for cam if configured as ATA_CAM. 2009-12-10 16:55:16 +00:00
Alexander Motin
7f719ba784 Limit maximum I/O size, depending on command set supported by device.
It is required to suppot non-LBA48 devices with MAXPHYS above 128K.
Same is done in ada(4).
2009-12-10 09:26:56 +00:00
Alexander Motin
066f913a94 MFp4:
Introduce ATA_CAM kernel option, turning ata(4) controller drivers into
cam(4) interface modules. When enabled, this options deprecates all ata(4)
peripheral drivers (ad, acd, ...) and interfaces and allows cam(4) drivers
(ada, cd, ...) and interfaces to be natively used instead.

As side effect of this, ata(4) mode setting code was completely rewritten
to make controller API more strict and permit above change. While doing
this, SATA revision was separated from PATA mode. It allows DMA-incapable
SATA devices to operate and makes hw.ata.atapi_dma tunable work again.

Also allow ata(4) controller drivers (except some specific or broken ones)
to handle larger data transfers. Previous constraint of 64K was artificial
and is not really required by PCI ATA BM specification or hardware.

Submitted by:	nwitehorn (powerpc part)
2009-12-06 00:10:13 +00:00
Alexander Motin
ff09f97fb4 Do not ignore device interrupt if bus mastering is still active. It is
normal in case of media read error and some ATAPI cases, when transfer size
is unknown beforehand. PCI ATA BM specification tells that in case of such
underrun driver should just manually stop DMA engine. DMA engine should
same time guarantie that all bus mastering transfers completed at the moment
of driver reads interrupt flag asserted.
This change should fix interrupt storms and command timeouts in many cases.

PR:		kern/103602, sparc64/121539, kern/133122, kern/139654
2009-12-05 13:40:51 +00:00
Alexander Motin
00f0143052 On Soft Reset, read device signature from FIS receive area, instead of
PxSIG register. It works better for NVidia chipsets. ahci(4) does the same.

PR:		kern/140472, i386/138668
2009-12-05 10:30:54 +00:00
Alexander Motin
bcbe578a6a Drop USB mass storage devices support from ata(4). It is out of the build as
long as I remember, and completely superseded by better maintained umass(4).
It's main idea was to optionally avoid CAM dependency for such devices, but
with move ATA to CAM, it is not actual any more.

No objections:	hselasky@, thompsa@, arch@
2009-11-26 12:41:43 +00:00
Alexander Motin
32e7052ed0 Use only lower byte of sectors_intr IDENTIFY word as sector count.
This fixes SET_MULTI error during boot on devices supporting less then
16 sectors per interrupt.
2009-11-24 14:06:15 +00:00
Alexander Motin
301f81f0fb Release over-agressive WDMA0 mode timings as close to spec as chip can. 2009-11-22 12:19:50 +00:00
Alexander Motin
48a21eb99c Fix Intel PATA UDMA timings setting, affecting write performance.
Binary divider value 10 specified in datasheet is not a hex 0x10.
UDMA2 should be 33/2 instead of 66/4, which is documented as reverved,
UDMA4 should be 66/2 instead of 66/4, which is definitely wrong.
2009-11-22 11:17:31 +00:00
Alexander Motin
6bd8779bb9 Change the way in which AHCI+PATA combined controllers, such as JMicron
and Marvell handled. Instead of trying to attach two different drivers to
single device, wrapping each call, make one of them (atajmicron, atamarvell)
attach do device solely, but create child device for AHCI driver,
passing it all required resources. It is quite easy, as none of
resources are shared, except IRQ.

As result, it:
- makes drivers operation more independent and straitforward,
- allows to use new ahci(4) driver with such devices, adding support for
new features, such as PMP and NCQ, same time keeping legacy PATA support,
- will allow to just drop old ataahci driver, when it's time come.
2009-11-16 15:38:27 +00:00
Alexander Motin
00c4be80ae Disable PMP probing for Marvell AHCI controllers.
It is not working for some reason. Linux does the same.
2009-11-14 08:04:38 +00:00
Alexander Motin
3f809d7a40 Add support for SATA ports on SATA+PATA Marvell controllers.
These controllers provide combination of AHCI for SATA and legacy
PCI ATA for PATA. Use same solution as used for JMicron controllers.
Add IDs of Marvell 88SX6102, 88SX6111. 88SX6141 alike controllers
2009-11-13 22:53:49 +00:00
Alexander Motin
fb549e86e7 Add more ICH10 chip IDs.
Submitted by:	Dmitry S. Luhtionov <mitya@cabletv.dp.ua>
2009-11-09 09:27:09 +00:00
Alexander Motin
6fb5300b34 Introduce define and kernel option ATA_REQUEST_TIMEOUT to control ATA(4)
command timeout.

Submitted by:	keramida
2009-11-08 14:33:19 +00:00
Alexander Motin
99844cbf65 Add IDs for nVidia MCP65/77/79/89 SATA conntrollers. 2009-11-02 19:02:31 +00:00
Alexander Motin
6fd3e622e2 MFp4:
Allow SATA1 SiI chips to do full-sized DMA. Specification tells that we may
release DMA constrants even more, but it require some additional handling.
2009-11-01 13:06:15 +00:00
Alexander Motin
25dd82a35b Allow newly added controllers to use full I/O sizes. 2009-10-31 14:19:50 +00:00
Alexander Motin
ebbb35ba70 MFp4:
- Remove most of direct relations between ATA(4) peripherial and controller
levels. It makes logic more transparent and is a mandatory step to wrap
ATA(4) controller level into ATA-native CAM SIM.
- Tune AHCI and SATA2 SiI drivers memory allocation a bit to allow bigger
I/O transaction sizes without additional cost.
2009-10-31 13:24:14 +00:00
Alexander Motin
6aca3a5d0b Add support for different request block format used by Gen-IIe Marvell SATA.
This adds support for Marvell 6042/7042 chips and Adaptec 1430SA controller.
2009-10-30 20:28:49 +00:00
Nathan Whitehorn
e5310f3310 Add some magic taken from OS X and Linux to support early revision K2
SATA controllers, like those found on the G5 Xserve.

Reviewed by:	mav
2009-10-29 13:28:37 +00:00
Nathan Whitehorn
f3755df16d Turn off use of ATA_A_4BIT on modern hardware. This flag was already
obsoleted in 1996 by ATA-2, and crashes some modern hardware like some
revisions of the Serverworks K2 SATA controller. Even very ancient
hardware seems not to require it. In the unlikely event this causes
problems, the previous behavior can be re-enabled by defining
ATA_LEGACY_SUPPORT at the top of this file.

Reviewed by:	Alexander Motin <mav@freebsd.org>
2009-10-29 13:27:14 +00:00
Jaakko Heinonen
e4bd91445e Don't ignore the return value of g_modevent() in acd_modevent().
Approved by:	trasz (mentor)
2009-10-27 17:12:59 +00:00
Alexander Motin
84f620d3e2 Report SATA speeds to CAM, to not confuse users with low numbers logged. 2009-10-26 11:26:49 +00:00
Alexander Motin
e8579543e8 Round timeout up when converting CAM milliseconds to ATA seconds. 2009-10-26 11:23:41 +00:00
Alexander Motin
cc0daebb53 Increase ATA command timeouts. Some drives need more then 5s to spin-up.
PR:		kern/111023
2009-10-26 11:20:14 +00:00
Alexander Motin
3663f8041b Add IDs for PATA part also. 2009-10-26 10:07:52 +00:00
Alexander Motin
6d3af67b23 Add two more VIA SATA chip IDs.
PR:		kern/135057
2009-10-26 10:00:59 +00:00
Alexander Motin
55944f2a75 Fix SATA on nVidia MCP55 chipset. It needs some short time to allow BAR(5)
memory access.

PR:		amd64/128686, amd64/132372, amd64/139156
MFC after:	3 days
2009-10-26 08:41:10 +00:00
Alexander Motin
90759b0021 MFp4:
Do not differentiate 12/16 bytes ATAPI CCB formats when it is not needed.
2009-10-23 14:56:29 +00:00
Jung-uk Kim
b6e6000971 - Revert r191568 partially. Forcing AHCI mode by changing device subclass
and progif is evil.  It doesn't work reliably[1] and we should honor BIOS
configuration by the user.
- If the SATA controller is enbled but combined mode is disabled, mask off
the emulated IDE channel on the legacy IDE controller.

Pointed out by:	mav[1]
2009-10-05 16:26:54 +00:00
Marius Strobl
4640348546 - Add missing bus_dmamap_sync(9) calls for the work DMA map. Previously
the work area was totally unsynchronized which means this driver only
  had a chance of working on x86 when no bounce buffers were involved,
  which isn't that likely given that support for 64-bit DMA is currently
  broken throughout ata(4).
- Add necessary little-endian conversion of accesses to the work area,
  making this driver work on big-endian hosts. While at it, use the
  alignment-agnostic byte order encoders in order to be on the safe side.
- Clear the reserved member of the SG list entries in order to be on the
  safe side. [1]

Submitted by:	yongari [1]
Reviewed by:	yongari
MFC after:	3 days
2009-09-22 11:47:21 +00:00
Poul-Henning Kamp
6778431478 Revert previous commit and add myself to the list of people who should
know better than to commit with a cat in the area.
2009-09-08 13:19:05 +00:00
Poul-Henning Kamp
b34421bf9c Add necessary include. 2009-09-08 13:16:55 +00:00
Alexander Motin
4b861b1569 Remove constraint, requiring request data to fulfill controller's alignment
requirements. It is busdma task, to manage proper alignment by loading
data to bounce buffers.

PR:		kern/127316
Reviewed by:	current@
Tested by:	Ryan Rogers
2009-09-06 14:23:26 +00:00
Pawel Jakub Dawidek
e199673026 Remove 'ad:' prefix from disk serial number. We don't want serial number
to change when we reconnect the disk in a way that it is accessible through
CAM for example.

Discussed with:	trasz
2009-09-04 09:33:50 +00:00
John Baldwin
a56fe095f0 Temporarily revert the new-bus locking for 8.0 release. It will be
reintroduced after HEAD is reopened for commits by re@.

Approved by:	re (kib), attilio
2009-08-20 19:17:53 +00:00
Attilio Rao
444b91868b Make the newbus subsystem Giant free by adding the new newbus sxlock.
The newbus lock is responsible for protecting newbus internIal structures,
device states and devclass flags. It is necessary to hold it when all
such datas are accessed. For the other operations, softc locking should
ensure enough protection to avoid races.

Newbus lock is automatically held when virtual operations on the device
and bus are invoked when loading the driver or when the suspend/resume
take place. For other 'spourious' operations trying to access/modify
the newbus topology, newbus lock needs to be automatically acquired and
dropped.

For the moment Giant is also acquired in some key point (modules subsystem)
in order to avoid problems before the 8.0 release as module handlers could
make assumptions about it. This Giant locking should go just after
the release happens.

Please keep in mind that the public interface can be expanded in order
to provide more support, if there are really necessities at some point
and also some bugs could arise as long as the patch needs a bit of
further testing.

Bump __FreeBSD_version in order to reflect the newbus lock introduction.

Reviewed by:    ed, hps, jhb, imp, mav, scottl
No answer by:   ariff, thompsa, yongari
Tested by:      pho,
                G. Trematerra <giovanni dot trematerra at gmail dot com>,
                Brandon Gooch <jamesbrandongooch at gmail dot com>
Sponsored by:   Yahoo! Incorporated
Approved by:	re (ksmith)
2009-08-02 14:28:40 +00:00
Alexander Motin
b06555e4fc Restore PATA device probe order, broken by PMP support implementation,
requesting IDENTIFY from slave device first. This order is important
for proper cable type detection by master device.

PR:		kern/136438
Approved by:	re (kib)
2009-07-26 14:04:48 +00:00
Alexander Motin
d96aeec8ff Limit IOCATAREQUEST ioctl data size to controller's maximum I/O size.
It fixes kernel panic when requested size is too large (0xffffffff),

PR:             kern/136726
Approved by:    re (kib)
MFC after:      2 weeks
2009-07-16 19:48:39 +00:00
Alexander Motin
45a30a41d2 Fix Marvel SATA controllers operation, broken by rev. 188765,
by using uninitialized variable.

Tested by:	Chris Hedley
Approved by:	re (kensmith)
2009-07-13 18:01:49 +00:00
Scott Long
52c9ce25d8 Separate the parallel scsi knowledge out of the core of the XPT, and
modularize it so that new transports can be created.

Add a transport for SATA

Add a periph+protocol layer for ATA

Add a driver for AHCI-compliant hardware.

Add a maxio field to CAM so that drivers can advertise their max
I/O capability.  Modify various drivers so that they are insulated
from the value of MAXPHYS.

The new ATA/SATA code supports AHCI-compliant hardware, and will override
the classic ATA driver if it is loaded as a module at boot time or compiled
into the kernel.  The stack now support NCQ (tagged queueing) for increased
performance on modern SATA drives.  It also supports port multipliers.

ATA drives are accessed via 'ada' device nodes.  ATAPI drives are
accessed via 'cd' device nodes.  They can all be enumerated and manipulated
via camcontrol, just like SCSI drives.  SCSI commands are not translated to
their ATA equivalents; ATA native commands are used throughout the entire
stack, including camcontrol.  See the camcontrol manpage for further
details.  Testing this code may require that you update your fstab, and
possibly modify your BIOS to enable AHCI functionality, if available.

This code is very experimental at the moment.  The userland ABI/API has
changed, so applications will need to be recompiled.  It may change
further in the near future.  The 'ada' device name may also change as
more infrastructure is completed in this project.  The goal is to
eventually put all CAM busses and devices until newbus, allowing for
interesting topology and management options.

Few functional changes will be seen with existing SCSI/SAS/FC drivers,
though the userland ABI has still changed.  In the future, transports
specific modules for SAS and FC may appear in order to better support
the topologies and capabilities of these technologies.

The modularization of CAM and the addition of the ATA/SATA modules is
meant to break CAM out of the mold of being specific to SCSI, letting it
grow to be a framework for arbitrary transports and protocols.  It also
allows drivers to be written to support discrete hardware without
jeopardizing the stability of non-related hardware.  While only an AHCI
driver is provided now, a Silicon Image driver is also in the works.
Drivers for ICH1-4, ICH5-6, PIIX, classic IDE, and any other hardware
is possible and encouraged.  Help with new transports is also encouraged.

Submitted by:	scottl, mav
Approved by:	re
2009-07-10 08:18:08 +00:00
Alexander Motin
d498a2e62b Fix kernel panic, when ataahci driver is used on system with increased
MAXPHYS. Current ataahci driver memory allocation scheme includes only
64 items in DMA S/G table, and so not guarantied to support transactions
with more then 252K data.

Approved by:    re (kensmith)
MFC after:      2 weeks
2009-07-08 06:00:21 +00:00