Commit Graph

1296 Commits

Author SHA1 Message Date
Oleksandr Tymoshenko
66134c7e59 Clean-up fake preload data generator:
- Use macros to push scalar values
- Fix type mismatch for module size
2012-03-15 23:53:24 +00:00
Oleksandr Tymoshenko
fba09d4c08 Fill out fake preload structure to let userland tools like pmc(3) know
about kernel module base address and actual size
2012-03-15 05:29:51 +00:00
Adrian Chadd
49def78fbb Remove a now unneeded ARGE_UNLOCK().
Whilst I'm here, remove a couple blank lines.
2012-03-13 06:50:56 +00:00
Adrian Chadd
8a5350984f Fix link status handling on if_arge upon system boot to allow bootp/NFS to
function.

From the submitter:

This patch fixes an issue I encountered using an NFS root with an
ar71xx-based MikroTik RouterBoard 450G on -current where the kernel fails
to contact a DHCP/BOOTP server via if_arge when it otherwise should be able
to.  This may be the same issue that Monthadar Al Jaberi reported against
an RSPRO on 6 March, as the signature is the same:

%%%

DHCP/BOOTP timeout for server 255.255.255.255
DHCP/BOOTP timeout for server 255.255.255.255
DHCP/BOOTP timeout for server 255.255.255.255
.
.
.
DHCP/BOOTP timeout for server 255.255.255.255
DHCP/BOOTP timeout for server 255.255.255.255
arge0: initialization failed: no memory for rx buffers
DHCP/BOOTP timeout for server 255.255.255.255
arge0: initialization failed: no memory for rx buffers

%%%

The primary issue that I found is that the DHCP/BOOTP message that
bootpc_call() is sending never makes it onto the wire, which I believe is
due to the following:

- Last December, a change was made to the ifioctl that bootpc_call() uses
to adjust the netmask around the sosend().

- The new ioctl (SIOCAIFADDR) performs an if_init when invoked, whereas the
old one (SIOCSIFNETMASK) did not.

- if_arge maintains its own sense of link state in sc->arge_link_status.

- On a single-phy interface, sc->arge_link_status is initialized to 0 in
arge_init_locked().

- sc->arge_link_status remains 0 until a phy state change notification
causes arge_link_task to run, notice the link is up, and set it to 1.

- The inits caused by the ifioctls in bootpc_call are reinitializing the
interface, but not the phy, so sc->arge_link_status goes to 0 and remains
there.

- arge_start_locked() always sees sc->arge_link_status == 0 and returns
without queuing anything.

The attached patch changes arge_init_locked() such that in the single-phy
case, instead of initializing sc->arge_link_status to 0, it runs
arge_link_task() to set it according to the current phy state.  This change
has allowed my setup to mount an NFS root successfully.

Submitted by:	Patrick Kelsey <kelsey@ieee.org>
Reviewed by:	juli
2012-03-13 06:28:52 +00:00
Juli Mallett
f8e47016ec Don't build kernel.tramp on Octeon. Probably building it should be opt-in
not opt-out, but I don't know enough about which ports need it to get the
defaults right.
2012-03-13 06:22:49 +00:00
Adrian Chadd
eeaef4bae5 Correctly (I hope) deallocate the if_arge RX buffer ring on arge_stop().
I had some interesting hangs until I realised I should try flushing the
DDR FIFO register and lo and behold, hangs stopped occuring.

I've put in a few DDR flushes here and there in case people decide to
reuse some of these functions.  It's very very likely they're almost
all superflous.

To test:

* Connect to a network with a _lot_ of broadcast traffic
* Do this:
  # while true; do ifconfig arge0 down; ifconfig arge0 up; done

This fixes the mbuf exhaustion that has been reported when the interface
state flaps up/down.
2012-03-13 06:15:20 +00:00
Juli Mallett
4ea65e2064 Remove TARGET_BIG_ENDIAN which should have been removed previously. 2012-03-12 21:26:09 +00:00
Juli Mallett
379663d70b o) Use ABI, not ISA_* options, to determine whether to compile bits if libkern
required for the ABI the kernel is being built for.
   XXX This is implemented in a kind-of nasty way that involves including source
       files, but it's still an improvement.
o) Retire ISA_* options since they're unused and were always wrong.
2012-03-12 21:25:32 +00:00
Adrian Chadd
6ff44ffc53 Configuration changes/updates!
* enable ALQ and net80211/ath ALQ logging by default, to make it possible
  to get debug register traces.
* Update some comments
* Enable HWPMC for testing.
2012-03-12 20:32:23 +00:00
Juli Mallett
fee74cf7e8 Use 64-bit bus space constants on 64-bit kernels. 2012-03-12 18:56:16 +00:00
Juli Mallett
11ca697ba5 Remove more unused stuff, primarily a set of (unused, thankfully) PIO
functions.

Adjust nearby style of one assembly function END().
2012-03-12 18:10:01 +00:00
Juli Mallett
c8b31c8f20 Remove more unused code and declarations, and add dire warnings to the 64-bit
atomic ops used by 32-bit kernels.
2012-03-12 08:13:04 +00:00
Juli Mallett
312af517e3 Remove platform APIs which are not used by any code and which had only stub
implementations or no implementation on all platforms.

Some of these functions might be good ideas, but their semantics were unclear
given the lack of implementation, and an unlucky porter could be fooled into
trying to implement them or, worse, being baffled when something like
platform_trap_enter() failed to be called.
2012-03-12 07:34:15 +00:00
Oleksandr Tymoshenko
2a0fa68aca - Rename apb_intr to apb_filter since it's a filter handler
- Pass interrupt trapframe for handlers dow the chain
- Add PMC interrupt handler
    PMC interrupt is a special case, so we want handle it as soon as possible
    with minimum overhead. So we handle it apb filter routine.
2012-03-12 01:23:09 +00:00
Adrian Chadd
f0dc1b857c Begin modifying the PB92 config file to actually generate a flashable,
bootable image.

The kernel has to fit inside an 896KiB area in a 4MB SPI flash.
So a bunch of stuff can't be included (and more is to come), including
(unfortunately) IPv6.

TODO:

* GPIO modules need to be created
* Shrink the image a bit more by removing some of the CAM layer debugging
  strings.
2012-03-12 01:15:58 +00:00
Juli Mallett
e889b2b09e We've supported 64-bit PTEs for some time. 2012-03-11 22:17:01 +00:00
Juli Mallett
b5acc0d618 Disable the Simple Executive's error decoding/reporting code. 2012-03-11 06:55:17 +00:00
Juli Mallett
dc4ee6ca91 Merge the Cavium Octeon SDK 2.3.0 Simple Executive code and update FreeBSD to
make use of it where possible.

This primarily brings in support for newer hardware, and FreeBSD is not yet
able to support the abundance of IRQs on new hardware and many features in the
Ethernet driver.

Because of the changes to IRQs in the Simple Executive, we have to maintain our
own list of Octeon IRQs now, which probably can be pared-down and be specific
to the CIU interrupt unit soon, and when other interrupt mechanisms are added
they can maintain their own definitions.

Remove unmasking of interrupts from within the UART device now that the
function used is no longer present in the Simple Executive.  The unmasking
seems to have been gratuitous as this is more properly handled by the buses
above the UART device, and seems to work on that basis.
2012-03-11 06:17:49 +00:00
Juli Mallett
ecdb6b0261 Fix promiscuous mode with if_octm:
o) The MAC set must occur before the multicast list is set up as the former
   will enable the CAM unconditionally, while promiscuous mode disables it,
   so if promiscuous mode is to be set this must occur after the MAC is
   programmed.
o) The multicast list must be set up unconditionally as even if flags have
   not changed, if the interface has gone through a reinitialization, the
   state of the CAM as changed by the MAC initialization could be incorrect.
o) Call octm_init when flags change, even if the interface is already running.
2012-03-11 00:34:14 +00:00
Juli Mallett
86ce6e9fda Remove some headers not used by kernel or world and which are not present in
other ports.
2012-03-10 23:27:03 +00:00
Juli Mallett
21535672bb Fix reversed logic in previous commit that broke build and earned me quite the
pointy hat.

Submitted by:	bz
2012-03-10 18:35:38 +00:00
Juli Mallett
fff491331e Use ABI to determine bus_addr_t for cnMIPS. 2012-03-10 07:54:41 +00:00
Juli Mallett
4f32220bf6 o) Remove some CPU_CNMIPS-related magical thinking about the status register's
contents for user programs.
o) Conditionalize the installation of an XTLB handler on ABI, not CPU family.
2012-03-10 06:54:37 +00:00
Juli Mallett
fd71d13eb6 Get rid of mainbus.c. The version in nexus.c is being used and is
perfectly-sufficient and equally-crufty.
2012-03-10 06:45:21 +00:00
Juli Mallett
4b6b28c350 Don't truncate physical addresses to 32-bits. 2012-03-10 06:43:41 +00:00
Juli Mallett
13a7423bf5 Reduce diffs with freebsd32_sysarch. 2012-03-10 06:31:28 +00:00
Juli Mallett
fb2a44f292 o) Bump INTRCOUNT_COUNT to 256, since Octeon already has >128.
XXX It would be good to use a better way to size intrcnt.
o) Fix literal 4s that are supposed to be sizeof (u_long).
   XXX Why the * 2 here?  Is this an artifact of a different system that this
       code came from?  We seem to allocate twice as much space for intrcnt
       as we admit to in sintrcnt.
2012-03-10 05:38:04 +00:00
Juli Mallett
9ea99cd3b5 "Did you still want the not yet? I think we just arrived at yet."
Submitted by:	thompsa
2012-03-09 09:32:20 +00:00
Juli Mallett
f6f8319094 Enable COMPAT_FREEBSD32 for the Octeon kernel config by default. 2012-03-09 07:53:44 +00:00
Juli Mallett
3812e6817b Get rid of duplicated versions of the KSU bits. 2012-03-06 23:08:02 +00:00
Aleksandr Rybalko
7283f2ff0f Break long lines.
Approved by:	adri (mentor)
2012-03-06 22:45:54 +00:00
Aleksandr Rybalko
b906a7a912 Remove EoL whitespaces.
Approved by:	adri (mentor)
2012-03-06 22:16:10 +00:00
Juli Mallett
e13dfc355c Remove unused file. 2012-03-06 20:23:29 +00:00
Attilio Rao
9c170fd168 Disable the option VFS_ALLOW_NONMPSAFE by default on all the supported
platforms.
This will make every attempt to mount a non-mpsafe filesystem to the
kernel forbidden, unless it is expressely compiled with
VFS_ALLOW_NONMPSAFE option.

This patch is part of the effort of killing non-MPSAFE filesystems
from the tree.

No MFC is expected for this patch.
2012-03-06 20:01:25 +00:00
Juli Mallett
723616952d At the risk of reducing source compatibility with old NetBSD and Sprite:
o) Get rid of some unused macros related to features we don't intend to
   provide.
o) Get rid of macro definitions for MIPS-I CPUs.  We are not likely to
   support anything that predartes MIPS-III.
o) Respell MIPS3_* macros as MIPS_*, which is how most of them were being
   used already.
o) Eliminate a duplicate and mostly-unused set of exception vector macros.

There's still considerable duplication and lots more obsolete in our headers,
but this reduces one of the larger files to a size where one could reckon
about the correctness of its contents with a mere few hours of contemplation.

There is, of course, a question of whether we need definitions for fields,
registers and configurations that we are unlikely to ever use or implement,
even if they're not obsolete since 1991.  FreeBSD is not a processor
reference manual, and things that aren't used may be wrong, or may be
duplicated because nobody could possibly actually know whether they're
already defined.
2012-03-06 19:01:32 +00:00
Juli Mallett
0b94059f12 Garbage collect some unused symbols. 2012-03-06 08:40:21 +00:00
Juli Mallett
8e09ecbf10 Make the native sigreturn just wrap set_mcontext, much as freebsd32_sigreturn
does.
2012-03-06 08:10:48 +00:00
Juli Mallett
6fa3bc4f91 Store TLS base in the sigframe just as is done in freebsd32_sendsig. Because
the native sigreturn doesn't use set_mcontext like the COMPAT_FREEBSD32 version
does, this wouldn't actually result in overwriting the TLS base.  Probably it
makes sense to restructure the native sigreturn to use set_mcontext for
consistency, and to allow sigreturn to change the TLS base.
2012-03-06 08:02:10 +00:00
Juli Mallett
bdf4700515 Fix two and a half oversights in COMPAT_FREEBSD32 related to contexts and
TLS:
o) The mc_tls field used to store the TLS base when doing context gets and
   restores was left a pointer and not converted to a 32-bit integer.  This
   had the bug of not correctly capturing the TLS value desired by the user,
   and the extra nastiness of making the structure the wrong size.
o) The mc_tls field was not being saved by sendsig.  As a result, the TLS base
   would always be set to NULL when restoring from a signal handler.

Thanks to gonzo for helping track down a bunch of other TLS bugs that came out
of tracking these down.
2012-03-06 07:50:45 +00:00
Juli Mallett
22c6822677 When emulating rdhwr for TLS, use the 32-bit offset under COMPAT_FREEBSD32. 2012-03-06 07:47:28 +00:00
Oleksandr Tymoshenko
081fc905e2 Prepare for large TLS redo. Save pointer to the beginning of TLS area,
and offset it only if requested by RDHWR handler. Otherwise things
    get overly complicated - we need to track whether address passsed in
    request for setting td_md.md_tls is already offseted or not.
2012-03-06 03:25:50 +00:00
Juli Mallett
fb3c16bc48 In the trap messages that aid the primitive debugging environment of MIPS,
include the tid as well, so it's easier to tell which thread of a process
with multiple is responsible for a crash.
2012-03-06 02:23:15 +00:00
Juli Mallett
2bd5a2588e Fix tls base computation with COMPAT_FREEBSD32 on n64 kernels. The previous
version was missing an else and would always use the n64 TP_OFFSET.  Eliminate
some duplication of logic here.

It may be worth getting rid of some of the ifdefs and introducing gratuitous
SV_ILP32 runtime checks on n64 kernels without COMPAT_FREEBSD32 and on o32
kernels, similarly to how PowerPC works.
2012-03-04 05:19:55 +00:00
Juli Mallett
87775fcd35 Unbreak n64 build without COMPAT_FREEBSD32 by fixing mismatched preprocessor
conditionals.
2012-03-03 10:22:49 +00:00
Juli Mallett
9624d94701 o) Add COMPAT_FREEBSD32 support for MIPS kernels using the n64 ABI with userlands
using the o32 ABI.  This mostly follows nwhitehorn's lead in implementing
   COMPAT_FREEBSD32 on powerpc64.
o) Add a new type to the freebsd32 compat layer, time32_t, which is time_t in the
   32-bit ABI being used.  Since the MIPS port is relatively-new, even the 32-bit
   ABIs use a 64-bit time_t.
o) Because time{spec,val}32 has the same size and layout as time{spec,val} on MIPS
   with 32-bit compatibility, then, disable some code which assumes otherwise
   wrongly when built for MIPS.  A more general macro to check in this case would
   seem like a good idea eventually.  If someone adds support for using n32
   userland with n64 kernels on MIPS, then they will have to add a variety of
   flags related to each piece of the ABI that can vary.  That's probably the
   right time to generalize further.
o) Add MIPS to the list of architectures which use PAD64_REQUIRED in the
   freebsd32 compat code.  Probably this should be generalized at some point.

Reviewed by:	gonzo
2012-03-03 08:19:18 +00:00
Juli Mallett
4228a524fd When creating a handle for a subregion, be sure to actually math out the new
handle address, where we're using handles as raw addresses.

This fixes devices with subregions on Octeon PCI specifically, and likely also on
MIPS more generally, where there isn't another bus_space in use that was doing the
math already.
2012-03-02 21:46:31 +00:00
Juli Mallett
7b7463a5d2 If an Atheros device is attached to an Octeon, it's going to be by PCI. 2012-03-02 21:44:39 +00:00
Juli Mallett
3b7eabb569 Unbreak SMP on stock Octeon systems -- copy the core_mask from bootinfo into
sysinfo.  This should have been done as part of replacing bootinfo with sysinfo.
2012-03-02 20:34:15 +00:00
John Baldwin
831ce4cb3d - Change contigmalloc() to use the vm_paddr_t type instead of an unsigned
long for specifying a boundary constraint.
- Change bus_dma tags to use bus_addr_t instead of bus_size_t for boundary
  constraints.

These allow boundary constraints to be fully expressed for cases where
sizeof(bus_addr_t) != sizeof(bus_size_t).  Specifically, it allows a
driver to properly specify a 4GB boundary in a PAE kernel.

Note that this cannot be safely MFC'd without a lot of compat shims due
to KBI changes, so I do not intend to merge it.

Reviewed by:	scottl
2012-03-01 19:58:34 +00:00
Oleksandr Tymoshenko
f3318c38dc Revert part of old logic of assigning MAC addressess:
- Reserver respective number of addresses for managment port
- octm uses base address directly
- other drivers get MACs on "first come first served" basis

Reviewed by:	juli
2012-02-29 05:48:29 +00:00
Gavin Atkinson
1748d1e513 Correct capitalization of "Hz" in user-visible text (manpages, printf(),
etc).

MFC after:	3 days
2012-02-28 13:19:34 +00:00
Oleksandr Tymoshenko
57fa7d3101 Refctor address assignment for Octeon's ethernet ports:
- Centralize address assignment
- Make sure managment ports get first MAC address in pool
- Properly propagate fail if address allocation failed

Submitted by:	Andrew Duane <aduane@juniper.net>
2012-02-22 01:30:25 +00:00
Robert Watson
79f9811409 When initialising the CP0 status register during boot on 64-bit MIPS,
set all three of the kernel, supervisor, and user-mode 64-bit mode
flags.  While FreeBSD does not currently use the supervisor ring (and
hence this is effectively a NOP on most systems), doing this avoids
triggering an exception on 64-bit MIPS CPUs that don't support 32-bit
compatibility mode, and therefore don't allow clearing the SX bit.

Reviewed by:	gonzo
MFC after:	3 days
Sponsored by:	DARPA, SRI International
2012-02-14 20:34:25 +00:00
Oleksandr Tymoshenko
4c322abc56 - Reverse logic so base tls is fixed up with correct number 2012-02-10 23:24:33 +00:00
Oleksandr Tymoshenko
bdbf2b0837 - Fix spelling of R_MIPS_RELGOT
- Add R_MIPS_JALR relocation
- Add TLS relocation types

Obtained from:	NetBSD
2012-02-10 19:17:14 +00:00
Oleksandr Tymoshenko
d328a1b2f3 Fix-up value passed by thr_new syscall to make it compatible
with MIPS_TLS_GET/MIPS_TLS_SET sysarch API.
2012-02-10 07:03:45 +00:00
Oleksandr Tymoshenko
8d26fe2af5 Fix n32 build breakage 2012-02-09 22:48:35 +00:00
Oleksandr Tymoshenko
2675d18f77 - Emulate RDHWR instruction for TLS support
Reading register $29 with RDHWR is becoming the de-facto standard to
implement TLS.  According to linux-mips wiki, MIPS Technologies has
reserved hardware register $29 for ABI use.  Furthermore current GCC
makes the following assumptions:
- RDHWR is natively available or otherwise emulated by the kernel
- Register $29 holds the TLS pointer

Submitted by:	Robert Millan <rmh@debian.org>
2012-02-09 22:17:13 +00:00
David Schultz
2ee7b1d4ae Add C11 macros describing subnormal numbers to float.h.
Reviewed by:	bde
2012-01-23 06:36:41 +00:00
Oleksandr Tymoshenko
cccc098d9b We use port_index field of struct octusb_qh to reference USB state
of root HUB. Although it is initialized with port index of the
device's parent hub, which is worng. So track the USB tree up to
root HUB  and initialize this filed ptroprly

Rename port_index to root_port_index in order to reflect its
real semantics.
2012-01-20 23:37:04 +00:00
David Schultz
9fa03ecd01 Add parentheses where required. Without them, `sizeof LDBL_MAX'
is a syntax error and shouldn't be, while `1 FLT_ROUNDS' isn't a
syntax error and should be.  Thanks to bde for the examples.
2012-01-20 06:51:41 +00:00
David Schultz
cb659153f9 Fix the value of float_t to match what is implied by FLT_EVAL_METHOD. 2012-01-16 20:17:51 +00:00
David Schultz
89c570d28d Remove a confused comment and fix some minor bugs. 2012-01-16 05:23:27 +00:00
Adrian Chadd
a2d4a78a47 Stop overloading opt_global.h. 2012-01-16 05:07:32 +00:00
Adrian Chadd
46efd63a5b Build some more things (random, bridge/gif/gre, gpio, USB) as modules as well
so some embedded platform builds can use these instead of a fully monolithic
kernel.
2012-01-15 19:43:56 +00:00
Adrian Chadd
7fb4a4be07 Some of the atheros based embedded devices use one or more PCI NICs
on-board, glued to the AR71xx CPU.  These may forgo separate WMAC EEPROMs
(which store configuration and calibration data) and instead store
it in the main board SPI flash.

Normally the NIC reads the EEPROM attached to it to setup various PCI
configuration registers.  If this isn't done, the device will probe as
something different (eg 0x168c:abcd, or 0x168c:ff??.)  Other setup registers
are also written to which may control important functions.

This introduces a new compile option, AR71XX_ATH_EEPROM, which enables the
use of this particular code.  The ART offset in the SPI flash can be
specified as a hint against the relevant slot/device number, for example:

hint.pcib.0.bus.0.17.0.ath_fixup_addr=0x1fff1000
hint.pcib.0.bus.0.18.0.ath_fixup_addr=0x1fff5000

TODO:

* Think of a better name;
* Make the PCIe version of this fixup code also use this option;
* Maybe also check slot 19;
* This has to happen _before_ the SPI flash is set from memory-mapped
  to SPI-IO - so document that somewhere.
2012-01-15 19:29:33 +00:00
Oleksandr Tymoshenko
547cfad16d Fix backtrace for MIPS64:
- Properly print 64-bit addresses
    - Get whole 64 bits of address using kdbpeekd
    - Make check for kernel address compatible with MIPS64
2012-01-13 23:31:36 +00:00
Oleksandr Tymoshenko
33b570d348 - Fix .rela case of R_MIPS_26 relocation. Addednds save diferently for
.rel and .rela sections. It's shifted right two bits for former
   but saved as-is for latter.
2012-01-13 07:00:47 +00:00
Oleksandr Tymoshenko
3a51efc5df Fix relocations for MIPS64:
- Use Elf32_Addr as default, the only field that is
        64 bitw wide is R_MIPS_64
    - Add R_MIPS_HIGHER and R_MIPS_HGHEST handlers
    - Handle R_MIPS_HI16 and R_MIPS_LO16 for both .rel and
        .rela sections
2012-01-08 05:44:19 +00:00
Oleksandr Tymoshenko
70d3600fdf Fix DDB x/i addr[,count] command for count > 1 case 2012-01-08 00:34:39 +00:00
Adrian Chadd
93e26ff438 Fix the ar724x shift calculation when writing to the PCI config space.
This was preventing the ath driver from being loaded at runtime.
It worked fine when compiled statically into the kernel but not when
kldload'ed after the system booted.

The root cause was that PCIR_INTLINE (register 60) was being
overwritten by zeros when register 62 was being written to.
A subsequent read of this register would return 0, and thus
the rest of the PCI glue assumed an IRQ resource had already
been allocated.  This caused the device to fail to attach at
runtime as the device itself didn't contain any IRQ resources.

TODO: go back over the ar71xx and ar724x PCI config read/write
code and ensure it's correct.
2012-01-07 04:13:25 +00:00
Oleksandr Tymoshenko
6cc1d135cd - Add better COP2 (crypto coprocessor) context handler for Octeon. Keep
COP2 disabled and lazily allocate COP2 context structure in exception
    handler. Keep kernel and userland contexts separated.
2012-01-06 01:23:26 +00:00
Adrian Chadd
8f5aa976d7 This isn't required any longer - it turns out the flash
has ~ 1.7MB of space for a kernel.  There's thus plenty of
space for a full, non-module kernel.
2012-01-05 07:19:05 +00:00
Adrian Chadd
b018dade46 Use geom_uncompress now, rather than geom_uzip.
This results in a much smaller rootfs image and it easily
fits in the 8MB flash.
2012-01-05 03:38:34 +00:00
Andreas Tobler
3079d69f90 Apply the same change as in r229494.
Requested by: ed
2012-01-04 16:07:16 +00:00
Oleksandr Tymoshenko
1f74cf8ccf - Octeon-SDK strictly requires multi_count to be zero for
full and low speed devices.
2012-01-03 19:10:37 +00:00
Oleksandr Tymoshenko
af8b177113 - Properly set IRQ handlers for all USB ports 2012-01-01 09:12:21 +00:00
Adrian Chadd
a92de4a5f6 This particular work around isn't required any longer, now that the
11n radio backends are also added into the RF linker set.

This saves around 7k from the kernel binary.
2011-12-31 23:41:19 +00:00
Oleksandr Tymoshenko
868fb4d19b - struct clocktime sets different ranges for DOW and month
comparing to struct timeval. for clocktime they should be
    1..7 and 1..12 respectively

- CAPK-0100ND uses RTC without centruy bit (DS1307) so set it 21st
2011-12-31 23:21:36 +00:00
Adrian Chadd
b2e6077c31 Oops - this was referencing a local file, which I've done away with. 2011-12-31 15:56:00 +00:00
Oleksandr Tymoshenko
9db595847a - Pass proper endpoint number (without direction flag) to
cvmx_usb_open_pipe
2011-12-31 05:45:10 +00:00
Adrian Chadd
38192bfc9f Add a configuration file for the Atheros PB47 reference board.
This is an AR71xx based board with 8MB flash, 64MB RAM, a
Mini-PCI+ slot (see below) and a single 10/100/1000baseT
ethernet port.  It also has two USB ports.

This is an easier board than most to add as it doesn't have a
switch PHY on-board.  This made it (mostly) trivial to craft a
working configuration.

Things to note:

* This, like most other reference boards, use uboot rather then
  redboot.  It means that you typically have to manually flash
  both the kernel and rootfs partitions.

* Since there's currently no (nice) way to extract out the
  ethernet MAC and RAM from the uboot environment, the RAM
  will default to 32mb and the MAC will be something very
  incorrect.   I'll try to fix this up in a subsequent commit
  or two, even if it's just some hard-coded nonsense in
  ar71xx_machdep.c for now.

* The board is designed for a specific model of mini-PCI+
  NIC which never made it into production.  Normal mini-PCI
  NICs will work fine; if you happen to have the NIC in question
  then it will work fine with this board.
2011-12-30 09:48:35 +00:00
Adrian Chadd
687021dd92 Add a couple of missing wlan modules. 2011-12-30 09:39:24 +00:00
Marcel Moolenaar
abc9d2bbc7 Remove trailing white-space. 2011-12-30 03:54:22 +00:00
John Baldwin
b494482f39 Use curthread rather than PCPU_GET(curthread). 'curthread' uses
special-case optimizations on several platforms and is preferred.

Reported by:	dim (indirectly)
MFC after:	2 weeks
2011-12-29 16:40:54 +00:00
Adrian Chadd
425fc5768b Flesh out the RSPRO GPIO config, including the RF LED. 2011-12-29 06:07:24 +00:00
Adrian Chadd
530028c9d6 Break out the AR71XX config file into _BASE and board specific
bits.

The ROUERSTATION and RSPRO variants contain:

* the board specific bits (eg the RTC for RSPRO, later on it'll
  include the GPIO/LED definitions);
* the boot specific bits (eg, on-board flash, usb flash, etc).

For now the AR71XX_BASE file contains the common board config,
drivers and net80211/ath wireless drivers.

I'll follow this up with config files for the other boards I
have (eg the Ubiquiti LSSR71, as well as some Mikrotik boards
that use the AR71XX and atheros reference boards) which will
be quite easy to do now.
2011-12-29 05:51:48 +00:00
Oleksandr Tymoshenko
6b194c7ade - Add generic GPIO driver for Cavium Octeon. At the moment pin definition is
hardcoded but will be changed later with more flexible way to define them.
2011-12-28 05:57:03 +00:00
Oleksandr Tymoshenko
27e093e7f4 - Initialize compact_flash_attribute_base_addr from bootinfo structure 2011-12-24 23:15:25 +00:00
Oleksandr Tymoshenko
5a312a4a9a - Set CF physical address base in sysinfo structure 2011-12-23 22:10:55 +00:00
Adrian Chadd
ddd7699151 Remove these locks - they aren't strictly needed and cause measurable
performance issues.

* Access to the GPIO bus is already locked by requesting
  and releasing the bus - thus the lock isn't really needed
  for each GPIO pin change.
* Don't lock and unlock the GPIO bus for -each- i2c access -
  the i2c bus code is already doing this by calling the upper
  layer callback to request/release the bus. This thus locks
  the bus for the entirety of the transaction.

TODO:

* Further verify that everything is correctly requesting/
  releasing the GPIO bus.
* Look at how to lock the GPIO pin configuration stuff,
  potentially by locking/unlocking the bus at the gpiobus
  layer.
2011-12-20 00:33:56 +00:00
Bjoern A. Zeeb
3b29d0033d Unbreak the OCTEON1 kernel build after r228483 removing the left over
declaration.

MFC after:	11 days
2011-12-17 15:42:37 +00:00
Andriy Gapon
9976156f12 kern cons: introduce infrastructure for console grabbing by kernel
At the moment grab and ungrab methods of all console drivers are no-ops.

Current intended meaning of the calls is that the kernel takes control of
console input.  In the future the semantics may be extended to mean that
the calling thread takes full ownership of the console (e.g. console
output from other threads could be suspended).

Inspired by:	bde
MFC after:	2 months
2011-12-17 15:08:43 +00:00
Adrian Chadd
3f9bdcef12 * Add in the gpio/gpioled drivers into AR91XX_BASE.
* Add in a default GPIO section for AR91XX_BASE.hints, which doesn't
  define the GPIO function masks or any GPIO pines.
* Add in the GPIO line definitions for LEDs and GPIO pins for the
  TP-WR1043nd.

I've verified the LEDs work fine using gpioset.
2011-12-15 01:05:38 +00:00
Adrian Chadd
19ac3f84d0 Re-jiggle the GPIO code a little to remove the hard-coded AR71xx GPIO
config and function mask setup.

* "gpiomask" now specifies which GPIO pins to enable, for devices to bind to.
* "function_set" allows bits in the function register to be set at GPIO setup.
* "function_clear" allows bits in the function register to be cleared at
  GPIO setup.

The function_set/function_clear bits allow for individual GPIO pins to either
drive a GPIO line or an alternate function - eg USB, JTAG, etc. This allows
for things like CS1/CS2 be enabled for those boards w/ >1 SPI device connected,
or disabling JTAG for the AR7240 (which is apparently needed ..)

I've verified this on the AR71xx.
2011-12-15 01:03:49 +00:00
Hans Petter Selasky
2e14174893 Implement better support for USB controller suspend and resume.
This patch should remove the need for kldunload of USB
controller drivers at suspend and kldload of USB controller
drivers at resume.

This patch also fixes some build issues in avr32dci.c

MFC after:	2 weeks
2011-12-14 00:28:54 +00:00
Ed Schouten
53627e400f Replace __signed by signed.
The signed keyword is an integral part of the C syntax. There's no need
to use __signed.
2011-12-13 13:38:03 +00:00
Adrian Chadd
34415ac907 Style(9) changes. 2011-12-13 05:13:51 +00:00
Jayachandran C.
d42a1129cb Disable KDB/DDB options for XLP N32 compile.
n32 abi is not supported in KDB/DDB yet, disable the option in
XLPN32 conf.

Reported by:	gonzo, bz
2011-12-05 03:18:40 +00:00
Jayachandran C.
6e065b1baa Fix N32 compilation again for XLP.
Disable DDB/KDB related options for N32, and add back a cast that was
lost during the last set of updates.

Reported by:	gonzo, bz
2011-12-05 03:10:01 +00:00
Jayachandran C.
b10ea0872a Fix XLP compilation.
Add definitions of LSU_DEBUG_ADDR and LSU_DEBUG_DATA0, the code that uses
it was added in r227799

Reported by:	gonzo
2011-12-05 02:56:08 +00:00
Oleksandr Tymoshenko
2b8895cd74 - Fix backtrace for MIPS64 platform 2011-11-28 19:48:04 +00:00
Oleksandr Tymoshenko
ba3ba72812 - Copy base MAC address from bootinfo descriptor to sysinfo struct
Reviewed by:	Andrew Duane
2011-11-28 19:28:29 +00:00
Aleksandr Rybalko
098edc8725 Simplify arge_flush_ddr to use updated ar71xx_device_flush_ddr_ge(unit).
Approved by: adrian (mentor)
2011-11-28 13:42:59 +00:00
Gleb Smirnoff
e63fe86b27 Fix build, fininshing r228018. 2011-11-28 08:10:12 +00:00
Aleksandr Rybalko
e319e32c90 Join chip depended methods for arge0 and arge1 into single call with unit.
Approved by: adrian (mentor)
2011-11-27 11:15:59 +00:00
Marius Strobl
b9c7618836 Change another instance of amd(4) to esp(4) missed in r227006.
Submitted by:	Garrett Cooper
MFC after:	3 days
2011-11-26 18:47:09 +00:00
Adrian Chadd
b010577828 I've had verification that the second-last 64k is actually used by the tplink
firmware to store configuration data.

It's safe to overwrite it.
2011-11-24 15:12:57 +00:00
Adrian Chadd
019d307f35 Now that I've brought up FreeBSD via flash, I've discovered that
the second-last 64k seems to be the default firmware board configuration
area.

Since I have no idea whether uboot uses it or not - and it's prefixed
with an atheros eeprom signature (0xaa55), I figure the safest thing
to do is mark it as read-only.

I've modified my local tplink firmware building program to generate
a board configuration section - which is separate to this partition.
It's located in the 64k _before_ this particular 64k.

The firmware build program from OpenWRT never initialises those
values and the firmware images from tplink also leave it 0x0, so I
don't currently know what the exact, correct details should be.
2011-11-24 07:37:19 +00:00
Adrian Chadd
b1214c6893 Flip on AR71XX_ENV_UBOOT so the environment variables are properly
processed. (Which is to say they're currently ignored.)
2011-11-24 07:33:41 +00:00
Adrian Chadd
1c3ed0a410 Introduce a new (global, sorry!) option which controls whether
the ar71xx platform code should assume a uboot or redboot environment.

The current code gets very confused (and just crashes) on a uboot
environment, where each attribute=value pair is in a single entry.
Redboot on the other hand stores it as "attribute", "value", "attribute",
"value", ...

This allows the kernel to boot on a TP-LINK TL-WR1043ND from flash,
where the uboot environment gets setup. This didn't show up during a netboot
as "tftpboot" and "go" don't setup the uboot environment variables.
2011-11-24 07:32:52 +00:00
Adrian Chadd
35d1603e8a Flesh out a geom_map setup, so the kernel can be squeezed _onto_ the device.
The default flash layout gives only 1 megabyte for the kernel, gzipped.
The uboot firmware running on this device only supports gzip, not lzma, so
we actually _do_ have to try and slim the kernel down a bit.

But, since I can't actually do that at the present, I'm opting to:

* extend the kernel from 1mb to 2mb;
* have rootfs fill the rest of that, save 64k;
* eventually I'll hide a 64k config partition at the end, between the
  end of rootfs and the ART (radio configuration data.)

The uboot firmware doesn't care about the partition layout. It just
expects the kernel application image to sit at 0xbf020000 (right after
the 128k uboot image.) The uboot header isn't actually read either -
it's "faked" from a "tplink" flash image header. So as long as the
map configuration here matches what is being written out via the
tplink firmware generator, everything is a-ok.
2011-11-24 04:39:01 +00:00
Adrian Chadd
5c85f74c64 Compile in the right bits so the AR9130 WMAC support functions correctly.
A previous commit disabled compiling the AR9130 support in the default
HAL build in the kernel. Since the AR9130 support won't actually function
without AH_SUPPORT_AR9130 (and that abomination needs to be undone at some
point, in order to allow USB 11n NICs to also work), we now have to
explicitly compile it in.

But since the 11n RF backends don't (currently) join the RF linker set,
one has to compile in _an_ RF backend for the HAL to compile.
2011-11-24 04:34:04 +00:00
Adrian Chadd
68d31a0864 Add a comment documenting where the WMAC hangs off of.
At some point it would be nice to correctly update the bus glue to make
this "correct", including having the DDR flush occur in the right spot
(ie, any AHB interrupt.)
2011-11-24 04:23:42 +00:00
Adrian Chadd
4a66e3c76d Flip on these debugging options by default. This is -HEAD after all. 2011-11-24 04:21:19 +00:00
Adrian Chadd
bf3ee21b8c Slim the default build down a little:
* Disable the NFS client, it's not needed for booting off of flash.
* Don't compile in softdep, snapshots, ufs acls and directory hashing.
2011-11-24 04:19:02 +00:00
Hans Petter Selasky
3b12bdb58f Rename device_delete_all_children() into device_delete_children().
Suggested by:	jhb @ and marius @
MFC after:	1 week
2011-11-22 21:56:55 +00:00
Marius Strobl
4b7ec27007 - There's no need to overwrite the default device method with the default
one. Interestingly, these are actually the default for quite some time
  (bus_generic_driver_added(9) since r52045 and bus_generic_print_child(9)
  since r52045) but even recently added device drivers do this unnecessarily.
  Discussed with: jhb, marcel
- While at it, use DEVMETHOD_END.
  Discussed with: jhb
- Also while at it, use __FBSDID.
2011-11-22 21:28:20 +00:00
Jayachandran C.
a541c47546 Do dcache flush on CPU core before enabling threads.
The dcache flush has to be done using the core control registers before
splitting the L1D cache by enabling the hardware threads.

Also replace .word calls for mfcr/mtcr with a C macro.

In collaboration with: prabhath at netlogicmicro com
2011-11-21 16:43:24 +00:00
Jayachandran C.
452f22c389 Merge XLP 3XX updates and related rework.
* Update message station (CMS) code, read queue ids from PCI header.
* Use interrupts to wakeup message handling threads on 3XX
* Update PIC code, read interrupt information from PCI header instead
  of using fixed values.
* Update PCI interrupt handling for the PIC change.
* Update code for getting chip frequency, new code support XLP 3XX
* Misc style(9) fixes

In collaboration with: prabhath at netlogicmicro com (CMS/PIC)
                       venkatesh at netlogicmicro.com (PCI)
2011-11-21 08:12:36 +00:00
Jayachandran C.
fb1677186a XLP processors have the release 2 pagegrain register
Add accessors to cpufunc.h

Obtained from:	prabhath at netlogicmicro com
2011-11-21 07:55:37 +00:00
Adrian Chadd
31bdaf633c Always leave the -current kernel debugging options on. 2011-11-21 06:45:12 +00:00
Jayachandran C.
e8f1d9c88b Remove unused variable ubase.
This vaiable is initialized but not used.
2011-11-19 15:08:49 +00:00
Jayachandran C.
b0250abec6 Remvoe unused file
mips/nlm/uart_cpu_xlp.c has replaced uart_bus_xlp_iodi.c
2011-11-19 15:01:09 +00:00
Jayachandran C.
f48a19aa93 Fix USB compilation, and add USB options to XLP conf
Remove obsolete header file included in usb_init.c
2011-11-19 14:33:14 +00:00
Jayachandran C.
b2f4d7679b Fixup cache flush definitions for XLP
mco_icache_sync_range was earlier set to mipsNN_icache_sync_range_index_32
which is not necessary, revert this.
Also, the data cache is coherent so write back is not really needed. This
change is experimental.
2011-11-19 14:14:35 +00:00
Jayachandran C.
0dc79f3cc1 Whitespace fixes in XLP HAL files.
Also fixup a macro in iomap.h
2011-11-19 14:06:15 +00:00
Jayachandran C.
c82deda35b Rearrange XLP configuration files.
Create std.XLP for configuration options, which is included by the
conf files. The files XLP, XLPN32 and XLP64 will have mostly ABI related
options.

Also move uart and pci to mips/nlm/std.xlp since all XLP configurations
needs these devices.

Obtained from:	prabhath at netlogicmicro com (intial version)
2011-11-18 11:18:59 +00:00
Jayachandran C.
eeb41c230d Fix COP0 hazards for XLR and XLP
The XLR CPUs do not have any software visible hazards for COP0 operations.
On XLP the hazard is a ehb, since it is mips64r2.
2011-11-18 09:30:24 +00:00
Jayachandran C.
cca2c4b446 Do pmap update only on active CPUs.
The pmap update_page/invalidate_page/invalidate_all operations has to be
done only on active cpus. In the simplest case, if the process is not
active on any other CPUs, we can just do the operation on the current CPU.

This change replaces the call to smp_rendezvous() for these operations with
smp_rendezvous_cpus() in case there more than one active CPU, or with a direct
function call if there is just one active CPU.

This change give significant performance increase in fork/exec benchmarks
on XLR/XLS/XLP with 32 cpus.

Reviewed by:	alc
2011-11-17 13:14:59 +00:00
Attilio Rao
ed1f6dc235 Introduce the option VFS_ALLOW_NONMPSAFE and turn it on by default on
all the architectures.
The option allows to mount non-MPSAFE filesystem. Without it, the
kernel will refuse to mount a non-MPSAFE filesytem.

This patch is part of the effort of killing non-MPSAFE filesystems
from the tree.

No MFC is expected for this patch.

Tested by:	gianni
Reviewed by:	kib
2011-11-08 10:18:07 +00:00
Ed Schouten
6472ac3d8a Mark all SYSCTL_NODEs static that have no corresponding SYSCTL_DECLs.
The SYSCTL_NODE macro defines a list that stores all child-elements of
that node. If there's no SYSCTL_DECL macro anywhere else, there's no
reason why it shouldn't be static.
2011-11-07 15:43:11 +00:00
Alan Cox
8393768074 Add support for VM_ALLOC_WIRED and VM_ALLOC_ZERO to vm_page_alloc_freelist()
and use these new options in the mips pmap.

Wake up the page daemon in vm_page_alloc_freelist() if the number of free
and cached pages becomes too low.

Tidy up vm_page_alloc_init().  In particular, add a comment about an
important restriction on its use.

Tested by:	jchandra@
2011-11-02 05:42:51 +00:00
David Schultz
a50079b7ff People porting FreeBSD to new architectures ought not have to
implement a deprecated FPU control interface in addition to the
standard one.  To make this clearer, further deprecate ieeefp.h
by not declaring the function prototypes except on architectures
that implement them already.

Currently i386 and amd64 implement the ieeefp.h interface for
compatibility, and for fp[gs]etprec(), which doesn't exist on
most other hardware.  Powerpc, sparc64, and ia64 partially implement
it and probably shouldn't, and other architectures don't implement it
at all.
2011-10-21 06:41:46 +00:00
Jayachandran C.
85dac049c1 Keep FDT options commented until dtc is build by default for mips
Otherwise automated builds will fail for XLP and XLP64
2011-10-19 14:38:01 +00:00
Jayachandran C.
29550c285c Fix wakeup latency when sleeping with 'wait'
If we handle an interrupt just before the 'wait' and the interrupt
schedules some work, we need to skip the 'wait' call. The simple solution
of calling sched_runnable() with interrupts disabled immediately before
wait still leaves a window after the call and before 'wait' in which
the same issue can occur.

The solution implemented is to check the EPC in the interrupt handler, and
if it is in a region before the 'wait' call, to fix up the EPC to skip the
wait call.

Reported/analysed by:	adrian
Fix suggested by:	kib

Reviewed by:	jmallett, imp
2011-10-18 16:37:28 +00:00
Jayachandran C.
a7e054044c Fix XLP compile failure on n32 abi.
Reported by:	bz@
2011-10-18 14:05:18 +00:00
Jayachandran C.
8291dd8a41 Support for booting XLP using FDT.
- update xlp_machdep.c to read arguments from FDT if FDT support is
  compiled in.
- define rmi_uart_bus_space, and use it as fdtbus_bs_tag
- update conf files for FDT support
- add default dts file xlp-basic.dts
2011-10-18 08:10:23 +00:00
Jayachandran C.
29a99755a9 FDT support for MIPS.
Add architecture specific files needed to compile MIPS with
flattened device tree support.
2011-10-18 07:29:21 +00:00
Pyun YongHyeon
57c81d92ae Close a race where SIOCGIFMEDIA ioctl get inconsistent link status.
Because driver is accessing a common MII structure in
mii_pollstat(), updating user supplied structure should be done
before dropping a driver lock.

Reported by:	Karim (fodillemlinkarimi <> gmail dot com)
2011-10-17 19:49:00 +00:00
Jayachandran C.
c0959978ec Fix for crash on MIPS /dev/mem read.
Reading /dev/mem in 64 bit kernel crashes.  This is because the page
used to call uiomove_fromphys() from memrw() does not have md.pv_list
initialized correctly.

The fix is to call pmap_page_init() on the page to initialize it.
2011-10-17 05:42:53 +00:00
Eitan Adler
36daf0495a - change "is is" to "is" or "it is"
- change "the the" to "the"

Approved by:	lstewart
Approved by:	sahil (mentor)
MFC after:	3 days
2011-10-16 14:30:28 +00:00
Konstantin Belousov
6bfe4c78c8 Remove unused define.
MFC after:	1 month
2011-10-07 16:09:44 +00:00
Konstantin Belousov
877012982b Convert MIPS to the syscallenter/syscallret system call sequence handlers.
This was the last architecture used custom syscall entry sequence.

Reviewed, debugged, tested and approved by:	jchandra
MFC after:	1 month
2011-10-06 17:34:43 +00:00
Marcel Moolenaar
eed142e1e9 Add default address for FLASH mapping on the boot bus.
Reviewed by: jmallett, marcel
Obtained from: Juniper Networks, Inc
Author: Andrew Duane
2011-10-04 20:30:15 +00:00
Marcel Moolenaar
4699b5e472 Remove octeon_bootinfo from all files except octeon_machdep.c.
Use instead cvmx_sysinfo_get() consistently.

Reviewed by: jmallett, marcel
Obtained from: Juniper Networks, Inc
Author: Andrew Duane
2011-10-04 20:17:43 +00:00
Marcel Moolenaar
f11e3710b0 Remove bogus and wrong definition of BLKDEV_IOSIZE.
Wrong in that it must be guarded (it's configurable)
and bogus in that there's absolutely no rationale for
it not default to a page size like all other archs.
2011-10-04 18:06:08 +00:00
Marcel Moolenaar
9bcaa49a30 o Clean up some ID printfs, and put under bootverbose
o   Remove redundant lookups of base address in cf_identify
o   Fix some indenting issues
o   Fix an identification bug that uses DRQ to checlk for ident block
    returned. The correct spec is to look for BSY to be cleared.

Reviewed by: imp, marcel
Obtained from: Juniper Networks, Inc
Author: Andrew Duane
2011-10-04 18:03:55 +00:00
Marcel Moolenaar
2873abdc12 Partially revert r224661:
octeon_ap_boot is not a bitmask. It holds the CPU Id of the
AP currently being started. As such there's no need to make
it a 64-bit integral and we're not limited to 64 CPUs.

Reported by: jmallet
Obtained from:	Andre Duane
2011-10-04 17:49:19 +00:00
Adrian Chadd
13a2f4943a Disable using wait in cpu_idle() until a better solution to timer and
interrupt handling can be implemented.
2011-10-01 05:56:25 +00:00