sequencer files. Different platforms place the included files in different
locations and it is easier to modify the include path passed as arguments
to the assembler than adding #ifdef support to the assembler.
Remove a spurious 'nop' instruction.
ahc->unit is depricated and will be going away as soon as the Linux
driver catches up. In the FreeBSD case, it is always initialized to 0
and this caused some strangeness in registering multiple ahc controllers
with CAM.
Noticed by: Tor.Egge@fast.no
Separate our platform independent hooks from core driver functionality
shared between platforms (FreeBSD and Linux at this time).
Add sequencer workarounds for several chip->chipset interactions.
Correct external SCB corruption problem on aic7895 based cards (3940AUW).
Lots of cleanups resulting from the port to another OS.
the drivers.
* Remove legacy inx/outx support from chipset and replace with macros
which call busspace.
* Rework pci config accesses to route through the pcib device instead of
calling a MD function directly.
With these changes it is possible to cleanly support machines which have
more than one independantly numbered PCI busses. As a bonus, the new
busspace implementation should be measurably faster than the old one.
the scratch RAM for data normally found in the SEEPROM (presumably in the
event that the SEEPROM is unavailable or can't be read). This code causes
a spontaneous reboot on monster.osd.bsdi.com, which has an embedded aic7880
controller. The problem appears to happen either when it writes to the
SCBPTR port and then reads from the SCB_CONTROL port. Somewhere during
the inb/outb operations, the system has a heart attack and restarts.
This code looks very suspicious, particularly since it has unconditionalized
debug mesages such as "Got here!" and "And it even worked!". With this
block #ifdef'ed out, the machine boots and runs properly. I stronly suggest
that it stay #ifdef'ed out until it's properly tested.
Disable "cache line streaming" for aic7890/91 Rev A chips. I
have never seen these chips fail using this feature, but
some of Adaptec's regression tests have.
Explicitly set "cache line streaming" to on for aic7896/97
chips. This was happening before, but this documents the
fact that these chips will not function correctly without
CACHETHEEN set.
aic7xxx.h:
Add new bug types.
Fix a typo in a comment.
aic7xxx.reg:
Add a definition for the SHVALID bit in SSTAT3 for Ultra2/3
chips. This bit inicates whether the bottom most (current)
element in the S/G fifo has exhausted its data count.
aic7xxx.seq:
Be more careful in how we turn off the secondary DMA channel.
Being less careful may hang the PCI bus arbitor that negotiates
between the two DMA engines.
Remove an unecessary and incorrect flag set operation in
the overrun case.
On Ultra2/3 controllers, clear the dma FIFO before starting
to handle an overrun. We don't want any residual bytes from
the beginning of the overrun to cause the code that shuts
down the DMA engine from hanging because the FIFO is not
(and never will be) empty.
If the data fifo is empty by the time we notice that a
read transaction has completed, there is no need to
hit the flush bit on aic7890/91 hardware that will not
perform an auto-flush. Skip some cycles by short circuiting
the manual flush code in this case.
When transitioning out of data phase, make sure that we
have the next S/G element loaded for the following
reconnect if there is more work to do. The code
would do this in most cases before, but there was
a small window where the current S/G element could
be exhausted before our fetch of the next S/G element
completed. Since the S/G fetch is already initiated
at this point, it makes sense to just wait for the
segment to arrive instead of incuring even more latency
by canceling the fetch and initiating it later.
Fast path the end of data phase handling for the last
S/G segment. In the general case, we might have
worked ahead a bit by stuffing the S/G FIFO with
additional segments. If we stop before using them
all, we need to fixup our location in the S/G stream.
Since we can't work past the last S/G segment, no
fixups are ever required if we stop somewhere in
that final segment.
Fix a little buglet in the target mode dma bug handler.
We were employing the workaround in all cases instead
of only for the chips that require it.
Fix the cause of SCB timeouts and possible "lost data"
during read operations on the aic7890. When sending
a data on any Ultra2/3 controller, the final segment
must be marked as such so the FIFO will be flushed and
cleaned up correctly when the transfer is ended. We
failed to do this for the CDB transfer and so, if
the target immediately transfered from command to data
phase without an intervening disconnection, the first
segment transferred would be any residual bytes from
the cdb transfer. The Ultra160 controllers for some
reason were not affected by this problem.
Many Thanks to Tor Egge for bringing the aic7890 problem
to my attention, providing analysis, as well as a mechanism
to reproduce the problem.
didn't bother to send a saved data pointers after the last transfer,
is not recorded in sgptr. This was only a problem if the target
reported non-zero status as we always check the residual in that case.
Correct the BUILD_TCL macro. It was placing the target id
in the wrong bits. This was only an issue for adapters that
do not perform SCB paging (aha-3940AUW for instance).
Don't bother inlining ahc_index_busy_tcl. It is never
used in a performance critical path and is a bit chunky.
Correct ahc_index_busy_tcl to deal with "busy target tables"
embedded in the latter half of 64byte SCBs.
Don't initialize the busy target table to its empty state
until after we have finished extracting configuration
information from chip SRAM. In the common case of using
16 bytes of chip SRAM to do untagged target lookups,
we were trashing the last 8 targets configuration data.
(actually only target 8 because of the bug in the
BUILD_TCL macro).
Cram the "bus reset delivered" message back under bootverbose.
Fix the cleanup of the SCB busy target table when aborting
commands. If the lun is wildcarded, we must loop through
all possible luns.
aic7xxx.h:
Only bother supporting 64 luns right now. It doesn't seem
like either this driver or any peripherals will be doing
information unit transfers (where the lun number is a
32 bit integer) any time soon.
aic7xxx.seq:
Fix support for the aic7895. We must flush the data
FIFO if performing a manual transfer that is not
a multiple of 8 bytes. We were doing this quite
regularly for embedded cdbs.
Manaually flush the fifo on earlier adapters when
dealing with embedded cdbs too. We were stuffing
the FIFO with 16 bytes instead, but triggering
the flush is more efficient and allows us to
remove two instructions from the "copy_to_fifo"
routine.
other systems.
o Normalize copyright text.
o Clean up probe code function interfaces by passing around a single
structure of common arguments instead of passing "too many" args
in each function call.
o Add support for the AAA-131 as a SCSI adapter.
o Add support for the AHA-4944 courtesy of "Matthew N. Dodd" <winter@jurai.net
o Correct manual termination support for PCI cards. The bit definitions
for manual termination control in the SEEPROM were incorrect.
o Add support for extracting NVRAM information from SCB 2 for BIOSen
that use this mechanism to pass this data to OS drivers.
o Properly set the STPWLEVEL bit in PCI config space based on the
setting in an SEEPROM.
o Go back to useing 32byte SCBs for all controllers. The current
firmware allows us to embed 12byte cdbs on all controllers in
a 32byte SCB, and larger cdbs are rarely used, so it is a
better use of this space to offer more SCBs (32).
o Add support for U160 transfers.
o Add an idle loop executed during data transfers that prefetches
S/G segments on controllers that have a secondary DMA engine
(aic789X).
o Improve the performance of reselections by avoiding an extra
one byte DMA in the case of an SCB lookup miss for the reselecting
target. We now keep a 16byte "untagged target" array on the card
for dealing with untagged reselections. If the controller has
external SCB ram and can support 64byte SCBs, then we use an
"untagged target/lun" array to maximize concurrency. Without
external SCB ram, the controller is limited to one untagged
transaction per target, auto-request sense operations excluded.
o Correct the setup of the STPWEN bit in SXFRCTL1. This control
line is tri-stated until set to one, so set it to one and then
set it to the desired value.
o Add tagged queuing support to our target role implementation.
o Handle the common cases of the ignore wide residue message
in firmware.
o Add preliminary support for 39bit addressing.
o Add support for assembling on big-endian machines. Big-endian
support is not complete in the driver.
o Correctly remove SCBs in the waiting for selection queue when
freezing a device queue.
o Now that we understand more about the autoflush bug on the
aic7890, only use the workaround on devices that need it.
o Add a workaround for the "aic7890 hangs the system when you
attempt to pause it" problem. We can now pause the aic7890
safely regardless of what instruction it is executing.
negotiation features (DT, ULTRA2, ULTRA, FAST). The offsets
where not properly updated when the DT entry was added and so
the driver could attempt to negotiate a speed faster than that
supported by the target device or even requested by the user
via SCSI-Select settings. *
o Update the target mode incoming command queue kernel index value
ever 128 commands instead of 32. This means that the kernel will
always try to keep its index (as seen on the card - the kernel may
actually have cleared more space) 128 commands ahead of where the
sequencer is adding entries.
o Use the HS_MAILBOX register instead of the KERNEL_TQINPOS location
in SRAM to indicate the kernel's target queue possition on Ultra2
cards. This avoids the "pause bug" on these cards and also turns
out to be much more efficient.
o When enabling or disabling a particular target id for target mode,
make sure that the taret id in the SCSIID register does not
reference an ID that is not to receive target selections. This
is only an issue on chips that support the multiple target id
feature where the value in SCSIID will still affect selection
behavior regardless of the values in the target id bit field
registers.
o Remove some target mode debugging printfs.
o Make sure that the sense length reported in ATIO commands is
always zero. This driver does not, yet, report HBA generated
sense information for accepted commands.
o Honor the CAM_TIME_INFINITY and CAM_TIME_DEFAULT values for
the CCB timeout field.
o Make the driver compile with AHC_DEBUG again.
* Noticed by: Andrew Gallatin<gallatin@cs.duke.edu>
for optimizing the unpause operation no-longer exist, and this is much
safer.
When restarting the sequencer, reconstitute the free SCB list on the card.
This deals with a single instruction gap between marking the SCB as free
and actually getting it onto the free list.
Reduce the number of transfer negotiations that occur. In the past, we
renegotiated after every reported check condition status. This ensures
that we catch devices that have unexpectidly reset. In this situation,
the target will always report the check condition before performing a
data-phase. The new behavior is to renegotiate for any check-condition where
the residual matches the orginal data-length of the command (including
0 length transffers). This avoids renegotiations during things like
variable tape block reads, where the check condition is reported only
to indicate the residual of the read.
Revamp the parity error detection logic. We now properly report and
handle injected parity errors in all phases. The old code used to hang
on message-in parity errors.
Correct the reporting of selection timeout errors to the XPT. When
a selection timeout occurs, only the currently selecting command
is flagged with SELTO status instead of aborting all currently active
commands to that target.
Fix flipped arguments in ahc_match_scb and in some of the callers of this
routine. I wish that gcc allowed you to request warnings for enums passed
as ints.
Make ahc_find_msg generically handle all message types.
Work around the target mode data-in wideodd bug in all non-U2 chips.
We can now do sync-wide target mode transfers in target mode across the
hole product line.
Use lastphase exclusively for handling timeouts. The current phase
doesn't take the bus free state into account.
Fix a bug in the timeout handler that could cause corruption of the
disconnected list.
When sending an embedded cdb to a target, ensure that we start on a
quad word boundary in the data-fifo. It seems that unaligned stores
do not work correctly.
Collect together the components of several drivers and export eisa from
the i386-only area (It's not, it's on some alphas too). The code hasn't
been updated to work on the Alpha yet, but that can come later.
Repository copies were done a while ago.
Moving these now keeps them in consistant place across the 4.x series
as the newbusification progresses.
Submitted by: mdodd
makes it a little easier to notice that parity checking an 8bit sram
isn't working.
Turn on scb and internal data-path parity checking for all pci chips types.
We were only doing this for ultra2 chips.
After clearing the parity interrupt status, clear the BRKADRINT. This
avoids seeing a bogus BRKADRINT interrupt after external SCB probing
once normal interrupts are enabled.
93cx6.c:
Make the SRAM dump output a little prettier.
aic7xxx.c:
Store all SG entries into our SG array in kernel space.
This makes data-overrun and other error reporting more
useful as we can dump all SG entries. In the past,
we only stored the SG entries that the sequencer might
need to access, which meant we skipped the first element
that is embedded into the SCB.
Add a table of chip strings and replace ugly switch
statements with table lookups.
Add a table with bus phase strings and message reponses
to parity errors in those phases. Use the table to
pretty print bus phase messages as well as collapse
another switch statement.
Fix a bug in target mode that could cause us to unpause
the sequencer early in bus reset processing.
Add the 80MHz/DT mode into our syncrate table. This
rate is not yet used or enabled.
Correct some comments, clean up some code...
aic7xxx.h:
Add U160 controller feature information.
Add some more bit fields for various SEEPROM formats.
aic7xxx.reg:
Add U160 register and register bit definitions.
aic7xxx.seq:
Make phasemis state tracking more straight forward. This
avoids the consumption of SINDEX which is a very useful register.
For the U160 chips, you must use the 'mov' instruction to
update DFCNTRL. Using 'or' to set the PRELOADED bit is
completely ineffective.
At the end of the command phase, wair for our ACK signal
to de-assert before disabling the SCSI dma engine. For
slow devices, this avoids clearing the ACK before the
other end has had a chance to see it and lower REQ.
controllers will run at U2 speeds until I can complete the U160 support
for this driver.
Correct a termination buglet for the 2940UW-Pro.
Be more paranoid in how we probe and enable external ram, fast external
ram timing and external ram parity checking. We should now work on
20ns and 8bit SRAM parts.
Perform initial setup for the DT feature on cards that support it.
Factorize and clean up code. Use tables where it makes sense, etc.
Add some delays in dealing with the board control logic. I've never
seen this code fail, but with the ever increasing speed of processors,
its better to insert deterministic delays just to be safe. This stuff
is only touched during probe and attach, so the extra delay is of no
concern.
is an application space macro and the applications are supposed to be free
to use it as they please (but cannot). This is consistant with the other
BSD's who made this change quite some time ago. More commits to come.
the input fifo to be returned as successful and frozen. Most, if not
all, peripheral drivers do not check the qfrozen bit for successfully
completed commands, so the result would not only be lost commands, but
devices locked out from receiving commands. This was a bad bug that
crept in two or three months ago during some target mode work.
Don't arbitrarily limit the initiator ID of the card to something <= 7.
Fix a bug in the checksum code that would incorrectly prevent a valid
checksum of zero. (cp)
Don't touch rely on seeprom data when configuring termination. We may
not have seeprom data. (cp)
Treat all ULTRA2 capable adapters the same way when reading or writing
the BRDCTL register. We previously only did this correctly for aic7890/91
chips. This should correct some problems with termination settings on
aic7896/97 adapters. (cp)
Changes marked with "(cp)"
Pointed out by: Chuck Paterson <cp@bsdi.com>
aic7xxx.c:
Add a function for sucking firmware out of the controller
prior to reset.
Remove some inline bloat from functions that should not have
been inlined.
During initialization, wait 1ms after the chip reset before
touching any registers. You can get machine checks on certain
architectures (Atari I think?) without the delay.
Return CAM_REQ_CMP for external BDR requests instead
of CAM_BDR_SENT.
Bump some messages to bootverbose levels above 1.
Don't clear any negotiated sync rate if the target rejects
a WDTR message. The sync rate is only cleared if the target
accepts a WDTR message.
Fix a small bug in the mesgin handling code that could cause
us to believe that we had recieved a message that was actually
received by another target. This could only confuse us in
some very rare transmission negotiation scenarios.
Remove some unecessary cleanup of residual information after
a residual is reported. The sequencer does this when the
command is queued now.
usually cleared by a successful selection, but there is no guarantee
that a future successful selection will ever occur (e.g. empty bus).
The driver never looks at SELINGO, but the busy LED does, so this
change has the cosmetic effect of fixing the rare instance where the
busy LED was left on, confusing the user.
aic7xxx parts. This problem could result in data corruption
during periods of my PCI bus load by busmasters other than the
aic7xxx.
Many thanks to Andrew Gallatin <gallatin@cs.duke.edu> for characterizing
the symptoms of this problem and testing this fix.
Break out the detection logic for the aic7855 and properly report
these chips as 7855s instead of 7850s.
The 2940AU_CN is an aic7860 based card, not aic7860.
Not setting CACHETHEN turned out to be a bad idea. It can cause
spurious corruption under heavy PCI load with multiple masters.
events, in order to pave the way for removing a number of the ad-hoc
implementations currently in use.
Retire the at_shutdown family of functions and replace them with
new event handler lists.
Rework kern_shutdown.c to take greater advantage of the use of event
handlers.
Reviewed by: green
messages, abort messages, and abort tag messages.
Fix a bug in how default transfer negotiations are handled if the
user had disabled initial bus resets.
Support multi-targetid on the aic7895C.
the aic7890/91/96/97 cards. This could cause the system to go into
a long retry/recovery loop during probe.
Fix the alignment argument to bus_dma_tag_create().
Don't set the CACHETHEN bit in dscommand0 for Ultra2 controllers
until we know more about its behavior. The description for this
bit makes it sound like it could cause problems with certain
PCI chipsets.
eisa_add_intr() which now takes an additional arguement (one of
EISA_TRIGGER_LEVEL or EISA_TRIGGER_EDGE).
The flag RR_SHAREABLE has no effect when passed to
bus_alloc_resource(dev, SYS_RES_IRQ, ...) in an EISA device context as
the eisa_alloc_resource() call (bus_alloc_resource method) now deals
with this flag directly, depending on the device ivars.
This change does nothing more than move all the 'shared = inb(foo + iobsse)'
nonesense to the device probe methods rather than the device attach.
Also, print out 'edge' or 'level' in the IRQ announcement message.
Reviewed by: dfr
only support 'mirroring' the vendor and device ids, so we don't
lose any information. Certain revisions of the aic7880 will not
perform the mirroring so to match all possiblities would double
the number of table entries. This change also allows us to match
things like the 2944B which I missed in the original table.
Honor the 'bus reset at startup' option now that the XPT properly
handles transfer negotiation in this scenario.
Honor the sync rate settings on Ultra2 controllers. We would
always negotiate at the fastest speed. Oops.
aic7xxx.h:
Whitespace.
aic7xxx.seq:
Fix a minor nit that would cause the controller to miss the update
of the negotiation required bitmask causing the negotiation to
be delayed by a command.
Clean up the handling of failure modes in our attach so we don't free
resources twice. ahc_free() will do all of the work for us (as would
be required by an unload event) so we only need to handle resources that
the softc has not taken ownership of.
Sync up device Ids with the master Adaptec list.
Add probe support for the 2940 Pro although it isn't obvious that
all of the termination support is correct for this adapter yet.
tell the sequencer to pause itself for a target msg variable update. This
avoids the pause race entirely as HS_MAILBOX can be accessed without
pausing the chip.
3.2 Merge candidate.
NOTE: These changes will require recompilation of any userland
applications, like cdrecord, xmcd, etc., that use the CAM passthrough
interface. A make world is recommended.
camcontrol.[c8]:
- We now support two new commands, "tags" and "negotiate".
- The tags commands allows users to view the number of tagged
openings for a device as well as a number of other related
parameters, and it allows users to set tagged openings for
a device.
- The negotiate command allows users to enable and disable
disconnection and tagged queueing, set sync rates, offsets
and bus width. Note that not all of those features are
available for all controllers. Only the adv, ahc, and ncr
drivers fully support all of the features at this point.
Some cards do not allow the setting of sync rates, offsets and
the like, and some of the drivers don't have any facilities to
do so. Some drivers, like the adw driver, only support enabling
or disabling sync negotiation, but do not support setting sync
rates.
- new description in the camcontrol man page of how to format a disk
- cleanup of the camcontrol inquiry command
- add support in the 'devlist' command for skipping unconfigured devices if
-v was not specified on the command line.
- make use of the new base_transfer_speed in the path inquiry CCB.
- fix CCB bzero cases
cam_xpt.c, cam_sim.[ch], cam_ccb.h:
- new flags on many CCB function codes to designate whether they're
non-immediate, use a user-supplied CCB, and can only be passed from
userland programs via the xpt device. Use these flags in the transport
layer and pass driver to categorize CCBs.
- new flag in the transport layer device matching code for device nodes
that indicates whether a device is unconfigured
- bump the CAM version from 0x10 to 0x11
- Change the CAM ioctls to use the version as their group code, so we can
force users to recompile code even when the CCB size doesn't change.
- add + fill in a new value in the path inquiry CCB, base_transfer_speed.
Remove a corresponding field from the cam_sim structure, and add code to
every SIM to set this field to the proper value.
- Fix the set transfer settings code in the transport layer.
scsi_cd.c:
- make some variables volatile instead of just casting them in various
places
- fix a race condition in the changer code
- attach unless we get a "logical unit not supported" error. This should
fix all of the cases where people have devices that return weird errors
when they don't have media in the drive.
scsi_da.c:
- attach unless we get a "logical unit not supported" error
scsi_pass.c:
- for immediate CCBs, just malloc a CCB to send the user request in. This
gets rid of the 'held' count problem in camcontrol tags.
scsi_pass.h:
- change the CAM ioctls to use the CAM version as their group code.
adv driver:
- Allow changing the sync rate and offset separately.
adw driver
- Allow changing the sync rate and offset separately.
aha driver:
- Don't return CAM_REQ_CMP for SET_TRAN_SETTINGS CCBs.
ahc driver:
- Allow setting offset and sync rate separately
bt driver:
- Don't return CAM_REQ_CMP for SET_TRAN_SETTINGS CCBs.
NCR driver:
- Fix the ultra/ultra 2 negotiation bug
- allow setting both the sync rate and offset separately
Other HBA drivers:
- Put code in to set the base_transfer_speed field for
XPT_GET_TRAN_SETTINGS CCBs.
Reviewed by: gibbs, mjacob (isp), imp (aha)
Convert to new bus and bus dma.
Use latest PCI API.
bt_pci.c:
Fix a few bugs in how resourses are released left over from
when this driver was converted to new bus.
had a quirk that made a shim rather hard to implement properly and it was
just easier to convert the drivers in one go. The changes to the
buslogic driver go beyond just this - the whole driver was new-bus'ed
including pci and isa. I have only tested the EISA part of this so far.
Submitted by: Doug Rabson <dfr@nlsystems.com>
Recognize aic7895 controllers that have been "acquired" by a RAIDPort
card as normal aic7895s.
Recognize the aic7815 Raid Parity/Memory controller chip and notify
the user that it's RAID functionality will be ignored.
Don't mess with the IRQMS bit in the host control register unless
we are an aic7770 chip.
Use calling context to determine if the card is already paused when
we update the target message request bit field in controller scratch
ram. Looking at the paused bit in the HCNTRL register opened up a
race condition.
Insert delays in the target message request update routine as a temporary
work around for what looks like a chip bug. I'm still investigating this
one.
Fix the Abort/Abort Tag/BDR handler to pull its message from the message
buffer in our softc instead of attempting to get it from a register on
the controller. The message is never recorded by the controller in the
new message scheme.
Don't rely on having an SCB when a BDR occurs. We can issue these during
invalid reconnects to.
Fix a few cases where we were restarting the sequencer but then still
falling out of a switch statement to unpause the sequencer again.
This could cause us to mess up sequencer state if it generated another
pausing interrupt between the time of the restart and unpause.
Kill the 'transceiver settle' loop during card initialization. I
failed to realize that a controller that is not connected to any
cables will never settle or enable the SCSI transceivers at all.
The correct solution is to monitor the IOERR interrupt which indicates
that the transceiver state has changed (UW<->LVD).
Modify the aic7xxx assembler to properly echo input when stdin is not
a tty.
connection.
Clean up support for devices featuring the multiple target SCSI ID feature.
On aic7890/91/96/97 chips, we can now assume the target role on multiple
target ids simultaneously. Although these chips also have sufficient
instruction space to hold to support the initiator and target role at the
same time, the initiator role is currently disabled as it will conflict
(chip design restriction) with the multi-tid feature. I'll probably add
a nob to enable the initiator (there-by disabling multi-tid) some time
in the future.
Return queue full or busy, depending on the tagged nature of the incoming
request, if our command input queue fills up in host memeory.
Deal with accept target I/O resource shortages.
If we get an underrun on a transaction that wasn't supposed to transmit
any data, don't attempt to print out the S/G list. The code would
run until hitting a non-present page. (oops)
reorganization in rev 1.16 of i386/include/types.h which changed
stdlib.h's use of <machine/types.h>. The problem was the -I. was causing
machine/types.h to come from the current kernel source, while stdlib.h was
coming from /usr/include. /usr/include/stdlib.h is as old as the last
'make world', the machine/types.h was as new as the current source.
black hole device. The controller will now only accept selections if
the black hole device is present and some other target/lun is enabled
for target mode.
Handle the IGNORE WIDE RESIDUE message. This support has not been tested.
Checkpoint work on handling ABORT, BUS DEVICE RESET, TERMINATE I/O PROCESS,
and CLEAR QUEUE messages as a target.
Fix a few problems with tagged command handling in target mode.
Wait until the sync offset counter falls to 0 before changing phase
after a data-in transfer completes as the DMA logic seems to indicate
transfer complete as soon as our last REQ is issued.
Simplify some of the target mode message handling code in the sequencer.
Use the host message loop for any unknown message types instead of performing
a reject message in the sequencer. Pass reject messages to the host
message loop too which frees up a sequencer interrupt type slot.
Default to issuing a bus reset if initiator mode is enabled. It seems
that the reset scsi bus bit is not defined in the same location for
all aic78xx BIOSes, so attempting to honor this setting will have to
wait until I get more information on how to detect it.
Nuke some unused variables.
in target mode, but we are not completing the command.
Use a template of allowed bus arbitration phases to selectively and
dynamically enable/disable initiator or target (re)selection.
Properly handle timeouts for target role transactions - just go to the
bus free state and report the error to the peripheral driver.
Checkpoint support for the XPT_ABORT_CCB function code. This currently
handles the accept tio and immediate notify ccb types, but does not
handle the continue target I/O or SCSI I/O ccb types. This is enough
to handle dynamic target enable/disable events.
Clean up the SCSI reset code so that we perform at most 1 SCSI bus
reset at initialization, the reset requested by the XPT layer.
const char *. Originally I was going to add casts from const char * to
char * in some of the pci device drivers, but the reality is that the
pci device probes return constant quoted strings.
is more robust and common code can be used for both the target and iniator
roles. The mechanism for tracking negotiation state has also been simplified.
Add support for sync/wide negotiation in target mode and fix many of
the target mode bugs running at higher speeds uncovered. Make a first
stab at getting all of the bus skew delays correct. Sync+Wide dataout
transfers still cause problems, but this may be an initiator problem.
Ensure that we exit BITBUCKET mode if the controller is restarted.
Add support for target mode only firmware downloads. This has been
tested on the aic7880, but should mean that we can perform target mode
on any aic7xxx controller. Mixed mode (initiator and target roles in
the same firmware load) is currently only supported on the aic7890, but
with optimization, may fit on chips with less instruction space.
for possible buffer overflow problems. Replaced most sprintf()'s
with snprintf(); for others cases, added terminating NUL bytes where
appropriate, replaced constants like "16" with sizeof(), etc.
These changes include several bug fixes, but most changes are for
maintainability's sake. Any instance where it wasn't "immediately
obvious" that a buffer overflow could not occur was made safer.
Reviewed by: Bruce Evans <bde@zeta.org.au>
Reviewed by: Matthew Dillon <dillon@apollo.backplane.com>
Reviewed by: Mike Spengler <mks@networkcs.com>
use a 256 entry ring buffer of descriptersfor this purpose. This allows
the use of a simple 8bit counter in the sequencer code for tracking start
location.
Entries in the ring buffer now contain a "cmd_valid" byte at their tail.
As an entry is serviced, this byte is cleared by the kernel and set by
the sequencer during its dma of a new entry. Since this byte is the last
portion of the command touched during a dma, the kernel can use this
byte to ensure the command it processes is completely valid.
The new command format requires a fixed sized DMA from the controller
to deliver which allowed for additional simplification of the sequencer
code. The hack that required 1 SCB slot to be stolen for incoming
command delivery notification is also gone.
Correct a problem where an external bus reset on the 'background' channel of
a Twin Channel EISA controller could put the driver into an infinite loop.
Noticed by: Twin Channel bug, Joerg Wunsch <joerg@FreeBSD.org>
Submitted by: -Wunused, Poul-Henning Kamp <phk@freebsd.org>
Disable DPARCKEN in the DSCOMMAND0 register on the aic7890/91/96/97.
Parity checking is broken for some chip/MB combinations and this
is the work around recommended by Adaptec.
dpt_pci.c:
Remove a superflous '{' that prevented DPT_ALLOW_MEMIO from working.
pcireg.h:
Add a definition for Parity Error Reponse bit in the PCI Space
command register.
a timeout, we must remove the pending SCB from the disconnected list
or risk list corruption when our BDR request using the same SCB is placed
on the waiting list.
Eradicate some silly uses of u_int8_t that just serve to slow the code down.
- Convert to CAM
- Use a new DMA based queuing and paging scheme
- Add preliminary target mode support
- Add support for the aic789X chips
- Take advantage of external SRAM on more controllers.
- Numerous bug fixes and performance improvements.
data fifo is full, but the PCI input latch is not empty,
HDMAEN cannot be cleared. The fix used here is to attempt
to drain the data fifo until there is space for the input
latch to drain and HDMAEN de-asserts.
This is a 1 instruction fix, so it should have no performance
impact.
operands that are set during seqeuncer program download instead of at
assembly time.
Convert the sequencer code to use" downloaded constants" for four run time
constants that vary depending on the board type. This frees up 4 bytes
of sequencer scratch ram space where these constants used to be stored and
also removes the additional instructions required to load their values
into the accumulator prior to using them.
Remove the REJBYTE sram variable. The host driver can just as easly
read the accumulator to get this value.
The scratch ram savings is important as the old code used to clober the
SCSICONF register on 274X cards which sits near the top of scratch ram
space. The SCSICONF register controls bus termination, and clobbering
it is not a good thing. Now we have 4 bytes to spare.
This should fix the reported problems with cards that don't have devices
attached to them failing with a stream of "Somone reset bus X" messages.
Doug Ledford determined the cause of the problem, fixes by me.
entry to the QOUTFIFO when it is full. This should eliminate the
"Timed out while idle" problems that many have reported.
In truth, this is somewhat of a hack. Although are interrupt latency is
low enough that we should be able to always service the queue in time,
since each entry must be passed up to the higher SCSI layer for what can
be a large amount of processing (perhaps even resulting in a new command
being queued) with interrupts disabled, we need this mechanism to avoid
overflow. In the future, these additional tasks will be offloaded to a
software interrupt handler which should make this hack unnecessary.
if SCB Paging was enabled:
disconnect with more data to transfer
disconnected SCB gets paged out
target reconnects so we page SCB back in
target completes transfer so residual is 0
target disconnects
SCB gets reused but not paged out since the residual is 0 (optimization)
target reconnects so we page the SCB back in
we report a residual because of stale residual information.
The fix for this is to set a flag that forces the SCB to be paged back
up to the host if we page in an SCB with a residual
Pointed out by: Doug Ledford <dledford@dialnet.net>
to fix a selection timeout problem.
If we can't find an SCB for the reconnecting target, issue a bus device
reset as the SCSI2 spec suggests.
Add a missing call to "add_scb_to_free_list" in the non paging case. In
the non-paging case, the SCBs don't really need to be on the free list,
but putting them there clears the tag field which is something the recovery
code depends on.
Be consistant about testing for parity errors after waiting for a
REQ on the bus.
Don't ack the last byte in a transaction until after we've cleared
all target state.
aic7xxx_asm.c:
Test the return value of getopt against -1 not EOF. (Yet another
shameless victum of the style guide being wrong).
loop, test for them separately. The bug report from David Malone showed that
even though we had been reselected (SELDI was true), we sat in the poll for
work loop until the selection timeout timer expired. It may be that the
SSTAT0 register doesn't like to have more than one bit tested at a time.
I've seen stranger things than this on these parts.
either by looking it up in the array of pending, per target, untagged
transactions, or by using the tag value passed in during the identify. The
old code only direct indexed for tagged transactions. This makes the
"findSCB" routine only necessary when SCB paging is enabled, so appropriately
conditionalize it. This greatly simplifies the non SCB paging code flow.
Stick 4 more, twin channel only, instructions behind
.if ( TWIN_CHANNEL)
aic7xxx_asm.c:
Add the -O options which allows the specification of which options
to include in a program listing. This makes it possible to easily
determine the address of any instruction in the program across
different hardware/option configurations. Updated usage() as well.
New sequencer assembler for the aic7xxx adapters. This assembler
performs some amount of register type checking, allows bit
manipulation of symbolic constants, and generates "patch tables"
for conditionalized downloading of portions of the program.
This makes it easier to take full advantage of the different
features of the aic7xxx cards without imposing run time penalies
or being bound to the small memory footprints of the low end
cards for features like target mode.
aic7xxx.reg:
New, assembler parsed, register definitions fo the aic7xxx cards.
This was done primarily in anticipation of 7810 support which
will have a different register layout, but should be able to use
the same assembler. The kernel aic7xxx driver consumes a generated
file in the compile directory to get the definitions of the register
locations.
aic7xxx.seq:
Convert to the slighly different syntax of the new assembler.
Conditionalize SCB_PAGING, ultra, and twin features which shaves
quite a bit of space once the program is downloaded.
Add code to leave the selection hardware enabled during reconnects
that win bus arbitration. This ensures that we will rearbitrate
as soon as the bus goes free instead of delaying for a bit.
When we expect the bus to go free, perform all of the cleanup
associated with that event "up front" and enter a loop awaiting
bus free. If we see a REQ first, complain, but attempt to
continue. This will hopefully address, or at least help diagnose,
the "target didn't send identify" messages that have been reported.
Spelling corrections obtained from NetBSD.
time that we really want to do this is when a bus reset causes the sequencer
to be reset and the kernel driver now handles this case.
Remove some reordering in the select2 routine that wasn't necessary.
It was an experimental fix for a race condition I fixed elsewhere, and
confused the code flow.
Don't bother looping on a parity error in the mesgout loop since we can't
see parity errors on out phases.
Clean up the mesgin_identify code. In the old days, we "snooped" for tag
messages and used this as an indicator of whether or not the target was
using tagged transactions. This forced the sequencer to ack the identify
before determining if a valid SCB matched the target meaning that an abort
message to handle this case might not be seen before the target entered a
data phase. Since we can determin the "tagged-ness" of a target by looking
it up in the array of busy targets (recently introduced), we can determine
this up front simplifying the search code as well as ensuring we can follow
the SCSI specs method for rejecting a reselection.
When an SCB is placed on the free list, set its SCB_TAG to SCB_LIST_NULL.
This makes it much easier for the kernel driver to find active SCBs on the
card during error recovery.
negotiation messages may be tagged, we were overrunning the old buffer.
The variable that was getting squashed is updated before the message goes
out, causing corrupted SDTR or WDTR messages. Depending on the phases
traversed before message out, this could cause the wrong offset to be
negotiated allowing data overruns to occur. The problem is easier to
detect with wide targets on the chain since the allowed offset is smaller.
Also removed the unnecessary clearing of SPIORDY during the message out
phase. We don't rely on SPIORDY any more.
When setting the HCNT registers, do so in ascending order.
When performing tagged queueing in non-paging mode, also check the
disconnected bit in the SCB as extra sanity during a reconection.
Make the labels in the DMA routine more sane.
When doing a DMA, if we see the DMADONE condition come true, we can
simply turn of the DMA enable bits in DFCNTRL without testing the FIFO
state as HDONE is true when DMADONE is true and this emplies the FIFO is
empty.
These changes clear up the data overrun error messages and seem to prevent
the "timed out in data-in phase" problems.
free.
When we clear SCSIRATE, also clear the FAST20 bit in SXFRCTL0. This also
allowed me to clean up some of the ULTRA code.
ULTRAENB->FAST20 to follow the convention in the Adaptec data books.
Fix the data-overrun code to set both stcnt and hcnt otherwise, the transfer
will just hang until we get a timeout.
Add implicit support for the NOOP message. I've never heard of the driver
issueing a reject for one, but its silly to reject NOOP and who knows how a
device might react.
In the dma routine, check SDONE before cleaing SDMAEN. The data books mention
SDONE possibly being cleared when SDMAEN is reset. Clients of dma now need
to check if SINDEX is cleared to know if a phasemis occured.
Fix some comments to be correct.
host DMAs. The additional test to ensure that the DMA has stopped is also
unnecessary since we've already waited for the DMA to complete.
Update my copyright for the new year.
Expand the boundaries of a pause disabled region to close of possible race
condition.
Revert a portion of the DMA code to fix false overruns.
Add a missing "add_scb_to_free_list" so we don't leak SCBs.
SDONE, not HDONE.
In the data phase dma handler, mask off just the enable bits instead of
clearing the whole register. Clearing the direction bit could be bad.
Also don't stop a DMA until MREQPEND goes false. Doing this may cause
an ABORT on the PCI bus although I have yet to see this happen.
Add definitions for MREQPEND and the BRDCTL register. The BRDCTL register
is used to handle high byte termination and automatic termination testing.
Only enable reselections once the channel and SCSIRATE have been cleared.
Add a pause block around the test busy code in the non-tagged case to simplify
error recovery in the corner case of aborting an SCB that just got started.
Simplify reselection processing by removing the call to initialize_scsiid.
Clear the scsiseq re/select control bits and setup for catching bogus
busfrees earlier in the re/select process.
Improve the automatic PIO code. It turns out that SPIORDY is not a reliable
hardware condition bit, so use REQINIT intstead. Don't rely on PHASEMIS
either since it can take too long to come true. Use a brute force comparison
instead.
Remove some unnecessary overhead in the command complete processing. It
should be nearly impossible to overflow the QOUTFIFO (worst case 9 command
have to complete with at least 6 of them requiring paging on an aic7850),
so don't take the additional PIO hit to guard against this condition. If we
don't see our interrupt in time, the system has bigger problems elsewhere.
If this ever does happen, the timeout handler will notice and retry the
command.
This will make a number of things easier in the future, as well as (finally!)
avoiding the Id-smashing problem which has plagued developers for so long.
Boy, I'm glad we're not using sup anymore. This update would have been
insane otherwise.
to miss reselections from some devices and since the reselection response
timeout is only 200ns, enabling reselections too late may be the cause of our
problem.
Immediate SCBs, since they always send messages that tell the target to
transition to bus free now rely on the busfree interrupt instead of the
IMMEDDONE sequencer interrupt that was generated before.
Rearrange some code in the message out loop to give ATN a little more time
to drop before we ACK the last byte.
Use SPIORDY instead of REQINIT when snooping for a tag message on a reconnect.
This is done for the same reasons we use SPIORDY in the inb functions.
When going into BITBUCKET mode, turn off HDMAEN in the DFCNTRL register so
that we can "not care" what the value of HCNT is. If HCNT is 0, BITBUCKET
mode won't transfer any data if HDMAEN is set. Seeing as we don't want the
transfer to even think about touching the host, this seems more sane anyway.
Thanks to "Dan Willis" <dan@plutotech.com> for pointing out that this was
a problem.
SPIORDY should go active on any REQ of the bus, so testing for REQINIT is
not necessary. It also seems that testing for SPIORDY is more robust then
REQINIT since SPIORDY comes active after REQINIT and PHASEMIS seems to take
some time to come true after REQ is asserted if the phase has changed. Of
course, none of this is documented.
This should give the code savings of my original changes, without breaking the
driver on fast peripherals.
initial selection when entering the status phase. This is the same assertion
we use for all the other data transfer phases.
Hopefully fix the hangs in the mesgin and mesgout phases that I introduced
last week during some code cleanup. I need to get some of these 12MB/s
drives so I can reproduce these hangs here...
Add a pause disable in the SCB paging case around our manipulation of the
QOUTQCNT variable. This is simply extra sanity.
Set LASTPHASE to P_BUSFREE once we see a busfree so that the kernel driver can
differentiate this from a data out phase.
1) get_free_or_disc_scb was not being passed its argument correctly
in one case
2) Add protection in the form of the QOUTQCNT variable to prevent
overflowing the QOUTFIFO.
This should make SCB Paging work. Really, I mean it now. 8-)
used mvi instead of mov. Luckily this code is most likely never executed
since it is only there for sanity should a target goes into the data phase
twice during a single selection or reselection.
SCB paging is now handled almost entirely by the sequencer and also uses
DMA. This should make SCB paging at least an order of magnitude more
efficient and vastly simplifies the implementation.
Add a few space optimizations so this code still fits on aic7770 chips.
Update comments.
mode when this occurs and allow the target to complete the transaction.
Force a retry on overruns since they are usually caused by termination or
cable problems.
seeing SPIORDY and checking for PHASEMIS. My last change turned out to
be less cosmetic then I thought.
Pointed out by: Satoshi Asami <asami@cs.berkeley.edu>,
Faried Nawaz <fn@pain.csrv.uidaho.edu
Cosmetic change to p_mesgout code so that it "looks" the same as what
is done in the inb* routines.
NetBSD/OpenBSD support Submitted by:Noriyuki Soda <soda@sra.co.jp>,
Pete Bentley <pete@demon.net>,
Charles M. Hannum <mycroft@mit.edu>,
Theo de Raadt <deraadt@theos.com>
phasemiss to sneak by without detection. This should fix the
Wide/Narrow boot problems that have been reported since this bug
caused the driver ignore a narrow target rejecting wide negotiation.
Change #ifdef linux to #ifdef __linux__
aic7xxx_reg.h:
Remove unneeded BOFF_60BCLOCKS
define CHIPRSTACK to be the same as CHIPRST
define RESET_SCSI and CHANNEL_B_PRIMARY bits
All of these aer used during the setup of adapters.
aic7770 >= Rev E, aic7850, aic7860, aic7870, and ai7880 based controllers.
Make findSCB safer for non-tagged commands when tagged commands are
active on the controller. The symptoms of this problem were
"Overlapped commands attempted" messages during error recovery
attempts.
Compact scratch ram usage. This leaves 8 bytes free for future use.
Clean up some comments.
aic7xxx_reg.h:
Update my copyright.
Fix support for the aic7850 by looking only at the relavent bits of the
QINCNT. The 7850 puts random garbage in the high bits and all my attempts
to determine the cause of this failed. This approach does seem to work
around the problem.
Don't trust SCSIPERR to tell us when there is a parity error. On
some revs of the 7870 and the 7880, this bit follows the parity of
the current byte. Instead of using a SEQINT to tell the kernel,
re-enable the standard parity error interrupt since it seems to pause
the sequencer right at the time of the error which is the effect we were
looking for anyway.
aic7xxx_reg.h:
Remove PARITY_ERROR seqeuncer interrupt type, its no longer used.
Define QCOUNTMASK as the SRAM location for the mask to use on the
QINCNT register. QCOUNTMASK is determined by the number of SCBs
supported by the device we're working on.
aic7xxx_asm.c
Properly check the return value of fopen, and define the arg list
in getopt correctly.
Submitted by: Pete Bentley <pete@demon.net>
since setting up the DMA is too costly. Restructure for efficiency.
Pause the sequencer when a parity error occurs so that the kernel driver
knows during which phase the error was encountered.
SPIORDY just before we ack on the bus so that there is no chance to
see SPIORDY for the same byte twice.
Make some small modifications so that the Linux aic7xxx driver can use
our sequencer and register definition files verbatum.
Add the same type of safeguards we use in the mesg_in phase to the mesg_out
phase.
aic7xxx_reg.h:
Add definitions for the DSCommand register for PCI adapters.
1) Use cpp to preprocess the sequencer code.
2) Convert all "magic numbers" to #defines shared by the sequencer and
kernel driver via the aic7xxx_reg.h file. (The assembler still needs
to be re-written in lex/yacc to allow ~|& type constructions).
3) Raise ATN on parity errors for "in" phases and send an initiator detected
error or message-in parity error message as appropriate.
4) Turn off the reselection hardware from the time or a (re)connection to
busfree. It seems that some fast targets were able to reconnect before
the sequencer was able to see busfree.
5) The message buffer is considered "in-use" when there is a positive length
count. The ACTIVE_MSG flag was unnecesary.
6) Properly set SCB_NEXT_WAITING to SCB_LIST_HEAD in scbs being added to
the waiting scb list. This is a change in how the list code works to
facilitate some planned work in the reset code.
7) The fields in the SCB have be re-arranged to be quad-word aligned.
8) The inb code has been rewritten to catch phasemisses and be more efficient.
9) Go back to "snooping the bus" to determine if the incomming identify
message will be followed by a simple queue message. Its much faster than
doing a search through the SCBs.
10) Implement better tag range checking for incomming tags.
11) Make sdtr_to_rate more accurate (use 25 instead of 24 in calculations -
must have been asleep that night).
12) Rearrange some routines to reduce code complexity and size.
13) Update comments and formatting.
14) Fixed bugs I've forgotten about??
Reviewed by: David Greenman <davidg@FreeBSD.org>
in each phase routine. Saves a few instructions.
Be more careful in how we deal with SXFRCTL0. Or in the control bits of
interest instead of using mvi. The kernel driver will set the ULTRAEN
bit of SXFRCTL0 if we are using Ultra (20MHz) mode and we don't want to
clobber it.
In sdtr_to_rate divide by two if we are in ultra mode to get the correct
setting since its a 20MHz instead of 10MHz scale.
to replace the very poor, original implementation of Scatter/Gather operations.
Use a bit (that was freed up with the rewrite above) in the SCB control byte
to designate commands that should allow disconnection. The kernel driver
makes this decision now instead of the sequencer since the sequencer can't
do the indexing very efficiently.
This commit drops the sequencer from 426 instructions to 390 most likely
freeing enough space to do a target mode implementation.
The first could occur because the original code would continue to reset
the SCSIID register while waiting for a selection. This could potentially
conflict with a reconnect since a successfull reconnect will also set the
SCSIID register. The fix is to use a separate wait loop after starting
a selection (as was done a few revisions ago).
The second probably never happens, but it was possible for a target to
reconnect while there was a pending SCB on the waiting list and not get
noticed. The fix was to remove a supurflous check of the scb waiting
list.
is needed for 3940 support.
Have tagged commands look to see if a target is "busy" with a non tagged
command before executing. This prevents overlapped tagged and non tagged
commands which can happen since request sense commands are not tagged.
1) If a target initiated a sync negotiation with us and happened to chose a
value above 15, the old code inadvertantly truncated it with an "& 0x0f".
If the periferal picked something really bad like 0x32, you'd end up with
an offset of 2 which would hang the drive since it didn't expect to ever
get something so low. We now do a MIN(maxoffset, given_offset).
2) In the case of Wide cards, we were turning on sync transfers after a
sucessfull wide negotiation. Now we leave the offset alone in the per
target scratch space (which implies asyncronous transfers since we initialize
it that way) until a syncronous negotation occurs.
3) We were advertizing a max offset of 15 instead of 8 for wide devices.
4) If the upper level SCSI code sent down a "SCSI_RESET", it would hang the
system because we would end up sending a null command to the sequencer. Now
we handle SCSI_RESET correctly by having the sequencer interrupt us when it
is about to fill the message buffer so that we can fill it in ourselves.
The sequencer will also "simulate" a command complete for these "message only"
SCBs so that the kernel driver can finish up properly. The cdplay utility
will send a "SCSI_REST" to the cdplayer if you use the reset command.
5) The code that handles SCSIINTs was broken in that if more than one type
of error was true at once, we'd do outbs without the card being paused.
The else clause after the busfree case was also an accident waiting to
happen. I've now turned this into an if, else if, else type of thing, since
in most cases when we handle one type of error, it should be okay to ignore
the rest (ie if we have a SELTO, who cares if there was a parity error on
the transaction?), but the section should really be rewritten after 2.0.5.
This fix was the least obtrusive way to patch the problem.
6) Only tag either SDTR or WDTR negotiation on an SCB. The real problem is
that I don't account for the case when an SCB that is tagged to do a particular
type of negotiation completes or SELTOs (selection timeout) without the
negotiation taking place, so the accounting of sdtrpending and wdtrpending
gets screwed up. In the wide case, if we tag it to do both wdtr and sdtr,
it only performs wdtr (since wdtr must occur first and we spread out the
negotiation over two commands) so we always have sdtrpending set for that
target and we never do a real SDTR. I fill properly fix the accounting
after 2.0.5 goes out the door, but this works (as confirmed by Dan) on
wide targets.
Other stuff that is also included:
1) Don't do a bzero when recycling SCBs. The only thing that must explicitly
be set to zero is the scb control byte which is done in ahc_get_scb. We also
need to set the SG_list_pointer and SG_list_count to 0 for commands that do
not transfer data.
2) Mask the interrupt type printout for the aic7870 case. The bit we were
using to determine interrupt type is only valid for the aic7770.
Submitted by: Justin Gibbs
the adapter's selections. Many fast periferals were getting upset when
the sequencer decided to rearbitrate after the device had already won
arbitration. This also forced the creation of a list threaded through
the SCBs (since we don't have enough space anywhere else) of commands that
are awaiting reselection. This list is run down before any new transactions
from the input queue are allowed. The list is appened to whenever we begin
a selection (simple case since the selecting device is always at the head)
and by the kernel driver whenever a request sense occurs. In the common
case, the list is only one element long, but when a reselection wins out
over a selection and that reselection generates a request sense, the
outstanding selection required for the retreval of the sense code grows
the list. On machines with many targets, this might cause the list to grow
large, so this solution, which will allow up to the maximum number of I/O
requests capible of the card elements in the list, was chosen. The list
manipulation is trivial and adds three sequencer instructions of overhead
to the selection phase.
This fixes the "target busy" errors from micropolis drives and the bursty
I/O problem when performing I/O between a Quantum Grand Prix and any other
device. I anticipate that this will correct many of the problems that
have been reported with this driver.
Reviewed by: Wcarchive and David Greenman
is identical to the older version, just the copyright has changed. Many
thanks go to Dean Gehnert of the Linux camp who went the extra mile to make
this happen.
Other changes:
Update assembler man page to include the -v and -D options
Merge in Dean's latest changes to the assembler
Have the sequencer do a MSG_REJECT when the negotiated syncronous rate
is lower than the adapter supports. This forces asyncronous mode which
is faster at these rates anyway.
This code will be moved shortly to the non-gpld portion of the tree.
old value.
Remove unnecessary check for active messages in setup SCB. This same test
would also jump to p_mesgin_done which would "ACK" an extra time possibly
confusing the target.
Tell the kernel driver whenever we send an ABORT_TAG message.
- Report valid residual byte counts. We actually pause the sequencer
when the residual is non-zero. I thought about using DMA to do this,
bus sequencer program space is tight.
- Fix embarassing off by one error in the computation of a 2's
compliment variable. This was most likely the cause of the
many problems reported with the tagged queuing code.
- Handle "MAX_SYNC" as a special case (ie we are the ones starting
the sync negotiation sequence). This was done so that the target
scratch area can be initialed to 0 offset (asyncronous transfers)
safely. The initialization to 0 (was 15) is necessary since in
some cases a Wide negotiation could run into problems if SCSIRATE
was set wrong and we went into data(in/out).
- Trim the DMA routines a little by using some procedures. Net
effect is more functionality with 3 less instructions after this
update.
- Toggle the WIDEODD bit of the DFCNTRL whenever this is not the
last SG block. It has no effect in the 8bit bus configuration,
but in the Wide configuration ensures that the overlap byte is
held in the SCSI block if the transfer is odd so it will end
up in the next SG (the correct behavior).
Print out the length of the compiled sequencer program.
aic7xxx.seq:
More optimizations. Replace generic bcopy routine with bcopy_3
and bcopy_4 (ie unroll the loops) since these are the only two cases used.
Initialize SIMODE1 and SXFRCTL1 from the kernel in ahc_init instead of
at each selection/reselection since this is expensive and only needs to
be done once. Condense function returns into previous instruction if possible.
Reorder some sections to kill superflous jumps. These optimizations kill
the ~150k/s penalty adding support for Twin/Wide cards was costing since
the last place in the commaon path of execution where we had to do ugly,
convoluted testing for the type of card in the sequencer has gone away.
Next stop tagged queuing and target mode.
(SCSI control block) instead of having the host PIO it down. Also
reimplement WDTR and SDTR optimization to remove code in the sequencer
and place the responsibility of knowing when to initiate SDTR or WDTR
on the kernel driver. This vastly shortens the sequencer program yet
yeilds the same performance.
sense retrieval code that messed up CDROM devices. This code will also
responde correctly to SDTR and WDTR messages from devices that start a
negotiation sequence.
You can now sling 14 devices off of a 274xT. In the process of adding
twin channel support, I removed all evident restrictions on supporting
Wide channeled devices, but I do not have a Wide controller to test them
on.
aic7770_seq.h, the pre-compiled header, is no longer needed since config
handles this dependancy.
make the sequencer code fully compatible with the aic7870 (ie 294x adaptors).
I've also added to my local mods putting the sequencer into "FASTMODE" clock.
This gives upwards of 2M/sec write preformance improvement in some scenarios.
There haven't been any reports of this causing problems, and I have been
reaping the benifits of it for more than a week now.
This also includes a new version of the pre-generated file <ugh>
Obtained from: John Aycock (aycock@cpsc.ucalgary.ca) and myself
a discussion going on about removing this code from the burden of the
GPL, but it won't happen before Beta, and this code should be tested
before release.
Supports 27/2842 class adaptec cards and is almost capable of supporting
aic7870 based adapters (294X series cards). It does not support Wide
controllers or the second channel on Twin boards although I have work in
progress on getting both channels and running.
I have also added a few performance improvements to this version that give
us approximately a 25% boost over the original driver. These patches have
been submitted to the author.
Obtained from: Linux aic7770 driver (John Aycock - aycock@cpsc.ucalgary.ca)
