Commit Graph

51 Commits

Author SHA1 Message Date
Tomasz Jozwiak
1e796b11fe drivers/qat: fix queue pair NUMA node
This patch assigns QAT queue pair resources to the correct NUMA nodes.
Any DMA'able memory should use NUMA node of QAT device
rather than socket_id of the initializing process.

Fixes: 98c4a35c73 ("crypto/qat: move common qat files to common dir")
Fixes: a795248d74 ("compress/qat: add configure and clear functions")
Cc: stable@dpdk.org

Signed-off-by: Tomasz Jozwiak <tomaszx.jozwiak@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2019-04-02 16:50:24 +02:00
Arek Kusztal
8245972c04 crypto/qat: add modular multiplicative inverse
This commit adds modular multiplicative inverse to Intel
QuickAssist Technology driver. For capabilities or limitations
please refer to qat.rst or qat_asym_capabilities.h.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2019-04-02 16:50:24 +02:00
Arek Kusztal
fb70b33b05 crypto/qat: add modular exponentiation
This commit adds modular exponentiation to Intel QuickAssist
Technology driver. For capabilities or limitations please refer to
qat.rst or qat_asym_capabilities.h.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2019-04-02 16:50:24 +02:00
Arek Kusztal
f81cbc208f crypto/qat: add asymmetric crypto PMD
This patch adds Poll Mode Driver for asymmetric crypto
functions of Intel QuickAssist Technology hardware.

It contains plain driver with no functions implemented, specific
algorithms will be introduced in separate patches.

This patch depends on a QAT PF driver for device initialization. See
the file docs/guides/cryptodevs/qat.rst for configuration details.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2019-04-02 16:50:24 +02:00
Arek Kusztal
0adc033f58 common/qat: add headers for asymmetric crypto
This commit adds headers to be used in conjunction with asymmetric
cryptography operations using Intel QuickAssist Technology driver

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2019-04-02 16:50:24 +02:00
Anoob Joseph
f194f19821 crypto/octeontx: move device specific code to driver
Moving upper level enqueue/dequeue routines to driver. The h/w interface
used to submit request has enough differences to substantiate the need
for separate routines.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
2019-03-22 15:54:24 +01:00
Anoob Joseph
f39928e656 common/cpt: redesign propagation of error
The check for prep_req is good enough to flag error. The return var
passed around is redundant. Fixing this. Also making the functions
return correct error values in case of various failures.

In addition, adding unlikely flag for all error checks.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
2019-03-22 15:54:24 +01:00
Anoob Joseph
a03a7bfb90 common/cpt: improve structures used in datapath
Making cpt_request_info structure cache aligned. This structure is
used from data path.

Also rearranging the pending queue structure to
prevent hole in between members.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
2019-03-22 15:54:24 +01:00
Anoob Joseph
3ca687a4a0 common/cpt: fix null auth only
Fixes: 351fbee219 ("common/cpt: support hash")
Cc: stable@dpdk.org

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
2019-03-06 17:28:35 +01:00
Tomasz Jozwiak
ba83e5c006 compress/qat: fix dequeue error counter
This patch increments error counter (stats.dequeue_err_count)
in case of any error detection during qat_comp_process_response
function.

Fixes: 3cc14fc48e ("compress/qat: check that correct firmware is in use")
Fixes: 32842f2a6d ("compress/qat: create FW request and process response")
Cc: stable@dpdk.org

Signed-off-by: Tomasz Jozwiak <tomaszx.jozwiak@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2018-12-19 11:19:10 +01:00
Tomasz Jozwiak
8c41455e9e common/qat: remove check of valid firmware response
This reverts commit d09973f6c4 ("common/qat: fix for invalid
response from firmware") due to incorrectly reporting failures
on some older firmware versions.

Fixes: d09973f6c4 ("common/qat: fix for invalid response from firmware")
Cc: stable@dpdk.org

Signed-off-by: Tomasz Jozwiak <tomaszx.jozwiak@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2018-12-19 11:19:10 +01:00
Ankur Dwivedi
f9494b67c0 common/cpt: fix bit shift operation for KASUMI
Using the rte_bsf32 function to find last set bit. This avoids
the for loop and hence the bad bit shift operation.

Coverity issue: 323477
Fixes: 351fbee219 ("common/cpt: support hash")

Signed-off-by: Ankur Dwivedi <ankur.dwivedi@caviumnetworks.com>
Signed-off-by: Anoob Joseph <anoob.joseph@caviumnetworks.com>
2018-11-18 22:31:30 +01:00
Fiona Trahe
d09973f6c4 common/qat: fix for invalid response from firmware
Check that the firmware response has a bit set indicating
it's valid before dereferencing the rest of the response contents.

Fixes: 0bdd36e122 ("crypto/qat: make dequeue function generic")
Cc: stable@dpdk.org

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
2018-10-27 02:13:29 +02:00
Fiona Trahe
a124830a6f compress/qat: enable dynamic huffman encoding
Enable dynamic huffman encoding in the QAT comp PMD.

Signed-off-by: Tomasz Jozwiak <tomaszx.jozwiak@intel.com>
Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
2018-10-27 01:30:21 +02:00
Keith Wiles
81bede55e3 eal: add macro for attribute weak
eal: add shorthand __rte_weak macro
qat: update code to use __rte_weak macro
avf: update code to use __rte_weak macro
fm10k: update code to use __rte_weak macro
i40e: update code to use __rte_weak macro
ixgbe: update code to use __rte_weak macro
mlx5: update code to use __rte_weak macro
virtio: update code to use __rte_weak macro
acl: update code to use __rte_weak macro
bpf: update code to use __rte_weak macro

Signed-off-by: Keith Wiles <keith.wiles@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2018-10-25 02:11:23 +02:00
Shreyansh Jain
93ec301495 common/dpaax: reduce log level
DPAAX is a library used by various NXP drivers. In case of non-NXP
environment, this start spewing message about unavailability of
necessary environment.

This patch reduces the log level for certain messages as well as
reduces overall log-level. As a library, these message are not
necessarily relevant at higher log level, either.

Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
Acked-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Tested-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
2018-10-25 00:51:05 +02:00
Shreyansh Jain
c390b49d74 common/dpaax: fix nodes check
In case the memory for nodes cannot be allocated, there is no need
to check for the length. Also, `node_count` is an unsigned value
and cannot be less than 0.

Coverity issue: 323521
Fixes: 2f3d633aa5 ("common/dpaax: add library for PA/VA translation table")

Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
2018-10-25 00:51:05 +02:00
Shreyansh Jain
29ba8d9436 common/dpaax: fix uninitialized PA-VA table case
There is a possibility that either because of missing device tree entry
or lack of memory, the PA-VA table might not be available. But, the
table being transparent, the callers don't necessary check for its
initialization state. This is explicitly done during update and
translation call.

Fixes: 2f3d633aa5 ("common/dpaax: add library for PA/VA translation table")

Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
2018-10-25 00:51:05 +02:00
Fiona Trahe
8451f04d02 common/qat: fix failure to create PMD
If QAT crypto pmd failed to be created due to reaching MAX
cryptodevs it prevented QAT comp PMD being created. And vice versa.
Change to warning in these cases and allow the other PMD to be created.

Fixes: c0c90bc4ca ("compress/qat: add create and destroy functions")
Cc: stable@dpdk.org

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Tomasz Cel <tomaszx.cel@intel.com>
2018-10-17 12:23:40 +02:00
Fiona Trahe
1f5e4053f9 common/qat: support GEN3 devices
This adds pci detection, queue-pair configuration and
documentation for Intel GEN3 QuickAssist devices.

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Tomasz Jozwiak <tomaszx.jozwiak@intel.com>
2018-10-17 12:23:40 +02:00
Tejasree Kondoj
89f1a8d6a0 crypto/octeontx: add burst dequeue
Signed-off-by: Ankur Dwivedi <ankur.dwivedi@caviumnetworks.com>
Signed-off-by: Anoob Joseph <anoob.joseph@caviumnetworks.com>
Signed-off-by: Murthy NSSR <nidadavolu.murthy@caviumnetworks.com>
Signed-off-by: Nithin Dabilpuram <nithin.dabilpuram@caviumnetworks.com>
Signed-off-by: Ragothaman Jayaraman <rjayaraman@caviumnetworks.com>
Signed-off-by: Srisivasubramanian S <ssrinivasan@caviumnetworks.com>
Signed-off-by: Tejasree Kondoj <kondoj.tejasree@caviumnetworks.com>
2018-10-17 12:20:06 +02:00
Tejasree Kondoj
ac4d88afc7 crypto/octeontx: add burst enqueue
Signed-off-by: Ankur Dwivedi <ankur.dwivedi@caviumnetworks.com>
Signed-off-by: Anoob Joseph <anoob.joseph@caviumnetworks.com>
Signed-off-by: Murthy NSSR <nidadavolu.murthy@caviumnetworks.com>
Signed-off-by: Nithin Dabilpuram <nithin.dabilpuram@caviumnetworks.com>
Signed-off-by: Ragothaman Jayaraman <rjayaraman@caviumnetworks.com>
Signed-off-by: Srisivasubramanian S <ssrinivasan@caviumnetworks.com>
Signed-off-by: Tejasree Kondoj <kondoj.tejasree@caviumnetworks.com>
2018-10-17 12:20:06 +02:00
Srisivasubramanian S
351fbee219 common/cpt: support hash
Adding microcode interface for supporting verify and authentication

Signed-off-by: Ankur Dwivedi <ankur.dwivedi@caviumnetworks.com>
Signed-off-by: Anoob Joseph <anoob.joseph@caviumnetworks.com>
Signed-off-by: Murthy NSSR <nidadavolu.murthy@caviumnetworks.com>
Signed-off-by: Nithin Dabilpuram <nithin.dabilpuram@caviumnetworks.com>
Signed-off-by: Ragothaman Jayaraman <rjayaraman@caviumnetworks.com>
Signed-off-by: Srisivasubramanian S <ssrinivasan@caviumnetworks.com>
Signed-off-by: Tejasree Kondoj <kondoj.tejasree@caviumnetworks.com>
2018-10-17 12:20:06 +02:00
Srisivasubramanian S
da39e3eccd common/cpt: support KASUMI
Adding microcode interface for supporting kasumi.

Signed-off-by: Ankur Dwivedi <ankur.dwivedi@caviumnetworks.com>
Signed-off-by: Anoob Joseph <anoob.joseph@caviumnetworks.com>
Signed-off-by: Murthy NSSR <nidadavolu.murthy@caviumnetworks.com>
Signed-off-by: Nithin Dabilpuram <nithin.dabilpuram@caviumnetworks.com>
Signed-off-by: Ragothaman Jayaraman <rjayaraman@caviumnetworks.com>
Signed-off-by: Srisivasubramanian S <ssrinivasan@caviumnetworks.com>
Signed-off-by: Tejasree Kondoj <kondoj.tejasree@caviumnetworks.com>
2018-10-17 12:20:06 +02:00
Srisivasubramanian S
00d92c66a1 common/cpt: support ZUC and SNOW3G
Adding microcode interface for supporting ZUC and SNOW3G.

Signed-off-by: Ankur Dwivedi <ankur.dwivedi@caviumnetworks.com>
Signed-off-by: Anoob Joseph <anoob.joseph@caviumnetworks.com>
Signed-off-by: Murthy NSSR <nidadavolu.murthy@caviumnetworks.com>
Signed-off-by: Nithin Dabilpuram <nithin.dabilpuram@caviumnetworks.com>
Signed-off-by: Ragothaman Jayaraman <rjayaraman@caviumnetworks.com>
Signed-off-by: Srisivasubramanian S <ssrinivasan@caviumnetworks.com>
Signed-off-by: Tejasree Kondoj <kondoj.tejasree@caviumnetworks.com>
2018-10-17 12:20:06 +02:00
Ragothaman Jayaraman
ba48221f4a common/cpt: add crypto enqueue request manager framework
Adding crypto enqueue op request manager framework. This routine won't
submit to the hardware yet.

Signed-off-by: Ankur Dwivedi <ankur.dwivedi@caviumnetworks.com>
Signed-off-by: Anoob Joseph <anoob.joseph@caviumnetworks.com>
Signed-off-by: Murthy NSSR <nidadavolu.murthy@caviumnetworks.com>
Signed-off-by: Nithin Dabilpuram <nithin.dabilpuram@caviumnetworks.com>
Signed-off-by: Ragothaman Jayaraman <rjayaraman@caviumnetworks.com>
Signed-off-by: Srisivasubramanian S <ssrinivasan@caviumnetworks.com>
Signed-off-by: Tejasree Kondoj <kondoj.tejasree@caviumnetworks.com>
2018-10-17 12:20:06 +02:00
Ragothaman Jayaraman
177b41ceee common/cpt: add microcode interface for decryption
Adding microcode interface additions for supporting decryption.

Signed-off-by: Ankur Dwivedi <ankur.dwivedi@caviumnetworks.com>
Signed-off-by: Anoob Joseph <anoob.joseph@caviumnetworks.com>
Signed-off-by: Murthy NSSR <nidadavolu.murthy@caviumnetworks.com>
Signed-off-by: Nithin Dabilpuram <nithin.dabilpuram@caviumnetworks.com>
Signed-off-by: Ragothaman Jayaraman <rjayaraman@caviumnetworks.com>
Signed-off-by: Srisivasubramanian S <ssrinivasan@caviumnetworks.com>
Signed-off-by: Tejasree Kondoj <kondoj.tejasree@caviumnetworks.com>
2018-10-17 12:20:06 +02:00
Ragothaman Jayaraman
b74652f3a9 common/cpt: add microcode interface for encryption
Adding microcode interface additions for supporting encryption.

Signed-off-by: Ankur Dwivedi <ankur.dwivedi@caviumnetworks.com>
Signed-off-by: Anoob Joseph <anoob.joseph@caviumnetworks.com>
Signed-off-by: Murthy NSSR <nidadavolu.murthy@caviumnetworks.com>
Signed-off-by: Nithin Dabilpuram <nithin.dabilpuram@caviumnetworks.com>
Signed-off-by: Ragothaman Jayaraman <rjayaraman@caviumnetworks.com>
Signed-off-by: Srisivasubramanian S <ssrinivasan@caviumnetworks.com>
Signed-off-by: Tejasree Kondoj <kondoj.tejasree@caviumnetworks.com>
2018-10-17 12:20:06 +02:00
Nithin Dabilpuram
9be415daf4 common/cpt: add common defines for microcode
Signed-off-by: Ankur Dwivedi <ankur.dwivedi@caviumnetworks.com>
Signed-off-by: Anoob Joseph <anoob.joseph@caviumnetworks.com>
Signed-off-by: Murthy NSSR <nidadavolu.murthy@caviumnetworks.com>
Signed-off-by: Nithin Dabilpuram <nithin.dabilpuram@caviumnetworks.com>
Signed-off-by: Ragothaman Jayaraman <rjayaraman@caviumnetworks.com>
Signed-off-by: Srisivasubramanian S <ssrinivasan@caviumnetworks.com>
Signed-off-by: Tejasree Kondoj <kondoj.tejasree@caviumnetworks.com>
2018-10-17 12:20:06 +02:00
Nithin Dabilpuram
6cc5409652 crypto/octeontx: add supported sessions
Adding AEAD, cipher & auth sessions support.

Signed-off-by: Ankur Dwivedi <ankur.dwivedi@caviumnetworks.com>
Signed-off-by: Anoob Joseph <anoob.joseph@caviumnetworks.com>
Signed-off-by: Murthy NSSR <nidadavolu.murthy@caviumnetworks.com>
Signed-off-by: Nithin Dabilpuram <nithin.dabilpuram@caviumnetworks.com>
Signed-off-by: Ragothaman Jayaraman <rjayaraman@caviumnetworks.com>
Signed-off-by: Srisivasubramanian S <ssrinivasan@caviumnetworks.com>
Signed-off-by: Tejasree Kondoj <kondoj.tejasree@caviumnetworks.com>
2018-10-17 12:20:06 +02:00
Nithin Dabilpuram
43d01767b2 crypto/octeontx: add session management operations
Adding routines for session configure, session clear and get session
size ops.

Signed-off-by: Ankur Dwivedi <ankur.dwivedi@caviumnetworks.com>
Signed-off-by: Anoob Joseph <anoob.joseph@caviumnetworks.com>
Signed-off-by: Murthy NSSR <nidadavolu.murthy@caviumnetworks.com>
Signed-off-by: Nithin Dabilpuram <nithin.dabilpuram@caviumnetworks.com>
Signed-off-by: Ragothaman Jayaraman <rjayaraman@caviumnetworks.com>
Signed-off-by: Srisivasubramanian S <ssrinivasan@caviumnetworks.com>
Signed-off-by: Tejasree Kondoj <kondoj.tejasree@caviumnetworks.com>
2018-10-17 12:20:06 +02:00
Murthy NSSR
0961348fdf crypto/octeontx: add queue pair functions
Adding queue pair setup and release functions

Signed-off-by: Ankur Dwivedi <ankur.dwivedi@caviumnetworks.com>
Signed-off-by: Anoob Joseph <anoob.joseph@caviumnetworks.com>
Signed-off-by: Murthy NSSR <nidadavolu.murthy@caviumnetworks.com>
Signed-off-by: Nithin Dabilpuram <nithin.dabilpuram@caviumnetworks.com>
Signed-off-by: Ragothaman Jayaraman <rjayaraman@caviumnetworks.com>
Signed-off-by: Srisivasubramanian S <ssrinivasan@caviumnetworks.com>
Signed-off-by: Tejasree Kondoj <kondoj.tejasree@caviumnetworks.com>
2018-10-17 12:20:06 +02:00
Anoob Joseph
8846a756eb common/cpt: add PMD ops helper functions
Adding pmd ops helper functions. Control path accessed APIs would be
added as helper functions. Adding microcode defined macros etc as
dependencies to the helper functions.

Signed-off-by: Ankur Dwivedi <ankur.dwivedi@caviumnetworks.com>
Signed-off-by: Anoob Joseph <anoob.joseph@caviumnetworks.com>
Signed-off-by: Murthy NSSR <nidadavolu.murthy@caviumnetworks.com>
Signed-off-by: Nithin Dabilpuram <nithin.dabilpuram@caviumnetworks.com>
Signed-off-by: Ragothaman Jayaraman <rjayaraman@caviumnetworks.com>
Signed-off-by: Srisivasubramanian S <ssrinivasan@caviumnetworks.com>
Signed-off-by: Tejasree Kondoj <kondoj.tejasree@caviumnetworks.com>
2018-10-17 12:20:06 +02:00
Ankur Dwivedi
84eb02f778 crypto/octeontx: add hardware register access for misc poll
Adding hardware register accesses required for misc poll

Signed-off-by: Ankur Dwivedi <ankur.dwivedi@caviumnetworks.com>
Signed-off-by: Anoob Joseph <anoob.joseph@caviumnetworks.com>
Signed-off-by: Murthy NSSR <nidadavolu.murthy@caviumnetworks.com>
Signed-off-by: Nithin Dabilpuram <nithin.dabilpuram@caviumnetworks.com>
Signed-off-by: Ragothaman Jayaraman <rjayaraman@caviumnetworks.com>
Signed-off-by: Srisivasubramanian S <ssrinivasan@caviumnetworks.com>
Signed-off-by: Tejasree Kondoj <kondoj.tejasree@caviumnetworks.com>
2018-10-17 12:16:54 +02:00
Ankur Dwivedi
0dc1cffa4d crypto/octeontx: add hardware init routine
Adding hardware init routine for OCTEON TX crypto device. A place holder
is added for misc polling routine. That will be added in the further
patches.

Signed-off-by: Ankur Dwivedi <ankur.dwivedi@caviumnetworks.com>
Signed-off-by: Anoob Joseph <anoob.joseph@caviumnetworks.com>
Signed-off-by: Murthy NSSR <nidadavolu.murthy@caviumnetworks.com>
Signed-off-by: Nithin Dabilpuram <nithin.dabilpuram@caviumnetworks.com>
Signed-off-by: Ragothaman Jayaraman <rjayaraman@caviumnetworks.com>
Signed-off-by: Srisivasubramanian S <ssrinivasan@caviumnetworks.com>
Signed-off-by: Tejasree Kondoj <kondoj.tejasree@caviumnetworks.com>
2018-10-17 12:16:54 +02:00
Anoob Joseph
bfe2ae495e crypto/octeontx: add PMD skeleton
Adding OCTEON TX crypto PMD skeleton. Updating the maintainers files to
claim responsibility. Also enabling driver by default by adding the
component in common_base.

Signed-off-by: Ankur Dwivedi <ankur.dwivedi@caviumnetworks.com>
Signed-off-by: Anoob Joseph <anoob.joseph@caviumnetworks.com>
Signed-off-by: Murthy NSSR <nidadavolu.murthy@caviumnetworks.com>
Signed-off-by: Nithin Dabilpuram <nithin.dabilpuram@caviumnetworks.com>
Signed-off-by: Ragothaman Jayaraman <rjayaraman@caviumnetworks.com>
Signed-off-by: Srisivasubramanian S <ssrinivasan@caviumnetworks.com>
Signed-off-by: Tejasree Kondoj <kondoj.tejasree@caviumnetworks.com>
2018-10-17 12:16:54 +02:00
Dmitri Epshtein
5c3132f246 crypto/mvsam: use common initialization
Use common initialization to reduce boilerplate code.

Signed-off-by: Dmitri Epshtein <dima@marvell.com>
Signed-off-by: Tomasz Duszynski <tdu@semihalf.com>
Reviewed-by: Natalie Samsonov <nsamsono@marvell.com>
2018-10-17 12:16:54 +02:00
Shreyansh Jain
2f3d633aa5 common/dpaax: add library for PA/VA translation table
A common library, valid for dpaaX drivers, which is used to maintain
a local copy of PA->VA translations.

In case of physical addressing mode (one of the option for FSLMC, and
only option for DPAA bus), the addresses of descriptors Rx'd are
physical. These need to be converted into equivalent VA for rte_mbuf
and other similar calls.

Using the rte_mem_virt2iova or rte_mem_virt2phy is expensive. This
library is an attempt to reduce the overall cost associated with
this translation.

A small table is maintained, containing continuous entries
representing a continguous physical range. Each of these entries
stores the equivalent VA, which is fed during mempool creation, or
memory allocation/deallocation callbacks.

Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
2018-10-16 14:54:25 +02:00
Zyta Szpak
4ccc8d770d net/mvneta: add PMD skeleton
Add neta pmd driver skeleton providing base for the further
development.

Signed-off-by: Natalie Samsonov <nsamsono@marvell.com>
Signed-off-by: Yelena Krivosheev <yelena@marvell.com>
Signed-off-by: Dmitri Epshtein <dima@marvell.com>
Signed-off-by: Zyta Szpak <zr@semihalf.com>
Signed-off-by: Andrzej Ostruszka <amo@semihalf.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2018-10-11 18:53:48 +02:00
Fiona Trahe
df8cca4633 compress/qat: use compression specific driver name
The QAT compression driver was named "qat".
Rename to compress_qat for consistency with other compressdev drivers
and with crypto_qat.

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Tomasz Jozwiak <tomaszx.jozwiak@intel.com>
2018-08-30 05:10:50 +02:00
Liron Himi
7a39d1b099 common/mvep: add common code for Marvell drivers
Add MVEP (Marvell Embedded Processors) to drivers/common which
will keep code reused by current and future MRVL PMDs.
Right now we have only common DMA memory initialization routines there.

Signed-off-by: Liron Himi <lironh@marvell.com>
Signed-off-by: Tomasz Duszynski <tdu@semihalf.com>
Reviewed-by: Natalie Samsonov <nsamsono@marvell.com>
2018-08-28 15:27:39 +02:00
Tomasz Jozwiak
b30aa8911c common/qat: fix offset greater than first segment
This patch fixes sgl filling to handle offset
greater than first sgl segment

Fixes: 1947bd1858 ("compress/qat: support scatter-gather buffers")

Signed-off-by: Tomasz Jozwiak <tomaszx.jozwiak@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2018-08-03 09:14:24 +02:00
Fiona Trahe
944027acd4 common/qat: add scatter-gather header
This patch refactors the sgl struct so it includes a flexible
array of flat buffers as sym and compress PMDs can have
different size sgls.

Signed-off-by: Tomasz Jozwiak <tomaszx.jozwiak@intel.com>
Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
2018-07-25 08:19:54 +02:00
Fiona Trahe
c0c90bc4ca compress/qat: add create and destroy functions
Now that all the device operations are available,
add the functions to create and destroy the pmd.
Called on probe and remove of the qat pci device, these
register the device with the compressdev API
and plug in all the device functionality.

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Signed-off-by: Tomasz Jozwiak <tomaszx.jozwiak@intel.com>
2018-07-24 01:48:10 +02:00
Fiona Trahe
7a34c21557 compress/qat: add empty driver
Add Makefiles, meson files, and empty source files for compression PMD.
Handle cases for building either symmetric crypto PMD
or compression PMD or both and the common files both depend on.

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Signed-off-by: Tomasz Jozwiak <tomaszx.jozwiak@intel.com>
2018-07-24 01:48:10 +02:00
Fiona Trahe
b769101307 common/qat: update firmware headers
Updated to latest firmware headers files for QuickAssist devices.
Includes updates for symmetric crypto, PKE and Compression services.

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
2018-07-24 01:48:10 +02:00
Thomas Monjalon
f8e9989606 remove useless constructor headers
A constructor is usually declared with RTE_INIT* macros.
As it is a static function, no need to declare before its definition.
The macro is used directly in the function definition.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2018-07-12 00:00:35 +02:00
Fiona Trahe
90f5eede12 common/qat: replace snprintf
Replaced snprintf with strlcpy for safer string copy

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Signed-off-by: Tomasz Jozwiak <tomaszx.jozwiak@intel.com>
2018-07-11 00:57:51 +02:00
Tomasz Jozwiak
98c4a35c73 crypto/qat: move common qat files to common dir
-  moved common qat files to common/qat dir.
  -  changed common/qat/Makefile, common/qat/meson.build,
     drivers/Makefile, crypto/Makefile
     to add possibility of using new files locations
  -  added README file into crypto/qat to clarify where
     the build is made from
  -  updated MAINTAINERS file

Signed-off-by: Tomasz Jozwiak <tomaszx.jozwiak@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2018-07-11 00:55:30 +02:00
Pavan Nikhilesh
d8dd31652c common/octeontx: move mbox to common folder
Move commonly used functions across mempool, event and net devices to a
common folder in drivers.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
Acked-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Acked-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
2018-04-04 23:14:52 +02:00