Modify resource allocation and freeing logic to support
dynamic topology commit while to traffic is flowing.
This patch also modifies SQ flush to timeout based on minimum shaper
rate configured. SQ flush is further split to pre/post
functions to adhere to HW spec of 96XX C0.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Krzysztof Kanas <kkanas@marvell.com>
Adding support to configure link attributes like speed,
duplex, negotiation.
Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Patch adds routines to set/clear nix lf error & ras interrupt enable
registers. These nix lf error interrupts get triggered if there are
any failures during nix lf configuration. This interrupts are enabled
before any hardware configurations initiated on the allocated nix lf.
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Andrzej Ostruszka <aostruszka@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Octeontx2 HW has support for detecting the bad L2/L3/L4 UDP lengths.
Since DPDK does not have specific error flag for this, exposing it
as bad checksum failure in mbuff:ol_flags to leverage this feature.
These errors will be propagated to the ol_flags as follows.
L2 length error ==> (PKT_RX_IP_CKSUM_BAD | PKT_RX_L4_CKSUM_BAD).
Both Outer and Inner L3 length error ==> PKT_RX_IP_CKSUM_BAD.
Outer L4 UDP length/port error ==> PKT_RX_OUTER_L4_CKSUM_BAD.
Inner L4 UDP length/port error ==> PKT_RX_L4_CKSUM_BAD.
Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Currently when application requests for RTE_FC_NONE earlier
than PMD's internal fc mode update, flow control set routine
is returning without updating the flow control state.
Patch updates the PMD's internal fc mode details during
dev_configure to ensure any flow control set requests
issued later are handled properly.
Fixes: 609945f1ce90 ("net/octeontx2: support flow control")
Cc: stable@dpdk.org
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Added new flag for SECURITY in compiler optimized Tx fastpath
framework. With this, compiler autogenerates functions which
have security enabled.
Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Before C0 HW revision, The RSS adder was computed based the following
static formula.
rss_adder<7:0> = flow_tag<7:0> ^ flow_tag<15:8> ^
flow_tag<23:16> ^ flow_tag<31:24>
The above scheme has the following drawbacks:
1) It is not in line with other standard NIC behavior.
2) There can be an SW use case where SW can compute the hash
upfront using Toeplitz function and predict the queue selection
to optimize some packet lookup function. The nonstandard
way of doing XOR makes the consumer to not predict the queue selection.
C0 HW revision onward, The HW can configure the
rss_adder<7:0> as flow_tag<7:0> to align with standard NICs.
This patch adds an option to select legacy RSS adder mode
using tag_as_xor=1 devargs option while keeping the standard NIC
behavior as default.
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
If HIGIG mode is enabled on configure, This needs to be disabled
on port stop. Adding support to send mbox message on port stop
to configure the port to default.
Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
octeontx2 PMD does not support both PTP and HIGIG2 together.
Added a check to enforce this and updated the Rx offload capabilities when
Higig2 mode enabled.
Fixes: 602009ee2dfb ("net/octeontx2: support HIGIG2")
Cc: stable@dpdk.org
Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Returning -ENOTSUP only in case loopback mode is enabled and
device is VF or SDP.
Fixes: c2c0aa75cd01 ("net/octeontx2: fix loopback config return for VF")
Cc: stable@dpdk.org
Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
loopback mode is not supported for VFs so returning error if
VF is being configured with loopback mode.
Fixes: 920717e4d8ba ("net/octeontx2: add device start operation")
Cc: stable@dpdk.org
Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Enable packet type parsing by default, only disable when
`rte_eth_dev_set_ptypes()` is called with ptype_mask as 0.
This would enable applications that are dependent on packet type parsing
like l3fwd.
Also this patch preserves configuration set by `rte_eth_dev_set_ptypes`
across multiple calls of `rte_eth_dev_configure()`
Fixes: d2706e15e6fb ("net/octeontx2: support reduced set of packet types")
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Add support to set supported ptypes for octeontx2 and
remove devarg scheme to disable ptype parsing support as
application can use rte_eth_dev_set_ptypes() normative API
to enable the same use case.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Issue has been observed if PTP is already enabled on PF and
later VFs are configured. Since PTP requires mbuf data off
to be shifted by 8 bytes, due to this l3fwd/l2fwd was not
working with VFs.
Also some extra garbage bytes were observed in packet data
when ptp was enabled.
Fixes: b5dc3140448e ("net/octeontx2: support base PTP")
Cc: stable@dpdk.org
Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
After otx2_nix_register_cq_irqs() is called and the IRQs are setup,
otx2_nix_unregister_cq_irqs() need to be called in the subsequent error
exit paths.
Fixes: d34db5ccbf30 ("net/octeontx2: fix driver reconfiguration")
Cc: stable@dpdk.org
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Retrieve burst mode information according to the selected Rx/Tx mode and
offloads.
Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Add DEV_RX_OFFLOAD_RSS_HASH flag for all PMDs that support RSS hash
delivery.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Reviewed-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
System DPI Packet Interface Unit (SDP) is a co-processor
of OCTEON TX2 which provides PCIe endpoint support for a
remote host to DMA packets into and out of the OCTEON TX2 SoC.
SDP interface comes in to live only when it is connected in
EP mode. It exposes input and output queue pairs to remote host
for instruction input and packet output. It can be used as
a communication channel between remote host and OCTEON TX2.
Host machine needs to use corresponding user/kernel mode
driver to communicate with SDP interface on OCTEON TX2 SoC.
SDP interface support is limited to SDP PF device now.
No SDP VF support.
Signed-off-by: Subrahmanyam Nilla <snilla@marvell.com>
Signed-off-by: Venkateshwarlu Nalla <venkatn@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Adding support to configure specific switch types like high2 and dsa
on a port. When this switch type is configured, it is expected that
all the traffic on that port should be of specific type only.
Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Add support to below TCP segmentation offloads for
96XX A1 onwards and 95xx B0 onwards.
- TCPv4, TCPv6
- VXLAN[v4 | v6][v4 | v6]
- GENEVE[v4 | v6][v4 | v6]
This patch also modifies a fastpath function to be forced
inline due to performance reasons for multi-seg mode.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Adding support for tx descriptor status dev ops for octeontx2.
Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Update workaround changes for erratas that are fixed on 96xx A1.
This patch also enables cq drop for all the passes for
maintaining performance along with updating a default
Rx ring size in dev_info.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Patch extends minimum supported max_sqb_count devarg value
such that it can limit the max sqb count to 8 buffers and
also defines NIX_DEF_SQB and uses it to compute the number
of sqe buffers required for the egress traffic.
NIX_DEF_SQB is defined as 16 which is optimal across multiple
octeontx2 platforms to scale up the performance proportional
to the corresponding port/queue to lcore mappings.
Fixes: fb0198b7dc07 ("net/octeontx2: add devargs parsing functions")
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
From B0 HW revision onwards, HW can drop the Rx and L2 error packets.
Enable this by default if the feature is available.
Since this bit field is used as reserved in old HW revisions,
No need to have additional HW version check.
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
This patch implements read clock api whose purpose is to return
raw clock ticks. Using this API real time ticks spent in
processing a packet can be known:
<read_clock val at any time> - mbuf->timestamp
Calling mbox for reading raw clock ticks in fastpath is very
expensive so its value is derived from time stamp counter(tsc)
using freq multiplier (ratio of raw clock ticks and tsc) and clock
delta (by how much tsc is lagging from raw clock value).
Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
A huge drop in per core MPPS value was observed when PTP stack is
enabled. The reason behind the bottleneck is HW serialises the
transfer of all SQEs, which seeks timestamp capture, on the same
send DMA path. Hence only those packets which requires timestamp
capture should set SETTSTAMP in send mem alg.
With this patch timestamping would be done only for those packets
with PKT_TX_IEEE1588_TMST set.
Fixes: fb3ae0951abd ("net/octeontx2: support Tx")
Fixes: 8980a153006b ("event/octeontx2: support PTP for SSO")
Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Earlier implementation for enabling ptp via RX offload flag was
causing segmentation fault as it was getting executed in the
device configuration stage where RX and TX queues were not
configured. As in the ptp enable process rx queues are used for
mbuf setup while tx queues are used for send descriptor setup.
Moving the logic in dev start as all the resources will be
configured.
Fixes: b5dc3140448e ("net/octeontx2: support base PTP")
Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
When configure returns error, e.g. in case not supported offloads
(outer ip and sctp) driver released Rx,Tx queues. Then in case of
correct configuration the driver could not start due to queues already
released but the driver thought it was configured correctly.
Secondly if driver returns error from configuration librte_ethdev will
release, rx queues and tx queues, without chaining driver configured
state.
Fix that by 'releasing' configuration and changing driver state when
error is returned from otx2_nix_configure.
Fixes: 548b5839a32b ("net/octeontx2: add device configure operation")
Signed-off-by: Krzysztof Kanas <kkanas@marvell.com>
Reviewed-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Add build bug on on fast path used fields that are
dependent on their positions and values.
Fixes: f1eff76ab63e ("net/octeontx2: add Rx vector version")
Fixes: ddc1bc26e9ed ("net/octeontx2: add Tx vector version")
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
In order to align name with other PCI driver flag such as
RTE_PCI_DRV_NEED_MAPPING and to reflect its purpose, change
RTE_PCI_DRV_IOVA_AS_VA flag name as RTE_PCI_DRV_NEED_IOVA_AS_VA.
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: David Marchand <david.marchand@redhat.com>
The incriminated commit broke the use of RTE_PCI_DRV_IOVA_AS_VA which
was intended to mean "driver only supports VA" but had been understood
as "driver supports both PA and VA" by most net drivers and used to let
dpdk processes to run as non root (which do not have access to physical
addresses on recent kernels).
The check on physical addresses actually closed the gap for those
drivers. We don't need to mark them with RTE_PCI_DRV_IOVA_AS_VA and this
flag can retain its intended meaning.
Document explicitly its meaning.
We can check that a driver requirement wrt to IOVA mode is fulfilled
before trying to probe a device.
Finally, document the heuristic used to select the IOVA mode and hope
that we won't break it again.
Fixes: 703458e19c16 ("bus/pci: consider only usable devices for IOVA mode")
Signed-off-by: David Marchand <david.marchand@redhat.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
Tested-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
Update platform support of CNF95xx in documentation and
also, update the HW cap based on PCI subsystem id and revision id.
This patch also changes HW capability handling to be based on
PCI Revision ID. PCI Revision ID contains a unique identifier
to identify chip, major and minor revisions.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Add support for setting the link up and down.
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
This patch implements rx interrupts feature required for power
saving. These interrupts can be enabled/disabled on demand.
Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Add MTU set operation and MTU update feature.
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Add device start operation and update the correct
function pointers for Rx and Tx burst functions.
This patch also update the octeontx2 NIC specific documentation.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Implement support for setting VLAN TPID and PVID for Tx packets.
Signed-off-by: Vivek Sharma <viveksharma@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Support setting up VLAN filters so as to allow tagged
packet's reception after VLAN HW Filter offload is enabled.
Signed-off-by: Vivek Sharma <viveksharma@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Support configuring VLAN offloads for an ethernet device and
dynamic promiscuous mode configuration for VLAN filters where
filters are updated according to promiscuous mode of the device.
Signed-off-by: Vivek Sharma <viveksharma@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
