24473 Commits

Author SHA1 Message Date
Andrew Rybchenko
b6b29352f0 common/sfc_efx/base: implement Rx control path for Riverhead
Reuse EF10 RSS-related functions since current version of the RSS
interface is compatible with EF10.

Implement own functions to create and destroy Rx queues which reuse
MCDI wrappers which are shared with EF10.

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
2020-09-30 19:19:12 +02:00
Andrew Rybchenko
e9b9b2e56e common/sfc_efx/base: move Rx index check to generic code
Make NIC family specific functions a bit shorter and reduce
code duplication.

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
2020-09-30 19:19:12 +02:00
Andrew Rybchenko
6c055549e6 common/sfc_efx/base: free Rx queue structure in generic code
Rx queue structure is allocated in generic code, but was freed in NIC
family specific callbacks. Move free to generic function makes NIC
family specific callbacks shorter and reduces code duplication.

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
2020-09-30 19:19:12 +02:00
Andrew Rybchenko
7d382a059b common/sfc_efx/base: maintain RxQ counter in generic code
The counter is incremented in generic efx_rx_qcreate(), but was
asserted and decremented in NIC family specific queue create and
destroy callbacks.  Move assert and decrement to generic functions
as well to make NIC family specific callbacks shorter.

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
2020-09-30 19:19:12 +02:00
Andrew Rybchenko
4664935a73 common/sfc_efx/base: switch TxQ init to extended version
Extended version of MCDI allows up to 64 DMA addresses which are
required for Riverhead.

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
2020-09-30 19:19:12 +02:00
Andrew Rybchenko
70dc9c5488 common/sfc_efx/base: move TxQ init/fini wrappers to generic
TxQ init/fini MCDI is similar on Riverhead and these
functions should be reused to implement TxQ creation and
destruction on Riverhead.

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
Reviewed-by: Vijay Kumar Srivastava <vsrivast@xilinx.com>
2020-09-30 19:19:12 +02:00
Andrew Rybchenko
09b59c7da7 common/sfc_efx/base: move RxQ init/fini wrappers to generic
RxQ init/fini MCDI is similar on Riverhead and these
functions should be reused to implement RxQ creation and
destruction on Riverhead.

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
2020-09-30 19:19:12 +02:00
Andrew Rybchenko
9edb8ee3e7 common/sfc_efx/base: handle MCDI events on Riverhead
EF100 MCDI event layout is same as on EF10 except added QDMA phase
bit which is unused on EF10.

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
2020-09-30 19:19:12 +02:00
Ivan Malov
92fedcd3a5 common/sfc_efx/base: complete EvQ creation on Riverhead
Client drivers relying on interrupts will fail to complete event
queue creation on Riverhead boards as the latter have no support
for INIT_DONE events which means that it's useless to wait until
initialisation callback is triggered by interrupt-driven polling.

Client drivers which avoid interrupt-driven polling still handle
INIT_DONE events by direct polling and will fail to do so.

Solve this problem by adding an extra poll-once method which
will be called by client drivers after queue creation (probably,
with driver-specific lock being held). The method will invoke
initialisation callback on Riverhead and do nothing on the other
boards. Then the drivers will proceed with normal waiting which
will complete immediately in the case of Riverhead.

Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
2020-09-30 19:19:12 +02:00
Andrew Rybchenko
b97bf1cac2 common/sfc_efx/base: add event queue module for Riverhead
Events are significantly reworked on Riverhead, so it is better
to implement own set of callbacks to simplify future development
and avoid inheritance of legacy code.

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
2020-09-30 19:19:12 +02:00
Andrew Rybchenko
8aad114949 common/sfc_efx/base: merge versions of init EvQ wrappers
The decision on which version of the INIT_EVQ command to use may
be done inside the function itself. Caller should just provide
enough information sufficient in both cases. It avoids code
duplication and simplifies maintenance.

If v2 is not supported, keep decision about low-latency hint outside
the MCDI helper function since it will differ on Riverhead (there is
no EVB yet, but still want merging for better throughput).

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
2020-09-30 19:19:12 +02:00
Andrew Rybchenko
13a300a569 common/sfc_efx/base: prepare to merge EvQ init functions
v1 and v2 defines are the same except output length.

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
2020-09-30 19:19:12 +02:00
Andrew Rybchenko
2e5819a523 common/sfc_efx/base: move EvQ create generic checks
There is no point to duplicate these generic checks in NIC family
specific handlers.

As the side effect it fixes bug with incorrect interrupt moderation
settings silently ignored on event queue create on Siena.

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
Reviewed-by: Vijay Kumar Srivastava <vsrivast@xilinx.com>
2020-09-30 19:19:12 +02:00
Andrew Rybchenko
8527058133 common/sfc_efx/base: move EvQ init/fini wrappers to generic
EvQ init/fini MCDI is similar on Riverhead and these
functions should be reused to implement EvQ creation and
destruction on Riverhead.

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
Reviewed-by: Vijay Kumar Srivastava <vsrivast@xilinx.com>
2020-09-30 19:19:12 +02:00
Andrew Rybchenko
90ff7b9bf4 common/sfc_efx/base: add interrupts module for Riverhead
Riverhead supports interrupt aggregation rings. Right now there
are no plans to support it in libefx, but it is better to have
own set of callbacks to easier handle EF10 and Riverhead
differences in the future.

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
2020-09-30 19:19:12 +02:00
Andrew Rybchenko
de0d268f42 common/sfc_efx/base: use EF10 MAC methods for Riverhead
There is no difference yet in MAC support on EF10 and Riverhead.
So, it is better to reuse existing methods.

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
Reviewed-by: Vijay Kumar Srivastava <vsrivast@xilinx.com>
2020-09-30 19:19:12 +02:00
Andrew Rybchenko
e1fe2c33b2 common/sfc_efx/base: use EF10 filter methods for Riverhead
Filtering MCDI on Riverhead are the same as on EF10.

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
Reviewed-by: Vijay Kumar Srivastava <vsrivast@xilinx.com>
2020-09-30 19:19:12 +02:00
Andrew Rybchenko
a33217d57e common/sfc_efx/base: use dummy tunnel ops for Riverhead
Riverhead does not support tunnels yet.

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
2020-09-30 19:19:12 +02:00
Andrew Rybchenko
3c1c5cc4a7 common/sfc_efx/base: add Riverhead support to NIC module
Define basic NIC features and limitations.

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
Reviewed-by: Vijay Kumar Srivastava <vsrivast@xilinx.com>
2020-09-30 19:19:12 +02:00
Andrew Rybchenko
4d0af0db83 common/sfc_efx/base: factor out MCDI entity reset helper
The helper will be reused on Riverhead.

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
2020-09-30 19:19:12 +02:00
Andrew Rybchenko
538fd2ac05 common/sfc_efx/base: set NIC features in generic place
There is no point to duplicate it NIC family specific probe handlers.

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
2020-09-30 19:19:12 +02:00
Andrew Rybchenko
34add036ec common/sfc_efx/base: factor out helper to get board config
The helper will be used on Riverhead.

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
2020-09-30 19:19:12 +02:00
Andrew Rybchenko
495c8fef56 common/sfc_efx/base: remove PF count get from caps get
ef10_get_datapath_caps() should simply fill in NIC configuration
based MC_CMD_GET_CAPABILITIES output.

Number of PFs is a part of board configuration should be obtained
in corresponding function.

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
2020-09-30 19:19:12 +02:00
Andrew Rybchenko
d9d41eea65 common/sfc_efx/base: move 14b prefix check out of caps get
The function which gets capabilities from MC should simply fill in
NIC configuration. Caller should decide if the configuration is
supported or not.

The change is required to prepare the function to be reused on
Riverhead.

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
2020-09-30 19:19:12 +02:00
Andrew Rybchenko
3ac211cf9d common/sfc_efx/base: use EF10 PHY methods for Riverhead
There is no difference yet in PHY support on EF10 and Riverhead.
So, it is better to reuse existing methods.

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
Reviewed-by: Vijay Kumar Srivastava <vsrivast@xilinx.com>
2020-09-30 19:19:12 +02:00
Andrew Rybchenko
9b5b182d82 common/sfc_efx/base: use EF10 MCDI methods for Riverhead
MCDI on Riverhead is very close to the EF10 and there is no
point to duplicate the code.

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
2020-09-30 19:19:12 +02:00
Andrew Rybchenko
82c17c5223 common/sfc_efx/base: update registers check for Riverhead
Riverhead family got letter 'G' for registers definition.
Registers used for Riverhead should have the letter in the
specification range.

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
Reviewed-by: Vijay Kumar Srivastava <vsrivast@xilinx.com>
2020-09-30 19:19:12 +02:00
Andrew Rybchenko
206ef24f8f common/sfc_efx/base: add Riverhead NIC family
Riverhead is the first NIC family of the EF100 architecture.

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
Reviewed-by: Vijay Kumar Srivastava <vsrivast@xilinx.com>
2020-09-30 19:19:11 +02:00
Andrew Rybchenko
47df46afb3 common/sfc_efx/base: add efsys option for Riverhead
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
Reviewed-by: Vijay Kumar Srivastava <vsrivast@xilinx.com>
2020-09-30 19:19:11 +02:00
Andrew Rybchenko
ad1e3ed8c5 common/sfc_efx/base: add event queue operation to do polling
Event queue host interface differ on Riverhead and implementation
will be different.

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
2020-09-30 19:19:11 +02:00
Andrew Rybchenko
bb01a80e24 common/sfc_efx/base: update MCDI headers
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
2020-09-30 19:19:11 +02:00
Andrew Rybchenko
4d80109c52 common/sfc_efx/base: add EF100 registers definitions
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
2020-09-30 19:19:11 +02:00
Kiran Kumar K
2ea8e2919b net/octeontx2: support VLAN insert and strip actions
Adding support for RTE Flow VLAN insert and strip actions.

Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2020-09-30 19:19:11 +02:00
Kiran Kumar K
b08ef9e6c7 net/octeontx2: set max VTAG insertion size
When TX side VTAG insertion is enabled, SMQ should be configured with
the maximum VTAG insertion size to avoid generating NIX_SQINT_SEND_ERR
interrupt. Since the default value is zero, This patch configures the
VTAG insertion size to the max supported value.

Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2020-09-30 19:19:11 +02:00
Manish Chopra
5700d0f0b4 net/qede: support VF FLR
This patch adds required bit to handle VF FLR
indication from Management FW (MFW) of the device

With that VFs were able to load in VM (VF attached as PCI
passthrough to the guest VM) followed by FLR successfully

Updated the docs/guides with the feature support

Signed-off-by: Manish Chopra <manishc@marvell.com>
Signed-off-by: Igor Russkikh <irusskikh@marvell.com>
Signed-off-by: Rasesh Mody <rmody@marvell.com>
2020-09-30 19:19:11 +02:00
Manish Chopra
c176fd8695 net/qede: initialize VF MAC and link
This patch configures VFs with random mac if no MAC is
provided by the PF/bulletin. This also adds required bulletin
APIs by PF-PMD driver to communicate LINK properties/changes to
the VFs through bulletin update mechanism.

With these changes, VF-PMD instance is able to run
fastpath over PF-PMD driver instance.

Signed-off-by: Manish Chopra <manishc@marvell.com>
Signed-off-by: Igor Russkikh <irusskikh@marvell.com>
Signed-off-by: Rasesh Mody <rmody@marvell.com>
2020-09-30 19:19:11 +02:00
Manish Chopra
d459b04329 net/qede: add infrastructure support for VF load
This patch adds necessary infrastructure support (required to handle
messages from VF and sending ramrod on behalf of VF's configuration
request from alarm handler context) to start/load the VF-PMD driver
instance on top of PF-PMD driver instance.

Signed-off-by: Manish Chopra <manishc@marvell.com>
Signed-off-by: Igor Russkikh <irusskikh@marvell.com>
Signed-off-by: Rasesh Mody <rmody@marvell.com>
2020-09-30 19:19:11 +02:00
Manish Chopra
9ffe2a15a9 net/qede: configure VFs on hardware
Based on number of VFs enabled at PCI, PF-PMD driver instance
enables/configures those VFs from hardware perspective, such
that in later patches they could get required HW access to
communicate with PFs for slowpath configuration and run the
fastpath themselves.

This patch also add two new qede IOV files [qede_sriov(.c|.h)]
under qede directory to add non-base driver IOV APIs/contents there.

Signed-off-by: Manish Chopra <manishc@marvell.com>
Signed-off-by: Igor Russkikh <irusskikh@marvell.com>
Signed-off-by: Rasesh Mody <rmody@marvell.com>
2020-09-30 19:19:11 +02:00
Manish Chopra
92c6786e85 net/qede: define PCI config space specific osals
This patch defines various PCI config space access APIs
in order to read and find IOV specific PCI capabilities.

With these definitions implemented, it enables the base
driver to do SR-IOV specific initialization and HW specific
configuration required from PF-PMD driver instance.

Signed-off-by: Manish Chopra <manishc@marvell.com>
Signed-off-by: Igor Russkikh <irusskikh@marvell.com>
Signed-off-by: Rasesh Mody <rmody@marvell.com>
2020-09-30 19:19:11 +02:00
Manish Chopra
e00d2b4cea bus/pci: query PCI extended capabilities
By adding generic API, this patch removes individual
functions/defines implemented by drivers to find extended
PCI capabilities.

Signed-off-by: Manish Chopra <manishc@marvell.com>
Signed-off-by: Igor Russkikh <irusskikh@marvell.com>
Reviewed-by: Gaetan Rivet <grive@u256.net>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2020-09-30 19:19:11 +02:00
Yunjian Wang
c87a6de2a1 net/fm10k: fix memory leak when thresh check fails
In fm10k_rx_queue_setup(), we allocate memory for the queue
structure but not released when thresh check fails.

Fixes: 6cfe8969c969 ("fm10k: add Rx queue setup/release")
Cc: stable@dpdk.org

Signed-off-by: Yunjian Wang <wangyunjian@huawei.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2020-09-30 19:19:11 +02:00
Lance Richardson
7054dfc015 net/bnxt: fix vector mode for 32-bit x86
Descriptor valid mask should be 64-bit all ones, use
appropriate initializer type (unsigned long long) to
obtain correct value in 32-bit mode.

Fixes: deae85145c64 ("net/bnxt: handle multiple packets per loop in vector Rx")

Signed-off-by: Lance Richardson <lance.richardson@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2020-09-30 19:19:11 +02:00
Kiran Kumar K
80e6d636fb net/octeontx2: support VLAN based RSS hash
Adding support for VLAN based RSS hash. Two bytes of TCI field
will be considered for hashing.

Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2020-09-30 19:19:11 +02:00
Sarosh Arif
0f9ac2afa6 common/octeontx2: fix memory mapping API usage
Replace mmap() and munmap() APIs with EAL abstraction for the same.

Fixes: e1d9a02ad8f0 ("common/octeontx2: introduce common device class")
Cc: stable@dpdk.org

Signed-off-by: Sarosh Arif <sarosh.arif@emumba.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2020-09-30 19:19:11 +02:00
Harman Kalra
27e27ec629 net/octeontx2: fix multi segment mode for jumbo packets
Scatter gather mode should get enabled:
 - If mbuf size is less than max received packet length.
 - MTU is reconfigured greater than mbuf size.

Fixes: 0e2efd02db58 ("net/octeontx2: add MTU set operation")
Cc: stable@dpdk.org

Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2020-09-30 19:19:11 +02:00
Pavan Nikhilesh
b805cd8187 net/octeontx: fix Tx preparation
When building send command for a given descriptor it expects
it to contain the AURA identifier of the pool that it belongs
to rather than the pool identifier itself.

Fixes: 7f4116bdbb1c ("net/octeontx: add framework for Rx/Tx offloads")
Cc: stable@dpdk.org

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2020-09-30 19:19:11 +02:00
Pavan Nikhilesh
e1712291b1 mempool/octeontx: fix aura to pool mapping
When sending commands to Kernel FPA PF driver, it expects the
aura to be in the range of 0 to 16 for a given FPA pool.
In OCTEON TX we map a pool,aura pair as single mempool handle,
always set the aura id to 0 for a given FPA pool.

Fixes: 179c7e893f64 ("mempool/octeontx: fix pool to aura mapping")
Cc: stable@dpdk.org

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2020-09-30 19:19:11 +02:00
Wei Hu (Xavier)
81f04b9c20 net/hns3: fix storing RSS info when creating flow action
Currently, when calling the rte_flow_query API function to query the RSS
information, the queue related information is not as expected.

The root cause is that when application call the rte_flow_create API
function to create RSS action, the operation of storing the data whose typs
is struct rte_flow_action_rss is incorrect in the '.create' ops
implementation function named hns3_flow_create.

This patch fixes it by replacing memcpy with hns3_rss_conf_copy function to
store the RSS information in the hns3_flow_create.

Fixes: c37ca66f2b27 ("net/hns3: support RSS")
Cc: stable@dpdk.org

Signed-off-by: Lijun Ou <oulijun@huawei.com>
Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>
2020-09-30 19:19:11 +02:00
Wei Hu (Xavier)
fd81968387 net/hns3: fix configuring device with RSS enabled
Currently, when running the following commands in the CLI of testpmd
application, the driver reports an -EINVAL error when performing the No.3
step.
1) flow create 0 ingress pattern end actions rss key <key> func simple_xor
     types all end / end
2) flow flush 0
3) port config dcb vt off pfc off

The root cause as below:
In the No.2 step, when RSS rules is flushed, we set the the flag
hw->rss_dis_flag with true to indicate RSS id disabled. And in the No.3
step, calling rte_eth_dev_configure API function, the internal function
named hns3_dev_rss_hash_update check hw->rss_dis_flag is true and return
-EINVAL.

When user calls the rte_eth_dev_configure API function with the input
parameter dev_conf->rxmode.mq_mode having ETH_MQ_RX_RSS_FLAG to enable RSS,
driver should set internal flag hw->rss_dis_flag with false to indicate RSS
is enabled in the '.dev_configure' ops implementation function named
hns3_dev_configure and hns3vf_dev_configure.

Fixes: 5e782bc2570c ("net/hns3: fix configuring RSS hash when rules are flushed")
Cc: stable@dpdk.org

Signed-off-by: Lijun Ou <oulijun@huawei.com>
Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>
2020-09-30 19:19:11 +02:00
Lijun Ou
ec674cb742 net/hns3: fix flushing RSS rule
When user create a flow without RSS by calling rte_flow_create API and then
destroy it by calling rte_flow_flush API, driver should not clear RSS rule.

A reasonable handling method is that when user creates an RSS rule, the
driver should clear the created RSS rule when flushing destroy all flow
rules. Also, hw->rss_info should save the RSS config of the last success
RSS rule. When create n RSS rules, the RSS should not be disabled before
the last RSS rule destroyed.

Fixes: c37ca66f2b27 ("net/hns3: support RSS")
Cc: stable@dpdk.org

Signed-off-by: Lijun Ou <oulijun@huawei.com>
Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>
2020-09-30 19:19:11 +02:00