Remove pci configuration of 'extended tag' and 'max read request
size', as they are not required by all devices and it lets PMD to
configure them if necessary.
In addition, 'pci_config_space_set()' is deprecated.
Signed-off-by: Helin Zhang <helin.zhang@intel.com>
Acked-by: Jingjing Wu <jingjing.wu@intel.com>
Signed-off-by: Thomas Monjalon <thomas.monjalon@6wind.com>
CONFIG_RTE_LIBRTE_EAL_*APP can be replaced by CONFIG_RTE_EXEC_ENV_*APP.
Signed-off-by: Thomas Monjalon <thomas.monjalon@6wind.com>
Acked-by: Keith Wiles <keith.wiles@intel.com>
In order to cleanup the configuration files some and reduce
the number of duplicate configuration information. Add a new
file called common_base which contains just about all of the
configuration lines in one place. Then have the common_bsdapp,
common_linuxapp files include this one file. Then in those OS
specific files add the delta configuration lines.
Signed-off-by: Keith Wiles <keith.wiles@intel.com>
Signed-off-by: Thomas Monjalon <thomas.monjalon@6wind.com>
Until now, the generic 64-bit flag was used only for ARM or Linux,
and was not defined for BSD environment.
Fixes: d05e7115f4 ("mem: support layout of IBM Power")
Signed-off-by: Keith Wiles <keith.wiles@intel.com>
removed _VIRTIO_PMD=n from arch config and let arch to use _VIRTIO_PMD
from config/common_linuxapp.
Signed-off-by: Santosh Shukla <sshukla@mvista.com>
Acked-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
The physically linked-together combined library has been an increasing
source of problems, as was predicted when library and symbol versioning
was introduced. Replace the complex and fragile construction with a
simple linker script which achieves the same without all the problems,
remove the related kludges from eg mlx drivers.
Since creating the linker script is practically zero cost, remove the
config option and just create it always.
Based on a patch by Sergio Gonzales Monroy, linker script approach
initially suggested by Neil Horman.
Suggested-by: Sergio Gonzalez Monroy <sergio.gonzalez.monroy@intel.com>
Suggested-by: Neil Horman <nhorman@tuxdriver.com>
Signed-off-by: Panu Matilainen <pmatilai@redhat.com>
Signed-off-by: Thomas Monjalon <thomas.monjalon@6wind.com>
This patch reduces number of warnings from 53 to 40.
It removes the usual false positives utilizing unaligned_uint*_t data types.
Signed-off-by: Jan Viktorin <viktorin@rehivetech.com>
The CONFIG_RTE_MACHINE must not contain hyphens to work correctly. This was
initially done only for the file name defconfig_arm-armv7a-linuxapp-gcc. This
patch fixes install-sdk goal. Otherwise, it creates a wrong directory for this
platform.
Signed-off-by: Jan Viktorin <viktorin@rehivetech.com>
by default, all the targets will be configured with the 64-byte cache line
size, targets which have different cache line size can be overridden
through target specific config file.
Selected ThunderX and power8 as CONFIG_RTE_CACHE_LINE_SIZE=128 targets
based on existing configuration.
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Acked-by: Thomas Monjalon <thomas.monjalon@6wind.com>
Intel Architecture (IA), also called x86, is declined in
- i686
- x86_x32
- x86_64
The code common to all of these architectures can now be guarded
by a single flag RTE_ARCH_X86.
Signed-off-by: Thomas Monjalon <thomas.monjalon@6wind.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
More and more machines and architectures are added without keeping
the lists up-to-date.
Replace the lists with a pointer to the reference directory.
The same kind of pointer is used for the supported compilers and environments.
Signed-off-by: Thomas Monjalon <thomas.monjalon@6wind.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
The periodic debug option is used to collect periodic
events like statistics, register access etc and won't
interfere with user-level messages.
Signed-off-by: Harish Patil <harish.patil@qlogic.com>
Signed-off-by: Rasesh Mody <rasesh.mody@qlogic.com>
Cryptodev was marked experimental and mbuf_offload depends on it.
The mbuf_offload library is one of the crypto area which requires
some discussions before having a stable API.
The experimental mark is also added to rte_cryptodev_configure()
to be sure one cannot miss it.
Fixes: 66874e55f5 ("cryptodev: mark experimental state")
Signed-off-by: Thomas Monjalon <thomas.monjalon@6wind.com>
Implement vqtbl1q_u8 intrinsic function, which is not supported in armv7-a.
Signed-off-by: Jianbo Liu <jianbo.liu@linaro.org>
Acked-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
As it causes issues when building with RTE_MACHINE=default due to SSE4.x
requirements and in other discussions was so far rated "lightly tested and
doesn't provide really significant performance improvement" let us disable
that in the default config.
(=> http://dpdk.org/ml/archives/dev/2015-November/029067.html)
Signed-off-by: Christian Ehrhardt <christian.ehrhardt@canonical.com>
Acked-by: Stephen Hemminger <stephen@networkplumber.org>
Commit 42ec27a017 causes compiling error on arm, as RTE_SCHED_VECTOR
does support only SSE intrinsic, so disable it till we have neon support.
Fixes: 42ec27a017 ("sched: enable SSE optimizations in config")
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Acked-by: Jan Viktorin <viktorin@rehivetech.com>
let each armv8 machine targets capture only the differences
between the common defconfig_arm64-armv8a-linuxapp-gcc
Suggested-by: Thomas Monjalon <thomas.monjalon@6wind.com>
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
created the new xgene1 machine target to address the difference
in optional armv8-a CRC extension availability compared to
default armv8-a machine target(enabled CRC extension by default)
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
The crypto API is in an early state.
It requires more discussions and experiments to declare it stable,
as discussed in http://dpdk.org/ml/archives/dev/2015-November/028634.html
A documentation section will be required in the guides.
Signed-off-by: Thomas Monjalon <thomas.monjalon@6wind.com>
This patch provides the initial implementation of the AES-NI multi-buffer
based crypto poll mode driver using DPDK's new cryptodev framework.
This PMD is dependent on Intel's multibuffer library, see the whitepaper
"Fast Multi-buffer IPsec Implementations on Intel® Architecture
Processors", see ref 1 for details on the library's design and ref 2 to
download the library itself. This initial implementation is limited to
supporting the chained operations of "hash then cipher" or "cipher then
hash" for the following cipher and hash algorithms:
Cipher algorithms:
- RTE_CRYPTO_CIPHER_AES_CBC (with 128-bit, 192-bit and 256-bit keys supported)
Authentication algorithms:
- RTE_CRYPTO_AUTH_SHA1_HMAC
- RTE_CRYPTO_AUTH_SHA256_HMAC
- RTE_CRYPTO_AUTH_SHA512_HMAC
- RTE_CRYPTO_AUTH_AES_XCBC_MAC
Important Note:
Due to the fact that the multi-buffer library is designed for
accelerating IPsec crypto operation, the digest's generated for the HMAC
functions are truncated to lengths specified by IPsec RFC's, ie RFC2404
for using HMAC-SHA-1 with IPsec specifies that the digest is truncate
from 20 to 12 bytes.
Build instructions:
To build DPDK with the AESNI_MB_PMD the user is required to download
(ref 2) and compile the multi-buffer library on there system before
building DPDK. The environmental variable AESNI_MULTI_BUFFER_LIB_PATH
must be exported with the path where you extracted and built the multi
buffer library and finally set CONFIG_RTE_LIBRTE_PMD_AESNI_MB=y in
config/common_linuxapp.
Current status: It's doesn't support crypto operation
across chained mbufs, or cipher only or hash only operations.
ref 1:
https://www-ssl.intel.com/content/www/us/en/intelligent-systems/intel-technology/fast-multi-buffer-ipsec-implementations-ia-processors-p
ref 2: https://downloadcenter.intel.com/download/22972
Signed-off-by: Declan Doherty <declan.doherty@intel.com>
Acked-by: Sergio Gonzalez Monroy <sergio.gonzalez.monroy@intel.com>
This patch adds a PMD for the Intel Quick Assist Technology DH895xxC
hardware accelerator.
This patch depends on a QAT PF driver for device initialization. See
the file docs/guides/cryptodevs/qat.rst for configuration details
This patch supports a limited subset of QAT device functionality,
currently supporting chaining of cipher and hash operations for the
following algorithmsd:
Cipher algorithms:
- RTE_CRYPTO_CIPHER_AES_CBC (with 128-bit, 192-bit and 256-bit keys supported)
Hash algorithms:
- RTE_CRYPTO_AUTH_SHA1_HMAC
- RTE_CRYPTO_AUTH_SHA256_HMAC
- RTE_CRYPTO_AUTH_SHA512_HMAC
- RTE_CRYPTO_AUTH_AES_XCBC_MAC
Some limitation on this patchset which shall be contributed in a
subsequent release:
- Chained mbufs are not supported.
- Hash only is not supported.
- Cipher only is not supported.
- Only in-place is currently supported (destination address is
the same as source address).
- Only supports session-oriented API implementation (session-less
APIs are not supported).
Signed-off-by: Declan Doherty <declan.doherty@intel.com>
Signed-off-by: John Griffin <john.griffin@intel.com>
Signed-off-by: Des O Dea <des.j.o.dea@intel.com>
Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Sergio Gonzalez Monroy <sergio.gonzalez.monroy@intel.com>
This library add support for adding a chain of offload operations to a
mbuf. It contains the definition of the rte_mbuf_offload structure as
well as helper functions for attaching offloads to mbufs and a mempool
management functions.
This initial implementation supports attaching multiple offload
operations to a single mbuf, but only a single offload operation of a
specific type can be attach to that mbuf.
Signed-off-by: Declan Doherty <declan.doherty@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
This patch contains the initial proposed APIs and device framework for
integrating crypto packet processing into DPDK.
features include:
- Crypto device configuration / management APIs
- Definitions of supported cipher algorithms and operations.
- Definitions of supported hash/authentication algorithms and
operations.
- Crypto session management APIs
- Crypto operation data structures and APIs allocation of crypto
operation structure used to specify the crypto operations to
be performed on a particular mbuf.
- Extension of mbuf to contain crypto operation data pointer and
extra flags.
- Burst enqueue / dequeue APIs for processing of crypto operations.
Signed-off-by: Des O Dea <des.j.o.dea@intel.com>
Signed-off-by: John Griffin <john.griffin@intel.com>
Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Signed-off-by: Declan Doherty <declan.doherty@intel.com>
Acked-by: Sergio Gonzalez Monroy <sergio.gonzalez.monroy@intel.com>
All #ifdefs in code should be enabled/disabled via DPDK config
(or better yet removed all together).
Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
fm10k driver will meet compile error on non-x86 platforms due to
SSE instructions. Original implementation didn't have switch to
turn off vPMD.
The improvement introduces a macro to turn on/off vPMD functions,
it's on by default. On non-x86 platforms, it can simply be turned
off to fix compile issue.
Signed-off-by: Chen Jing D(Mark) <jing.d.chen@intel.com>
Issue: l3fwd app need the ptype in the mbuf to forward the packets properly.
But now some drivers like virtio driver and FVL vPMD will not set the ptype
in mbuf, so l3fwd cannot work properly on that kind of drivers.
Configure the vector PMD option as no for default as a work around for l3fwd.
After the l3fwd app can handle the undefined ptype or the i40e vPMD can
return the ptype, the option will be set as yes for default again.
Signed-off-by: Zhe Tao <zhe.tao@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
Add virtual PMD which communicates with COMBO cards through sze2
layer using libsze2 library.
Since link_speed is uint16_t, there can not be used number for 100G
speed, therefore link_speed is set to ETH_LINK_SPEED_10G until the
type of link_speed is solved.
Signed-off-by: Matej Vido <matejvido@gmail.com>
Commit 36080ff96b causes compiling error on tile, as tile
does not support KNI, so we disable the CONFIG_RTE_KNI_KMOD.
Fixes: 36080ff96b ("config: add KNI kmod option")
Reported-by: Guo Xin <gxin@ezchip.com>
Signed-off-by: Zhigang Lu <zlu@ezchip.com>
Created the new thunderx machine target to address difference
in "cache line size" and "-mcpu=thunderx" vs default armv8-a machine target
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Make DPDK run on ARMv7-A architecture. This patch assumes
ARM Cortex-A9. However, it is known to be working on Cortex-A7
and Cortex-A15.
Signed-off-by: Vlastimil Kosar <kosar@rehivetech.com>
Signed-off-by: Jan Viktorin <viktorin@rehivetech.com>
Acked-by: David Marchand <david.marchand@6wind.com>
Add support for directories as arguments to -d for loading all drivers
from a given directory. Additionally a default driver directory can be
set in build-time configuration, in which case it will be always be used
when EAL is initialized.
This simplifies usage in shared library configuration significantly over
manually loading individual drivers with -d, and allows distros to
establish a drop-in driver directory for seamless integration
with 3rd party drivers etc.
Suggested-by: Thomas Monjalon <thomas.monjalon@6wind.com>
Suggested-by: David Marchand <david.marchand@6wind.com>
Signed-off-by: Panu Matilainen <pmatilai@redhat.com>
Acked-by: David Marchand <david.marchand@6wind.com>
The fm10k vector driver is specific for x86 platform which can't compile
on IBM POWER for lacking of tmmintrin.h header file. This patch turns
off fm10k driver compilation on IBM POWER to prevent compile issue.
Signed-off-by: Chao Zhu <chaozhu@linux.vnet.ibm.com>
Acked-by: Michael Qiu <michael.qiu@intel.com>
It enlarges the number of supported queues to hardware allowed
maximum. There was a software limitation of 64 per physical port
which is not reasonable.
Signed-off-by: Helin Zhang <helin.zhang@intel.com>
RSS implementation with parent/child QPs comes from mlx4 and is temporary.
Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
In its current state, this driver implements the bare minimum to initialize
itself and Mellanox ConnectX-4 adapters without doing anything else
(no RX/TX for instance). It is disabled by default since it is based on the
mlx4 driver and also depends on libibverbs.
Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
Signed-off-by: Or Ami <ora@mellanox.com>
The vPMD RX function uses the multi-buffer and SSE instructions to
accelerate the RX speed, but now the pktype cannot be supported by the vPMD RX,
because it will decrease the performance heavily.
Signed-off-by: Zhe Tao <zhe.tao@intel.com>
Acked-by: Cunming Liang <cunming.liang@intel.com>
This option permit to build librte_kni.so without building rte_kni.ko
so you can build a sdk without building kernel drivers.
Signed-off-by: Nikita Kozlov <nikita@elyzion.net>
Enable vector ixgbe and i40e bulk alloc for bsd as it is
already done for linux.
Fixes: 304caba126 ("config: fix bsd options")
Fixes: 0ff3324da2 ("ixgbe: rework vector pmd following mbuf changes")
Signed-off-by: Thomas Monjalon <thomas.monjalon@6wind.com>
The RX_OLFLAGS option was renamed from DISABLE to ENABLE in driver code
and linux config.
It is now renamed also in bsd config and documentation.
Fixes: 359f106a69 ("ixgbe: prefer enabling olflags rather than not disabling")
Signed-off-by: Thomas Monjalon <thomas.monjalon@6wind.com>
This driver has too many issues:
- too big
- bad coding style
- no git history (dropped in 2 patches)
- no documentation
- no BSD support
- no maintainer
And the biggest one, constraining this disabling:
- many build issues
If the last 4 issues are not fixed in the next release 2.2,
the driver must be removed.
Signed-off-by: Thomas Monjalon <thomas.monjalon@6wind.com>
When reverting the max queues per port to fix an ABI breakage,
the BSD config was forgotten.
Fixes: 94c6cba001 ("config: revert the max queues per port to 256")
Signed-off-by: Thomas Monjalon <thomas.monjalon@6wind.com>
This is build infrastructure changes for bnx2x driver.
- enable BNX2X poll mode driver in default config.
- add it to mk
- put entry in MAINTAINERS
Note: I intentionally did not list myself as maintainer of this
driver. QLogic has discussed taking over as maintainer.
Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Acked-by: Harish Patil <harish.patil@qlogic.com>
RTE_LIBRTE_IXGBE_RX_ALLOW_BULK_ALLOC config option is not really
necessary, as bulk alloc rx function can be used anyway, as long as the
necessary conditions are satisfied, which are checked already
in the library.
Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Fix "MACRO redefined" and "function redefined" compilation errors in FreeBSD
by adding CXGBE prefix to them. Also remove reference to a linux header
linux/if_ether.h and use DPDK macros directly. Finally, enable CXGBE PMD
for FreeBSD.
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
In the current memory hierarchy, memsegs are groups of physically
contiguous hugepages, memzones are slices of memsegs and malloc further
slices memzones into smaller memory chunks.
This patch modifies malloc so it partitions memsegs instead of memzones.
Thus memzones would call malloc internally for memory allocation while
maintaining its ABI.
During initialization malloc sets all available memory as part of the heaps.
CONFIG_RTE_MALLOC_MEMZONE_SIZE was used to specify the default memory
block size to expand the heap. The option is not used/relevant anymore,
so we remove it.
Remove free_memseg field from internal mem config structure as it is
not used anymore.
Also remove code in ivshmem that was setting up free_memseg on init.
It would be possible to free memzones and therefore any other structure
based on memzones, ie. mempools
Signed-off-by: Sergio Gonzalez Monroy <sergio.gonzalez.monroy@intel.com>
Move malloc inside eal and create a new section in MAINTAINERS file for
Memory Allocation in EAL.
Create a dummy malloc library to avoid breaking applications that have
librte_malloc in their DT_NEEDED entries.
This is the first step towards using malloc to allocate memory directly
from memsegs. Thus, memzones would allocate memory through malloc,
allowing to free memzones.
Signed-off-by: Sergio Gonzalez Monroy <sergio.gonzalez.monroy@intel.com>
