Issue has been observed if PTP is already enabled on PF and
later VFs are configured. Since PTP requires mbuf data off
to be shifted by 8 bytes, due to this l3fwd/l2fwd was not
working with VFs.
Also some extra garbage bytes were observed in packet data
when ptp was enabled.
Fixes: b5dc3140448e ("net/octeontx2: support base PTP")
Cc: stable@dpdk.org
Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
System DPI Packet Interface Unit (SDP) is a co-processor
of OCTEON TX2 which provides PCIe endpoint support for a
remote host to DMA packets into and out of the OCTEON TX2 SoC.
SDP interface comes in to live only when it is connected in
EP mode. It exposes input and output queue pairs to remote host
for instruction input and packet output. It can be used as
a communication channel between remote host and OCTEON TX2.
Host machine needs to use corresponding user/kernel mode
driver to communicate with SDP interface on OCTEON TX2 SoC.
SDP interface support is limited to SDP PF device now.
No SDP VF support.
Signed-off-by: Subrahmanyam Nilla <snilla@marvell.com>
Signed-off-by: Venkateshwarlu Nalla <venkatn@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Adding support to parse higig2 header in RTE flow for octeontx2.
And added devargs to configure port for higig2.
Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Adding support to configure specific switch types like high2 and dsa
on a port. When this switch type is configured, it is expected that
all the traffic on that port should be of specific type only.
Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
The protocol aware ipsec descriptor has been modified to
use ctr_initial value of 1 and salt configured for ipsec SA.
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Signed-off-by: Vakul Garg <vakul.garg@nxp.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
As per RFC3686, the initial aes-ctr counter value should be '1' for use
in ipsec. The patches changes SEC descriptor for using correct counter
value. In addition, it drops a redundant parameter for passing IV while
creating the descriptor.
This patch adds changes for all NXP crypto PMDs
Signed-off-by: Vakul Garg <vakul.garg@nxp.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
Coverity complains that ctrl_flags is set to NULL at the start
of the function and it may not have been set before there is a
jump to fc_success and it is dereferenced.
Check for NULL before dereference.
312fc_success:
CID 344983 (#1 of 1): Explicit null dereferenced
(FORWARD_NULL)7. var_deref_op: Dereferencing null pointer ctrl_flags.
313 *ctrl_flags = rte_cpu_to_be_64(*ctrl_flags);
Coverity issue: 344983
Fixes: 6cc54096520d ("crypto/octeontx: add supported sessions")
Cc: stable@dpdk.org
Signed-off-by: Kevin Traynor <ktraynor@redhat.com>
Reviewed-by: David Marchand <david.marchand@redhat.com>
In Virtual Machine the memory node in the device tree is at
'/proc/device-tree/memory/reg' which is separate from the memory
node path on the host. This patch enables check on both the paths.
Fixes: 2f3d633aa593 ("common/dpaax: add library for PA/VA translation table")
Cc: stable@dpdk.org
Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
Define an accessor so that users can write their debug message to the
same stream than the rte_log infrastructure.
Use it in the qat infrastructure.
Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Kevin Traynor <ktraynor@redhat.com>
Sync mail box data structures to version 0x0002.
This patch checks for mismatch in mail box revision and
avoids initializing octeontx2 pci device if
there is a mismatch.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
This code is being shared by more than 1 type of driver.
Common is most appropriate place for it.
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
The SEC HW code is being shared by multiple NXP based
drivers. It is better to place it at a common place.
Current users are:
1. DPAA2_SEC
2. DPAA_SEC
3. CAAM_JR
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
Add helper functions to get meta len for asymmetric operations
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Kanaka Durga Kotamarthy <kkotamarthy@marvell.com>
Signed-off-by: Sunila Sahu <ssahu@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
Add support to below TCP segmentation offloads for
96XX A1 onwards and 95xx B0 onwards.
- TCPv4, TCPv6
- VXLAN[v4 | v6][v4 | v6]
- GENEVE[v4 | v6][v4 | v6]
This patch also modifies a fastpath function to be forced
inline due to performance reasons for multi-seg mode.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Update LB ltypes and use the updated ones so as replace
LB_STAG and LB_QINQ by single LB_STAG_QINQ ltype.
Signed-off-by: Vivek Sharma <viveksharma@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
NPC errors were incorrectly translated to ol_flag as
error code enum was not in sync with NPC profile.
Fixes: 371d3212cbed ("common/octeontx2: add build infrastructure and HW definition")
Cc: stable@dpdk.org
Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
'cpt_logtype' & 'otx_cryptodev_driver_id' global variables are defined
in a header file which was causing multiple definitions of the
variables. Fixed it by moving the required vars to the .c file and
introducing a new macro so the CPT_LOG macros in common/cpt would use
the associated PMD log var.
Issue has been detected by '-fno-common' gcc flag.
Fixes: bfe2ae495ee2 ("crypto/octeontx: add PMD skeleton")
Cc: stable@dpdk.org
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Reported-by: Ferruh Yigit <ferruh.yigit@intel.com>
This patch adds few definitions specific to GEN3 QAT.
Signed-off-by: Adam Dybkowski <adamx.dybkowski@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
With the latest firmware, there are few changes for zuc and snow3g.
1. The iv_source is present in bitfield 7 of minor opcode. In the
old firmware this was present in bitfield 6.
2. Algorithm type is a 2 bit field in new firmware. In the old
firmware it was named as cipher type and it was a 1 bit field.
Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
This patch adds QAT RAM bank definitions and related macros.
Signed-off-by: Adam Dybkowski <adamx.dybkowski@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
Octeontx2 PMD's mailbox client uses device memory to send messages
to mailbox server in the admin function Linux kernel driver.
The device memory used for the mailbox communication needs to
be qualified as volatile memory type to avoid unaligned device
memory accesses because of compiler's memory access coalescing.
This patch modifies the mailbox request and responses as volatile
type which were non-volatile earlier and accessed from unaligned
memory addresses which resulted in bus errors on Fedora 30 with
gcc 9.1.1.
Fixes: 2b71657c8660 ("common/octeontx2: add mbox request and response definition")
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Update workaround changes for erratas that are fixed on 96xx A1.
This patch also enables cq drop for all the passes for
maintaining performance along with updating a default
Rx ring size in dev_info.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
OTX2 AP core can sometimes fissure STP instructions when it is more
optimal to send such writes into the pipeline as 2 separate
instructions. However registers should be excluded from such
optimization. This commit ensures that no CSR write is ever fissured
by introducing zero cost workaround by setting STP pre-index by zero to
make sure OTX2 AP core prevent fissure.
Fixes: 8a4f835971f5 ("common/octeontx2: add IO handling APIs")
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
This patch implements read clock api whose purpose is to return
raw clock ticks. Using this API real time ticks spent in
processing a packet can be known:
<read_clock val at any time> - mbuf->timestamp
Calling mbox for reading raw clock ticks in fastpath is very
expensive so its value is derived from time stamp counter(tsc)
using freq multiplier (ratio of raw clock ticks and tsc) and clock
delta (by how much tsc is lagging from raw clock value).
Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
This patch fixes fail status returned from compression PMD
in case destination buffer size is not enough to store
all data.
Fixes: 3dc9ef2d23fe ("compress/qat: fix returned status on overflow")
Cc: stable@dpdk.org
Signed-off-by: Tomasz Jozwiak <tomaszx.jozwiak@intel.com>
Signed-off-by: Adam Dybkowski <adamx.dybkowski@intel.com>
Acked-by: Adam Dybkowski <adamx.dybkowski@intel.com>
This patch changes the key pointer data types in cipher, auth,
and aead xforms from "uint8_t *" to "const uint8_t *" for a
more intuitive and safe sessionn creation.
Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
Acked-by: Liron Himi <lironh@marvell.com>
Putting color escape sequences in the log look pretty for the
developer but fails in real world DPDK usage. A real application
will put DPDK log to syslog, and syslog does not handle escape
sequences.
Fixes: dd543124cd93 ("common/octeontx2: add runtime log infra")
Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Update platform support of CNF95xx in documentation and
also, update the HW cap based on PCI subsystem id and revision id.
This patch also changes HW capability handling to be based on
PCI Revision ID. PCI Revision ID contains a unique identifier
to identify chip, major and minor revisions.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
mbox_unregister_vf_irq and mbox_unregister_pf_irq returns void value.
mbox_unregister_irq also returns void.
Clang with flags '-Wall -Wextra -pedantic' complains about:
void function should not return void expression
Signed-off-by: Krzysztof Kanas <kkanas@marvell.com>
Fix the following ICC specific compilation issue with i686 build.
dpdk/drivers/common/octeontx2/otx2_mbox.c(47): error #2259:
non-pointer conversion from "unsigned long long" to "struct mbox_hdr *"
may lose significant bits
(struct mbox_hdr *)((uintptr_t)mdev->mbase + mbox->tx_start);
Fixes: 732377a6792e ("mempool/octeontx2: add build infra and device probe")
Fixes: 371d3212cbed ("common/octeontx2: add build infrastructure and HW definition")
Signed-off-by: Amit Gupta <agupta3@marvell.com>
For each driver where we optionally disable it, add in the reason why it's
being disabled, so the user knows how to fix it.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Luca Boccassi <bluca@debian.org>
NPA object needs to initialize memory for queue interrupts context,
pool resource management, etc. This patch adds support for initializing
and finalizing the NPA object.
This patch also updates the otx2_npa_lf definition to meet the init/fini
requirements.
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
Add the make and meson based build infrastructure along
with the mempool(NPA) device probe.
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Upon receiving FLR request from VF, It is PF responsibly
forward to AF and enable FLR for VFs.
This patch adds support for VF FLR support in PF.
This patch also add otx2_dev_active_vfs() API to find
the number of active VF for given PF.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Harman Kalra <hkalra@marvell.com>
The events like PHY link status change by AF or PHY configuration
change by PF would call for the uplink message.
The AF initiated uplink would land it in PF and PF would further
forward to VF(if it is intended for that specific VF)
The PF initiated uplink would be distributed to all active VFs.
This patch adds support for the same.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Harman Kalra <hkalra@marvell.com>
PF has additional responsibility being server for VF messages
and forward to AF and once AF process it then forward
the response back to VF.
otx2_vf_pf_mbox_irq() will process the VF mailbox request and
af_pf_wait_msg() will until getting a response back from AF.
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Krzysztof Kanas <kkanas@marvell.com>
