Commit Graph

12925 Commits

Author SHA1 Message Date
Honnappa Nagarahalli
9ef7dc22f2 net/memif: move barrier outside loop
load-acquire memory order has a barrier. Loading it inside
the loop will result in a barrier in every iteration. Hence,
load the variable once outside the loop.

Signed-off-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Reviewed-by: Phil Yang <phil.yang@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Reviewed-by: Jakub Grajciar <jgrajcia@cisco.com>
2020-10-16 19:18:47 +02:00
Honnappa Nagarahalli
5198cb1c25 net/memif: relax load of ring head for S2M zc ring
For zero-copy S2M rings, ring->head is updated by the sender and
eth_memif_tx_zc function is called in the context of sending thread.
The loads in the sender do not need to synchronize with its own stores.

Signed-off-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Reviewed-by: Phil Yang <phil.yang@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Reviewed-by: Jakub Grajciar <jgrajcia@cisco.com>
2020-10-16 19:18:47 +02:00
Honnappa Nagarahalli
9e14c024d1 net/memif: remove extra check
eth_memif_tx_zc function is called only for S2M rings. Remove
additional code for M2S rings in this function.

Signed-off-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Reviewed-by: Phil Yang <phil.yang@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Reviewed-by: Jakub Grajciar <jgrajcia@cisco.com>
2020-10-16 19:18:47 +02:00
Honnappa Nagarahalli
3a086c2038 net/memif: relax load of ring head for M2S zc ring
For zero-copy M2S rings, ring->head is updated by the receiver
and eth_memif_rx_zc function is called in the context of
receiving thread. The loads in the receiver do not need to
synchronize with its own stores.

Signed-off-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Reviewed-by: Phil Yang <phil.yang@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Reviewed-by: Jakub Grajciar <jgrajcia@cisco.com>
2020-10-16 19:18:47 +02:00
Honnappa Nagarahalli
2416db2039 net/memif: relax load of ring head for S2M ring
For S2M rings, ring->head is updated by the sender and eth_memif_tx
function is called in the context of sending thread. The loads in
the sender do not need to synchronize with its own stores.

Fixes: a2aafb9aa6 ("net/memif: optimize with one-way barrier")
Cc: stable@dpdk.org

Signed-off-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Reviewed-by: Phil Yang <phil.yang@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Reviewed-by: Jakub Grajciar <jgrajcia@cisco.com>
2020-10-16 19:18:47 +02:00
Honnappa Nagarahalli
562fc6ef14 net/memif: relax load of ring head for M2S ring
For M2S rings, ring->head is updated by the receiver and eth_memif_rx
function is called in the context of receiving thread. The loads in
the receiver do not need to synchronize with its own stores.

Fixes: a2aafb9aa6 ("net/memif: optimize with one-way barrier")
Cc: stable@dpdk.org

Signed-off-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Reviewed-by: Phil Yang <phil.yang@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Reviewed-by: Jakub Grajciar <jgrajcia@cisco.com>
2020-10-16 19:18:47 +02:00
Honnappa Nagarahalli
8276602780 net/memif: relax load of ring tail for M2S ring
For M2S rings, ring->tail is updated by the sender and eth_memif_tx
function is called in the context of sending thread. The loads in
the sender do not need to synchronize with its own stores.

Fixes: a2aafb9aa6 ("net/memif: optimize with one-way barrier")
Cc: stable@dpdk.org

Signed-off-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Reviewed-by: Phil Yang <phil.yang@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Reviewed-by: Jakub Grajciar <jgrajcia@cisco.com>
2020-10-16 19:18:47 +02:00
Honnappa Nagarahalli
7fff1d3113 net/memif: do not update local copy of tail in Tx
In the case of S2M queues, the receiver synchronizes with the sender
(i.e. informs of the packets it has received) using ring->tail.
Hence, the sender does not need to update last_tail.

In the case of M2S queues, the receiver uses last_tail to
keep track of the descriptors it has received. The
sender is not required to update the last_tail. Updating
the last_tail makes it a shared variable between the
transmitter and receiver affecting the performance.

Fixes: 09c7e63a71 ("net/memif: introduce memory interface PMD")
Cc: stable@dpdk.org

Signed-off-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Reviewed-by: Phil Yang <phil.yang@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Reviewed-by: Jakub Grajciar <jgrajcia@cisco.com>
2020-10-16 19:18:47 +02:00
Ferruh Yigit
113a461e82 net/pcap: fix input only Rx
When input only Rx interface argument 'rx_iface_in' provided, current
code assigns 'eth_null_rx' burst function by mistake and no packet
received as a result.
Like in following usage no packets received from physical interface:
"--vdev net_pcap0,rx_iface_in=eth0,tx_iface=eth0"

Fixing the burst function assignment when 'rx_iface_in' argument is used

Fixes: f14a945915 ("net/pcap: remove Rx queue argument necessity")
Cc: stable@dpdk.org

Reported-by: Muthurajan Jayakumar <muthurajan.jayakumar@intel.com>
Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-10-16 19:18:47 +02:00
Dongsheng Rong
99fb0a03fd net/bonding: fix Rx queue conversion
In 'bond_ethdev_rx_burst_alb()' in Rx path, 'bond_rx_queue' should be
used, not 'bond_tx_queue'.

Fixes: 06fe78b98c ("bond: add mode 6")
Cc: stable@dpdk.org

Signed-off-by: Dongsheng Rong <rongdongsheng@baidu.com>
Signed-off-by: RongQing Li <lirongqing@baidu.com>
Reviewed-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>
2020-10-16 19:18:47 +02:00
RongQing Li
97602faa9e net/bonding: fix possible unbalanced packet receiving
Current Rx round robin policy for the slaves has two issue:

1. active_slave in bond_dev_private is shared by multiple PMDS which
   maybe cause some slave Rx hungry, for example, there is two PMD and
   two slave port, both PMDs start to receive, and see that active_slave
   is 0, and receive from slave 0, after complete, they increase
   active_slave by one, totally active_slave are increased by two, next
   time, they will start to receive from slave 0 again, at last, slave 1
   maybe drop packets during to not be polled by PMD

2. active_slave is shared and written by multiple PMD in RX path for
   every time RX, this is a kind of cache false share, low performance.

So move active_slave from bond_dev_private to bond_rx_queue make it as
per queue variable

Fixes: ae2a04864a ("net/bonding: reduce slave starvation on Rx poll")
Cc: stable@dpdk.org

Signed-off-by: RongQing Li <lirongqing@baidu.com>
Signed-off-by: Dongsheng Rong <rongdongsheng@baidu.com>
Reviewed-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>
2020-10-16 19:18:47 +02:00
Yunjian Wang
f3013acfc1 net/netvsc: fix Tx queue leak in error path
In hn_dev_tx_queue_setup() allocated memory for txq, we don't free it
when error happens and it will lead to memory leak.

We can check for tx_free_thresh at the beginning of the function to
fix it, before calling txq = rte_zmalloc_socket().

Fixes: cc02518132 ("net/netvsc: split send buffers from Tx descriptors")
Cc: stable@dpdk.org

Signed-off-by: Yunjian Wang <wangyunjian@huawei.com>
Acked-by: Long Li <longli@microsoft.com>
2020-10-16 19:18:47 +02:00
Chenxu Di
c6299a0867 net/dpaa2: fix build with timesync functions
Some timesync related source files are built only when
'RTE_LIBRTE_IEEE1588' config is set, which is missing in meson.

Building with '-DRTE_LIBRTE_IEEE1588' cflag will enable timesync
functionality in the files that are build, but it won't build files
that require 'RTE_LIBRTE_IEEE1588' config.
This causes the build error.

Fixing by removing config check in meson file and build all .c files by
default, but wrap relevant code part with 'RTE_LIBRTE_IEEE1588' macro.

Also removing 'RTE_LIBRTE_IEEE1588' ifdef around some fields of the data
structures, to not require finer grained macro wraps on the functions
using them.
Since the registration of the function disabled with macro check, having
functions compiled shouldn't affect the functionality.

Fixes: 184c39d165 ("net/dpaa2: add DPRTC sub-module")
Cc: stable@dpdk.org

Signed-off-by: Chenxu Di <chenxux.di@intel.com>
Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Sachin Saxena <sachin.saxena@oss.nxp.com>
2020-10-16 19:18:47 +02:00
Lance Richardson
b80da220c1 net/bnxt: remove unused macros and fields
Remove unused structure fields and macro definitions.

Signed-off-by: Lance Richardson <lance.richardson@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Reviewed-by: Somnath Kotur <somnath.kotur@broadcom.com>
2020-10-16 19:18:47 +02:00
Tal Shnaiderman
c12b14889e bus/pci: clear undefined bits in Windows segment parsing
When reading bus and segment values using SPDRP_BUSNUMBER
bits 24-31 are undefined.

They are cleared to verify we read the segment number correctly.

Fixes: c3adf8144a ("bus/pci: support segment as address domain on Windows")
Cc: stable@dpdk.org

Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Ranjit Menon <ranjit.menon@intel.com>
Acked-by: Narcisa Vasile <navasile@linux.microsoft.com>
2020-10-16 14:41:32 +02:00
Timothy McDaniel
75d113136f eventdev: express DLB/DLB2 PMD constraints
This commit implements the eventdev ABI changes required by
the DLB/DLB2 PMDs.  Several data structures and constants are modified
or added in this patch, thereby requiring modifications to the
dependent apps and examples.

The DLB/DLB2 hardware does not conform exactly to the eventdev interface.
1) It has a limit on the number of queues that may be linked to a port.
2) Some ports a further restricted to a maximum of 1 linked queue.
3) DLB does not have the ability to carry the flow_id as part
   of the event (QE) payload. Note that the DLB2 hardware is capable of
   carrying the flow_id.

Following is a detailed description of the changes that have been made.

1) Add new fields to the rte_event_dev_info struct. These fields allow
the device to advertise its capabilities so that applications can take
the appropriate actions based on those capabilities.

    struct rte_event_dev_info {
	uint32_t max_event_port_links;
	/**< Maximum number of queues that can be linked to a single event
	 * port by this device.
	 */

	uint8_t max_single_link_event_port_queue_pairs;
	/**< Maximum number of event ports and queues that are optimized for
	 * (and only capable of) single-link configurations supported by this
	 * device. These ports and queues are not accounted for in
	 * max_event_ports or max_event_queues.
	 */
    }

2) Add a new field to the rte_event_dev_config struct. This field allows
the application to specify how many of its ports are limited to a single
link, or will be used in single link mode.

    /** Event device configuration structure */
    struct rte_event_dev_config {
	uint8_t nb_single_link_event_port_queues;
	/**< Number of event ports and queues that will be singly-linked to
	 * each other. These are a subset of the overall event ports and
	 * queues; this value cannot exceed *nb_event_ports* or
	 * *nb_event_queues*. If the device has ports and queues that are
	 * optimized for single-link usage, this field is a hint for how many
	 * to allocate; otherwise, regular event ports and queues can be used.
	 */
    }

3) Replace the dedicated implicit_release_disabled field with a bit field
of explicit port capabilities. The implicit_release_disable functionality
is assigned to one bit, and a port-is-single-link-only  attribute is
assigned to other, with the remaining bits available for future assignment.

	* Event port configuration bitmap flags */
	#define RTE_EVENT_PORT_CFG_DISABLE_IMPL_REL    (1ULL << 0)
	/**< Configure the port not to release outstanding events in
	 * rte_event_dev_dequeue_burst(). If set, all events received through
	 * the port must be explicitly released with RTE_EVENT_OP_RELEASE or
	 * RTE_EVENT_OP_FORWARD. Must be unset if the device is not
	 * RTE_EVENT_DEV_CAP_IMPLICIT_RELEASE_DISABLE capable.
	 */
	#define RTE_EVENT_PORT_CFG_SINGLE_LINK         (1ULL << 1)

	/**< This event port links only to a single event queue.
	 *
	 *  @see rte_event_port_setup(), rte_event_port_link()
	 */

	#define RTE_EVENT_PORT_ATTR_IMPLICIT_RELEASE_DISABLE 3
	/**
	 * The implicit release disable attribute of the port
	 */

	struct rte_event_port_conf {
		uint32_t event_port_cfg;
		/**< Port cfg flags(EVENT_PORT_CFG_) */
	}

This patch also removes the depreciation notice and announce
the new eventdev ABI changes in release note.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
Acked-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2020-10-15 23:16:07 +02:00
Radu Nicolau
70207f35e2 event/sw: improve performance
Add minimum burst throughout the scheduler pipeline and a flush counter.
Use a single threaded ring implementation for the reorder buffer free list.

Signed-off-by: Radu Nicolau <radu.nicolau@intel.com>
Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
2020-10-15 23:09:58 +02:00
Harman Kalra
ce8628c66a net/octeontx2: fix jumbo frame crash
Issue has been observed in case of multi segments where mbuf
data gets corrupted due to missing barriers. Changes made to
mbuf just before LMTST by one core gets updatded when the
same mbuf is in use by another core, leading to corruption.
It should be ensured that all changes made to mbuf should be
written before LMTST.

Fixes: cbd5710db4 ("net/octeontx2: add Tx multi segment version")
Cc: stable@dpdk.org

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Harman Kalra <hkalra@marvell.com>
2020-10-15 22:54:21 +02:00
Pavan Nikhilesh
cb7ee83b63 event/octeontx2: improve single flow performance
Improve single flow performance by moving the point of coherence
to the end of transmit sequence.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2020-10-15 22:45:24 +02:00
Pavan Nikhilesh
a34971baa4 event/octeontx2: add switch tag flush operation
Add SWTAG flush operation at the end of transmit sequence to
immediately release the tag held by the core.
Reuse Tag address to check SWTAG completion status.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2020-10-15 22:36:34 +02:00
Ankur Dwivedi
55bc2eadae event/octeontx2: add crypto adapter datapath
In the op new mode of crypto adapter, the completed crypto operation
is submitted to the event device by the OCTEON TX2 crypto PMD.
During event device dequeue the result of crypto operation is checked.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Acked-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2020-10-15 22:27:49 +02:00
Ankur Dwivedi
29768f78d5 event/octeontx2: add crypto adapter framework
The crypto adapter callback functions and associated data structures
are added.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Acked-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2020-10-15 22:19:33 +02:00
Ankur Dwivedi
97076737e2 crypto/octeontx2: move functions to helper file
Some functions are common across cryptodev pmd and the event
crypto adapter. This patch moves them into a helper file.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Acked-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2020-10-15 22:13:35 +02:00
Yunjian Wang
db5e0e7aea event/dpaa2: fix dereference before null check
Coverity flags that 'portal' variable is used before
it's checked for NULL. This patch fixes this issue.

Coverity issue: 323516
Fixes: 4ab57b042e ("event/dpaa2: affine portal at runtime during I/O")
Cc: stable@dpdk.org

Signed-off-by: Yunjian Wang <wangyunjian@huawei.com>
Acked-by: Nipun Gupta <nipun.gupta@nxp.com>
2020-10-15 21:32:14 +02:00
Pavan Nikhilesh
227f283599 event/octeontx: validate events requested against available
Validate events configured in ssopf against the total number of
events configured across all the RX/TIM event adapters.

Events available to ssopf can be reconfigured by passing the required
amount to kernel bootargs and are only limited by DRAM size.
Example:
	ssopf.max_events= 2097152

Cc: stable@dpdk.org

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2020-10-15 21:26:19 +02:00
Vikas Gupta
cd5db556ac crypto/bcmfs: optimize crypto request processing
Reduce number of source BDs to submit a request to crypto engine.
This improves the performance as crypto engine fetches all the BDs in
single cycle. Adjust optional metadata (OMD) in continuation of
fixed meta data (FMD).

Signed-off-by: Vikas Gupta <vikas.gupta@broadcom.com>
Signed-off-by: Raveendra Padasalagi <raveendra.padasalagi@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2020-10-14 22:24:41 +02:00
Akhil Goyal
5a4954bcd5 crypto/dpaa_sec: enable PDCP-SDAP sessions
Based on the new field in PDCP xform, a decision is made
to create a PDCP session with or without SDAP enabled.

Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
2020-10-14 22:24:41 +02:00
Akhil Goyal
bd49e11d69 crypto/dpaa2_sec: enable PDCP-SDAP sessions
Based on the new field in PDCP xform, a decision is made
to create a PDCP session with or without SDAP enabled.

Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
2020-10-14 22:24:41 +02:00
Franck Lenormand
3ba2e519ea common/dpaax/caamflib: support PDCP-SDAP
The SDAP is a protocol in the LTE stack on top of PDCP. It is
dedicated to QoS.

The difficulty of implementing this protocol is because the
PDCP change behavior regarding encryption and authentication
of the SDU it receives. In effect PDCP shall not encrypt the
SDAP SDU but must authenticate it (when encryption and
authentication is enabled).

The current version of SEC does not support the SDAP and the
change of behavior of PDCP prevent the use of the PDCP
protocol command available.

The way to do it is to reuse the PDCP implementation but to
not use the PDCP protocol and to have descriptors which
performs the PDCP protocol.

It is implemented by doing small changes of code:
        #ifdef SDAP_SUPPORT
                length += SDAP_BYTE_SIZE;
                offset -= SDAP_BYTE_SIZE;
        #endif
after having computed the size of the SN to read from the
input data, then
        #ifdef SDAP_SUPPORT
                MATHI(p, MATH0, LSHIFT, 8, MATH1, 8, 0);
                MATHB(p, MATH1, AND, sn_mask, MATH1, 8, IFB | IMMED2);
        #else
                MATHB(p, MATH0, AND, sn_mask, MATH1, 8, IFB | IMMED2);
        #endif
It will keep the SN and the SDAP header in MATH0, then shift
it to remove the SDAP header and store the result in MATH1.

Signed-off-by: Franck Lenormand <franck.lenormand@nxp.com>
Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
2020-10-14 22:24:41 +02:00
Fan Zhang
728c76b0e5 crypto/qat: support raw datapath API
This patch updates QAT PMD to add raw data-path API support.

Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Adam Dybkowski <adamx.dybkowski@intel.com>
2020-10-14 22:22:06 +02:00
Fan Zhang
8d928d47a2 cryptodev: change crypto symmetric vector structure
This patch updates ``rte_crypto_sym_vec`` structure to add
support for both cpu_crypto synchronous operation and
asynchronous raw data-path APIs. The patch also includes
AESNI-MB and AESNI-GCM PMD changes, unit test changes and
documentation updates.

Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2020-10-14 22:22:06 +02:00
Pablo de Lara
a141f0c7e7 crypto/aesni_mb: support AES-CCM-256
This patch adds support for AES-CCM-256 when using AESNI-MB

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2020-10-14 22:22:06 +02:00
Pablo de Lara
010230a154 crypto/aesni_mb: support Chacha20-Poly1305
Add support for Chacha20-Poly1305 AEAD algorithm.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2020-10-14 22:22:06 +02:00
Pablo de Lara
e45847d8fd crypto/aesni_mb: fix GCM digest size check
GCM digest sizes should be between 1 and 16 bytes.

Fixes: 7b2d4706c9 ("crypto/aesni_mb: support newer library version only")
Cc: stable@dpdk.org

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2020-10-14 22:22:06 +02:00
Pablo de Lara
07bfb9047b crypto/aesni_mb: fix CCM digest size check
Digest size for CCM was being checked for other algorithms
apart from CCM.

Fixes: c4c0c312a8 ("crypto/aesni_mb: check for invalid digest size")
Cc: stable@dpdk.org

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2020-10-14 22:22:06 +02:00
Pablo de Lara
515a6cc299 crypto/aesni_gcm: support SGL on AES-GMAC
Add Scatter-gather list support for AES-GMAC.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Tested-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
2020-10-14 22:22:06 +02:00
Michael Shamis
8bd98b8d85 crypto/mvsam: remove algo lists end
Remove enumerators RTE_CRYPTO_CIPHER_LIST_END,
RTE_CRYPTO_AUTH_LIST_END, RTE_CRYPTO_AEAD_LIST_END to prevent
ABI breakages that may arise when adding new crypto algorithms.

Signed-off-by: Michael Shamis <michaelsh@marvell.com>
2020-10-14 22:22:06 +02:00
Ruifeng Wang
087ed97592 crypto/armv8: remove algo lists end
Removed references to RTE_CRYPTO_CIPHER_LIST_END and
RTE_CRYPTO_AUTH_LIST_END to prevent ABI breakages
that may arise when adding new crypto algorithms.

Signed-off-by: Ruifeng Wang <ruifeng.wang@arm.com>
Reviewed-by: Phil Yang <phil.yang@arm.com>
2020-10-14 22:22:06 +02:00
David Coyle
8f6187ecf8 crypto/aesni_mb: fix security session clearing
When destroying a security session, the AESNI-MB PMD attempted to clear
the private aesni_mb session object to remove any key material. However,
the function aesni_mb_pmd_sec_sess_destroy() cleared the security session
object instead of the private session object.

This patch fixes this issue by now clearing the private session object.

Fixes: fda5216fba ("crypto/aesni_mb: support DOCSIS protocol")
Cc: stable@dpdk.org

Signed-off-by: David Coyle <david.coyle@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2020-10-14 22:22:06 +02:00
Akhil Goyal
ca635a5899 crypto/dpaa2_sec: change descriptor sharing for ERA10
In case of LX2160 or SEC ERA 10, share wait has performance
optimizations wrt to ok-to-share signal which allows multiple
DECOs to work together even in case of single queue and single SA.
Hence updated the descriptor sharing only in case of ERA10.

Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2020-10-14 22:22:06 +02:00
Akhil Goyal
55a4438f8e crypto/dpaa2_sec: increase max anti-replay window size
In case of LX2160 or SEC ERA >= 10, max anti replay window
size supported is 1024. For all other versions of SEC, the
maximum value is capped at 128 even if application gives
more than that.

Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
Signed-off-by: Yi Liu <yi.liu@nxp.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2020-10-14 22:22:06 +02:00
Akhil Goyal
a054c627a1 crypto/dpaa2_sec: support non-HMAC auth algo versions
added support for non-HMAC for auth algorithms
(SHA1, SHA2, MD5).
Corresponding capabilities are enabled so that test
application can enable those test cases.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
2020-10-14 22:22:06 +02:00
Akhil Goyal
a6e892f427 crypto/dpaa2_sec: support DES-CBC
add DES-CBC support for cipher_only, chain and ipsec protocol.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
2020-10-14 22:22:06 +02:00
Hemant Agrawal
1fb9115a80 crypto/dpaa2_sec: support stats for secondary process
DPAA2 crypto object access need availability of MCP object
pointer. In case of secondary process, we need to use local
MCP pointer instead of primary process.

Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2020-10-14 22:22:06 +02:00
Hemant Agrawal
356bcac8f1 crypto/dpaa2_sec: fix stats query without queue pair
dpdk-procinfo calls the crypto stats API, which results segmentation
fault on DPAA2_SEC.
The queue pair array will be NULL, when it is used without
configuring the SEC device.

Fixes: 02f35eee26 ("crypto/dpaa2_sec: support statistics")
Cc: stable@dpdk.org

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2020-10-14 22:22:06 +02:00
Ankur Dwivedi
d698fa5469 net/octeontx2: add replay check for inline inbound packets
The function handling anti replay is added. If replay window
is enabled the rx packets will be validated against the window. The
rx offload fails in case of error.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2020-10-14 22:22:06 +02:00
Ankur Dwivedi
e91b4f45ff net/octeontx2: support anti-replay for security session
Initialize the inbound session for anti replay. The replay
window is allocated during session create and freed in session destroy.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2020-10-14 22:22:06 +02:00
Vikas Gupta
492a19a046 crypto/bcmfs: add crypto HW module
Add crypto h/w module to process crypto op. Crypto op is processed via
sym_engine module before submitting the crypto request to HW queues.

Signed-off-by: Vikas Gupta <vikas.gupta@broadcom.com>
Signed-off-by: Raveendra Padasalagi <raveendra.padasalagi@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2020-10-14 22:22:06 +02:00
Vikas Gupta
4ed19f0db5 crypto/bcmfs: add session handling and capabilities
Add session handling and capabilities supported by crypto HW
accelerator

Signed-off-by: Vikas Gupta <vikas.gupta@broadcom.com>
Signed-off-by: Raveendra Padasalagi <raveendra.padasalagi@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2020-10-14 22:22:06 +02:00
Vikas Gupta
751dca9024 crypto/bcmfs: create a symmetric cryptodev
Create a symmetric crypto device and add supported cryptodev ops.

Signed-off-by: Vikas Gupta <vikas.gupta@broadcom.com>
Signed-off-by: Raveendra Padasalagi <raveendra.padasalagi@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2020-10-14 22:22:06 +02:00