25491 Commits

Author SHA1 Message Date
Andrey Vesnovaty
b8cc58c140 net/mlx5: modify hash Rx queue objects
Implement modification for hashed table of Rx queue object (see
mlx5_hrxq_modify()). This implementation relies on the capability to
modify TIR object via DevX API, i.e. current implementation doesn't
support verbs HW object operations. The functionality to modify hashed
table of Rx queue object is prerequisite to implement
rete_flow_shared_action_update() for shared RSS action in mlx5 PMD.

Signed-off-by: Andrey Vesnovaty <andreyv@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2020-11-03 23:35:02 +01:00
Andrey Vesnovaty
847d97894b common/mlx5: modify advanced Rx object via DevX
Implement TIR modification (see mlx5_devx_cmd_modify_tir()) using DevX
API. TIR is the object containing the hashed table of Rx queue. The
functionality to configure/modify this HW-related object is prerequisite
to implement rete_flow_shared_action_update() for shared RSS action in
mlx5 PMD. HW-related structures for TIR modification add in mlx5_prm.h.

Signed-off-by: Andrey Vesnovaty <andreyv@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2020-11-03 23:35:02 +01:00
Lance Richardson
3a23111261 net/bnxt: update PMD supported features
Mark "BSD nic_uio", "Usage doc", and "Perf doc" as supported
for the bnxt PMD.

Signed-off-by: Lance Richardson <lance.richardson@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2020-11-03 23:35:02 +01:00
Lance Richardson
9bc54faf76 net/bnxt: use shorter SIMD initializers
Make SIMD initialization code less verbose by using appropriate
intrinsics when all lanes of a vector are initialized to the
same value.

Signed-off-by: Lance Richardson <lance.richardson@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2020-11-03 23:35:02 +01:00
Lance Richardson
47b7076167 net/bnxt: fix boolean operator usage
Use boolean AND operator instead of bitwise operator.

Coverity issue: 323488
Fixes: b42c15c83e88 ("net/bnxt: support trusted VF")
Cc: stable@dpdk.org

Signed-off-by: Lance Richardson <lance.richardson@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2020-11-03 23:35:02 +01:00
Jesse Brandeburg
8b20510a04 net/ice: update writeback policy to reduce latency
Just like iavf, setting the value to 2us allows for generally good
streaming packet performance while keeping latency down, and
generally keeps the performance of the PF and VF interfaces similar.

The previous value of 0x10 was making latency on a single packet
receive be as much as 16us.

Fixes: 65dfc889d86b ("net/ice: support Rx queue interruption")
Cc: stable@dpdk.org

Reported-by: Brian Johnson <brian.johnson@intel.com>
Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2020-11-03 23:35:02 +01:00
Jesse Brandeburg
ead06572bd net/iavf: fix performance with writeback policy
The iavf driver was trying to use writeback on ITR, but was
never setting an ITR, so it didn't work. This caused performance
to be limited due to too much PCIe traffic and partial writes
during most benchmarking workloads.
Set the ITR during queue setup, which can be checked at runtime
by reading register 0x2800. Setting the value to 2us allows
for generally good streaming packet performance while keeping
latency down.

Fixes: d6bde6b5eae9 ("net/avf: enable Rx interrupt")
Cc: stable@dpdk.org

Reported-by: Brian Johnson <brian.johnson@intel.com>
Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2020-11-03 23:35:02 +01:00
Wei Huang
e41856b515 raw/ifpga/base: enhance driver reliability in multi-process
Current hardware protection is based on pthread mutex which
work just for situation of multi-thread in one process. In
multi-process environment, hardware state machine would be
corrupted by concurrent access, that means original pthread
mutex mechanism need be enhanced.

The major modifications in this patch are list below:
1. Create a mutex for adapter in shared memory named
   "mutex.IFPGA:domain:bus:dev.func" when device is probed.
2. Create a shared memory named "IFPGA:domain:bus:dev.func" during opae
   adapter is initializing. There is a reference count in shared memory.
   Shared memory will be destroyed once reference count turned to zero.
3. Two mutexs are created in shared memory and initialized with flag
   PTHREAD_PROCESS_SHARED. One for SPI and the other for I2C. They will
   be passed to SPI and I2C driver subsequently.
4. DTB data in flash will be cached in shared memory. Then MAX10 driver
   can read DTB from shared memory instead of flash. This avoid
   confliction of concurrent flash access between hardware and software.

Signed-off-by: Wei Huang <wei.huang@intel.com>
Signed-off-by: Tianfei Zhang <tianfei.zhang@intel.com>
Acked-by: Rosen Xu <rosen.xu@intel.com>
2020-11-03 23:34:29 +01:00
Wei Huang
82255e036a raw/ifpga/base: free resources when destroying device
Add two functions to complete the resource free work, one is
'ifpga_adapter_destroy()', the other is 'ifpga_bus_uinit()'.

Then call 'opae_adapter_destroy()' and 'opae_adapter_data_free()'
in 'ifpga_rawdev_close()' to free resources.

Also 'opae_adapter_free()' is removed from 'ifpga_rawdev_destroy()',
because opae adapter is pointed by dev_private member in raw_dev,
it will be freed in 'rte_rawdev_pmd_release()'.

Signed-off-by: Wei Huang <wei.huang@intel.com>
Signed-off-by: Tianfei Zhang <tianfei.zhang@intel.com>
Acked-by: Rosen Xu <rosen.xu@intel.com>
2020-11-03 23:32:43 +01:00
Wei Huang
93824cadd8 raw/ifpga/base: fix return of IRQ unregister
Since 'rte_intr_callback_unregister()' can return positive
value as success, but 'ifpga_rawdev_destroy()' handle it as
an error.

Instead, only negative return is treated as failure.

Fixes: e0a1aafe2af9 ("raw/ifpga: introduce IRQ functions")
Cc: stable@dpdk.org

Signed-off-by: Wei Huang <wei.huang@intel.com>
Signed-off-by: Tianfei Zhang <tianfei.zhang@intel.com>
Acked-by: Rosen Xu <rosen.xu@intel.com>
2020-11-03 23:32:19 +01:00
Wei Huang
509579206f raw/ifpga/base: handle unsupported interrupt type
Handle unsupported interrupt type requests properly,
on unsupported interrupt case:
'ifpga_unregister_msix_irq()' returns success,
'ifpga_register_msix_irq()' return failure.

Fixes: e0a1aafe2af9 ("raw/ifpga: introduce IRQ functions")
Cc: stable@dpdk.org

Signed-off-by: Wei Huang <wei.huang@intel.com>
Signed-off-by: Tianfei Zhang <tianfei.zhang@intel.com>
Acked-by: Rosen Xu <rosen.xu@intel.com>
2020-11-03 23:31:22 +01:00
Wei Huang
df016da79b raw/ifpga/base: fix interrupt handler instance usage
Interrupt handler copied to the local 'intr_handle' variable by value
before passing it to IRQ functions.
This leads IRQ functions update the local variable instead of
'ifpga_irq_handle'.

Instead, using 'intr_handle' local variable as pointer to
'ifpga_irq_handle' as intended.

Fixes: e0a1aafe2af9 ("raw/ifpga: introduce IRQ functions")
Cc: stable@dpdk.org

Signed-off-by: Wei Huang <wei.huang@intel.com>
Signed-off-by: Tianfei Zhang <tianfei.zhang@intel.com>
Acked-by: Rosen Xu <rosen.xu@intel.com>
2020-11-03 23:30:39 +01:00
Jiawen Wu
9810975cf4 net/txgbe: support DCB info get
Add DCB information get operation.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-11-03 23:24:27 +01:00
Jiawen Wu
bd8e3adc11 net/txgbe: support PTP
Add PTP support.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-11-03 23:24:27 +01:00
Jiawen Wu
09afa548d2 net/txgbe: support device LED on and off
Support device LED on and off.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-11-03 23:24:27 +01:00
Jiawen Wu
ab7a653001 net/txgbe: support register dump
Add register dump support.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-11-03 23:24:27 +01:00
Jiawen Wu
3cc8b50d69 net/txgbe: support EEPROM info get
Add EEPROM information get related operations.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-11-03 23:24:27 +01:00
Jiawen Wu
bc84ac0fad net/txgbe: support getting FW version
Add firmware version get operation.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-11-03 23:24:27 +01:00
Jiawen Wu
3926214fd8 net/txgbe: support MTU set
Add MTU set operation.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-11-03 23:24:27 +01:00
Jiawen Wu
d06e6723ff net/txgbe: add device promiscuous and allmulticast mode
Add device promiscuous and allmulticast mode.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-11-03 23:24:27 +01:00
Jiawen Wu
cc389e5109 net/txgbe: support priority flow control
Add priority flow control support.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-11-03 23:24:27 +01:00
Jiawen Wu
4fb0ef9562 net/txgbe: support FC auto negotiation
Add flow control negotiation with link partner.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-11-03 23:24:27 +01:00
Jiawen Wu
69ce8c8a4c net/txgbe: support flow control
Add flow control support.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-11-03 23:24:27 +01:00
Jiawen Wu
8bdc7882f3 net/txgbe: support DCB
Add DCB transmit and receive mode configurations,
and allocate DCB packet buffer.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-11-03 23:24:27 +01:00
Jiawen Wu
9e487a37c0 net/txgbe: support RSS
Add RSS configure, support to RSS hash and reta operations for PF.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-11-03 23:24:27 +01:00
Jiawen Wu
c35b73a1e7 net/txgbe: add VMDq configure
Add multiple queue setting with VMDq.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-11-03 23:24:27 +01:00
Jiawen Wu
770a352363 net/txgbe: add PF module configure for SRIOV
Add PF module configure for SRIOV.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-11-03 23:24:27 +01:00
Jiawen Wu
fa7c130df4 net/txgbe: add process mailbox operation
Add check operation for vf function level reset,
mailbox messages and ack from vf.
Waiting to process the messages.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-11-03 23:24:27 +01:00
Jiawen Wu
a6712cd029 net/txgbe: add PF module init and uninit for SRIOV
Add PF module init and uninit operations with mailbox.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-11-03 23:24:27 +01:00
Jiawen Wu
2102db8793 net/txgbe: add SWFW semaphore and lock
Add semaphore between software and firmware.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-11-03 23:24:27 +01:00
Jiawen Wu
220b0e49bc net/txgbe: support VLAN
Add VLAN filter, tpid, offload and strip set support.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-11-03 23:24:27 +01:00
Jiawen Wu
c1d4e9d37a net/txgbe: add queue stats mapping
Add queue stats mapping set, and clear hardware counters.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-11-03 23:24:27 +01:00
Jiawen Wu
91fe49c87d net/txgbe: support device xstats
Add device extended stats get from reading hardware registers.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-11-03 23:24:27 +01:00
Jiawen Wu
c9bb590d42 net/txgbe: support device statistics
Add device stats get from reading hardware registers.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-11-03 23:24:27 +01:00
Jiawen Wu
db9767a583 net/txgbe: add Rx and Tx queue info get
Add Rx and Tx queue information get operation.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-11-03 23:24:27 +01:00
Jiawen Wu
a5682d28f1 net/txgbe: support Rx interrupt
Support rx queue interrupt.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-11-03 23:24:27 +01:00
Jiawen Wu
e0d876ef6b net/txgbe: support device stop and close
Add device stop, close and reset operations.
And support hardware thermal sensor.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-11-03 23:24:27 +01:00
Jiawen Wu
127a1abe6c net/txgbe: add Rx and Tx data path start and stop
Add receive and transmit data path start and stop.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-11-03 23:24:27 +01:00
Jiawen Wu
b1f596677d net/txgbe: support device start
Add device start operation with hardware start and reset.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-11-03 23:24:27 +01:00
Jiawen Wu
0e484278c8 net/txgbe: support Rx
Fill receive functions and define receive descriptor.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-11-03 23:24:27 +01:00
Jiawen Wu
91e0e38b46 net/txgbe: support Tx prepare
Fill transmit prepare function.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-11-03 23:24:27 +01:00
Jiawen Wu
ca46fcd753 net/txgbe: support Tx with hardware offload
Fill transmit function with hardware offload.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-11-03 23:24:27 +01:00
Jiawen Wu
aa55a55b20 net/txgbe: support simple Tx
Fill simple transmit function and define transmit descriptor.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-11-03 23:24:27 +01:00
Jiawen Wu
9e30b88f60 net/txgbe: support packet type
Add packet type marco definition and convert ptype to ptid.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-11-03 23:24:27 +01:00
Jiawen Wu
b4cfffaa85 net/txgbe: add Rx and Tx start and stop
Add receive and transmit units start and stop for specified queue.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-11-03 23:24:27 +01:00
Jiawen Wu
226bf98eda net/txgbe: add Rx and Tx queues setup and release
Add receive and transmit queues setup and release.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-11-03 23:24:27 +01:00
Jiawen Wu
be797cbf45 net/txgbe: add Rx and Tx init
Add receive and transmit initialize unit.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-11-03 23:24:27 +01:00
Jiawen Wu
ca6cc80dd5 net/txgbe: add unicast hash bitmap
Add unicast hash bitmap.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-11-03 23:24:27 +01:00
Jiawen Wu
a331fe3b69 net/txgbe: add MAC address operations
Add MAC address related operations.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-11-03 23:24:26 +01:00
Jiawen Wu
01c3cf5c85 net/txgbe: add autoneg control read and write
Add autoc read and write for kr/kx/kx4/sfi link.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-11-03 23:24:26 +01:00