Commit Graph

5212 Commits

Author SHA1 Message Date
Beilei Xing
7c9a0b715d net/ixgbe/base: limit PHY token lock to MDIO access
This patch limits getting and putting the PHY Token to PHY MDIO
access only by adding ixgbe_read_phy_reg_x550a and
ixgbe_write_phy_reg_x550a. The PHY Token is only needed to
synchronize access to the MDIO shared between the two MAC instance.

Signed-off-by: Beilei Xing <beilei.xing@intel.com>
2016-06-27 16:17:53 +02:00
Beilei Xing
87d2b7c5ce net/ixgbe/base: fix register access error
This patch corrects the FLA/GSCL/GSCN access offset values according
to the datasheet.

Fixes: 0790adeb56 ("ixgbe/base: support X550em_a device")

Signed-off-by: Beilei Xing <beilei.xing@intel.com>
2016-06-27 16:17:53 +02:00
Beilei Xing
1062ba821b net/ixgbe/base: fix race condition between ports
This patch fixes a possible race issue between ports, when issuing host
interface commands, by acquiring/releasing the management host interface
semaphore in ixgbe_host_interface_command.

Fixes: 36f43e8679 ("ixgbe/base: refactor manageability block communication")

Signed-off-by: Beilei Xing <beilei.xing@intel.com>
2016-06-27 16:17:53 +02:00
Beilei Xing
6e42840a4d net/ixgbe/base: add function to reset swfw semaphore
For X540 onwards it is possible if a system reset occurs at the
right time to leave the SWFW semaphore high. This new function will
attempt to grab and release the semaphore. If the grab times out it
will still release the semaphore placing it in a known good state.
The idea is to call this when you know no one should be holding the
semaphore (i.e. probe time)

Signed-off-by: Beilei Xing <beilei.xing@intel.com>
2016-06-27 16:17:53 +02:00
Beilei Xing
f2a5f0b8ee net/ixgbe/base: update device IDs
There are two device IDs changed from 15C6/15C7 to 15E4/15E5 because of
PHY info changes. 15C6/15C7 IDs are now used for the backplane
SGMII versions.
Also, clean up some discovery kludges from the previous shared ID,
and also add 15C6/15C7 to ixgbe_set_mdio_speed just for paranoia
to control MDIO speed even though nothing should be attached.

Signed-off-by: Beilei Xing <beilei.xing@intel.com>
2016-06-27 16:17:53 +02:00
Beilei Xing
ad09635647 net/ixgbe/base: support new PHY types
This patch adds new phy definitions and support functions to enable those
new phy types.

Signed-off-by: Beilei Xing <beilei.xing@intel.com>
2016-06-27 16:17:53 +02:00
Beilei Xing
5e0920d93c net/ixgbe/base: refactor internal PHY mode determination
NW_MNG_IF_SEL register is a PHY link configuration register.
Add ixgbe_read_mng_if_sel_x550em to read NW_MNG_IF_SEL, validate
register values and save fields such as PHY MDIO address. This
centralises the reading and checking of the register in one place

Signed-off-by: Beilei Xing <beilei.xing@intel.com>
2016-06-27 16:17:53 +02:00
Beilei Xing
d20977088c net/ixgbe/base: rename header guard
The ixgbe_vf.h file did not use _<FILENAME>_ and instead used
__<FILENAME>__ which is not the standard used in every other file.

Fixes: af75078fec ("first public release")

Signed-off-by: Beilei Xing <beilei.xing@intel.com>
2016-06-27 16:17:53 +02:00
Beilei Xing
4fe0982ee7 net/ixgbe/base: fix error path to release lock
When there is an error getting the PHY token, the error path
fails to release the locks that it has taken. Release those
locks in that failure case.

Fixes: 86b8fb293f ("ixgbe/base: add sw-firmware sync for resource sharing on X550em_a")

Signed-off-by: Beilei Xing <beilei.xing@intel.com>
2016-06-27 16:17:53 +02:00
Beilei Xing
64529722b3 net/ixgbe/base: fix macro name
This patch renames IXGBE_PVFTTDLEN to IXGBE_PVFTDLEN according to
abbreviation of Transmit Descriptor Length in datasheet.

Fixes: d2e72774e5 ("ixgbe/base: support X550")

Signed-off-by: Beilei Xing <beilei.xing@intel.com>
2016-06-27 16:17:53 +02:00
Beilei Xing
eb1ef7bea1 net/ixgbe/base: clear stale VMDq pool mappings
This patch adds clearing the pool mappings when configuring default
MAC addresses for the interface. Without this there will be the risk
of leaking an address into pool 0 which really belongs to VF 0 when
SR-IOV is enabled.

Signed-off-by: Beilei Xing <beilei.xing@intel.com>
2016-06-27 16:17:53 +02:00
Beilei Xing
fc0559bdb5 net/ixgbe/base: add link MAC setup for X550a SFP+
This patch updates ixgbe_setup_mac_link_sfp_x550a for X550 SFP+.
ixgbe_set_lan_id_multi_port_pcie has been updated to set the MAC
instance(0/1) which is needed when configuring the external PHY,
since X550a has two instances of MGPK. The MAC instance is read
from the EEPROM.

Signed-off-by: Beilei Xing <beilei.xing@intel.com>
2016-06-27 16:17:52 +02:00
Beilei Xing
eb540e47c6 net/ixgbe/base: allow per-device-type method calls
Use the method pointers instead of direct function calls for IOSF
access so that the right functions can be called on X550EM_a,
compared to other devices using the driver.

Signed-off-by: Beilei Xing <beilei.xing@intel.com>
2016-06-27 16:17:52 +02:00
Beilei Xing
c00433544e net/ixgbe/base: add KR support for X550em_a devices
Signed-off-by: Beilei Xing <beilei.xing@intel.com>
2016-06-27 16:17:52 +02:00
Beilei Xing
a05454ba5f net/ixgbe/base: refactor EEE setup for X550
Break ixgbe_setup_eee_X550 down to better handle a change from if
statements to switch statements needed to add X550em_a KR support.

Signed-off-by: Beilei Xing <beilei.xing@intel.com>
2016-06-27 16:17:52 +02:00
Beilei Xing
928d240123 net/ixgbe/base: fix firmware command checksum error
When software sends commands to firmware using the host
slave command interface, firmware fails to receive the
command due to a checksum failed error, as the checksum is
not being correctly set by the driver software.

This patch sets command checksum to the default value of
0xFF, as per the datasheet, therefore the checksum won't
be checked by firmware.

Fixes: 86b8fb293f ("ixgbe/base: add sw-firmware sync for resource sharing on X550em_a")
Fixes: 0790adeb56 ("ixgbe/base: support X550em_a device")

Signed-off-by: Beilei Xing <beilei.xing@intel.com>
2016-06-27 16:17:52 +02:00
Beilei Xing
ce8beb5a75 net/ixgbe/base: add MAC link setup for X550a SFP
This patch adds ixgbe_setup_mac_link_sfp_x550a for X550a SFP.

Signed-off-by: Beilei Xing <beilei.xing@intel.com>
2016-06-27 16:17:52 +02:00
Beilei Xing
e367815d20 net/ixgbe/base: return error on VF MAC address failure
An error code indicating that the PF rejects the MAC address change
should be returned, in case that the PF has already assigned a MAC
for the VF.

Fixes: af75078fec ("first public release")

Signed-off-by: Beilei Xing <beilei.xing@intel.com>
2016-06-27 16:17:52 +02:00
Beilei Xing
833df43399 net/ixgbe/base: add SGMII link for X550
This patch adds new phy type and media type to support
SGMII link for X550, and add ixgbe_setup_sgmii to support
SGMII link setup.

Signed-off-by: Beilei Xing <beilei.xing@intel.com>
2016-06-27 16:17:52 +02:00
Beilei Xing
16239b7711 net/ixgbe/base: add new VF requests to mailbox API
This patch adds two new VF requests of IXGBE_VF_GET_RETA and
IXGBE_VF_GET_RSS_KEY to the mailbox API.

Signed-off-by: Beilei Xing <beilei.xing@intel.com>
2016-06-27 16:17:52 +02:00
Nélio Laranjeiro
9964b965ad net/mlx5: re-add Rx scatter support
This commit brings back Rx scatter and related support by the MTU update
function. The maximum number of segments per packet is not a fixed value
anymore (previously MLX5_PMD_SGE_WR_N, set to 4 by default) as it caused
performance issues when fewer segments were actually needed as well as
limitations on the maximum packet size that could be received with the
default mbuf size (supporting at most 8576 bytes).

These limitations are now lifted as the number of SGEs is derived from the
MTU (which implies MRU) at queue initialization and during MTU update.

Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Signed-off-by: Vasily Philipov <vasilyf@mellanox.com>
Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
2016-06-27 16:17:52 +02:00
Adrien Mazarguil
cd9ea11454 net/mlx5: make Rx queue reinitialization safer
The primary purpose of rxq_rehash() function is to stop and restart
reception on a queue after re-posting buffers. This may fail if the array
that temporarily stores existing buffers for reuse cannot be allocated.

Update rxq_rehash() to work on the target queue directly (not through a
template copy) and avoid this allocation.

rxq_alloc_elts() is modified accordingly to take buffers from an existing
queue directly and update their refcount.

Unlike rxq_rehash(), rxq_setup() must work on a temporary structure but
should not allocate new mbufs from the pool while reinitializing an
existing queue. This is achieved by using the refcount-aware
rxq_alloc_elts() before overwriting queue data.

Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Signed-off-by: Vasily Philipov <vasilyf@mellanox.com>
2016-06-27 16:17:52 +02:00
Adrien Mazarguil
c6cb3a8fb5 net/mlx5: remove redundant Rx queue initialization
Toggling RX checksum offloads is already done at initialization time. This
code does not belong in rxq_rehash().

Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
2016-06-27 16:17:52 +02:00
Adrien Mazarguil
a5bf6af931 net/mlx5: re-add Tx gather support
Compared to its previous incarnation, the software limit on the number of
mbuf segments is no more (previously MLX5_PMD_SGE_WR_N, set to 4 by
default) hence no need for linearization code and related buffers that
permanently consumed a non negligible amount of memory to handle oversized
mbufs.

The resulting code is both lighter and faster.

With the addition of this code, older GCC versions (such
as 4.8.5) may complain about 'wqe' variable being uninitialized, so
initialize it preemptively, even though it is not necessary to do so.

Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
2016-06-27 16:17:52 +02:00
Adrien Mazarguil
c3d62cc953 net/mlx5: check remaining space while processing Tx burst
The space necessary to store segmented packets cannot be known in advance
and must be verified for each of them.

Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
2016-06-27 16:17:52 +02:00
Adrien Mazarguil
c2a81fea90 net/mlx5: add debug information about Tx queues capabilities
Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
2016-06-27 16:17:52 +02:00
Nélio Laranjeiro
230189d9ff net/mlx5: support multi-packet send
This feature enables the TX burst function to emit up to 5 packets using
only two work queue entries (WQEs) on devices that support it. Saves PCI
bandwidth and improves performance.

Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Signed-off-by: Olga Shern <olgas@mellanox.com>
2016-06-27 16:17:52 +02:00
Yaacov Hazan
2a66cf3789 net/mlx5: support inline send
Implement send inline feature which copies packet data directly into
work queue entries (WQEs) for improved latency. The maximum packet
size and the minimum number of Tx queues to qualify for inline send
are user-configurable.

This feature is effective when HW causes a performance bottleneck.

Signed-off-by: Yaacov Hazan <yaacovh@mellanox.com>
Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
2016-06-27 16:17:52 +02:00
Adrien Mazarguil
c305090bba net/mlx5: replace countdown with threshold for Tx completions
Replacing the variable countdown (which depends on the number of
descriptors) with a fixed relative threshold known at compile time improves
performance by reducing the TX queue structure footprint and the amount of
code to manage completions during a burst.

Completions are now requested at most once per burst after threshold is
reached.

Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
Signed-off-by: Vasily Philipov <vasilyf@mellanox.com>
2016-06-27 16:17:52 +02:00
Nélio Laranjeiro
99c12dcca6 net/mlx5: handle Rx CQE compression
Mini (compressed) completion queue entries (CQEs) are returned by the
NIC when PCI back pressure is detected, in which case the first CQE64
contains common packet information followed by a number of CQE8
providing the rest, followed by a matching number of empty CQE64
entries to be used by software for decompression.

Before decompression:

      0           1          2           6         7         8
  +-------+  +---------+ +-------+   +-------+ +-------+ +-------+
  | CQE64 |  |  CQE64  | | CQE64 |   | CQE64 | | CQE64 | | CQE64 |
  |-------|  |---------| |-------|   |-------| |-------| |-------|
  | ..... |  | cqe8[0] | |       | . |       | |       | | ..... |
  | ..... |  | cqe8[1] | |       | . |       | |       | | ..... |
  | ..... |  | ....... | |       | . |       | |       | | ..... |
  | ..... |  | cqe8[7] | |       |   |       | |       | | ..... |
  +-------+  +---------+ +-------+   +-------+ +-------+ +-------+

After decompression:

      0          1     ...     8
  +-------+  +-------+     +-------+
  | CQE64 |  | CQE64 |     | CQE64 |
  |-------|  |-------|     |-------|
  | ..... |  | ..... |  .  | ..... |
  | ..... |  | ..... |  .  | ..... |
  | ..... |  | ..... |  .  | ..... |
  | ..... |  | ..... |     | ..... |
  +-------+  +-------+     +-------+

This patch does not perform the entire decompression step as it would be
really expensive, instead the first CQE64 is consumed and an internal
context is maintained to interpret the following CQE8 entries directly.

Intermediate empty CQE64 entries are handed back to HW without further
processing.

Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Signed-off-by: Olga Shern <olgas@mellanox.com>
Signed-off-by: Vasily Philipov <vasilyf@mellanox.com>
2016-06-27 16:17:52 +02:00
Nélio Laranjeiro
1d88ba1719 net/mlx5: refactor Tx data path
Bypass Verbs to improve Tx performance.

Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
Signed-off-by: Yaacov Hazan <yaacovh@mellanox.com>
Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
2016-06-27 16:17:52 +02:00
Nélio Laranjeiro
6218063b39 net/mlx5: refactor Rx data path
Bypass Verbs to improve RX performance.

Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
Signed-off-by: Yaacov Hazan <yaacovh@mellanox.com>
Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Signed-off-by: Vasily Philipov <vasilyf@mellanox.com>
2016-06-27 16:17:52 +02:00
Nélio Laranjeiro
cdab90cb5c net/mlx5: add Tx/Rx burst function selection wrapper
These wrappers are meant to prevent code duplication later.

Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
2016-06-27 16:17:52 +02:00
Nélio Laranjeiro
e72dd09b61 net/mlx5: add support for configuration through kvargs
The intent is to replace the remaining compile-time options and environment
variables with a common mean of runtime configuration. This commit only
adds the kvargs handling code, subsequent commits will update the rest.

Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
2016-06-27 16:17:52 +02:00
Nélio Laranjeiro
51a50a3d9b net/mlx5: add definitions for data path without Verbs
These structures and macros extend those exposed by libmlx5 (in mlx5_hw.h)
to let the PMD manage work queue and completion queue elements directly.

Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
2016-06-27 16:17:52 +02:00
Nélio Laranjeiro
36271e7446 net/mlx5: update prerequisites for upcoming enhancements
The latest version of Mellanox OFED exposes hardware definitions necessary
to implement data path operation bypassing Verbs. Update the minimum
version requirement to MLNX_OFED >= 3.3 and clean up compatibility checks
for previous releases.

Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
2016-06-27 16:17:52 +02:00
Nélio Laranjeiro
0cdddf4d06 net/mlx5: split Rx queue structure
To keep the data path as efficient as possible, move fields only useful to
the control path into new structure rxq_ctrl.

Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
2016-06-27 16:17:52 +02:00
Nélio Laranjeiro
21c8bb4928 net/mlx5: split Tx queue structure
To keep the data path as efficient as possible, move fields only useful to
the control path into new structure txq_ctrl.

Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
2016-06-27 16:17:52 +02:00
Nélio Laranjeiro
0431c40f47 net/mlx5: remove inline Tx support
Inline TX will be fully managed by the PMD after Verbs is bypassed in the
data path. Remove the current code until then.

Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
2016-06-27 16:17:52 +02:00
Nélio Laranjeiro
97c784fb18 net/mlx5: remove configuration variable
There is no scatter/gather support anymore, CONFIG_RTE_LIBRTE_MLX5_SGE_WR_N
has no purpose and can be removed.

Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
2016-06-27 16:17:51 +02:00
Nélio Laranjeiro
3f5ac8f292 net/mlx5: remove Rx scatter support
This is done in preparation of bypassing Verbs entirely for the data path
as a performance improvement. RX scatter cannot be maintained during the
transition and will be reimplemented later.

Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
2016-06-27 16:17:51 +02:00
Nélio Laranjeiro
573f54afae net/mlx5: remove Tx gather support
This is done in preparation of bypassing Verbs entirely for the data path
as a performance improvement. TX gather cannot be maintained during the
transition and will be reimplemented later.

Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
2016-06-27 16:17:51 +02:00
Nélio Laranjeiro
491770fafc net/mlx5: split memory registration function
Except for the first time when memory registration occurs, the lkey is
always cached. Since memory registration is slow and performs system calls,
performance can be improved by moving that code to its own function outside
of the data path so only the lookup code is left in the original inlined
function.

Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
2016-06-27 16:17:51 +02:00
Nélio Laranjeiro
1d1bc87026 net: fix PCI class id
Use RTE_PCI_DEVICE macro to set all fields rather than explicitly setting
them individually in the code. This shortens the code while helping to
future-proof against future changes to the rte_pci_id structure.

Fixes: 701c8d80c8 ("pci: support class id probing")

Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
2016-06-27 16:17:51 +02:00
Ferruh Yigit
2c78ec4a7a net/vmxnet3: fix dump format
Remove 0x prefix for %p format to prevent double 0x in logs

Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Yong Wang <yongwang@vmware.com>
2016-06-27 16:17:51 +02:00
Alejandro Lucero
f105c2b5ba doc: update UIO module in nfp guide
Removing dependency on nfp_uio kernel module. The igb_uio
kernel modules can be used instead.

Fixes: 80bc1752f1 ("nfp: add guide")

Signed-off-by: Alejandro Lucero <alejandro.lucero@netronome.com>
Acked-by: John McNamara <john.mcnamara@intel.com>
2016-06-27 16:17:51 +02:00
Beilei Xing
2b84092427 net/ixgbe: fix single VLAN tag to be outer VLAN tag
Previously, a single VLAN header is treated as inner VLAN,
but generally, a single VLAN header is treated as the outer
VLAN header.
The patch fixes the ether type of a single VLAN type, and
enables configuring inner and outer TPID for double VLAN.

Fixes: 19b16e2f64 ("ethdev: add vlan type when setting ether type")

Signed-off-by: Beilei Xing <beilei.xing@intel.com>
2016-06-27 16:17:45 +02:00
Beilei Xing
5b2d37858d net/i40e: fix single VLAN tag to be outer VLAN tag
In current i40e codebase, if single VLAN header is added in a packet,
it's treated as inner VLAN. Generally, a single VLAN header is
treated as the outer VLAN header, so update the driver behaviour
appropriately.

Fixes: 19b16e2f64 ("ethdev: add vlan type when setting ether type")

Signed-off-by: Beilei Xing <beilei.xing@intel.com>
2016-06-24 18:28:09 +02:00
Ajit Khaparde
40d941a517 net/bnxt: support Cumulus+ Ethernet adapter
This patch adds support for Cumulus+ Ethernet adapters.
These Cumulus+ Ethernet adapters support 10Gb/25Gb/40Gb/50Gb speeds.

Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2016-06-24 18:28:09 +02:00
John Daley
4c2c7bf41f net/enic: fix negative array index write
Negative array index write using variable pos as an index to array
enic->fdir.nodes. Fixed by add array index check.

Coverity issue: 13270

Fixes: fefed3d1e6 ("enic: new driver")

Signed-off-by: John Daley <johndale@cisco.com>
2016-06-24 18:28:09 +02:00