Commit Graph

5204 Commits

Author SHA1 Message Date
Apeksha Gupta
ecae71571b net/enetfec: support Rx/Tx
This patch adds burst enqueue and dequeue operations to the enetfec
PMD. Basic features added like promiscuous enable, basic stats.

Signed-off-by: Sachin Saxena <sachin.saxena@nxp.com>
Signed-off-by: Apeksha Gupta <apeksha.gupta@nxp.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2021-11-15 16:26:17 +01:00
Apeksha Gupta
fc0ec74037 net/enetfec: introduce driver
ENETFEC (Fast Ethernet Controller) is a network poll mode driver
for NXP SoC i.MX 8M Mini.

This patch adds skeleton for enetfec driver with probe function.

Signed-off-by: Sachin Saxena <sachin.saxena@nxp.com>
Signed-off-by: Apeksha Gupta <apeksha.gupta@nxp.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2021-11-15 16:26:15 +01:00
Viacheslav Ovsiienko
1a3709c1f0 doc: describe timestamp limitations for mlx5
The ConnectX NIC series hardware provides only 63-bit
wide timestamps. The imposed limitations description
added to documentation.

At the moment there are no affected applications known
or bug reports neither, this is just the declaration
of limitation.

Cc: stable@dpdk.org

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-11-10 15:44:46 +01:00
Volodymyr Fialko
001d402c89 eal/arm64: support ASan
This patch defines ASAN_SHADOW_OFFSET for arm64 according to the ASan
documentation. This offset should cover all arm64 VMAs supported by
ASan.

Signed-off-by: Volodymyr Fialko <vfialko@marvell.com>
Reviewed-by: David Marchand <david.marchand@redhat.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Ruifeng Wang <ruifeng.wang@arm.com>
2021-11-12 15:30:00 +01:00
Gagandeep Singh
3344172698 dma/dpaa: support statistics
This patch support DMA read and reset statistics operations.

Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
2021-11-10 13:48:38 +01:00
Gagandeep Singh
7da29a644c dma/dpaa: support DMA operations
This patch support copy, submit, completed and
completed status functionality of DMA driver.

Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
2021-11-10 13:48:38 +01:00
Gagandeep Singh
583f373297 dma/dpaa: introduce DPAA DMA driver skeleton
The DPAA DMA  driver is an implementation of the dmadev APIs,
that provide means to initiate a DMA transaction from CPU.
The initiated DMA is performed without CPU being involved
in the actual DMA transaction. This is achieved via using
the QDMA controller of DPAA SoC.

Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
2021-11-10 13:48:38 +01:00
Konstantin Ananyev
f8e0f8ce90 ip_frag: increase default maximum of fragments
Increase default value for config parameter RTE_LIBRTE_IP_FRAG_MAX_FRAG
from 4 to 8. This parameter controls maximum number of fragments per
packet in ip reassembly table. Increasing this value from 4 to 8 will
allow users to cover common case with jumbo packet size of 9KB and
fragments with default frame size (1500B).
As RTE_LIBRTE_IP_FRAG_MAX_FRAG is used in definition of public
structure (struct rte_ip_frag_death_row), this is an ABI change.

Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
2021-11-08 23:06:55 +01:00
Ivan Malov
60e53c078d net/sfc: support decrement IP TTL actions in transfer flows
These actions map to MAE action DECR_IP_TTL. It affects
the outermost header in the current processing state of
the packet, which might have been decapsulated by prior
action DECAP. It also updates IPv4 checksum accordingly.

Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru>
Reviewed-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
2021-11-08 16:25:51 +01:00
Elena Agostini
3a99464456 doc: add CUDA example in GPU guide
Add a pseudo-code example to show how to use gpudev API
with a CUDA application.

Signed-off-by: Elena Agostini <eagostini@nvidia.com>
2021-11-08 17:20:53 +01:00
Elena Agostini
c7ebd65c13 gpudev: add communication list
In heterogeneous computing system, processing is not only in the CPU.
Some tasks can be delegated to devices working in parallel.
When mixing network activity with task processing there may be the need
to put in communication the CPU with the device in order to synchronize
operations.

An example could be a receive-and-process application
where CPU is responsible for receiving packets in multiple mbufs
and the GPU is responsible for processing the content of those packets.

The purpose of this list is to provide a buffer in CPU memory visible
from the GPU that can be treated as a circular buffer
to let the CPU provide fondamental info of received packets to the GPU.

A possible use-case is described below.

CPU:
- Trigger some task on the GPU
- in a loop:
    - receive a number of packets
    - provide packets info to the GPU

GPU:
- Do some pre-processing
- Wait to receive a new set of packet to be processed

Layout of a communication list would be:

     -------
    |   0    | => pkt_list
    | status |
    | #pkts  |
     -------
    |   1    | => pkt_list
    | status |
    | #pkts  |
     -------
    |   2    | => pkt_list
    | status |
    | #pkts  |
     -------
    |  ....  | => pkt_list
     -------

Signed-off-by: Elena Agostini <eagostini@nvidia.com>
2021-11-08 17:20:53 +01:00
Elena Agostini
f56160a255 gpudev: add communication flag
In heterogeneous computing system, processing is not only in the CPU.
Some tasks can be delegated to devices working in parallel.
When mixing network activity with task processing there may be the need
to put in communication the CPU with the device in order to synchronize
operations.

The purpose of this flag is to allow the CPU and the GPU to
exchange ACKs. A possible use-case is described below.

CPU:
- Trigger some task on the GPU
- Prepare some data
- Signal to the GPU the data is ready updating the communication flag

GPU:
- Do some pre-processing
- Wait for more data from the CPU polling on the communication flag
- Consume the data prepared by the CPU

Signed-off-by: Elena Agostini <eagostini@nvidia.com>
2021-11-08 17:20:53 +01:00
Elena Agostini
2d61b429cf gpudev: add memory barrier
Add a function for the application to ensure the coherency
of the writes executed by another device into the GPU memory.

Signed-off-by: Elena Agostini <eagostini@nvidia.com>
2021-11-08 17:20:53 +01:00
Elena Agostini
e818c4e2bf gpudev: add memory API
In heterogeneous computing system, processing is not only in the CPU.
Some tasks can be delegated to devices working in parallel.
Such workload distribution can be achieved by sharing some memory.

As a first step, the features are focused on memory management.
A function allows to allocate memory inside the device,
or in the main (CPU) memory while making it visible for the device.
This memory may be used to save packets or for synchronization data.

The next step should focus on GPU processing task control.

Signed-off-by: Elena Agostini <eagostini@nvidia.com>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2021-11-08 17:20:53 +01:00
Thomas Monjalon
82e5f6b658 gpudev: add child device representing a device context
The computing device may operate in some isolated contexts.
Memory and processing are isolated in a silo represented by
a child device.
The context is provided as an opaque by the caller of
rte_gpu_add_child().

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2021-11-08 17:20:52 +01:00
Elena Agostini
8b8036a66e gpudev: introduce GPU device class library
In heterogeneous computing system, processing is not only in the CPU.
Some tasks can be delegated to devices working in parallel.

The new library gpudev is for dealing with GPGPU computing devices
from a DPDK application running on the CPU.

The infrastructure is prepared to welcome drivers in drivers/gpu/.

Signed-off-by: Elena Agostini <eagostini@nvidia.com>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2021-11-08 17:20:52 +01:00
Satheesh Paul
fda3750de6 app/flow-perf: add random priority option
Added support to create flows with priority attribute set
randomly between 0 and a user supplied maximum value. This
is useful to measure performance on NICs which may have to
rearrange flows to honor flow priority.

Removed the lower limit of 100000 flows per batch.

Signed-off-by: Satheesh Paul <psatheesh@marvell.com>
Acked-by: Wisam Jaddo <wisamm@nvidia.com>
2021-11-08 10:33:08 +01:00
Radha Mohan Chintakuntla
b56f1e2dad dma/cnxk: add channel operations
Add functions for the dmadev vchan setup and DMA operations.

Signed-off-by: Radha Mohan Chintakuntla <radhac@marvell.com>
2021-11-08 00:08:45 +01:00
Radha Mohan Chintakuntla
53f6d7328b dma/cnxk: create and initialize device on PCI probing
This patch creates and initializes a dmadev device on pci probe.

Signed-off-by: Radha Mohan Chintakuntla <radhac@marvell.com>
2021-11-08 00:08:45 +01:00
Chengwen Feng
3c5f5f03a0 dma/hisilicon: add control path
This patch add control path functions for Kunpeng DMA devices.

Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
2021-11-07 20:02:24 +01:00
Chengwen Feng
9e16317a38 dma/hisilicon: add probing
This patch add dmadev instances create during the PCI probe, and
destroy them during the PCI remove. Internal structures and HW
definitions was also included.

Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
2021-11-07 20:01:52 +01:00
Chengwen Feng
4d0d4cf327 dma/hisilicon: introduce driver skeleton
Add the basic device probe and remove functions and initial
documentation for new hisilicon DMA drivers.

Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
2021-11-07 19:54:19 +01:00
Bing Zhao
e848218741 net/mlx5: check delay drop settings in kernel driver
The delay drop is the common feature managed on per device basis
and the kernel driver is responsible one for the initialization and
rearming.

By default, the timeout value is set to activate the delay drop when
the driver is loaded.

A private flag "dropless_rq" is used to control the rearming. Only
when it is on, the rearming will be handled once received a timeout
event. Or else, the delay drop will be deactivated after the first
timeout occurs and all the Rx queues won't have this feature.

The PMD is trying to query this flag and warn the application when
some queues are created with delay drop but the flag is off.

Signed-off-by: Bing Zhao <bingz@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-11-05 17:04:53 +01:00
Bing Zhao
febcac7b46 net/mlx5: support Rx queue delay drop
For the Ethernet RQs, if there all receiving descriptors are
exhausted, the packets being received will be dropped. This behavior
prevents slow or malicious software entities at the host from
affecting the network. While for hairpin cases, even if there is no
software involved during the packet forwarding from Rx to Tx side,
some hiccup in the hardware or back pressure from Tx side may still
cause the descriptors to be exhausted. In certain scenarios it may be
preferred to configure the device to avoid such packet drops,
assuming the posting of descriptors will resume shortly.

To support this, a new devarg "delay_drop" is introduced. By default,
the delay drop is enabled for hairpin Rx queues and disabled for
standard Rx queues. This value is used as a bit mask:
  - bit 0: enablement of standard Rx queue
  - bit 1: enablement of hairpin Rx queue
And this attribute will be applied to all Rx queues of a device.

The "rq_delay_drop" capability in the HCA_CAP is checked before
creating any queue. If the hardware capabilities do not support
this delay drop, all the Rx queues will still be created without
this attribute, and the devarg setting will be ignored even if it
is specified explicitly. A warning log is used to notify the
application when this occurs.

Signed-off-by: Bing Zhao <bingz@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-11-05 17:04:53 +01:00
Jiawen Wu
b4ce1520c9 net/txgbe: fix link process in KR mode
Set the 'present' parameter to 0 by default. It is configured by hardware,
users can set it to 1 for manual configuration.

Fixes: f611dada1a ("net/txgbe: update link setup process of backplane NICs")
Cc: stable@dpdk.org

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
2021-11-05 15:10:21 +01:00
Xueming Li
09c2555303 net/mlx5: support shared Rx queue
This patch introduces shared RxQ. All shared Rx queues with same group
and queue ID share the same rxq_ctrl. Rxq_ctrl and rxq_data are shared,
all queues from different member port share same WQ and CQ, essentially
one Rx WQ, mbufs are filled into this singleton WQ.

Shared rxq_data is set into device Rx queues of all member ports as
RxQ object, used for receiving packets. Polling queue of any member
ports returns packets of any member, mbuf->port is used to identify
source port.

Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-11-04 22:55:50 +01:00
Gregory Etelson
a23e9b6e3e net/mlx5: handle flex item in flows
Provide flex item recognition, validation and translation
in flow patterns. Track the flex item referencing.

Signed-off-by: Gregory Etelson <getelson@nvidia.com>
Reviewed-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-11-04 22:55:41 +01:00
Jay Ding
d1bd289752 net/bnxt: support TruFlow and AFM SRAM partitioning
Implement set/get_sram_policy which support both Rx/Tx
direction truflow type the specific SRAM bank.

Signed-off-by: Jay Ding <jay.ding@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Randy Schacher <stuart.schacher@broadcom.com>
Reviewed-by: Farah Smith <farah.smith@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-11-04 22:13:53 +01:00
Kishore Padmanabha
9ba1e16716 net/bnxt: remove devargs option for stats accumulation
The accumulation of flow counters is not determined by the application
device arguments anymore. Instead it is now dictated by the platform
capabilities whether to do software based accumulation or not.

Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Mike Baucom <michael.baucom@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-11-04 22:11:56 +01:00
Kishore Padmanabha
3258083996 net/bnxt: support inner IP header for GRE tunnel flows
This change allows adding IP header matches for GRE flows that
does not specify outer IP header in the flow match pattern.

Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Mike Baucom <michael.baucom@broadcom.com>
Reviewed-by: Randy Schacher <stuart.schacher@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-11-04 22:11:00 +01:00
Ajit Khaparde
0d0dd1773e net/bnxt: enable wildcard match for ingress flows
Enabled wildcard match support for IPv4 ingress flows.

Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Reviewed-by: Mike Baucom <michael.baucom@broadcom.com>
2021-11-04 21:57:17 +01:00
Kishore Padmanabha
be3af03f55 net/bnxt: add capability option for socket redirect
Added support for socket redirect feature capability so applications
can enable or disable this feature. This patch contains the template
changes.

Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Mike Baucom <michael.baucom@broadcom.com>
Reviewed-by: Randy Schacher <stuart.schacher@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-11-04 21:53:09 +01:00
Kishore Padmanabha
34a7ff5a92 net/bnxt: support multi root capability
Update driver to read the multi root capability and ignore
PCI address check while creating ulp session when multi root
capability is enabled in the hardware. DPDK HSI version updated
from 1.10.2.44 to 1.10.2.68.

Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Mike Baucom <michael.baucom@broadcom.com>
Reviewed-by: Randy Schacher <stuart.schacher@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-11-04 21:51:52 +01:00
Kishore Padmanabha
c674c133f1 net/bnxt: support NAT for dest IP and port combination
* Added support for NAT action for destination IP and port
  combination for Thor devices.
* Consolidated the encapsulation and NAT entries for scaling flows
  with NAT actions.

Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Shahaji Bhosle <sbhosle@broadcom.com>
Reviewed-by: Mike Baucom <michael.baucom@broadcom.com>
Reviewed-by: Randy Schacher <stuart.schacher@broadcom.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-11-04 21:51:14 +01:00
Vijay Kumar Srivastava
cfeed08a0b vdpa/sfc: support MAC filter config
Add support for unicast and broadcast MAC filter configuration.

Signed-off-by: Vijay Kumar Srivastava <vsrivast@xilinx.com>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2021-11-04 13:59:56 +01:00
Vijay Kumar Srivastava
f66a66e631 vdpa/sfc: support device and protocol features queries
Implement vDPA ops get_feature and get_protocol_features.
This patch retrieves device supported features and enables
protocol features.

Signed-off-by: Vijay Kumar Srivastava <vsrivast@xilinx.com>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Reviewed-by: Chenbo Xia <chenbo.xia@intel.com>
2021-11-04 13:59:41 +01:00
Vijay Kumar Srivastava
6dad9a7353 vdpa/sfc: support device initialization
Add HW initialization and vDPA device registration support.

Signed-off-by: Vijay Kumar Srivastava <vsrivast@xilinx.com>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2021-11-04 13:45:37 +01:00
Vijay Kumar Srivastava
5e7596ba7c vdpa/sfc: introduce Xilinx vDPA driver
Add new vDPA PMD to support vDPA operations of Xilinx devices.
This patch implements probe and remove functions.

Signed-off-by: Vijay Kumar Srivastava <vsrivast@xilinx.com>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2021-11-04 13:43:23 +01:00
Jerin Jacob
07ed904bf1 doc: remove deprecation notices for eventdev
All deprecation notice targeted for v21.11 of eventdev has been
committed in the following commits, remove deprecation notices.

Fixes: 3c838062b9 ("eventdev: introduce event vector Rx capability")
Fixes: 929ebdd543 ("eventdev/eth_rx: simplify event vector config")
Fixes: 295c053f90 ("eventdev: hide event device related structures")
Fixes: dd451ad152 ("doc: remove event crypto metadata deprecation note")

Reported-by: David Marchand <david.marchand@redhat.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
2021-11-04 14:49:49 +01:00
Mattias Rönnblom
aaf3b44c66 event/dsw: use maintenance facility
Set the RTE_EVENT_DEV_CAP_REQUIRES_MAINT flag, and perform DSW
background tasks on rte_event_maintain() calls.

Signed-off-by: Mattias Rönnblom <mattias.ronnblom@ericsson.com>
Tested-by: Richard Eklycke <richard.eklycke@ericsson.com>
Tested-by: Liron Himi <lironh@marvell.com>
2021-11-04 13:28:07 +01:00
Naga Harish K S V
995b150c1a eventdev/eth_rx: add queue stats API
This patch adds new api ``rte_event_eth_rx_adapter_queue_stats_get`` to
retrieve queue stats. The queue stats are in the format
``struct rte_event_eth_rx_adapter_queue_stats``.

For resetting the queue stats,
``rte_event_eth_rx_adapter_queue_stats_reset`` api is added.

The adapter stats_get and stats_reset apis are also updated to
handle queue level event buffer use case.

Signed-off-by: Naga Harish K S V <s.v.naga.harish.k@intel.com>
Acked-by: Jay Jayatheerthan <jay.jayatheerthan@intel.com>
2021-11-04 08:41:25 +01:00
Tal Shnaiderman
59e380f193 doc: add cryptodev table for supported operating systems
Added table to the crypto device drivers documentation
stating the support of each PMD on Linux, FreeBSD and Windows.

Signed-off-by: Tal Shnaiderman <talshn@nvidia.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-11-04 19:51:11 +01:00
Gowrishankar Muthukrishnan
259ca6d161 security: add telemetry endpoint for capabilities
Add telemetry endpoint for cryptodev security capabilities.
Details of endpoints added in documentation.

Signed-off-by: Gowrishankar Muthukrishnan <gmuthukrishn@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-11-04 19:46:27 +01:00
Raja Zidane
9ad776442d crypto/mlx5: support 1MB data-unit
Add 1MB data-unit length to the capability's bitmap.
Handle 1MB data-unit length in the mlx5 session create operation,
and expose its capability in the mlx5 capabilities.

Signed-off-by: Raja Zidane <rzidane@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-11-04 19:46:27 +01:00
Srujana Challa
86738ebe1e examples/ipsec-secgw: support event vector
Adds event vector support to inline protocol offload mode.
By default vector support is disabled, it can be enabled by
using the option --event-vector.
Additional options to configure vector size and vector timeout are
also implemented and can be used by specifying --vector-size and
--vector-tmo.

Signed-off-by: Srujana Challa <schalla@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-11-04 19:46:27 +01:00
Radu Nicolau
9413c3901f examples/ipsec-secgw: support additional algorithms
Add support for AES-GMAC, AES_CTR, AES_XCBC_MAC,
AES_CCM, CHACHA20_POLY1305

Signed-off-by: Declan Doherty <declan.doherty@intel.com>
Signed-off-by: Radu Nicolau <radu.nicolau@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-11-04 19:46:27 +01:00
Radu Nicolau
560029d5cf examples/ipsec-secgw: define initial ESN value
New option added to the SA configuration arguments that
allows setting an arbitrary start value for ESN.

For example in the SA below ESN will be enabled and first egress
IPsec packet will have the ESN value 10000:

sa out 15 cipher_algo null auth_algo null mode ipv4-tunnel \
src 172.16.1.5 dst 172.16.2.5 \
esn 10000

Signed-off-by: Declan Doherty <declan.doherty@intel.com>
Signed-off-by: Radu Nicolau <radu.nicolau@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-11-04 19:46:27 +01:00
Radu Nicolau
3e7b7dd880 examples/ipsec-secgw: support telemetry
Add telemetry support to the IPsec GW sample app and add
support for per SA telemetry when using IPsec library.

Signed-off-by: Declan Doherty <declan.doherty@intel.com>
Signed-off-by: Radu Nicolau <radu.nicolau@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-11-04 19:46:27 +01:00
Radu Nicolau
9ae86b4cfc examples/ipsec-secgw: support UDP encap for inline crypto
Enable UDP encapsulation for both transport and tunnel modes for the
inline crypto offload path.

Signed-off-by: Radu Nicolau <radu.nicolau@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-11-04 19:46:27 +01:00
Radu Nicolau
2800893661 examples/ipsec-secgw: add stats interval argument
Add -t for stats screen update interval, disabled by default.

Signed-off-by: Radu Nicolau <radu.nicolau@intel.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
2021-11-04 19:46:27 +01:00