Commit Graph

501 Commits

Author SHA1 Message Date
Konstantin Belousov
8882b7852a add pmap_active_cpus()
For amd64, i386, arm, and riscv, i.e. all architectures except arm64,
the custom implementation is provided since we maintain the bitmask of
active CPUs anyway.

Arm64 uses somewhat naive iteration over CPUs and match current vmspace'
pmap with the argument. It is not guaranteed that vmspace->pmap is the
same as the active pmap, but the inaccuracy should be toleratable.

Sponsored by:	The FreeBSD Foundation
MFC after:	1 week
Differential revision:	https://reviews.freebsd.org/D32360
2023-08-23 03:02:21 +03:00
Warner Losh
71625ec9ad sys: Remove $FreeBSD$: one-line .c comment pattern
Remove /^/[*/]\s*\$FreeBSD\$.*\n/
2023-08-16 11:54:24 -06:00
Warner Losh
2ff63af9b8 sys: Remove $FreeBSD$: one-line .h pattern
Remove /^\s*\*+\s*\$FreeBSD\$.*$\n/
2023-08-16 11:54:18 -06:00
Warner Losh
95ee2897e9 sys: Remove $FreeBSD$: two-line .h pattern
Remove /^\s*\*\n \*\s+\$FreeBSD\$$\n/
2023-08-16 11:54:11 -06:00
Ed Maste
e0c6e89108 arm64: increase MAXCPU to 1024, following amd64
As in commit 9051987e40 for amd64, support up to 1024 CPU cores.
arm64 hardware with more than 256 CPU cores is currently available and
will become increasingly common over FreeBSD 14's lifetime.

PR:		269572
Reviewed by:	andrew
Relnotes:	Yes
Sponsored by:	The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D41319
2023-08-15 08:22:02 -04:00
Mark Johnston
dd24d475d5 arm64: Add constants for decoding ISS fields for WF* exceptions
WFI and WFIT trap to EL2 when executed in a vmm guest.  (Currently
WFE/WFET are not configured to trap.)  We only handle WFI at the moment,
so these constants are useful when handling the exception.

Reviewed by:	andrew
MFC after:	1 week
Sponsored by:	Innovate UK
Differential Revision:	https://reviews.freebsd.org/D41199
2023-07-28 09:34:38 -04:00
Andrew Turner
53e1af5a10 arm64: Decode the ID_AA64PFR2_EL1 register
No fields have been defined, but it has been documented in the
Architecture Reference Manual.

Sponsored by:	Arm Ltd
Differential Revision:	https://reviews.freebsd.org/D40897
2023-07-28 12:53:02 +01:00
Andrew Turner
8c111e5b37 arm64: Update the ID_AA64PFR1_EL1 fields
While here move to decimal for the _op and _CR definitions to be used
by a future macro to define the register when the assembler doesn't
know about it.

Sponsored by:	Arm Ltd
Differential Revision:	https://reviews.freebsd.org/D40896
2023-07-28 12:53:02 +01:00
Andrew Turner
0766dde9b5 arm64: Update the ID_AA64PFR0_EL1 fields
While here move to decimal for the _op and _CR definitions to be used
by a future macro to define the register when the assembler doesn't
know about it.

Sponsored by:	Arm Ltd
Differential Revision:	https://reviews.freebsd.org/D40895
2023-07-28 12:53:02 +01:00
Andrew Turner
22235b631b arm64: Decode the ID_AA64MMFR4_EL1 register
No fields have been defined, but it has been documented in the
Architecture Reference Manual.

Sponsored by:	Arm Ltd
Differential Revision:	https://reviews.freebsd.org/D40894
2023-07-28 12:53:02 +01:00
Andrew Turner
c65679143f arm64: Decode the ID_AA64MMFR3_EL1 register
Sponsored by:	Arm Ltd
Differential Revision:	https://reviews.freebsd.org/D40893
2023-07-28 12:53:02 +01:00
Andrew Turner
2134cfe793 arm64: Don't use hex for ID_AA64MMFR2_EL1_op/CR*
It breaks a future macro that creates the alternative register name
for old compilers.

Sponsored by:	Arm Ltd
Differential Revision:	https://reviews.freebsd.org/D40892
2023-07-28 12:53:02 +01:00
Andrew Turner
284f91de8b arm64: Update the ID_AA64MMFR1_EL1 fields
Sponsored by:	Arm Ltd
Differential Revision:	https://reviews.freebsd.org/D40891
2023-07-28 12:53:01 +01:00
Andrew Turner
b21402d058 arm64: Update the ID_AA64MMFR0_EL1 fields
While here move to decimal for the _op and _CR definitions to be used
by a future macro to define the register when the assembler doesn't
know about it.

Sponsored by:	Arm Ltd
Differential Revision:	https://reviews.freebsd.org/D40890
2023-07-28 12:53:01 +01:00
Andrew Turner
de01309926 arm64: Update the ID_AA64ISAR1_EL1 fields
While here move to decimal for the _op and _CR definitions to be used
by a future macro to define the register when the assembler doesn't
know about it.

Sponsored by:	Arm Ltd
Differential Revision:	https://reviews.freebsd.org/D40889
2023-07-28 12:53:01 +01:00
Andrew Turner
4182f58172 arm64: Update the ID_AA64ISAR0_EL1 fields
While here move to decimal for the _op and _CR definitions to be used
by a future macro to define the register when the assembler doesn't
know about it.

Sponsored by:	Arm Ltd
Differential Revision:	https://reviews.freebsd.org/D40888
2023-07-28 12:53:01 +01:00
Andrew Turner
6fd44e5f53 arm64: Update the ID_AA64DFR0_EL1 fields
While here move to decimal for the _op and _CR definitions to be used
by a future macro to define the register when the assembler doesn't
know about it.

Sponsored by:	Arm Ltd
Differential Revision:	https://reviews.freebsd.org/D40887
2023-07-28 12:53:01 +01:00
Mark Johnston
1083a8cd85 pcpu: Remove unused definitions of ALT_STACK_SIZE
This was added originally for the sparc64 port and apparently copied to
other platforms.  No functional change intended.

MFC after:	1 week
2023-07-27 16:02:03 -04:00
Mike Karels
d5d97bed4a arm64 lib32: prepare arm64 headers to redirect to arm
In order to compile lib32 libraries and other 32-bit code on arm64,
<machine/foo.h> needs to be redirected to an arm header rather
than arm64 when building with -m32.  Ifdef the arm64 headers that
are installed in /usr/include/machine and used by user-level software
(including references from /usr/include/*.h) so that if __arm__ is
defined when including the arm64 version, <arm/foo.h> is included
rather than using the rest of the file's contents.  Some arm headers
had no arm64 equivalent; headers were added just to do the redirection.
These files use #error if __arm__ is not defined to guard against
confusion.  Also add an include/arm Makefile, and modify Makefiles
as needed to install everything, including the arm files in
/usr/include/arm.  fenv.h comes from lib/msun/arm/fenv.h.

The new arm64 headers are:
    acle-compat.h
    cpuinfo.h
    sysreg.h

Reviewed by:	jrtc27, imp
Differential Revision:	https://reviews.freebsd.org/D40944
2023-07-25 18:59:26 -05:00
Mitchell Horne
a89262079e Consistently provide ffs/fls using builtins
Use of compiler builtin ffs/ctz functions will result in optimized
instruction sequences when possible, and fall back to calling a function
provided by the compiler run-time library. We have slowly shifted our
platforms to take advantage of these builtins in 60645781d6 (arm64),
1c76d3a9fb (arm), 9e319462a0 (powerpc, partial).

Some platforms still rely on the libkern implementations of these
functions provided by libkern, namely riscv, powerpc (ffs*, flsll), and
i386 (ffsll and flsll). These routines are slow, as they perform a
linear search for the bit in question. Even on platforms lacking
dedicated bit-search instructions, such as riscv, the compiler library
will provide better-optimized routines, e.g. by using binary search.

Consolidate all definitions of these functions (whether currently using
builtins or not) to libkern.h. This should result in equivalent or
better performing routines in all cases.

One wart in all of this is the existing HAVE_INLINE_F*** macros, which
we use in a few places to conditionally avoid the slow libkern routines.
These aren't easily removed in one commit. For now, provide these
defines unconditionally, but marked for removal after subsequent
cleanup.

Removal of the now unused libkern routines will follow in the next
commit.

Reviewed by:	dougm, imp (previous version)
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D40698
2023-07-06 14:46:41 -03:00
Andrew Turner
51fc92e68e Make some arm64 debug monitor functions static
These are only used within debug_monitor.c so can become static.

Sponsored by:	Arm Ltd
2023-07-05 11:05:38 +01:00
Andrew Turner
df0d0fc990 Add helpers to allocate an arm64 VFP state struct
This will be used by bhyve and will allow the size to change, e.g. for SVE.

Reviewed by:	markj
Sponsored by:	Arm Ltd
Differential Revision:	https://reviews.freebsd.org/D40131
2023-07-05 10:42:14 +01:00
Alan Cox
e59d202312 arm64: make VM_NFREEORDER and the comment describing it match
The setting of VM_NFREEORDER and the comment describing it were copied
from sparc64 where both the page size and the number of page table
entries that fit in a cache line are different from arm64.

Reviewed by:	andrew, kib, markj
MFC after:	2 weeks
Differential Revision:	https://reviews.freebsd.org/D40782
2023-06-29 12:48:48 -05:00
Mark Johnston
fbec1f9195 arm64: Add a masked get_kernel_reg()
This lets consumers fetch the value of a system register and apply a
mask over individual fields.  That is, each field in the returned value
will be the "smaller" of the two provided by "mask" and the value saved
in kern_cpu_desc.  This will be used by vmm to sanitize host system
register fields.

Reviewed by:	andrew
MFC after:	2 weeks
Sponsored by:	The FreeBSD Foundation
Sponsored by:	Klara, Inc. (hardware)
Differential Revision:	https://reviews.freebsd.org/D40500
2023-06-28 16:29:49 -04:00
Mark Johnston
d325184232 arm64: Remove struct arm64_frame
It was used in one place and was added specifically to support dtrace
stack unwinding code.  Write an equivalent expression using struct
unwind_state instead.  No functional change intended.

Reviewed by:	andrew
MFC after:	1 week
Sponsored by:	Innovate UK
Differential Revision:	https://reviews.freebsd.org/D40538
2023-06-15 12:38:45 -04:00
Andrew Turner
178747a158 Add more arm64 special register values
These will be used to simplify the kernel special register handling.

Sponsored by:	Arm Ltd
2023-06-12 09:31:14 +01:00
Andrew Turner
d057b7aac8 arm64: Malloc the cpu_desc array
We only need this during boot. Allocate the array before starting CPUs
to reduce the memory usage.

Reviewed by:	Zach Leaf <zachary.leaf@arm.com>
Sponsored by:	Arm Ltd
Differential Revision:	https://reviews.freebsd.org/D40433
2023-06-08 17:10:10 +01:00
Andrew Turner
dd23557528 arm64: Fix the definition of ID_AA64DFR1_EL1 2023-06-02 16:24:15 +01:00
Andrew Turner
4baf5db06c Add more arm64 ID registers
These will be used by bhyve to emulate these registers.

Sponsored by:	Arm Ltd
2023-06-02 16:24:15 +01:00
Mark Johnston
9fb6718d1b smp: Dynamically allocate the stoppcbs array
This avoids bloating the kernel image when MAXCPU is large.

A follow-up patch for kgdb and other kernel debuggers is needed since
the stoppcbs symbol is now a pointer.  Bump __FreeBSD_version so that
debuggers can use osreldate to figure out how to handle stoppcbs.

PR:		269572
MFC after:	never
Reviewed by:	mjg, emaste
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D39806
2023-05-25 18:09:55 -04:00
Andrew Turner
800b39cf99 arm64: Remove CNTHCTL_EL2 from arm64.h
It is also in hypervisor.h where it belongs.

Sponsored by:	Arm Ltd
2023-05-24 17:20:05 +01:00
Andrew Turner
255adf35c0 Export arm64 VFP handling functions
These will be used by bhyve to manage the host VFP registers, e.g.
saving the host state before entering a guest.

Reviewed by:	markj
Sponsored by:	Arm Ltd
Differential Revision:	https://reviews.freebsd.org/D40130
2023-05-24 11:55:38 +01:00
Andrew Turner
419f8fc7fb Add more arm64 special registers
These will be used by bhyve

Reviewed by:	markj
Sponsored by:	Arm Ltd
Sponsored by:	Innovate UK
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D40128
2023-05-24 11:55:38 +01:00
Zachary Leaf
012ea67d2d arm64 pmap: introduce PHYS_TO_PTE macro
Introduce macro for PHYS_TO_PTE, setting the groundwork for future
support of various Arm VMSA extensions.

For extensions such as 52-bit VA/PA (FEAT_LPA2), the representation of
an address between a PTE and PA are not equivalent. This macro will
allow converting between the different representations.

Currently PHYS_TO_PTE is a NOP. Replace all instances where we go from
PA to PTE with new PHYS_TO_PTE macro.

Reviewed by:	markj
Sponsored by:	Arm Ltd
Differential Revision:	https://reviews.freebsd.org/D39828
2023-05-24 11:55:38 +01:00
Zachary Leaf
0f54e49d4b arm64 pmap: introduce PTE_TO_PHYS macro
Introduce macro for PTE_TO_PHYS, setting the groundwork for future
support of various Arm VMSA extensions.

For extensions such as 52-bit VA/PA (FEAT_LPA2), the representation of
an address between a PTE and PA are not equivalent. This macro will
allow converting between the different representations.

Currently going from PTE to PA is achieved by masking off the upper and
lower attributes. Retain this behaviour but replace all instances with
the new macro instead.

Reviewed by:	alc, markj
Sponsored by:	Arm Ltd
Differential Revision:	https://reviews.freebsd.org/D39827
2023-05-24 11:55:38 +01:00
Warner Losh
4d846d260e spdx: The BSD-2-Clause-FreeBSD identifier is obsolete, drop -FreeBSD
The SPDX folks have obsoleted the BSD-2-Clause-FreeBSD identifier. Catch
up to that fact and revert to their recommended match of BSD-2-Clause.

Discussed with:		pfg
MFC After:		3 days
Sponsored by:		Netflix
2023-05-12 10:44:03 -06:00
Kyle Evans
86c31aca33 arm64: add swapueword8/32
Much like casueword*, except just a plain old swap.  Maintains a similar
interface to casu(9)- return value -1 (fault), 0 (success), or 1 (fail),
and also both ll/sc and LSE variants are implemented.

These will be used to implement 32-bit swp/swpb emulation on aarch64.

Reveiwed by:	andrew
Sponsored by:	Stormshield
Sponsored by:	Klara, Inc.
Differential Revision:	https://reviews.freebsd.org/D39837
2023-05-11 13:23:14 -05:00
Mitchell Horne
aba91805aa hwpmc: use kstack_contains()
This existing helper function is preferable to the hand-rolled
calculation of the kstack bounds.

Make some small style improvements while here. Notably, rename every
instance of "r", the return address, to "ra". Tidy the includes in the
affected files.

Reviewed by:	jkoshy
MFC after:	2 weeks
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D39909
2023-05-06 14:49:19 -03:00
John Baldwin
4961faaacc pmap_{un}map_io_transient: Use bool instead of boolean_t.
Reviewed by:	imp, kib
Differential Revision:	https://reviews.freebsd.org/D39920
2023-05-04 12:29:48 -07:00
Andrew Turner
020edaea2a Split out pmap_map_delete on arm64
This will be used when supporting some extensions, e.g. Branch Target
Identification (BTI).

Sponsored by:	Arm Ltd
2023-04-28 11:54:19 +01:00
Elliott Mitchell
d7e3b05b0d arm: remove passing trapframe to intr_ipi_dispatch()
This was needed before INTRNG was in place and handling the push of
curthread->td_intr_frame.  Since INTRNG now handles this, there is no
longer and need for playing around with the frame inside IPI interrupts.
2023-04-26 20:08:30 +01:00
Andrew Turner
6a9c2e63be Add padding for future use on arm64
Allow new features to be supported without changing the size of
existing structures.

Reviewed by:	kib
Sponsored by:	Arm Ltd
Differential Revision:	https://reviews.freebsd.org/D39777
2023-04-25 10:23:15 +01:00
Andrew Turner
078a69abcb Use a uint64_t to store the arm64 mpidr
Use a single uint64_t to hole the mpidr register as we can break the
KBI on 14. Keep the macro so code can still be MFCd to 13.

Sponsored by:	Arm Ltd
2023-04-24 12:33:50 +01:00
Andrew Turner
fb421e96c0 Make arm64 pcb padding explicit
There is padding between some fields. Mark those I have found so they
can be reused later if needed.

Sponsored by:	Arm Ltd
2023-04-24 12:33:50 +01:00
Konstantin Belousov
1e0e335b0f amd64: fix PKRU and swapout interaction
When vm_map_remove() is called from vm_swapout_map_deactivate_pages()
due to swapout, PKRU attributes for the removed range must be kept
intact.  Provide a variant of pmap_remove(), pmap_map_delete(), to
allow pmap to distinguish between real removes of the UVA mappings
and any other internal removes, e.g. swapout.

For non-amd64, pmap_map_delete() is stubbed by define to pmap_remove().

Reported by:	andrew
Reviewed by:	markj
Sponsored by:	The FreeBSD Foundation
MFC after:	1 week
Differential revision:	https://reviews.freebsd.org/D39556
2023-04-15 02:53:59 +03:00
Andrew Turner
04b4655997 Mark EENTRY as .text
To allow it to be used before ENTRY we need to ensure the symbol is
in the .text section. It also needs to be aligned correctly.

While here mark the symbol type as a function as in the ENTRY macro.

Reported by:	jrtc27
Sponsored by:	Arm Ltd
2023-04-06 16:50:54 +01:00
Mark Johnston
ad2f2ee015 arm64: Remove duplicated function prototypes for PAC
No functional change intended.

Sponsored by:	The FreeBSD Foundation
2023-03-27 08:56:22 -04:00
Kyle Evans
89c52f9d59 arm64: add KASAN support
This entails:
- Marking some obvious candidates for __nosanitizeaddress
- Similar trap frame markings as amd64, for similar reasons
- Shadow map implementation

The shadow map implementation is roughly similar to what was done on
amd64, with some exceptions.  Attempting to use available space at
preinit_map_va + PMAP_PREINIT_MAPPING_SIZE (up to the end of that range,
as depicted in the physmap) results in odd failures, so we instead
search the physmap for free regions that we can carve out, fragmenting
the shadow map as necessary to try and fit as much as we need for the
initial kernel map.  pmap_bootstrap_san() is thus after
pmap_bootstrap(), which still included some technically reserved areas
of the memory map that needed to be included in the DMAP.

The odd failure noted above may be a bug, but I haven't investigated it
all that much.

Initial work by mhorne with additional fixes from kevans and markj.

Reviewed by:	andrew, markj
Sponsored by:	Juniper Networks, Inc.
Sponsored by:	Klara, Inc.
Differential Revision:	https://reviews.freebsd.org/D36701
2023-03-23 16:34:33 -05:00
Andrew Turner
6a4f5fdd19 Mark the arm64 PSR register fields with UL
These are for a 64 bit register. Make them 64 bit values on arm64.

Sponsored by:	Arm Ltd
2023-03-23 18:56:26 +00:00
Andrew Turner
1c1f31a5e5 Remove unused registes from the arm pcb
These were kept for ABI reasons. Remove them and bump __FreeBSD_version
so debuggers can be updated to use the new layout.

Reviewed by:	jhb
Sponsored by:	Arm Ltd
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D35378
2023-03-23 18:56:26 +00:00