Commit Graph

1372 Commits

Author SHA1 Message Date
Juli Mallett
4b6b28c350 Don't truncate physical addresses to 32-bits. 2012-03-10 06:43:41 +00:00
Juli Mallett
13a7423bf5 Reduce diffs with freebsd32_sysarch. 2012-03-10 06:31:28 +00:00
Juli Mallett
fb2a44f292 o) Bump INTRCOUNT_COUNT to 256, since Octeon already has >128.
XXX It would be good to use a better way to size intrcnt.
o) Fix literal 4s that are supposed to be sizeof (u_long).
   XXX Why the * 2 here?  Is this an artifact of a different system that this
       code came from?  We seem to allocate twice as much space for intrcnt
       as we admit to in sintrcnt.
2012-03-10 05:38:04 +00:00
Juli Mallett
9ea99cd3b5 "Did you still want the not yet? I think we just arrived at yet."
Submitted by:	thompsa
2012-03-09 09:32:20 +00:00
Juli Mallett
f6f8319094 Enable COMPAT_FREEBSD32 for the Octeon kernel config by default. 2012-03-09 07:53:44 +00:00
Juli Mallett
3812e6817b Get rid of duplicated versions of the KSU bits. 2012-03-06 23:08:02 +00:00
Aleksandr Rybalko
7283f2ff0f Break long lines.
Approved by:	adri (mentor)
2012-03-06 22:45:54 +00:00
Aleksandr Rybalko
b906a7a912 Remove EoL whitespaces.
Approved by:	adri (mentor)
2012-03-06 22:16:10 +00:00
Juli Mallett
e13dfc355c Remove unused file. 2012-03-06 20:23:29 +00:00
Attilio Rao
9c170fd168 Disable the option VFS_ALLOW_NONMPSAFE by default on all the supported
platforms.
This will make every attempt to mount a non-mpsafe filesystem to the
kernel forbidden, unless it is expressely compiled with
VFS_ALLOW_NONMPSAFE option.

This patch is part of the effort of killing non-MPSAFE filesystems
from the tree.

No MFC is expected for this patch.
2012-03-06 20:01:25 +00:00
Juli Mallett
723616952d At the risk of reducing source compatibility with old NetBSD and Sprite:
o) Get rid of some unused macros related to features we don't intend to
   provide.
o) Get rid of macro definitions for MIPS-I CPUs.  We are not likely to
   support anything that predartes MIPS-III.
o) Respell MIPS3_* macros as MIPS_*, which is how most of them were being
   used already.
o) Eliminate a duplicate and mostly-unused set of exception vector macros.

There's still considerable duplication and lots more obsolete in our headers,
but this reduces one of the larger files to a size where one could reckon
about the correctness of its contents with a mere few hours of contemplation.

There is, of course, a question of whether we need definitions for fields,
registers and configurations that we are unlikely to ever use or implement,
even if they're not obsolete since 1991.  FreeBSD is not a processor
reference manual, and things that aren't used may be wrong, or may be
duplicated because nobody could possibly actually know whether they're
already defined.
2012-03-06 19:01:32 +00:00
Juli Mallett
0b94059f12 Garbage collect some unused symbols. 2012-03-06 08:40:21 +00:00
Juli Mallett
8e09ecbf10 Make the native sigreturn just wrap set_mcontext, much as freebsd32_sigreturn
does.
2012-03-06 08:10:48 +00:00
Juli Mallett
6fa3bc4f91 Store TLS base in the sigframe just as is done in freebsd32_sendsig. Because
the native sigreturn doesn't use set_mcontext like the COMPAT_FREEBSD32 version
does, this wouldn't actually result in overwriting the TLS base.  Probably it
makes sense to restructure the native sigreturn to use set_mcontext for
consistency, and to allow sigreturn to change the TLS base.
2012-03-06 08:02:10 +00:00
Juli Mallett
bdf4700515 Fix two and a half oversights in COMPAT_FREEBSD32 related to contexts and
TLS:
o) The mc_tls field used to store the TLS base when doing context gets and
   restores was left a pointer and not converted to a 32-bit integer.  This
   had the bug of not correctly capturing the TLS value desired by the user,
   and the extra nastiness of making the structure the wrong size.
o) The mc_tls field was not being saved by sendsig.  As a result, the TLS base
   would always be set to NULL when restoring from a signal handler.

Thanks to gonzo for helping track down a bunch of other TLS bugs that came out
of tracking these down.
2012-03-06 07:50:45 +00:00
Juli Mallett
22c6822677 When emulating rdhwr for TLS, use the 32-bit offset under COMPAT_FREEBSD32. 2012-03-06 07:47:28 +00:00
Oleksandr Tymoshenko
081fc905e2 Prepare for large TLS redo. Save pointer to the beginning of TLS area,
and offset it only if requested by RDHWR handler. Otherwise things
    get overly complicated - we need to track whether address passsed in
    request for setting td_md.md_tls is already offseted or not.
2012-03-06 03:25:50 +00:00
Juli Mallett
fb3c16bc48 In the trap messages that aid the primitive debugging environment of MIPS,
include the tid as well, so it's easier to tell which thread of a process
with multiple is responsible for a crash.
2012-03-06 02:23:15 +00:00
Juli Mallett
2bd5a2588e Fix tls base computation with COMPAT_FREEBSD32 on n64 kernels. The previous
version was missing an else and would always use the n64 TP_OFFSET.  Eliminate
some duplication of logic here.

It may be worth getting rid of some of the ifdefs and introducing gratuitous
SV_ILP32 runtime checks on n64 kernels without COMPAT_FREEBSD32 and on o32
kernels, similarly to how PowerPC works.
2012-03-04 05:19:55 +00:00
Juli Mallett
87775fcd35 Unbreak n64 build without COMPAT_FREEBSD32 by fixing mismatched preprocessor
conditionals.
2012-03-03 10:22:49 +00:00
Juli Mallett
9624d94701 o) Add COMPAT_FREEBSD32 support for MIPS kernels using the n64 ABI with userlands
using the o32 ABI.  This mostly follows nwhitehorn's lead in implementing
   COMPAT_FREEBSD32 on powerpc64.
o) Add a new type to the freebsd32 compat layer, time32_t, which is time_t in the
   32-bit ABI being used.  Since the MIPS port is relatively-new, even the 32-bit
   ABIs use a 64-bit time_t.
o) Because time{spec,val}32 has the same size and layout as time{spec,val} on MIPS
   with 32-bit compatibility, then, disable some code which assumes otherwise
   wrongly when built for MIPS.  A more general macro to check in this case would
   seem like a good idea eventually.  If someone adds support for using n32
   userland with n64 kernels on MIPS, then they will have to add a variety of
   flags related to each piece of the ABI that can vary.  That's probably the
   right time to generalize further.
o) Add MIPS to the list of architectures which use PAD64_REQUIRED in the
   freebsd32 compat code.  Probably this should be generalized at some point.

Reviewed by:	gonzo
2012-03-03 08:19:18 +00:00
Juli Mallett
4228a524fd When creating a handle for a subregion, be sure to actually math out the new
handle address, where we're using handles as raw addresses.

This fixes devices with subregions on Octeon PCI specifically, and likely also on
MIPS more generally, where there isn't another bus_space in use that was doing the
math already.
2012-03-02 21:46:31 +00:00
Juli Mallett
7b7463a5d2 If an Atheros device is attached to an Octeon, it's going to be by PCI. 2012-03-02 21:44:39 +00:00
Juli Mallett
3b7eabb569 Unbreak SMP on stock Octeon systems -- copy the core_mask from bootinfo into
sysinfo.  This should have been done as part of replacing bootinfo with sysinfo.
2012-03-02 20:34:15 +00:00
John Baldwin
831ce4cb3d - Change contigmalloc() to use the vm_paddr_t type instead of an unsigned
long for specifying a boundary constraint.
- Change bus_dma tags to use bus_addr_t instead of bus_size_t for boundary
  constraints.

These allow boundary constraints to be fully expressed for cases where
sizeof(bus_addr_t) != sizeof(bus_size_t).  Specifically, it allows a
driver to properly specify a 4GB boundary in a PAE kernel.

Note that this cannot be safely MFC'd without a lot of compat shims due
to KBI changes, so I do not intend to merge it.

Reviewed by:	scottl
2012-03-01 19:58:34 +00:00
Oleksandr Tymoshenko
f3318c38dc Revert part of old logic of assigning MAC addressess:
- Reserver respective number of addresses for managment port
- octm uses base address directly
- other drivers get MACs on "first come first served" basis

Reviewed by:	juli
2012-02-29 05:48:29 +00:00
Gavin Atkinson
1748d1e513 Correct capitalization of "Hz" in user-visible text (manpages, printf(),
etc).

MFC after:	3 days
2012-02-28 13:19:34 +00:00
Oleksandr Tymoshenko
57fa7d3101 Refctor address assignment for Octeon's ethernet ports:
- Centralize address assignment
- Make sure managment ports get first MAC address in pool
- Properly propagate fail if address allocation failed

Submitted by:	Andrew Duane <aduane@juniper.net>
2012-02-22 01:30:25 +00:00
Robert Watson
79f9811409 When initialising the CP0 status register during boot on 64-bit MIPS,
set all three of the kernel, supervisor, and user-mode 64-bit mode
flags.  While FreeBSD does not currently use the supervisor ring (and
hence this is effectively a NOP on most systems), doing this avoids
triggering an exception on 64-bit MIPS CPUs that don't support 32-bit
compatibility mode, and therefore don't allow clearing the SX bit.

Reviewed by:	gonzo
MFC after:	3 days
Sponsored by:	DARPA, SRI International
2012-02-14 20:34:25 +00:00
Oleksandr Tymoshenko
4c322abc56 - Reverse logic so base tls is fixed up with correct number 2012-02-10 23:24:33 +00:00
Oleksandr Tymoshenko
bdbf2b0837 - Fix spelling of R_MIPS_RELGOT
- Add R_MIPS_JALR relocation
- Add TLS relocation types

Obtained from:	NetBSD
2012-02-10 19:17:14 +00:00
Oleksandr Tymoshenko
d328a1b2f3 Fix-up value passed by thr_new syscall to make it compatible
with MIPS_TLS_GET/MIPS_TLS_SET sysarch API.
2012-02-10 07:03:45 +00:00
Oleksandr Tymoshenko
8d26fe2af5 Fix n32 build breakage 2012-02-09 22:48:35 +00:00
Oleksandr Tymoshenko
2675d18f77 - Emulate RDHWR instruction for TLS support
Reading register $29 with RDHWR is becoming the de-facto standard to
implement TLS.  According to linux-mips wiki, MIPS Technologies has
reserved hardware register $29 for ABI use.  Furthermore current GCC
makes the following assumptions:
- RDHWR is natively available or otherwise emulated by the kernel
- Register $29 holds the TLS pointer

Submitted by:	Robert Millan <rmh@debian.org>
2012-02-09 22:17:13 +00:00
David Schultz
2ee7b1d4ae Add C11 macros describing subnormal numbers to float.h.
Reviewed by:	bde
2012-01-23 06:36:41 +00:00
Oleksandr Tymoshenko
cccc098d9b We use port_index field of struct octusb_qh to reference USB state
of root HUB. Although it is initialized with port index of the
device's parent hub, which is worng. So track the USB tree up to
root HUB  and initialize this filed ptroprly

Rename port_index to root_port_index in order to reflect its
real semantics.
2012-01-20 23:37:04 +00:00
David Schultz
9fa03ecd01 Add parentheses where required. Without them, `sizeof LDBL_MAX'
is a syntax error and shouldn't be, while `1 FLT_ROUNDS' isn't a
syntax error and should be.  Thanks to bde for the examples.
2012-01-20 06:51:41 +00:00
David Schultz
cb659153f9 Fix the value of float_t to match what is implied by FLT_EVAL_METHOD. 2012-01-16 20:17:51 +00:00
David Schultz
89c570d28d Remove a confused comment and fix some minor bugs. 2012-01-16 05:23:27 +00:00
Adrian Chadd
a2d4a78a47 Stop overloading opt_global.h. 2012-01-16 05:07:32 +00:00
Adrian Chadd
46efd63a5b Build some more things (random, bridge/gif/gre, gpio, USB) as modules as well
so some embedded platform builds can use these instead of a fully monolithic
kernel.
2012-01-15 19:43:56 +00:00
Adrian Chadd
7fb4a4be07 Some of the atheros based embedded devices use one or more PCI NICs
on-board, glued to the AR71xx CPU.  These may forgo separate WMAC EEPROMs
(which store configuration and calibration data) and instead store
it in the main board SPI flash.

Normally the NIC reads the EEPROM attached to it to setup various PCI
configuration registers.  If this isn't done, the device will probe as
something different (eg 0x168c:abcd, or 0x168c:ff??.)  Other setup registers
are also written to which may control important functions.

This introduces a new compile option, AR71XX_ATH_EEPROM, which enables the
use of this particular code.  The ART offset in the SPI flash can be
specified as a hint against the relevant slot/device number, for example:

hint.pcib.0.bus.0.17.0.ath_fixup_addr=0x1fff1000
hint.pcib.0.bus.0.18.0.ath_fixup_addr=0x1fff5000

TODO:

* Think of a better name;
* Make the PCIe version of this fixup code also use this option;
* Maybe also check slot 19;
* This has to happen _before_ the SPI flash is set from memory-mapped
  to SPI-IO - so document that somewhere.
2012-01-15 19:29:33 +00:00
Oleksandr Tymoshenko
547cfad16d Fix backtrace for MIPS64:
- Properly print 64-bit addresses
    - Get whole 64 bits of address using kdbpeekd
    - Make check for kernel address compatible with MIPS64
2012-01-13 23:31:36 +00:00
Oleksandr Tymoshenko
33b570d348 - Fix .rela case of R_MIPS_26 relocation. Addednds save diferently for
.rel and .rela sections. It's shifted right two bits for former
   but saved as-is for latter.
2012-01-13 07:00:47 +00:00
Oleksandr Tymoshenko
3a51efc5df Fix relocations for MIPS64:
- Use Elf32_Addr as default, the only field that is
        64 bitw wide is R_MIPS_64
    - Add R_MIPS_HIGHER and R_MIPS_HGHEST handlers
    - Handle R_MIPS_HI16 and R_MIPS_LO16 for both .rel and
        .rela sections
2012-01-08 05:44:19 +00:00
Oleksandr Tymoshenko
70d3600fdf Fix DDB x/i addr[,count] command for count > 1 case 2012-01-08 00:34:39 +00:00
Adrian Chadd
93e26ff438 Fix the ar724x shift calculation when writing to the PCI config space.
This was preventing the ath driver from being loaded at runtime.
It worked fine when compiled statically into the kernel but not when
kldload'ed after the system booted.

The root cause was that PCIR_INTLINE (register 60) was being
overwritten by zeros when register 62 was being written to.
A subsequent read of this register would return 0, and thus
the rest of the PCI glue assumed an IRQ resource had already
been allocated.  This caused the device to fail to attach at
runtime as the device itself didn't contain any IRQ resources.

TODO: go back over the ar71xx and ar724x PCI config read/write
code and ensure it's correct.
2012-01-07 04:13:25 +00:00
Oleksandr Tymoshenko
6cc1d135cd - Add better COP2 (crypto coprocessor) context handler for Octeon. Keep
COP2 disabled and lazily allocate COP2 context structure in exception
    handler. Keep kernel and userland contexts separated.
2012-01-06 01:23:26 +00:00
Adrian Chadd
8f5aa976d7 This isn't required any longer - it turns out the flash
has ~ 1.7MB of space for a kernel.  There's thus plenty of
space for a full, non-module kernel.
2012-01-05 07:19:05 +00:00
Adrian Chadd
b018dade46 Use geom_uncompress now, rather than geom_uzip.
This results in a much smaller rootfs image and it easily
fits in the 8MB flash.
2012-01-05 03:38:34 +00:00
Andreas Tobler
3079d69f90 Apply the same change as in r229494.
Requested by: ed
2012-01-04 16:07:16 +00:00
Oleksandr Tymoshenko
1f74cf8ccf - Octeon-SDK strictly requires multi_count to be zero for
full and low speed devices.
2012-01-03 19:10:37 +00:00
Oleksandr Tymoshenko
af8b177113 - Properly set IRQ handlers for all USB ports 2012-01-01 09:12:21 +00:00
Adrian Chadd
a92de4a5f6 This particular work around isn't required any longer, now that the
11n radio backends are also added into the RF linker set.

This saves around 7k from the kernel binary.
2011-12-31 23:41:19 +00:00
Oleksandr Tymoshenko
868fb4d19b - struct clocktime sets different ranges for DOW and month
comparing to struct timeval. for clocktime they should be
    1..7 and 1..12 respectively

- CAPK-0100ND uses RTC without centruy bit (DS1307) so set it 21st
2011-12-31 23:21:36 +00:00
Adrian Chadd
b2e6077c31 Oops - this was referencing a local file, which I've done away with. 2011-12-31 15:56:00 +00:00
Oleksandr Tymoshenko
9db595847a - Pass proper endpoint number (without direction flag) to
cvmx_usb_open_pipe
2011-12-31 05:45:10 +00:00
Adrian Chadd
38192bfc9f Add a configuration file for the Atheros PB47 reference board.
This is an AR71xx based board with 8MB flash, 64MB RAM, a
Mini-PCI+ slot (see below) and a single 10/100/1000baseT
ethernet port.  It also has two USB ports.

This is an easier board than most to add as it doesn't have a
switch PHY on-board.  This made it (mostly) trivial to craft a
working configuration.

Things to note:

* This, like most other reference boards, use uboot rather then
  redboot.  It means that you typically have to manually flash
  both the kernel and rootfs partitions.

* Since there's currently no (nice) way to extract out the
  ethernet MAC and RAM from the uboot environment, the RAM
  will default to 32mb and the MAC will be something very
  incorrect.   I'll try to fix this up in a subsequent commit
  or two, even if it's just some hard-coded nonsense in
  ar71xx_machdep.c for now.

* The board is designed for a specific model of mini-PCI+
  NIC which never made it into production.  Normal mini-PCI
  NICs will work fine; if you happen to have the NIC in question
  then it will work fine with this board.
2011-12-30 09:48:35 +00:00
Adrian Chadd
687021dd92 Add a couple of missing wlan modules. 2011-12-30 09:39:24 +00:00
Marcel Moolenaar
abc9d2bbc7 Remove trailing white-space. 2011-12-30 03:54:22 +00:00
John Baldwin
b494482f39 Use curthread rather than PCPU_GET(curthread). 'curthread' uses
special-case optimizations on several platforms and is preferred.

Reported by:	dim (indirectly)
MFC after:	2 weeks
2011-12-29 16:40:54 +00:00
Adrian Chadd
425fc5768b Flesh out the RSPRO GPIO config, including the RF LED. 2011-12-29 06:07:24 +00:00
Adrian Chadd
530028c9d6 Break out the AR71XX config file into _BASE and board specific
bits.

The ROUERSTATION and RSPRO variants contain:

* the board specific bits (eg the RTC for RSPRO, later on it'll
  include the GPIO/LED definitions);
* the boot specific bits (eg, on-board flash, usb flash, etc).

For now the AR71XX_BASE file contains the common board config,
drivers and net80211/ath wireless drivers.

I'll follow this up with config files for the other boards I
have (eg the Ubiquiti LSSR71, as well as some Mikrotik boards
that use the AR71XX and atheros reference boards) which will
be quite easy to do now.
2011-12-29 05:51:48 +00:00
Oleksandr Tymoshenko
6b194c7ade - Add generic GPIO driver for Cavium Octeon. At the moment pin definition is
hardcoded but will be changed later with more flexible way to define them.
2011-12-28 05:57:03 +00:00
Oleksandr Tymoshenko
27e093e7f4 - Initialize compact_flash_attribute_base_addr from bootinfo structure 2011-12-24 23:15:25 +00:00
Oleksandr Tymoshenko
5a312a4a9a - Set CF physical address base in sysinfo structure 2011-12-23 22:10:55 +00:00
Adrian Chadd
ddd7699151 Remove these locks - they aren't strictly needed and cause measurable
performance issues.

* Access to the GPIO bus is already locked by requesting
  and releasing the bus - thus the lock isn't really needed
  for each GPIO pin change.
* Don't lock and unlock the GPIO bus for -each- i2c access -
  the i2c bus code is already doing this by calling the upper
  layer callback to request/release the bus. This thus locks
  the bus for the entirety of the transaction.

TODO:

* Further verify that everything is correctly requesting/
  releasing the GPIO bus.
* Look at how to lock the GPIO pin configuration stuff,
  potentially by locking/unlocking the bus at the gpiobus
  layer.
2011-12-20 00:33:56 +00:00
Bjoern A. Zeeb
3b29d0033d Unbreak the OCTEON1 kernel build after r228483 removing the left over
declaration.

MFC after:	11 days
2011-12-17 15:42:37 +00:00
Andriy Gapon
9976156f12 kern cons: introduce infrastructure for console grabbing by kernel
At the moment grab and ungrab methods of all console drivers are no-ops.

Current intended meaning of the calls is that the kernel takes control of
console input.  In the future the semantics may be extended to mean that
the calling thread takes full ownership of the console (e.g. console
output from other threads could be suspended).

Inspired by:	bde
MFC after:	2 months
2011-12-17 15:08:43 +00:00
Adrian Chadd
3f9bdcef12 * Add in the gpio/gpioled drivers into AR91XX_BASE.
* Add in a default GPIO section for AR91XX_BASE.hints, which doesn't
  define the GPIO function masks or any GPIO pines.
* Add in the GPIO line definitions for LEDs and GPIO pins for the
  TP-WR1043nd.

I've verified the LEDs work fine using gpioset.
2011-12-15 01:05:38 +00:00
Adrian Chadd
19ac3f84d0 Re-jiggle the GPIO code a little to remove the hard-coded AR71xx GPIO
config and function mask setup.

* "gpiomask" now specifies which GPIO pins to enable, for devices to bind to.
* "function_set" allows bits in the function register to be set at GPIO setup.
* "function_clear" allows bits in the function register to be cleared at
  GPIO setup.

The function_set/function_clear bits allow for individual GPIO pins to either
drive a GPIO line or an alternate function - eg USB, JTAG, etc. This allows
for things like CS1/CS2 be enabled for those boards w/ >1 SPI device connected,
or disabling JTAG for the AR7240 (which is apparently needed ..)

I've verified this on the AR71xx.
2011-12-15 01:03:49 +00:00
Hans Petter Selasky
2e14174893 Implement better support for USB controller suspend and resume.
This patch should remove the need for kldunload of USB
controller drivers at suspend and kldload of USB controller
drivers at resume.

This patch also fixes some build issues in avr32dci.c

MFC after:	2 weeks
2011-12-14 00:28:54 +00:00
Ed Schouten
53627e400f Replace __signed by signed.
The signed keyword is an integral part of the C syntax. There's no need
to use __signed.
2011-12-13 13:38:03 +00:00
Adrian Chadd
34415ac907 Style(9) changes. 2011-12-13 05:13:51 +00:00
Jayachandran C.
d42a1129cb Disable KDB/DDB options for XLP N32 compile.
n32 abi is not supported in KDB/DDB yet, disable the option in
XLPN32 conf.

Reported by:	gonzo, bz
2011-12-05 03:18:40 +00:00
Jayachandran C.
6e065b1baa Fix N32 compilation again for XLP.
Disable DDB/KDB related options for N32, and add back a cast that was
lost during the last set of updates.

Reported by:	gonzo, bz
2011-12-05 03:10:01 +00:00
Jayachandran C.
b10ea0872a Fix XLP compilation.
Add definitions of LSU_DEBUG_ADDR and LSU_DEBUG_DATA0, the code that uses
it was added in r227799

Reported by:	gonzo
2011-12-05 02:56:08 +00:00
Oleksandr Tymoshenko
2b8895cd74 - Fix backtrace for MIPS64 platform 2011-11-28 19:48:04 +00:00
Oleksandr Tymoshenko
ba3ba72812 - Copy base MAC address from bootinfo descriptor to sysinfo struct
Reviewed by:	Andrew Duane
2011-11-28 19:28:29 +00:00
Aleksandr Rybalko
098edc8725 Simplify arge_flush_ddr to use updated ar71xx_device_flush_ddr_ge(unit).
Approved by: adrian (mentor)
2011-11-28 13:42:59 +00:00
Gleb Smirnoff
e63fe86b27 Fix build, fininshing r228018. 2011-11-28 08:10:12 +00:00
Aleksandr Rybalko
e319e32c90 Join chip depended methods for arge0 and arge1 into single call with unit.
Approved by: adrian (mentor)
2011-11-27 11:15:59 +00:00
Marius Strobl
b9c7618836 Change another instance of amd(4) to esp(4) missed in r227006.
Submitted by:	Garrett Cooper
MFC after:	3 days
2011-11-26 18:47:09 +00:00
Adrian Chadd
b010577828 I've had verification that the second-last 64k is actually used by the tplink
firmware to store configuration data.

It's safe to overwrite it.
2011-11-24 15:12:57 +00:00
Adrian Chadd
019d307f35 Now that I've brought up FreeBSD via flash, I've discovered that
the second-last 64k seems to be the default firmware board configuration
area.

Since I have no idea whether uboot uses it or not - and it's prefixed
with an atheros eeprom signature (0xaa55), I figure the safest thing
to do is mark it as read-only.

I've modified my local tplink firmware building program to generate
a board configuration section - which is separate to this partition.
It's located in the 64k _before_ this particular 64k.

The firmware build program from OpenWRT never initialises those
values and the firmware images from tplink also leave it 0x0, so I
don't currently know what the exact, correct details should be.
2011-11-24 07:37:19 +00:00
Adrian Chadd
b1214c6893 Flip on AR71XX_ENV_UBOOT so the environment variables are properly
processed. (Which is to say they're currently ignored.)
2011-11-24 07:33:41 +00:00
Adrian Chadd
1c3ed0a410 Introduce a new (global, sorry!) option which controls whether
the ar71xx platform code should assume a uboot or redboot environment.

The current code gets very confused (and just crashes) on a uboot
environment, where each attribute=value pair is in a single entry.
Redboot on the other hand stores it as "attribute", "value", "attribute",
"value", ...

This allows the kernel to boot on a TP-LINK TL-WR1043ND from flash,
where the uboot environment gets setup. This didn't show up during a netboot
as "tftpboot" and "go" don't setup the uboot environment variables.
2011-11-24 07:32:52 +00:00
Adrian Chadd
35d1603e8a Flesh out a geom_map setup, so the kernel can be squeezed _onto_ the device.
The default flash layout gives only 1 megabyte for the kernel, gzipped.
The uboot firmware running on this device only supports gzip, not lzma, so
we actually _do_ have to try and slim the kernel down a bit.

But, since I can't actually do that at the present, I'm opting to:

* extend the kernel from 1mb to 2mb;
* have rootfs fill the rest of that, save 64k;
* eventually I'll hide a 64k config partition at the end, between the
  end of rootfs and the ART (radio configuration data.)

The uboot firmware doesn't care about the partition layout. It just
expects the kernel application image to sit at 0xbf020000 (right after
the 128k uboot image.) The uboot header isn't actually read either -
it's "faked" from a "tplink" flash image header. So as long as the
map configuration here matches what is being written out via the
tplink firmware generator, everything is a-ok.
2011-11-24 04:39:01 +00:00
Adrian Chadd
5c85f74c64 Compile in the right bits so the AR9130 WMAC support functions correctly.
A previous commit disabled compiling the AR9130 support in the default
HAL build in the kernel. Since the AR9130 support won't actually function
without AH_SUPPORT_AR9130 (and that abomination needs to be undone at some
point, in order to allow USB 11n NICs to also work), we now have to
explicitly compile it in.

But since the 11n RF backends don't (currently) join the RF linker set,
one has to compile in _an_ RF backend for the HAL to compile.
2011-11-24 04:34:04 +00:00
Adrian Chadd
68d31a0864 Add a comment documenting where the WMAC hangs off of.
At some point it would be nice to correctly update the bus glue to make
this "correct", including having the DDR flush occur in the right spot
(ie, any AHB interrupt.)
2011-11-24 04:23:42 +00:00
Adrian Chadd
4a66e3c76d Flip on these debugging options by default. This is -HEAD after all. 2011-11-24 04:21:19 +00:00
Adrian Chadd
bf3ee21b8c Slim the default build down a little:
* Disable the NFS client, it's not needed for booting off of flash.
* Don't compile in softdep, snapshots, ufs acls and directory hashing.
2011-11-24 04:19:02 +00:00
Hans Petter Selasky
3b12bdb58f Rename device_delete_all_children() into device_delete_children().
Suggested by:	jhb @ and marius @
MFC after:	1 week
2011-11-22 21:56:55 +00:00
Marius Strobl
4b7ec27007 - There's no need to overwrite the default device method with the default
one. Interestingly, these are actually the default for quite some time
  (bus_generic_driver_added(9) since r52045 and bus_generic_print_child(9)
  since r52045) but even recently added device drivers do this unnecessarily.
  Discussed with: jhb, marcel
- While at it, use DEVMETHOD_END.
  Discussed with: jhb
- Also while at it, use __FBSDID.
2011-11-22 21:28:20 +00:00
Jayachandran C.
a541c47546 Do dcache flush on CPU core before enabling threads.
The dcache flush has to be done using the core control registers before
splitting the L1D cache by enabling the hardware threads.

Also replace .word calls for mfcr/mtcr with a C macro.

In collaboration with: prabhath at netlogicmicro com
2011-11-21 16:43:24 +00:00
Jayachandran C.
452f22c389 Merge XLP 3XX updates and related rework.
* Update message station (CMS) code, read queue ids from PCI header.
* Use interrupts to wakeup message handling threads on 3XX
* Update PIC code, read interrupt information from PCI header instead
  of using fixed values.
* Update PCI interrupt handling for the PIC change.
* Update code for getting chip frequency, new code support XLP 3XX
* Misc style(9) fixes

In collaboration with: prabhath at netlogicmicro com (CMS/PIC)
                       venkatesh at netlogicmicro.com (PCI)
2011-11-21 08:12:36 +00:00
Jayachandran C.
fb1677186a XLP processors have the release 2 pagegrain register
Add accessors to cpufunc.h

Obtained from:	prabhath at netlogicmicro com
2011-11-21 07:55:37 +00:00
Adrian Chadd
31bdaf633c Always leave the -current kernel debugging options on. 2011-11-21 06:45:12 +00:00
Jayachandran C.
e8f1d9c88b Remove unused variable ubase.
This vaiable is initialized but not used.
2011-11-19 15:08:49 +00:00
Jayachandran C.
b0250abec6 Remvoe unused file
mips/nlm/uart_cpu_xlp.c has replaced uart_bus_xlp_iodi.c
2011-11-19 15:01:09 +00:00
Jayachandran C.
f48a19aa93 Fix USB compilation, and add USB options to XLP conf
Remove obsolete header file included in usb_init.c
2011-11-19 14:33:14 +00:00
Jayachandran C.
b2f4d7679b Fixup cache flush definitions for XLP
mco_icache_sync_range was earlier set to mipsNN_icache_sync_range_index_32
which is not necessary, revert this.
Also, the data cache is coherent so write back is not really needed. This
change is experimental.
2011-11-19 14:14:35 +00:00
Jayachandran C.
0dc79f3cc1 Whitespace fixes in XLP HAL files.
Also fixup a macro in iomap.h
2011-11-19 14:06:15 +00:00
Jayachandran C.
c82deda35b Rearrange XLP configuration files.
Create std.XLP for configuration options, which is included by the
conf files. The files XLP, XLPN32 and XLP64 will have mostly ABI related
options.

Also move uart and pci to mips/nlm/std.xlp since all XLP configurations
needs these devices.

Obtained from:	prabhath at netlogicmicro com (intial version)
2011-11-18 11:18:59 +00:00
Jayachandran C.
eeb41c230d Fix COP0 hazards for XLR and XLP
The XLR CPUs do not have any software visible hazards for COP0 operations.
On XLP the hazard is a ehb, since it is mips64r2.
2011-11-18 09:30:24 +00:00
Jayachandran C.
cca2c4b446 Do pmap update only on active CPUs.
The pmap update_page/invalidate_page/invalidate_all operations has to be
done only on active cpus. In the simplest case, if the process is not
active on any other CPUs, we can just do the operation on the current CPU.

This change replaces the call to smp_rendezvous() for these operations with
smp_rendezvous_cpus() in case there more than one active CPU, or with a direct
function call if there is just one active CPU.

This change give significant performance increase in fork/exec benchmarks
on XLR/XLS/XLP with 32 cpus.

Reviewed by:	alc
2011-11-17 13:14:59 +00:00
Attilio Rao
ed1f6dc235 Introduce the option VFS_ALLOW_NONMPSAFE and turn it on by default on
all the architectures.
The option allows to mount non-MPSAFE filesystem. Without it, the
kernel will refuse to mount a non-MPSAFE filesytem.

This patch is part of the effort of killing non-MPSAFE filesystems
from the tree.

No MFC is expected for this patch.

Tested by:	gianni
Reviewed by:	kib
2011-11-08 10:18:07 +00:00
Ed Schouten
6472ac3d8a Mark all SYSCTL_NODEs static that have no corresponding SYSCTL_DECLs.
The SYSCTL_NODE macro defines a list that stores all child-elements of
that node. If there's no SYSCTL_DECL macro anywhere else, there's no
reason why it shouldn't be static.
2011-11-07 15:43:11 +00:00
Alan Cox
8393768074 Add support for VM_ALLOC_WIRED and VM_ALLOC_ZERO to vm_page_alloc_freelist()
and use these new options in the mips pmap.

Wake up the page daemon in vm_page_alloc_freelist() if the number of free
and cached pages becomes too low.

Tidy up vm_page_alloc_init().  In particular, add a comment about an
important restriction on its use.

Tested by:	jchandra@
2011-11-02 05:42:51 +00:00
David Schultz
a50079b7ff People porting FreeBSD to new architectures ought not have to
implement a deprecated FPU control interface in addition to the
standard one.  To make this clearer, further deprecate ieeefp.h
by not declaring the function prototypes except on architectures
that implement them already.

Currently i386 and amd64 implement the ieeefp.h interface for
compatibility, and for fp[gs]etprec(), which doesn't exist on
most other hardware.  Powerpc, sparc64, and ia64 partially implement
it and probably shouldn't, and other architectures don't implement it
at all.
2011-10-21 06:41:46 +00:00
Jayachandran C.
85dac049c1 Keep FDT options commented until dtc is build by default for mips
Otherwise automated builds will fail for XLP and XLP64
2011-10-19 14:38:01 +00:00
Jayachandran C.
29550c285c Fix wakeup latency when sleeping with 'wait'
If we handle an interrupt just before the 'wait' and the interrupt
schedules some work, we need to skip the 'wait' call. The simple solution
of calling sched_runnable() with interrupts disabled immediately before
wait still leaves a window after the call and before 'wait' in which
the same issue can occur.

The solution implemented is to check the EPC in the interrupt handler, and
if it is in a region before the 'wait' call, to fix up the EPC to skip the
wait call.

Reported/analysed by:	adrian
Fix suggested by:	kib

Reviewed by:	jmallett, imp
2011-10-18 16:37:28 +00:00
Jayachandran C.
a7e054044c Fix XLP compile failure on n32 abi.
Reported by:	bz@
2011-10-18 14:05:18 +00:00
Jayachandran C.
8291dd8a41 Support for booting XLP using FDT.
- update xlp_machdep.c to read arguments from FDT if FDT support is
  compiled in.
- define rmi_uart_bus_space, and use it as fdtbus_bs_tag
- update conf files for FDT support
- add default dts file xlp-basic.dts
2011-10-18 08:10:23 +00:00
Jayachandran C.
29a99755a9 FDT support for MIPS.
Add architecture specific files needed to compile MIPS with
flattened device tree support.
2011-10-18 07:29:21 +00:00
Pyun YongHyeon
57c81d92ae Close a race where SIOCGIFMEDIA ioctl get inconsistent link status.
Because driver is accessing a common MII structure in
mii_pollstat(), updating user supplied structure should be done
before dropping a driver lock.

Reported by:	Karim (fodillemlinkarimi <> gmail dot com)
2011-10-17 19:49:00 +00:00
Jayachandran C.
c0959978ec Fix for crash on MIPS /dev/mem read.
Reading /dev/mem in 64 bit kernel crashes.  This is because the page
used to call uiomove_fromphys() from memrw() does not have md.pv_list
initialized correctly.

The fix is to call pmap_page_init() on the page to initialize it.
2011-10-17 05:42:53 +00:00
Eitan Adler
36daf0495a - change "is is" to "is" or "it is"
- change "the the" to "the"

Approved by:	lstewart
Approved by:	sahil (mentor)
MFC after:	3 days
2011-10-16 14:30:28 +00:00
Konstantin Belousov
6bfe4c78c8 Remove unused define.
MFC after:	1 month
2011-10-07 16:09:44 +00:00
Konstantin Belousov
877012982b Convert MIPS to the syscallenter/syscallret system call sequence handlers.
This was the last architecture used custom syscall entry sequence.

Reviewed, debugged, tested and approved by:	jchandra
MFC after:	1 month
2011-10-06 17:34:43 +00:00
Marcel Moolenaar
eed142e1e9 Add default address for FLASH mapping on the boot bus.
Reviewed by: jmallett, marcel
Obtained from: Juniper Networks, Inc
Author: Andrew Duane
2011-10-04 20:30:15 +00:00
Marcel Moolenaar
4699b5e472 Remove octeon_bootinfo from all files except octeon_machdep.c.
Use instead cvmx_sysinfo_get() consistently.

Reviewed by: jmallett, marcel
Obtained from: Juniper Networks, Inc
Author: Andrew Duane
2011-10-04 20:17:43 +00:00
Marcel Moolenaar
f11e3710b0 Remove bogus and wrong definition of BLKDEV_IOSIZE.
Wrong in that it must be guarded (it's configurable)
and bogus in that there's absolutely no rationale for
it not default to a page size like all other archs.
2011-10-04 18:06:08 +00:00
Marcel Moolenaar
9bcaa49a30 o Clean up some ID printfs, and put under bootverbose
o   Remove redundant lookups of base address in cf_identify
o   Fix some indenting issues
o   Fix an identification bug that uses DRQ to checlk for ident block
    returned. The correct spec is to look for BSY to be cleared.

Reviewed by: imp, marcel
Obtained from: Juniper Networks, Inc
Author: Andrew Duane
2011-10-04 18:03:55 +00:00
Marcel Moolenaar
2873abdc12 Partially revert r224661:
octeon_ap_boot is not a bitmask. It holds the CPU Id of the
AP currently being started. As such there's no need to make
it a 64-bit integral and we're not limited to 64 CPUs.

Reported by: jmallet
Obtained from:	Andre Duane
2011-10-04 17:49:19 +00:00
Adrian Chadd
13a2f4943a Disable using wait in cpu_idle() until a better solution to timer and
interrupt handling can be implemented.
2011-10-01 05:56:25 +00:00
Kip Macy
8451d0dd78 In order to maximize the re-usability of kernel code in user space this
patch modifies makesyscalls.sh to prefix all of the non-compatibility
calls (e.g. not linux_, freebsd32_) with sys_ and updates the kernel
entry points and all places in the code that use them. It also
fixes an additional name space collision between the kernel function
psignal and the libc function of the same name by renaming the kernel
psignal kern_psignal(). By introducing this change now we will ease future
MFCs that change syscalls.

Reviewed by:	rwatson
Approved by:	re (bz)
2011-09-16 13:58:51 +00:00
Christian Brueffer
b48f7c4c8d Fix a zyd(4) comment typo that was copy+pasted into most kernel config files.
PR:		160276
Submitted by:	MATSUMIYA Ryo <matsumiya@mma.club.uec.ac.jp>
Approved by:	re (kib)
MFC after:	1 week
2011-09-11 17:39:51 +00:00
Konstantin Belousov
3407fefef6 Split the vm_page flags PG_WRITEABLE and PG_REFERENCED into atomic
flags field. Updates to the atomic flags are performed using the atomic
ops on the containing word, do not require any vm lock to be held, and
are non-blocking. The vm_page_aflag_set(9) and vm_page_aflag_clear(9)
functions are provided to modify afalgs.

Document the changes to flags field to only require the page lock.

Introduce vm_page_reference(9) function to provide a stable KPI and
KBI for filesystems like tmpfs and zfs which need to mark a page as
referenced.

Reviewed by:    alc, attilio
Tested by:      marius, flo (sparc64); andreast (powerpc, powerpc64)
Approved by:	re (bz)
2011-09-06 10:30:11 +00:00
Jayachandran C.
cd4c8d64ff MIPS XLP platform code update.
* Update the hardware access register definitions and functions to bring
  them in line with other Netlogic software.
* Update the platform bus to use PCI even for on-chip devices. Add a dummy
  PCI driver to ignore on-chip devices which do not need driver.
* Provide memory and IRQ resource allocation code for on-chip devices
  which cannot get it from PCI config.
* add support for on-chip PCI and USB interfaces.
* update conf files, enable pci and retain old MAXCPU until we can support
  >32 cpus.

Approved by:	re(kib), jmallett
2011-09-05 10:45:29 +00:00
Attilio Rao
e996900382 Fix a typo in cb_dumpdata() about wrongly calling wdog_kern_pat().
Submitted by:	Andrew Boyer <aboyer at averesystems dot com>
Approved by:	re (kib)
2011-08-13 17:17:04 +00:00
Konstantin Belousov
d98d0ce27a - Move the PG_UNMANAGED flag from m->flags to m->oflags, renaming the flag
to VPO_UNMANAGED (and also making the flag protected by the vm object
  lock, instead of vm page queue lock).
- Mark the fake pages with both PG_FICTITIOUS (as it is now) and
  VPO_UNMANAGED. As a consequence, pmap code now can use use just
  VPO_UNMANAGED to decide whether the page is unmanaged.

Reviewed by:	alc
Tested by:	pho (x86, previous version), marius (sparc64),
    marcel (arm, ia64, powerpc), ray (mips)
Sponsored by:	The FreeBSD Foundation
Approved by:	re (bz)
2011-08-09 21:01:36 +00:00
Marcel Moolenaar
841fed3aa3 Make octeon_ap_boot 64 bits to handle MAXCPU up to 64.
Better construction of CPU mask in platform_cpu_mask().
Release cores still in reset when platform_start_ap() is called.

Reviewed by: imp, marcel
Obtained from: Juniper Networks, Inc
Author: Andrew Duane
Approved by: re (kib)
2011-08-05 22:54:42 +00:00
Attilio Rao
5bfc249c2c Fix for arm and mips case the size of storage for sintrcnt/sintrnames.
It seems that "info as" is not much precise on what expect by pseudo-op
.word, by the way.

No MFC is previewed for this patch.

Tested by:	andreast, pluknet
Approved by:	re (kib)
2011-08-02 17:49:27 +00:00
Attilio Rao
786ef92b7b Bump MAXCPU for amd64, ia64 and XLP mips appropriately.
From now on, default values for FreeBSD will be 64 maxiumum supported
CPUs on amd64 and ia64 and 128 for XLP. All the other architectures
seem already capped appropriately (with the exception of sparc64 which
needs further support on jalapeno flavour).

Bump __FreeBSD_version in order to reflect KBI/KPI brekage introduced
during the infrastructure cleanup for supporting MAXCPU > 32. This
covers cpumask_t retiral too.

The switch is considered completed at the present time, so for whatever
bug you may experience that is reconducible to that area, please report
immediately.

Requested by:	marcel, jchandra
Tested by:	pluknet, sbruno
Approved by:	re (kib)
2011-07-19 13:00:30 +00:00
Attilio Rao
732772c701 On 64 bit architectures size_t is 8 bytes, thus it should use an 8 bytes
storage.
Fix the sintrcnt/sintrnames specification.

No MFC is previewed for this patch.

Reported, reviewed and tested by:	marcel
Approved by:	re (kib)
2011-07-19 12:41:57 +00:00
Attilio Rao
68b739cd6f Add the possibility to specify from kernel configs MAXCPU value.
This patch is going to help in cases like mips flavours where you
want a more granular support on MAXCPU.

No MFC is previewed for this patch.

Tested by:	pluknet
Approved by:	re (kib)
2011-07-19 00:37:24 +00:00
Attilio Rao
521ea19d1c - Remove the eintrcnt/eintrnames usage and introduce the concept of
sintrcnt/sintrnames which are symbols containing the size of the 2
  tables.
- For amd64/i386 remove the storage of intr* stuff from assembly files.
  This area can be widely improved by applying the same to other
  architectures and likely finding an unified approach among them and
  move the whole code to be MI. More work in this area is expected to
  happen fairly soon.

No MFC is previewed for this patch.

Tested by:	pluknet
Reviewed by:	jhb
Approved by:	re (kib)
2011-07-18 15:19:40 +00:00
Jayachandran C.
dafdd69986 Comment out KDB/DDB related options for N32 kernel.
DDB files have warnings in this ABI which will break the kernel build
unless Werror is ignored

Reported by:	bz
2011-07-17 18:51:51 +00:00
Bjoern A. Zeeb
7056457c70 Fix compilation of mips kernels adding apropriate #ifdefs after r224115.
Pointed out by:	Luiz Otavio O Souza (lists.br gmail.com)
2011-07-17 16:50:12 +00:00
Jayachandran C.
ae78a2ad86 MIPS changes for Netlogic XLP support.
This patch adds support for the Netlogic XLP mips64 processors in
the common MIPS code. The changes are :

- Add CPU_NLM processor type
- Add cases for CPU_NLM, mostly were CPU_RMI is used.
- Update cache flush changes for CPU_NLM
- Add kernel build configuration files for xLP.

In collaboration with: Prabhath Raman <prabhathpr at netlogicmicro com>

Approved by:	bz(re), jmallett, imp(mips)
2011-07-16 20:31:29 +00:00
Jayachandran C.
4d91ecaf4c Add MIPS platform files for Netlogic XLP SoC.
Processor, UART, PIC and Messaging Network code. Also add
sys/mips/nlm/hal for on-chip device registers.

In collaboration with: Prabhath Raman <prabhathpr at netlogicmicro com>

Approved by:	bz(re), jmallett, imp(mips)
2011-07-16 19:35:44 +00:00
Jayachandran C.
578828c8d2 Support compiling MIPS elf trampoline with a different ABI.
Allow changing the trampoline ABI with makeoptions, this will allow
us to have a trampoline with a different ABI from the kernel.
Useful in cases where we have to boot a 64 bit kernel from a
bootloader which supports only 32 bit or vice versa.

Approved by:	bz(re), jmallett, imp
2011-07-16 17:22:01 +00:00
Adrian Chadd
1455de1775 The i8259 controller is initialized incorrectly on MALTA. It writes
mask bits to control register and control bits to mask register.

The former causes ICW1_RESET|ICW1_LTIM combination to be written to
control register, which on QEMU results in "level sensitive irq not
supported" error.

Submitted by:	Robert Millan <rmh@debian.org>
2011-07-16 00:30:23 +00:00
Aleksandr Rybalko
861a327be9 Include device rt in RT305X config.
Approved by: adrian (mentor)
2011-07-14 11:53:23 +00:00
Aleksandr Rybalko
b3964335a1 Revert it back. Too many changes for one commit.
Approved by: adrian (mentor)
2011-07-14 11:09:37 +00:00
Aleksandr Rybalko
b5bed41c6c Include device rt in RT305X config and little cleanup.
Approved by: adrian (mentor)
2011-07-14 10:05:28 +00:00
Attilio Rao
470107b2f1 MFC 2011-07-04 11:13:00 +00:00
Alan Cox
80788b2a27 When iterating over a paging queue, explicitly check for PG_MARKER, instead
of relying on zeroed memory being interpreted as an empty PV list.

Reviewed by:	kib
2011-07-02 23:42:04 +00:00
Attilio Rao
7b744f6b01 MFC 2011-06-30 10:19:43 +00:00
Alan Cox
6bbee8e28a Add a new option, OBJPR_NOTMAPPED, to vm_object_page_remove(). Passing this
option to vm_object_page_remove() asserts that the specified range of pages
is not mapped, or more precisely that none of these pages have any managed
mappings.  Thus, vm_object_page_remove() need not call pmap_remove_all() on
the pages.

This change not only saves time by eliminating pointless calls to
pmap_remove_all(), but it also eliminates an inconsistency in the use of
pmap_remove_all() versus related functions, like pmap_remove_write().  It
eliminates harmless but pointless calls to pmap_remove_all() that were being
performed on PG_UNMANAGED pages.

Update all of the existing assertions on pmap_remove_all() to reflect this
change.

Reviewed by:	kib
2011-06-29 16:40:41 +00:00
Attilio Rao
9a981857cf Remove pc_cpumask and pc_other_cpus from MIPS support.
Tested by:	gonzo
2011-06-28 12:51:08 +00:00
Kevin Lo
281f0ca8e7 Remove duplicate header includes 2011-06-26 10:07:48 +00:00
Attilio Rao
3bce356ea4 MFC 2011-06-04 22:05:20 +00:00
Warner Losh
dfa1a4fbf9 Add support for True IDE mode to the Octeon CF driver. This mode is
signalled when the attribute address for the CF is 0 in the octeon
sysinfo structure.  In this mode, the DATA port is 16-bits, but the
other ports are 8-bits, but on a 16-bit bus (so you have to access it
a short at a time, but only believe the lower byte).  See the code for
more details on this slightly odd arrangement.  I'm still not 100%
happy with the abstractions here on many levels (starting with the
globals for these settings, on down to no bus_space use, etc), but the
driver had these problems before the change.

Also, clean up the code a bit to make this support easier, and the
code a bit easier to read.  I tried to follow existing style, but may
have missed a few spots.  Add some comments.

Fix probe/attach routine to return a proper error for the simulator.

With this change, my EBH5200 eval board now recognizes the CF well
enough to boot to the login prompt.  Before it would say it never
became ready.  My CN3010-EVB-HS5 still boots properly.  My older
CN3860-based board won't load the 64-bit kernel, either before or
after the change, and I didn't chase that down.
2011-06-04 07:06:05 +00:00
Attilio Rao
61b926921f MFC 2011-05-31 21:22:44 +00:00
Nathan Whitehorn
d098f93019 On multi-core, multi-threaded PPC systems, it is important that the threads
be brought up in the order they are enumerated in the device tree (in
particular, that thread 0 on each core be brought up first). The SLIST
through which we loop to start the CPUs has all of its entries added with
SLIST_INSERT_HEAD(), which means it is in reverse order of enumeration
and so AP startup would always fail in such situations (causing a machine
check or RTAS failure). Fix this by changing the SLIST into an STAILQ,
and inserting new CPUs at the end.

Reviewed by:	jhb
2011-05-31 15:11:43 +00:00
Attilio Rao
f7a10dcfe0 Merge r221846 from largeSMP project branch:
Fix arguments passing to _long() version of atomic function for mips.

The native implementation is bogus in that regard and offers the same
problem solved for powerpc as r222198, but mips' guys just wanted a
small and self-contained patch for mips rather than rewriting the
whole support.

Reviewed by:	art, imp
Tested by:	gonzo
MFC after:	2 weeks
2011-05-23 23:35:50 +00:00
Attilio Rao
be044baf28 Fix a bug where the index cpu is just plain wrong, thus the kernel
livelocks.

Reported by:	gonzo
2011-05-22 20:19:01 +00:00
Attilio Rao
b2aa562e7b MFC 2011-05-13 20:58:48 +00:00
Attilio Rao
f89d6b3f06 Fix a brain-o in platform_cpu_mask() by just specifying a possible
cpuset_t to be copied, rather than return the array.
I can't rely anymore on this being a simple int/long object.

Reported by:	art
2011-05-13 19:56:58 +00:00
Matthew D Fleming
cfb00e5aa7 Move the ZERO_REGION_SIZE to a machine-dependent file, as on many
architectures (i386, for example) the virtual memory space may be
constrained enough that 2MB is a large chunk.  Use 64K for arches
other than amd64 and ia64, with special handling for sparc64 due to
differing hardware.

Also commit the comment changes to kmem_init_zero_region() that I
missed due to not saving the file.  (Darn the unfamiliar development
environment).

Arch maintainers, please feel free to adjust ZERO_REGION_SIZE as you
see fit.

Requested by:	alc
MFC after:	1 week
MFC with:	r221853
2011-05-13 19:35:01 +00:00
Attilio Rao
245a253538 Add the cpuset_t conversion for mips. 2011-05-13 16:42:05 +00:00
Attilio Rao
250c198bd7 Fix the _long() rappresentation on mips by casting the long arguments
to u_int for all the functions.

Reviewed by:	art, imp
2011-05-13 16:39:47 +00:00
Oleksandr Tymoshenko
ac35ff65d3 Use new option names for NFS client and NFS server
See UPDATING entry for 20110427
2011-05-11 00:52:41 +00:00
Adrian Chadd
cc641d93c6 Fix GPIO_MAXPINS calculation for the AR71xx, AR724x, AR913x SoC.
Submitted by:	Luiz Otavio O Souza <loos.br@gmail.com>
2011-05-06 02:45:02 +00:00
Adrian Chadd
118b92c879 Add nvram2env (untested) and geom_map (tested) to PB92. 2011-05-05 09:04:49 +00:00
Marius Strobl
3fcb7a5365 - Remove attempts to implement setting of BMCR_LOOP/MIIF_NOLOOP
(reporting IFM_LOOP based on BMCR_LOOP is left in place though as
  it might provide useful for debugging). For most mii(4) drivers it
  was unclear whether the PHYs driven by them actually support
  loopback or not. Moreover, typically loopback mode also needs to
  be activated on the MAC, which none of the Ethernet drivers using
  mii(4) implements. Given that loopback media has no real use (and
  obviously hardly had a chance to actually work) besides for driver
  development (which just loopback mode should be sufficient for
  though, i.e one doesn't necessary need support for loopback media)
  support for it is just dropped as both NetBSD and OpenBSD already
  did quite some time ago.
- Let mii_phy_add_media() also announce the support of IFM_NONE.
- Restructure the PHY entry points to use a structure of entry points
  instead of discrete function pointers, and extend this to include
  a "reset" entry point. Make sure any PHY-specific reset routine is
  always used, and provide one for lxtphy(4) which disables MII
  interrupts (as is done for a few other PHYs we have drivers for).
  This includes changing NIC drivers which previously just called the
  generic mii_phy_reset() to now actually call the PHY-specific reset
  routine, which might be crucial in some cases. While at it, the
  redundant checks in these NIC drivers for mii->mii_instance not being
  zero before calling the reset routines were removed because as soon
  as one PHY driver attaches mii->mii_instance is incremented and we
  hardly can end up in their media change callbacks etc if no PHY driver
  has attached as mii_attach() would have failed in that case and not
  attach a miibus(4) instance.
  Consequently, NIC drivers now no longer should call mii_phy_reset()
  directly, so it was removed from EXPORT_SYMS.
- Add a mii_phy_dev_attach() as a companion helper to mii_phy_dev_probe().
  The purpose of that function is to perform the common steps to attach
  a PHY driver instance and to hook it up to the miibus(4) instance and to
  optionally also handle the probing, addition and initialization of the
  supported media. So all a PHY driver without any special requirements
  has to do in its bus attach method is to call mii_phy_dev_attach()
  along with PHY-specific MIIF_* flags, a pointer to its PHY functions
  and the add_media set to one. All PHY drivers were updated to take
  advantage of mii_phy_dev_attach() as appropriate. Along with these
  changes the capability mask was added to the mii_softc structure so
  PHY drivers taking advantage of mii_phy_dev_attach() but still
  handling media on their own do not need to fiddle with the MII attach
  arguments anyway.
- Keep track of the PHY offset in the mii_softc structure. This is done
  for compatibility with NetBSD/OpenBSD.
- Keep track of the PHY's OUI, model and revision in the mii_softc
  structure. Several PHY drivers require this information also after
  attaching and previously had to wrap their own softc around mii_softc.
  NetBSD/OpenBSD also keep track of the model and revision on their
  mii_softc structure. All PHY drivers were updated to take advantage
  as appropriate.
- Convert the mebers of the MII data structure to unsigned where
  appropriate. This is partly inspired by NetBSD/OpenBSD.
- According to IEEE 802.3-2002 the bits actually have to be reversed
  when mapping an OUI to the MII ID registers. All PHY drivers and
  miidevs where changed as necessary. Actually this now again allows to
  largely share miidevs with NetBSD, which fixed this problem already
  9 years ago. Consequently miidevs was synced as far as possible.
- Add MIIF_NOMANPAUSE and mii_phy_flowstatus() calls to drivers that
  weren't explicitly converted to support flow control before. It's
  unclear whether flow control actually works with these but typically
  it should and their net behavior should be more correct with these
  changes in place than without if the MAC driver sets MIIF_DOPAUSE.

Obtained from:	NetBSD (partially)
Reviewed by:	yongari (earlier version), silence on arch@ and net@
2011-05-03 19:51:29 +00:00
Adrian Chadd
0ba4511a8a Add in the work-around for the AR8316 gige switch PHY.
This allows the ethernet to function on the PB92 board.

Submitted by:	Luiz Otavio O Souza
2011-05-02 10:42:19 +00:00
Adrian Chadd
b1b9d50bd9 Some AR724x PCIe fixes, which should wrap up the first round
of endian-ness issues with the AR724x.

From Luiz:

* Fix the bus space tag used so endian-ness is correctly handled;
* Only do the workaround for the AR7240; AR7241/AR7242 (PB92)
  don't require this

From me:

* Add a read flush from openwrt

Submitted by:	Luiz Otavio O Souza
2011-05-01 23:32:37 +00:00
Adrian Chadd
dba6332a4b An example configuration file for the Atheros PB92.
TODO:

* pcie doesn't yet work properly, I'm working on it.
* if_arge doesn't work - it's likely the phy mask is wrong; again I'm working on it.
2011-04-30 12:25:09 +00:00
Adrian Chadd
9a70a84852 The AR724x SoC's require the irq status line to be acked/cleared.
This allows console IO to occur correctly once the kernel is in multi-user
mode.

Submitted by:	Luiz Otavio O Souza
2011-04-30 12:07:15 +00:00
Adrian Chadd
569fa65ddd Call the DDR FIFO flush method when IP2 interrupts occur. 2011-04-30 11:56:04 +00:00
Adrian Chadd
41426ac408 Flip off debugging for now. 2011-04-30 11:40:31 +00:00
Adrian Chadd
d7fc7abf5a Add some initial PCIe bridge support for the AR724x chipsets.
This is reported to work on the AR7240 based Ubiquiti Rocket M5
but I haven't tested it on that hardware. I also don't yet have
it fully working on the AR7242 based development board here;
probe/attach functions but the register space resource looks like
the endian-ness is wrong (0x10000000 instead of 0x00001000).o

Further digging will be required.

Submitted by:	Luiz Otavio O Souza
2011-04-30 11:36:16 +00:00
Adrian Chadd
af0167995c In preparation for the AR724x PCIe bus code, make the AR71xx PCI bus
glue require 'device ar71xx_pci' .

Users of the AR71xx board configs will now require this for functioning
PCI:

device pci
device ar71xx_pci
2011-04-30 11:28:21 +00:00
Adrian Chadd
bb21522438 Add a missing DDR FIFO method for the ar71xx. 2011-04-30 02:31:56 +00:00
John Baldwin
b67d11bbcc Change rman_manage_region() to actually honor the rm_start and rm_end
constraints on the rman and reject attempts to manage a region that is out
of range.
- Fix various places that set rm_end incorrectly (to ~0 or ~0u instead of
  ~0ul).
- To preserve existing behavior, change rman_init() to set rm_start and
  rm_end to allow managing the full range (0 to ~0ul) if they are not set by
  the caller when rman_init() is called.
2011-04-29 18:41:21 +00:00
Adrian Chadd
f0fb75ebd2 Tidy up the naming of the ip2 DDR flush routine, and add an inline
accessor method (which is currently unused) in there.
2011-04-29 06:25:11 +00:00
Attilio Rao
2be767e069 Add the watchdogs patting during the (shutdown time) disk syncing and
disk dumping.
With the option SW_WATCHDOG on, these operations are doomed to let
watchdog fire, fi they take too long.

I implemented the stubs this way because I really want wdog_kern_*
KPI to not be dependant by SW_WATCHDOG being on (and really, the option
only enables watchdog activation in hardclock) and also avoid to
call them when not necessary (avoiding not-volountary watchdog
activations).

Sponsored by:	Sandvine Incorporated
Discussed with:	emaste, des
MFC after:	2 weeks
2011-04-28 16:02:05 +00:00
Adrian Chadd
cd0f42fa9f Re-enable the wireless build parameters for the AR9130 WMAC.
* enable 11n
* add ath_ahb so the AHB<->ath glue is linked in
* disable descriptor order swapping, it isn't needed here
* disable interrupt mitigation, it isn't supported here
2011-04-28 12:52:01 +00:00
Adrian Chadd
c746f80ee3 Add the IP2 DDR flush handlers.
These aren't yet used in the interrupt handler path but should be.
2011-04-28 11:13:26 +00:00
Alexander Motin
0d307e0905 - Add shim to simplify migration to the CAM-based ATA. For each new adaX
device in /dev/ create symbolic link with adY name, trying to mimic old ATA
numbering. Imitation is not complete, but should be enough in most cases to
mount file systems without touching /etc/fstab.
 - To know what behavior to mimic, restore ATA_STATIC_ID option in cases
where it was present before.
 - Add some more details to UPDATING.
2011-04-26 17:01:49 +00:00
Alexander Motin
97b53e3634 Switch the GENERIC kernels for all architectures to the new CAM-based ATA
stack. It means that all legacy ATA drivers are disabled and replaced by
respective CAM drivers. If you are using ATA device names in /etc/fstab or
other places, make sure to update them respectively (adX -> adaY,
acdX -> cdY, afdX -> daY, astX -> saY, where 'Y's are the sequential
numbers for each type in order of detection, unless configured otherwise
with tunables, see cam(4)).

ataraid(4) functionality is now supported by the RAID GEOM class.
To use it you can load geom_raid kernel module and use graid(8) tool
for management. Instead of /dev/arX device names, use /dev/raid/rX.
2011-04-24 08:58:58 +00:00
Hans Petter Selasky
b0a5e05f62 We don't need to call EOWRITE4(sc, EHCI_USBINTR, 0) directly from each EHCI
bus driver at detach, hence ehci_detach() does exactly this since r199718.

Submitted by:	Luiz Otavio O Souza
MFC after:	7 days
Approved by:	thompsa (mentor)
2011-04-12 07:49:11 +00:00
Adrian Chadd
a043f08ec2 if_arge has had a strange bug that only appears during high traffic
levels. TX would hang, RX wouldn't. A bit of digging showed the interface
send queue was full, but IFF_DRV_OACTIVE was clear and the hardware TX
queue was empty.

It turns out that there wasn't a check to drain the interface send
queue once hardware TX had completed, so if the interface send queue
had filled up in the meantime, subsequent packets would be dropped
by the higher layers and if_start (and thus arge_start()) would never
be called.

The fix is simple - call arge_start_locked() in the software interrupt
handler after the hardware TX queue has been handled or a TX underrun
occured. This way the interface send queue gets drained.
2011-04-05 06:46:07 +00:00
Adrian Chadd
85df7b525a * Add some more debugging to if_arge
* Make doubly sure that IFF_DRV_OACTIVE is set if the hardware TX queue is full
2011-04-05 06:33:35 +00:00
Adrian Chadd
ef2732b2ee Put the ARGE_DEBUG behind a kernel config option. 2011-04-05 05:29:10 +00:00
Adrian Chadd
ce1d8cf9e0 Begin fleshing out a functioning debugging setup for if_arge.
I'm seeing TX hangs when doing large amounts of TX traffic;
an interface reset fixes it. This will hopefully help me identify
why.
2011-04-05 05:15:48 +00:00
Hans Petter Selasky
3ea3537594 - Correct EHCI interrupt disabling at detach.
Submitted by:	Luiz Otavio O Souza
MFC after:	7 days
Approved by:	thompsa (mentor)
2011-04-03 20:17:49 +00:00
Adrian Chadd
f7a5c9d346 Import the initial CPU support for the MIPS RALink RT305x SoC.
This is a MIPS4KC CPU with various embedded peripherals, including
wireless and ethernet support.

This commit includes the platform, UART, ethernet MAC and GPIO support.
The interrupt-driven GPIO code is disabled for now pending GPIO changes
from the submitter.

Submitted by:	Aleksandr Rybalko <ray@dlink.ua>
2011-04-03 14:39:55 +00:00
Adrian Chadd
77ae677e4a Add in some missing flags in the EHCI initialisation code,
needed to get USB working on the AR913x/AR724x.
2011-04-03 14:34:28 +00:00
Adrian Chadd
dcd35c3150 Commit configuration files for the AR913x SoC and the TP-Link WR-1043ND.
The AR91XX_BASE{,.hints} files define all the common parameters for
the AR913x SoC systems.

The TP-1043ND config file adds local parameters.
2011-04-03 13:19:58 +00:00
Adrian Chadd
0b11462b7d A handful of the openwrt devices use a MAC address that's at a hard-coded
offset in the flash.

Some devices (eg the TPLink WR-1043ND) don't have a flash environment
partition which can be queried for the current board settings.

This particular workaround allows for image creators to use a hint
to set the base MAC address. For example:

hint.arge.0.eeprommac=0x1f01fc00
2011-04-02 03:48:15 +00:00
Adrian Chadd
dba9c85977 Break out the ath PCI logic into a separate device/module.
Introduce the AHB glue for Atheros embedded systems. Right now it's
hard-coded for the AR9130 chip whose support isn't yet in this HAL;
it'll be added in a subsequent commit.

Kernel configuration files now need both 'ath' and 'ath_pci' devices; both
modules need to be loaded for the ath device to work.
2011-03-31 08:07:13 +00:00
Adrian Chadd
eab9f72a5a Implement AR724x USB initialisation code.
This (again) still requires an offset for the AR913x/AR724x before USB will
function.

Submitted by: Luiz Otavio O Souzau <loos.br@gmail.com>
2011-03-31 02:36:22 +00:00
Adrian Chadd
3c14a0e3fb The previous commit didn't completely rename this to what it should be. 2011-03-28 09:10:59 +00:00
Adrian Chadd
01754fac52 Refactor out the ar71xx mac address code into something that's
just for Redboot.

At some point we're going to need to build options for different
boot environments - for example, the UBoot setups I've seen simply
have the MAC address hard-coded at a fixed location in flash.
The OpenWRT support simply yanks the if_arge MAC directly from that
in code, rather than trying to find a uboot environment to pull it
from.
2011-03-27 13:55:35 +00:00
Adrian Chadd
c720b9bd9e Add an option - AR71XX_REALMEM - which overrides the amount of
memory detected from Redboot, or overrides the "otherwise" case
if no Redboot information was found.

Some AR71XX platforms don't use Redboot (eg TP-LINK devices using
UBoot; some later Ubiquiti devices which apparently also use
UBoot) and at least one plain out lies - the Ubiquiti LS-SR71A
Redboot says there's 16mb of RAM when in fact there's 32mb.

A more "clean" solution will be needed at a later date.
2011-03-27 08:44:27 +00:00
Adrian Chadd
83d59d21b5 Add some missing flags needed for AR913x/AR724x USB to correctly operate.
The AR913x/AR724x USB lives at a different offset to the AR71xx
USB, so this needs to be either adjusted for in a subsequent
commit, or updated in hints for kernels compiled for those
platforms.

Submitted by: Luiz Otavio O Souzau <loos.br@gmail.com>
2011-03-27 08:32:47 +00:00
Bjoern A. Zeeb
d2b74735b8 For now remove options FLOWTABLE from the remaining GENERIC kernel
configurations and make it opt-in for those who want it.  LINT will
still build it.

While it may be a perfect win in some scenarios, it still troubles users
(see PRs) in general cases.  In addition we are still allocating resources
even if disabled by sysctl and still leak arp/nd6 entries in case of
interface destruction.

Discussed with:	qingli (2010-11-24, just never executed)
Discussed with: juli (OCTEON1)
PR:		kern/148018, kern/155604, kern/144917, kern/146792
MFC after:	2 weeks
2011-03-19 15:50:34 +00:00
Juli Mallett
e22b8a5a3b o) Set MAC addresses starting at the MAC base for all management ports, not
just the MR-730.
o) Start MAC addresses for the non-management ports after the management ports.

Submitted by:	Bhanu Prakash (with modifications)
2011-03-16 22:51:34 +00:00
Juli Mallett
26de5f20cc o) Tear down receive interrupt on detach.
Submitted by:	Bhanu Prakash
2011-03-16 08:56:22 +00:00
Juli Mallett
64974004ec o) Clean up FPA pools on module unload.
o) Allocate output buffer pool based on available output queues.

Submitted by:	Bhanu Prakash (with modifications)
2011-03-16 08:51:36 +00:00
Juli Mallett
dea2d4206e o) Properly size caches and TLB on Octeon.
o) Make COP0_SYNC do nothing on Octeon, which is fully interlocked.

Submitted by:	Bhanu Prakash (with modifications)
2011-03-16 08:22:29 +00:00
Adrian Chadd
23dcc4c655 * Add wireless MAC reset, in prep for bringing over AR9130 support.
* Whilst I'm here, reformat to fit inside 80 characters.
2011-03-13 08:46:58 +00:00
Adrian Chadd
c55baa23d8 Add the missing AR724x DDR flush routines for if_arge0.
Submitted by: Luiz Otavio O Souza
2011-03-13 08:36:57 +00:00
Adrian Chadd
85a5701186 Fix the TX underrun status reset; remove a now unused variable.
Submitted by: Luiz Otavio O Souza
2011-03-13 08:34:14 +00:00
Adrian Chadd
2b60eabf75 Commit FIFO configuration fixes from OpenWRT. This fixes performance
issues with if_arge on the AR913x and AR724x.

Reference: https://dev.openwrt.org/ticket/6754
Submitted by: Luiz Otavio O Souza
2011-03-13 08:28:21 +00:00
Dmitry Chagin
e5d81ef1b5 Extend struct sysvec with new method sv_schedtail, which is used for an
explicit process at fork trampoline path instead of eventhadler(schedtail)
invocation for each child process.

Remove eventhandler(schedtail) code and change linux ABI to use newly added
sysvec method.

While here replace explicit comparing of module sysentvec structure with the
newly created process sysentvec to detect the linux ABI.

Discussed with:	kib

MFC after:	2 Week
2011-03-08 19:01:45 +00:00
Jayachandran C.
1e4b58070b Increase NKPT in case of n32 and n64 to support more physical memory.
On n32, vm_page_startup() needs more virtual mem to map vm_page structs.
The new value of 256 will allow us to support 16GB RAM.
2011-03-01 04:21:56 +00:00
Jayachandran C.
0474933dcc Use new thread's stack to invoke pmap_activate in cpu_switch()
Restore the SP from the new thread's PCB before calling pmap_activate.
Remove some old FIXME comments.
2011-03-01 03:25:18 +00:00
Jayachandran C.
7d66f0801b Use correct types and fromats for physical address
- Use vm_paddr_t for pa in pmap_steal_memory()
- Use uintmax_t and %jx to ensure that physical address are printed
  correctly in cpu_startup() and pmap_bootstrap()
2011-02-28 21:33:26 +00:00
Jayachandran C.
daa7be0b2e Use vm_offset_t for virtual addresses.
The unsigned int type used now is incorrect in n64 compilation.
2011-02-28 20:55:41 +00:00
Rebecca Cran
6bccea7c2b Fix typos - remove duplicate "the".
PR:	bin/154928
Submitted by:	Eitan Adler <lists at eitanadler.com>
MFC after: 	3 days
2011-02-21 09:01:34 +00:00
Alan Cox
e6ffa21488 Remove pmap fields that are either unused or not fully implemented.
Discussed with:	kib
2011-02-17 15:36:29 +00:00
Juli Mallett
cb2096acbf The Lanner MR-730 uses the first two MACs at its MAC base for the 10/100
management ports, and gigabit ports start at an offset of 2 from the MAC
base.
2011-02-12 02:41:33 +00:00
Juli Mallett
1591f3f18c Allow the platform code to return a bitmask of running cores rather than just
a number of cores, this allows for a sparse set of CPUs.  Implement support
for sparse core masks on Octeon.

XXX jeff@ suggests that all_cpus should include cores that are offline or
    running other applications/OSes, so the platform API should be further
    extended to allow us to set all_cpus to include all cores that are
    physically-present as opposed to only those that are running FreeBSD.

Submitted by:	Bhanu Prakash (with modifications)
Reviewed by:	jchandra
Glanced at by:	kib, jeff, jhb
2011-02-12 02:08:24 +00:00
Juli Mallett
70019a0be7 o) Cavium Octeon doesn't need nop barriers.
o) Have mips_wblush just do syncw, not sync on Cavium Octeon.
o) Add support for reading and writing some Octeon-specific registers.
   NB: Some of these are not entirely Octeon-specific.

Submitted by:	Bhanu Prakash
2011-02-06 22:21:18 +00:00
Tijl Coosemans
4e518ddb21 Replace __LP64__ with __mips_n64. This partly reverts r217147.
Requested by:	jmallett, imp
Approved by:	kib (mentor)
2011-02-04 13:09:46 +00:00
Matthew D Fleming
08b163fa51 Put the general logic for being a CPU hog into a new function
should_yield().  Use this in various places.  Encapsulate the common
case of check-and-yield into a new function maybe_yield().

Change several checks for a magic number of iterations to use
should_yield() instead.

MFC after:	1 week
2011-02-02 16:35:10 +00:00
Jayachandran C.
21835e695a Implement sf_buf using direct map (XKPHYS) in MIPS n64.
- Provide trivial implementation of sf_buf_alloc(), sf_buf_free(),
  sf_buf_kva() and sf_buf_page() using direct map for n64.
- uio_machdep.c - use macros so that the direct map will be used in
  case of n64.

Reviewed by:	imp (earlier version)
Obtained from:	jmallett (user/jmallett/octeon)
2011-01-27 14:49:22 +00:00
Sergey Kandaurov
4053b05b91 Make MSGBUF_SIZE kernel option a loader tunable kern.msgbufsize.
Submitted by:	perryh pluto.rain.com (previous version)
Reviewed by:	jhb
Approved by:	kib (mentor)
Tested by:	universe
2011-01-21 10:26:26 +00:00
Juli Mallett
2e2b4ad457 If there is no WQE available for a packet that needs segmentation, drop it
and return.
2011-01-20 23:51:03 +00:00
Juli Mallett
3e46966ed3 Remove some compile-time options from the driver, particularly async IOBDMA
support which is unused on FreeBSD and which complicates working on the
code now, can easily be added back later by someone determined to use it.
2011-01-20 23:34:59 +00:00
Warner Losh
266a41b11e Use simplified ldscripts rather than specific ones 2011-01-20 19:17:05 +00:00
Jayachandran C.
8026971f99 Move 'cpu CPU_RMI' to std.xlr, this is common for all XLR cpus. 2011-01-20 12:45:29 +00:00
Jayachandran C.
e91c7635e9 Re-format XLR configuartion files and remove obsolete options. 2011-01-20 09:01:14 +00:00
Jayachandran C.
c400881470 ldscript and conf cleanup for MIPS
- Remove sys/conf/ldscript.mips.64 and sys/conf/ldscript.mips.n32 and use
  ldscript.mips for all ABIs. The default OUTPUT_FORMAT of the toolchain
  is correct.
- Remove LDSCRIPT_NAME entires from XLR n32 and n64 conf files.
- Remove TARGET_BIG_ENDIAN from XLR conf files.
- Fix machine entry in XLRN32
2011-01-20 08:15:11 +00:00
Jayachandran C.
1104442832 Fixes in the XLR platform code
- Fix bug in pic.h, assign reg variable, before return.
- In xlr_pci.c, need to ignore the result of mmio read.
2011-01-20 08:08:19 +00:00
Oleksandr Tymoshenko
eb46a7a590 Fix build by changing format for size_t to %jd 2011-01-20 05:44:36 +00:00
Matthew D Fleming
cbc134ad03 Introduce signed and unsigned version of CTLTYPE_QUAD, renaming
existing uses.  Rename sysctl_handle_quad() to sysctl_handle_64().
2011-01-19 23:00:25 +00:00
Juli Mallett
166bee2858 Fix format of physical addresses; this fixes the n32 build. 2011-01-19 21:45:40 +00:00
Juli Mallett
2a05a35c57 Don't do a device_identify to add uart0, it's already hinted.
Reported by:	imp
2011-01-19 07:06:28 +00:00
Konstantin Belousov
55aabb7fd1 For architectures not using direct map , and requiring real KVA page for
sf buf allocation, use wakeup() instead of wakeup_one() to notify sf
buffer waiters about free buffer.

sf_buf_alloc() calls msleep(PCATCH) when SFB_CATCH flag was given,
and for simultaneous wakeup and signal delivery, msleep() returns
EINTR/ERESTART despite the thread was selected for wakeup_one(). As
result, we loose a wakeup, and some other waiter will not be woken up.

Reported and tested by:	az
Reviewed by:	alc, jhb
MFC after:	1 week
2011-01-18 21:57:02 +00:00
Jung-uk Kim
bc35e60ec0 Remove empty dev_mem_md_init() stubs. 2011-01-17 23:06:47 +00:00
Warner Losh
f381c26847 Save the CPU model, the board and the CPU clock rate so they are reported by
the approrpiate sysctl.
2011-01-17 23:03:09 +00:00
Warner Losh
5d8f773b87 Kill redundant cpu line 2011-01-17 23:00:23 +00:00
Warner Losh
b54e5c906c Make cpu_model public (otherwise there's no way to set it) and bump it
to 80 characters.
Add hw.board to export board information, if known, from the mips kernel.
2011-01-17 22:58:41 +00:00
Jung-uk Kim
2fea643112 Add reader/writer lock around mem_range_attr_get() and mem_range_attr_set().
Compile sys/dev/mem/memutil.c for all supported platforms and remove now
unnecessary dev_mem_md_init().  Consistently define mem_range_softc from
mem.c for all platforms.  Add missing #include guards for machine/memdev.h
and sys/memrange.h.  Clean up some nearby style(9) nits.

MFC after:	1 month
2011-01-17 22:58:28 +00:00
Jayachandran C.
611f086953 Support for 64 bit PTEs on n32 and n64 compilation.
In n32 and n64, add support for physical address above 4GB by having
64 bit page table entries and physical addresses. Major changes are:
- param.h: update PTE sizes, masks and shift values to support 64 bit PTEs.
- param.h: remove DELAY(), mips_btop(same as atop), mips_ptob (same as
  ptoa), and reformat.
- param.h: remove casting to unsigned long in trunc_page and round_page
  since this will be used on physical addresses.
- _types.h: have 64 bit __vm_paddr_t for n32.
- pte.h: update TLB LO0/1 access macros to support 64 bit PTE
- pte.h: assembly macros for PTE operations.
- proc.h: md_upte is now 64 bit for n32 and n64.
- exception.S and swtch.S: use the new PTE macros for PTE operations.
- cpufunc.h: TLB_LO0/1 registers are 64bit for n32 and n64.
- xlr_machdep.c: Add memory segments above 4GB to phys_avail[] as they are
  supported now.

Reviewed by:	jmallett (earlier version)
2011-01-13 15:17:29 +00:00
Jayachandran C.
0dd873372a Cleanup physical address and PTE types on MIPS.
1. Use vm_paddr_t for physical addresses.

There are a few places in the MIPS platform code where vm_offset_t is
used for physical addresses, change these to use vm_paddr_t:
- phys_avail[], physmem_desc[] arrays
- pmap_mapdev(), page_is_managed(), is_cacheable_mem() pmap_map() args
- local variables of various pmap functions

2. Change init_pte_prot() return from int to pt_entry_t, as this can be
64 bit when using 64 bit TLB entries.

3. Update printing of pt_entry_t and of vm_paddr_t to use 'j' format with
uintmax_t. This will be useful later if we plan to use 64bit phsical addr
on 32 bit n32 compilation.

Reviewed by:	imp
2011-01-13 06:48:43 +00:00
Jayachandran C.
ab7a71f6e7 The message ring interrupt needs to be enabled for all cpus, not just
the ones which run the message ring handler.

Some bits of the interrupt mask are part of the status register which is
saved with the process context, and these bits are initialized from the
cpu on which the process is created. This means that all the processes
should have the same value for these interrupt mask bits, so that the
interrupt mask remains the same regardless of what thread is scheduled
on the cpu.

Submitted by:	Sriram Gorti (srgorti at netlogicmicro dot com)
2011-01-12 13:16:35 +00:00
John Baldwin
58ccf5b41c Remove unneeded includes of <sys/linker_set.h>. Other headers that use
it internally contain nested includes.

Reviewed by:	bde
2011-01-11 13:59:06 +00:00
Juli Mallett
610803e3f5 Initialize PCIe buses and add preliminary support for 64-bit BARs. 2011-01-11 02:37:58 +00:00
Juli Mallett
449cf853ac Count output bytes and packets. 2011-01-10 22:14:30 +00:00
Juli Mallett
b37ccb6a0c Shorten device name so it fits into vmstat -i. 2011-01-10 22:14:08 +00:00
Juli Mallett
b15aff0da5 o) Free mbufs in error cases.
o) Clear/acknowledge receive interrupt at end of thread.  This gives the
   management interfaces performance on the order of 100Mbps rather than
   the previous level of 10Mbps on my MR-730.
2011-01-10 06:46:18 +00:00
Juli Mallett
15fe2454ae o) Expand the CIU driver to be aware of newly-allocated parts of the IRQ range.
o) Add 'octm', a trivial driver for the 10/100 management ports found on some
   Octeon systems.
o) Make the Simple Executive's management port helper routines compile on
   FreeBSD (namely by not doing math on void pointers.)
o) Add a cvmx_mgmt_port_sendm routine to the Simple Executive to send an mbuf
   so there is only one copy in the transmit path, rather than having to first
   copy the mbuf to an intermediate buffer and then copy that to the Simple
   Executive's transmit ring.
o) Properly work out MII addresses of management ports on the Lanner MR-730.
   XXX The MR-730 also needs some patches to the MII read/write routines, but
       this is sufficient for now.  Media detection will be fixed in the future
       when I can spend more time reading the vendor-supplied patches.
2011-01-10 03:48:41 +00:00
Juli Mallett
987da28eb7 Now that we correctly enable rx interrupts on all cores, performance has gotten
quite awful, because e.g. 4 packets will come in and get processed on 4
different cores at the same time, really battling with the TCP stack quite
painfully.  For now, just run one task at a time.

This gets performance up in most cases to where it was before the correctness
fixes that got interrupts to run on all cores (except in high-load TCP transmit
cases where all we're handling receive for is ACKs) and in some cases it's
better now.  What would be ideal would be to use a more advanced interrupt
mitigation strategy and possibly to use different workqueue groups per port for
multi-port systems, and so on, but this is a fine stopgap.
2011-01-09 23:46:24 +00:00