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DPDK Maintainers
================
The intention of this file is to provide a set of names that we can rely on
for helping in patch reviews and questions.
These names are additional recipients for emails sent to dev@dpdk.org.
Please avoid private emails.
Descriptions of section entries:
M: Maintainer's Full Name <address@domain>
T: Git tree location.
F: Files and directories with wildcard patterns.
A trailing slash includes all files and subdirectory files.
A wildcard includes all files but not subdirectories.
One pattern per line. Multiple F: lines acceptable.
X: Files and directories exclusion, same rules as F:
K: Keyword regex pattern to match content.
One regex pattern per line. Multiple K: lines acceptable.
General Project Administration
------------------------------
Main Branch
M: Thomas Monjalon <thomas@monjalon.net>
M: Ferruh Yigit <ferruh.yigit@intel.com>
T: git://dpdk.org/dpdk
Next-net Tree
M: Ferruh Yigit <ferruh.yigit@intel.com>
T: git://dpdk.org/next/dpdk-next-net
Next-net-intel Tree
M: Qi Zhang <qi.z.zhang@intel.com>
M: Beilei Xing <beilei.xing@intel.com>
T: git://dpdk.org/next/dpdk-next-net-intel
Next-net-mlx Tree
M: Shahaf Shuler <shahafs@mellanox.com>
T: git://dpdk.org/next/dpdk-next-net-mlx
Next-virtio Tree
M: Maxime Coquelin <maxime.coquelin@redhat.com>
M: Tiwei Bie <tiwei.bie@intel.com>
T: git://dpdk.org/next/dpdk-next-virtio
Next-crypto Tree
M: Pablo de Lara <pablo.de.lara.guarch@intel.com>
M: Akhil Goyal <akhil.goyal@nxp.com>
T: git://dpdk.org/next/dpdk-next-crypto
Next-eventdev Tree
M: Jerin Jacob <jerin.jacob@caviumnetworks.com>
T: git://dpdk.org/next/dpdk-next-eventdev
Next-qos Tree
M: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
T: git://dpdk.org/next/dpdk-next-qos
Next-pipeline Tree
M: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
T: git://dpdk.org/next/dpdk-next-pipeline
Stable Branches
M: Yuanhan Liu <yliu@fridaylinux.org>
M: Luca Boccassi <bluca@debian.org>
T: git://dpdk.org/dpdk-stable
Security Issues
M: maintainers@dpdk.org
Documentation (with overlaps)
M: John McNamara <john.mcnamara@intel.com>
M: Marko Kovacevic <marko.kovacevic@intel.com>
F: README
F: doc/
Developers and Maintainers Tools
M: Thomas Monjalon <thomas@monjalon.net>
F: MAINTAINERS
F: devtools/check-dup-includes.sh
F: devtools/check-maintainers.sh
F: devtools/check-forbidden-tokens.awk
F: devtools/check-git-log.sh
F: devtools/check-includes.sh
F: devtools/check-symbol-maps.sh
F: devtools/checkpatches.sh
F: devtools/get-maintainer.sh
F: devtools/git-log-fixes.sh
F: devtools/load-devel-config
F: devtools/test-build.sh
F: devtools/test-meson-builds.sh
license: introduce SPDX identifiers The DPDK uses the Open Source BSD-3-Clause license for the core libraries and drivers. The kernel components are naturally GPLv2 licensed. Many of the files in the DPDK source code contain the full text of the applicable license. For example, most of the BSD-3-Clause files contain a full copy of the BSD-3-Clause license text. Including big blocks of License headers in all files blows up the source code with mostly redundant information. An additional problem is that even the same licenses are referred to by a number of slightly varying text blocks (full, abbreviated, different indentation, line wrapping and/or white space, with obsolete address information, ...) which makes validation and automatic processing a nightmare. To make this easier, DPDK uses of a single line reference to Unique License Identifiers in source files as defined by the Linux Foundation's SPDX project https://spdk.org. Adding license information in this fashion, rather than adding full license text, can be more efficient for developers; decreases errors; and improves automated detection of licenses. The current set of valid, predefined SPDX identifiers is set forth on the SPDX License List at https://spdx.org/licenses/. For example, to label a file as subject to the BSD-3-Clause license, the following text would be used as the top line of the file. SPDX-License-Identifier: BSD-3-Clause Note: Any new file contributions in DPDK shall adhere to the above scheme. It is also recommended to replace or at least amend the existing license text in the code with SPDX-License-Identifiers. Any exception to DPDK IP policies shall be approved by DPDK tech board and DPDK Governing Board. Steps for any exception approval: 1. Mention the appropriate license identifier form SPDX. If the license is not listed in SPDX Licenses. It is the submitters responsibiliity to get it first listed. 2. Get the required approval from the DPDK Technical Board. Technical board may advise the author to check alternate means first. If no other alternatives are found and the merit of the contributions are important for DPDK's mission, it may decide on such exception with two-thirds vote of the members. 3. Technical board then approach Governing board for such limited approval for the given contribution only. Any approvals shall be documented in "licenses/exceptions.txt" with record dates. Note: From the legal point of view, this patch is supposed to be only a change to the textual representation of the license information, but in no way any change to the actual license terms. With this patch applied, all files will still be licensed under the same terms they were before. Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com> Acked-by: Stephen Hemminger <stephen@networkplumber.org> Acked-by: Thomas Monjalon <thomas@monjalon.net>
2017-12-19 10:14:38 +00:00
F: license/
Build System
------------
M: Thomas Monjalon <thomas@monjalon.net>
F: GNUmakefile
F: Makefile
F: config/
F: mk/
F: pkg/
F: buildtools/auto-config-h.sh
F: buildtools/gen-build-mk.sh
F: buildtools/gen-config-h.sh
F: buildtools/relpath.sh
F: doc/build-sdk-quick.txt
F: doc/guides/prog_guide/build_app.rst
F: doc/guides/prog_guide/dev_kit_*
F: doc/guides/prog_guide/ext_app_lib_make_help.rst
build: add infrastructure for meson and ninja builds To build with meson and ninja, we need some initial infrastructure in place. The build files for meson always need to be called "meson.build", and options get placed in meson_options.txt This commit adds a top-level meson.build file, which sets up the global variables for tracking drivers, libraries, etc., and then includes other build files, before finishing by writing the global build configuration header file and a DPDK pkgconfig file at the end, using some of those same globals. From the top level build file, the only include file thus far is for the config folder, which does some other setup of global configuration parameters, including pulling in architecture specific parameters from an architectural subdirectory. A number of configuration build options are provided for the project to tune a number of global variables which will be used later e.g. max numa nodes, max cores, etc. These settings all make their way to the global build config header "rte_build_config.h". There is also a file "rte_config.h", which includes "rte_build_config.h", and this file is meant to hold other build-time values which are present in our current static build configuration but are not normally meant for user-configuration. Ideally, over time, the values placed here should be moved to the individual libraries or drivers which want those values. Signed-off-by: Bruce Richardson <bruce.richardson@intel.com> Reviewed-by: Harry van Haaren <harry.van.haaren@intel.com> Acked-by: Keith Wiles <keith.wiles@intel.com> Acked-by: Luca Boccassi <luca.boccassi@gmail.com>
2017-08-28 10:57:12 +00:00
Meson build
M: Bruce Richardson <bruce.richardson@intel.com>
F: meson.build
F: lib/librte_eal/bsdapp/BSDmakefile.meson
build: add infrastructure for meson and ninja builds To build with meson and ninja, we need some initial infrastructure in place. The build files for meson always need to be called "meson.build", and options get placed in meson_options.txt This commit adds a top-level meson.build file, which sets up the global variables for tracking drivers, libraries, etc., and then includes other build files, before finishing by writing the global build configuration header file and a DPDK pkgconfig file at the end, using some of those same globals. From the top level build file, the only include file thus far is for the config folder, which does some other setup of global configuration parameters, including pulling in architecture specific parameters from an architectural subdirectory. A number of configuration build options are provided for the project to tune a number of global variables which will be used later e.g. max numa nodes, max cores, etc. These settings all make their way to the global build config header "rte_build_config.h". There is also a file "rte_config.h", which includes "rte_build_config.h", and this file is meant to hold other build-time values which are present in our current static build configuration but are not normally meant for user-configuration. Ideally, over time, the values placed here should be moved to the individual libraries or drivers which want those values. Signed-off-by: Bruce Richardson <bruce.richardson@intel.com> Reviewed-by: Harry van Haaren <harry.van.haaren@intel.com> Acked-by: Keith Wiles <keith.wiles@intel.com> Acked-by: Luca Boccassi <luca.boccassi@gmail.com>
2017-08-28 10:57:12 +00:00
F: meson_options.txt
F: config/rte_config.h
F: buildtools/gen-pmdinfo-cfile.sh
F: buildtools/symlink-drivers-solibs.sh
build: add infrastructure for meson and ninja builds To build with meson and ninja, we need some initial infrastructure in place. The build files for meson always need to be called "meson.build", and options get placed in meson_options.txt This commit adds a top-level meson.build file, which sets up the global variables for tracking drivers, libraries, etc., and then includes other build files, before finishing by writing the global build configuration header file and a DPDK pkgconfig file at the end, using some of those same globals. From the top level build file, the only include file thus far is for the config folder, which does some other setup of global configuration parameters, including pulling in architecture specific parameters from an architectural subdirectory. A number of configuration build options are provided for the project to tune a number of global variables which will be used later e.g. max numa nodes, max cores, etc. These settings all make their way to the global build config header "rte_build_config.h". There is also a file "rte_config.h", which includes "rte_build_config.h", and this file is meant to hold other build-time values which are present in our current static build configuration but are not normally meant for user-configuration. Ideally, over time, the values placed here should be moved to the individual libraries or drivers which want those values. Signed-off-by: Bruce Richardson <bruce.richardson@intel.com> Reviewed-by: Harry van Haaren <harry.van.haaren@intel.com> Acked-by: Keith Wiles <keith.wiles@intel.com> Acked-by: Luca Boccassi <luca.boccassi@gmail.com>
2017-08-28 10:57:12 +00:00
ABI versioning
M: Neil Horman <nhorman@tuxdriver.com>
F: lib/librte_compat/
F: doc/guides/rel_notes/deprecation.rst
F: devtools/validate-abi.sh
F: devtools/check-symbol-change.sh
F: buildtools/check-experimental-syms.sh
Driver information
M: Neil Horman <nhorman@tuxdriver.com>
F: buildtools/pmdinfogen/
F: usertools/dpdk-pmdinfo.py
F: doc/guides/tools/pmdinfo.rst
Environment Abstraction Layer
-----------------------------
EAL API and common code
F: lib/librte_eal/common/*
F: lib/librte_eal/common/include/*
F: lib/librte_eal/common/include/generic/
F: lib/librte_eal/rte_eal_version.map
F: doc/guides/prog_guide/env_abstraction_layer.rst
F: test/test/test_alarm.c
F: test/test/test_atomic.c
F: test/test/test_barrier.c
F: test/test/test_byteorder.c
F: test/test/test_common.c
F: test/test/test_cpuflags.c
F: test/test/test_cycles.c
F: test/test/test_debug.c
F: test/test/test_eal*
F: test/test/test_errno.c
F: test/test/test_interrupts.c
F: test/test/test_logs.c
F: test/test/test_memcpy*
F: test/test/test_per_lcore.c
F: test/test/test_prefetch.c
F: test/test/test_reciprocal_division*
F: test/test/test_rwlock.c
F: test/test/test_spinlock.c
F: test/test/test_string_fns.c
F: test/test/test_tailq.c
F: test/test/test_version.c
Memory Allocation
M: Anatoly Burakov <anatoly.burakov@intel.com>
F: lib/librte_eal/common/include/rte_fbarray.h
F: lib/librte_eal/common/include/rte_mem*
F: lib/librte_eal/common/include/rte_malloc.h
F: lib/librte_eal/common/*malloc*
F: lib/librte_eal/common/eal_common_fbarray.c
F: lib/librte_eal/common/eal_common_mem*
F: lib/librte_eal/common/eal_hugepages.h
F: lib/librte_eal/linuxapp/eal/eal_mem*
F: lib/librte_eal/bsdapp/eal/eal_mem*
F: doc/guides/prog_guide/env_abstraction_layer.rst
F: test/test/test_external_mem.c
F: test/test/test_func_reentrancy.c
F: test/test/test_fbarray.c
F: test/test/test_malloc.c
F: test/test/test_memory.c
F: test/test/test_memzone.c
Keep alive
M: Remy Horton <remy.horton@intel.com>
F: lib/librte_eal/common/include/rte_keepalive.h
F: lib/librte_eal/common/rte_keepalive.c
F: examples/l2fwd-keepalive/
F: doc/guides/sample_app_ug/keep_alive.rst
Secondary process
M: Anatoly Burakov <anatoly.burakov@intel.com>
K: RTE_PROC_
F: doc/guides/prog_guide/multi_proc_support.rst
F: test/test/test_mp_secondary.c
F: examples/multi_process/
F: doc/guides/sample_app_ug/multi_process.rst
Service Cores
M: Harry van Haaren <harry.van.haaren@intel.com>
F: lib/librte_eal/common/include/rte_service.h
F: lib/librte_eal/common/include/rte_service_component.h
F: lib/librte_eal/common/rte_service.c
F: doc/guides/prog_guide/service_cores.rst
F: test/test/test_service_cores.c
Bitmap
M: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
F: lib/librte_eal/common/include/rte_bitmap.h
F: test/test/test_bitmap.c
ARM v7
M: Jan Viktorin <viktorin@rehivetech.com>
M: Gavin Hu <gavin.hu@arm.com>
F: lib/librte_eal/common/arch/arm/
F: lib/librte_eal/common/include/arch/arm/
ARM v8
M: Jerin Jacob <jerin.jacob@caviumnetworks.com>
M: Gavin Hu <gavin.hu@arm.com>
F: lib/librte_eal/common/include/arch/arm/*_64.h
F: lib/librte_net/net_crc_neon.h
F: lib/librte_acl/acl_run_neon.*
F: lib/librte_lpm/rte_lpm_neon.h
F: lib/librte_hash/rte*_arm64.h
F: lib/librte_efd/rte*_arm64.h
F: lib/librte_table/rte*_arm64.h
F: drivers/net/ixgbe/ixgbe_rxtx_vec_neon.c
F: drivers/net/i40e/i40e_rxtx_vec_neon.c
F: drivers/net/virtio/virtio_rxtx_simple_neon.c
IBM POWER
M: Chao Zhu <chaozhu@linux.vnet.ibm.com>
F: lib/librte_eal/common/arch/ppc_64/
F: lib/librte_eal/common/include/arch/ppc_64/
F: drivers/net/i40e/i40e_rxtx_vec_altivec.c
F: examples/l3fwd/*altivec.h
Intel x86
M: Bruce Richardson <bruce.richardson@intel.com>
M: Konstantin Ananyev <konstantin.ananyev@intel.com>
F: lib/librte_eal/common/arch/x86/
F: lib/librte_eal/common/include/arch/x86/
Linux EAL (with overlaps)
F: lib/librte_eal/linuxapp/Makefile
F: lib/librte_eal/linuxapp/eal/
F: doc/guides/linux_gsg/
Linux UIO
M: Ferruh Yigit <ferruh.yigit@intel.com>
F: kernel/linux/igb_uio/
F: drivers/bus/pci/linux/*uio*
Linux VFIO
M: Anatoly Burakov <anatoly.burakov@intel.com>
F: lib/librte_eal/linuxapp/eal/*vfio*
F: drivers/bus/pci/linux/*vfio*
FreeBSD EAL (with overlaps)
M: Bruce Richardson <bruce.richardson@intel.com>
F: lib/librte_eal/bsdapp/Makefile
F: lib/librte_eal/bsdapp/eal/
F: doc/guides/freebsd_gsg/
FreeBSD contigmem
M: Bruce Richardson <bruce.richardson@intel.com>
F: kernel/freebsd/contigmem/
FreeBSD UIO
M: Bruce Richardson <bruce.richardson@intel.com>
F: kernel/freebsd/nic_uio/
Core Libraries
--------------
Memory pool
M: Olivier Matz <olivier.matz@6wind.com>
M: Andrew Rybchenko <arybchenko@solarflare.com>
F: lib/librte_mempool/
F: drivers/mempool/Makefile
F: drivers/mempool/ring/
F: drivers/mempool/stack/
F: doc/guides/prog_guide/mempool_lib.rst
F: test/test/test_mempool*
F: test/test/test_func_reentrancy.c
Ring queue
M: Olivier Matz <olivier.matz@6wind.com>
F: lib/librte_ring/
F: doc/guides/prog_guide/ring_lib.rst
F: test/test/test_ring*
F: test/test/test_func_reentrancy.c
Packet buffer
M: Olivier Matz <olivier.matz@6wind.com>
F: lib/librte_mbuf/
F: doc/guides/prog_guide/mbuf_lib.rst
F: test/test/test_mbuf.c
Ethernet API
M: Thomas Monjalon <thomas@monjalon.net>
M: Ferruh Yigit <ferruh.yigit@intel.com>
M: Andrew Rybchenko <arybchenko@solarflare.com>
T: git://dpdk.org/next/dpdk-next-net
F: lib/librte_ethdev/
F: devtools/test-null.sh
Flow API
M: Adrien Mazarguil <adrien.mazarguil@6wind.com>
T: git://dpdk.org/next/dpdk-next-net
F: app/test-pmd/cmdline_flow.c
F: doc/guides/prog_guide/rte_flow.rst
F: lib/librte_ethdev/rte_flow*
Traffic Management API - EXPERIMENTAL
M: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
T: git://dpdk.org/next/dpdk-next-tm
F: lib/librte_ethdev/rte_tm*
Traffic Metering and Policing API - EXPERIMENTAL
M: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
F: lib/librte_ethdev/rte_mtr*
Baseband API - EXPERIMENTAL
M: Amr Mokhtar <amr.mokhtar@intel.com>
T: git://dpdk.org/next/dpdk-next-crypto
F: lib/librte_bbdev/
F: doc/guides/prog_guide/bbdev.rst
F: drivers/baseband/
F: doc/guides/bbdevs/
F: app/test-bbdev/
F: doc/guides/tools/testbbdev.rst
F: examples/bbdev_app/
F: doc/guides/sample_app_ug/bbdev_app.rst
Crypto API
M: Pablo de Lara <pablo.de.lara.guarch@intel.com>
M: Declan Doherty <declan.doherty@intel.com>
T: git://dpdk.org/next/dpdk-next-crypto
F: lib/librte_cryptodev/
F: test/test/test_cryptodev*
F: examples/l2fwd-crypto/
Security API - EXPERIMENTAL
M: Akhil Goyal <akhil.goyal@nxp.com>
M: Declan Doherty <declan.doherty@intel.com>
T: git://dpdk.org/next/dpdk-next-crypto
F: lib/librte_security/
F: doc/guides/prog_guide/rte_security.rst
Compression API - EXPERIMENTAL
M: Fiona Trahe <fiona.trahe@intel.com>
M: Pablo de Lara <pablo.de.lara.guarch@intel.com>
M: Ashish Gupta <ashish.gupta@caviumnetworks.com>
T: git://dpdk.org/next/dpdk-next-crypto
F: lib/librte_compressdev/
F: drivers/compress/
F: test/test/test_compressdev*
F: doc/guides/prog_guide/compressdev.rst
F: doc/guides/compressdevs/features/default.ini
Eventdev API
M: Jerin Jacob <jerin.jacob@caviumnetworks.com>
T: git://dpdk.org/next/dpdk-next-eventdev
F: lib/librte_eventdev/
F: drivers/event/skeleton/
F: test/test/test_eventdev.c
Eventdev Ethdev Rx Adapter API - EXPERIMENTAL
M: Nikhil Rao <nikhil.rao@intel.com>
T: git://dpdk.org/next/dpdk-next-eventdev
F: lib/librte_eventdev/*eth_rx_adapter*
F: test/test/test_event_eth_rx_adapter.c
F: doc/guides/prog_guide/event_ethernet_rx_adapter.rst
Eventdev Ethdev Tx Adapter API - EXPERIMENTAL
M: Nikhil Rao <nikhil.rao@intel.com>
T: git://dpdk.org/next/dpdk-next-eventdev
F: lib/librte_eventdev/*eth_tx_adapter*
F: test/test/test_event_eth_tx_adapter.c
F: doc/guides/prog_guide/event_ethernet_tx_adapter.rst
Eventdev Timer Adapter API - EXPERIMENTAL
M: Erik Gabriel Carrillo <erik.g.carrillo@intel.com>
T: git://dpdk.org/next/dpdk-next-eventdev
F: lib/librte_eventdev/*timer_adapter*
F: test/test/test_event_timer_adapter.c
F: doc/guides/prog_guide/event_timer_adapter.rst
Eventdev Crypto Adapter API - EXPERIMENTAL
M: Abhinandan Gujjar <abhinandan.gujjar@intel.com>
T: git://dpdk.org/next/dpdk-next-eventdev
F: lib/librte_eventdev/*crypto_adapter*
F: test/test/test_event_crypto_adapter.c
F: doc/guides/prog_guide/event_crypto_adapter.rst
Raw device API - EXPERIMENTAL
M: Shreyansh Jain <shreyansh.jain@nxp.com>
M: Hemant Agrawal <hemant.agrawal@nxp.com>
F: lib/librte_rawdev/
F: drivers/raw/skeleton_rawdev/
F: test/test/test_rawdev.c
F: doc/guides/prog_guide/rawdev.rst
Memory Pool Drivers
-------------------
Bucket memory pool
M: Artem V. Andreev <artem.andreev@oktetlabs.ru>
M: Andrew Rybchenko <arybchenko@solarflare.com>
F: drivers/mempool/bucket/
Bus Drivers
-----------
Intel FPGA bus
M: Rosen Xu <rosen.xu@intel.com>
F: drivers/bus/ifpga/
NXP buses
M: Hemant Agrawal <hemant.agrawal@nxp.com>
M: Shreyansh Jain <shreyansh.jain@nxp.com>
F: drivers/common/dpaax/
F: drivers/bus/dpaa/
F: drivers/bus/fslmc/
PCI bus driver
F: drivers/bus/pci/
VDEV bus driver
F: drivers/bus/vdev/
VMBUS bus driver
M: Stephen Hemminger <sthemmin@microsoft.com>
F: drivers/bus/vmbus/
Networking Drivers
------------------
M: Ferruh Yigit <ferruh.yigit@intel.com>
T: git://dpdk.org/next/dpdk-next-net
F: doc/guides/nics/features/default.ini
Link bonding
M: Declan Doherty <declan.doherty@intel.com>
M: Chas Williams <chas3@att.com>
F: drivers/net/bonding/
F: doc/guides/prog_guide/link_bonding_poll_mode_drv_lib.rst
F: test/test/test_link_bonding*
F: examples/bond/
F: doc/guides/nics/features/bonding.ini
Linux KNI
M: Ferruh Yigit <ferruh.yigit@intel.com>
F: kernel/linux/kni/
F: lib/librte_kni/
F: doc/guides/prog_guide/kernel_nic_interface.rst
F: test/test/test_kni.c
F: examples/kni/
F: doc/guides/sample_app_ug/kernel_nic_interface.rst
Linux AF_PACKET
M: John W. Linville <linville@tuxdriver.com>
F: drivers/net/af_packet/
F: doc/guides/nics/features/afpacket.ini
Amazon ENA
M: Marcin Wojtas <mw@semihalf.com>
M: Michal Krawczyk <mk@semihalf.com>
M: Guy Tzalik <gtzalik@amazon.com>
M: Evgeny Schemeilin <evgenys@amazon.com>
F: drivers/net/ena/
F: doc/guides/nics/ena.rst
F: doc/guides/nics/features/ena.ini
AMD axgbe
M: Ravi Kumar <ravi1.kumar@amd.com>
F: drivers/net/axgbe/
F: doc/guides/nics/axgbe.rst
F: doc/guides/nics/features/axgbe.ini
Aquantia atlantic
M: Igor Russkikh <igor.russkikh@aquantia.com>
M: Pavel Belous <pavel.belous@aquantia.com>
F: drivers/net/atlantic/
F: doc/guides/nics/atlantic.rst
F: doc/guides/nics/features/atlantic.ini
Atomic Rules ARK
M: Shepard Siegel <shepard.siegel@atomicrules.com>
M: Ed Czeck <ed.czeck@atomicrules.com>
M: John Miller <john.miller@atomicrules.com>
F: drivers/net/ark/
F: doc/guides/nics/ark.rst
F: doc/guides/nics/features/ark.ini
Broadcom bnxt
M: Ajit Khaparde <ajit.khaparde@broadcom.com>
M: Somnath Kotur <somnath.kotur@broadcom.com>
F: drivers/net/bnxt/
F: doc/guides/nics/bnxt.rst
F: doc/guides/nics/features/bnxt.ini
Cavium ThunderX nicvf
M: Jerin Jacob <jerin.jacob@caviumnetworks.com>
M: Maciej Czekaj <maciej.czekaj@caviumnetworks.com>
F: drivers/net/thunderx/
F: doc/guides/nics/thunderx.rst
F: doc/guides/nics/features/thunderx.ini
Cavium LiquidIO
M: Shijith Thotton <shijith.thotton@cavium.com>
M: Srisivasubramanian Srinivasan <ssrinivasan@cavium.com>
F: drivers/net/liquidio/
F: doc/guides/nics/liquidio.rst
F: doc/guides/nics/features/liquidio.ini
Cavium OCTEON TX
M: Jerin Jacob <jerin.jacob@caviumnetworks.com>
F: drivers/common/octeontx/
F: drivers/mempool/octeontx/
F: drivers/net/octeontx/
F: doc/guides/nics/octeontx.rst
F: doc/guides/nics/features/octeontx.ini
Chelsio cxgbe
M: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
F: drivers/net/cxgbe/
F: doc/guides/nics/cxgbe.rst
F: doc/guides/nics/features/cxgbe.ini
Cisco enic
M: John Daley <johndale@cisco.com>
M: Hyong Youb Kim <hyonkim@cisco.com>
F: drivers/net/enic/
F: doc/guides/nics/enic.rst
F: doc/guides/nics/features/enic.ini
Intel e1000
M: Wenzhuo Lu <wenzhuo.lu@intel.com>
T: git://dpdk.org/next/dpdk-next-net-intel
F: drivers/net/e1000/
F: doc/guides/nics/e1000em.rst
F: doc/guides/nics/intel_vf.rst
F: doc/guides/nics/features/e1000.ini
F: doc/guides/nics/features/igb*.ini
Intel ixgbe
M: Wenzhuo Lu <wenzhuo.lu@intel.com>
M: Konstantin Ananyev <konstantin.ananyev@intel.com>
T: git://dpdk.org/next/dpdk-next-net-intel
F: drivers/net/ixgbe/
F: doc/guides/nics/ixgbe.rst
F: doc/guides/nics/intel_vf.rst
F: doc/guides/nics/features/ixgbe*.ini
Intel i40e
M: Beilei Xing <beilei.xing@intel.com>
M: Qi Zhang <qi.z.zhang@intel.com>
T: git://dpdk.org/next/dpdk-next-net-intel
F: drivers/net/i40e/
F: doc/guides/nics/i40e.rst
F: doc/guides/nics/intel_vf.rst
F: doc/guides/nics/features/i40e*.ini
Intel fm10k
M: Qi Zhang <qi.z.zhang@intel.com>
M: Xiao Wang <xiao.w.wang@intel.com>
T: git://dpdk.org/next/dpdk-next-net-intel
F: drivers/net/fm10k/
F: doc/guides/nics/fm10k.rst
F: doc/guides/nics/features/fm10k*.ini
Intel avf
M: Jingjing Wu <jingjing.wu@intel.com>
M: Wenzhuo Lu <wenzhuo.lu@intel.com>
T: git://dpdk.org/next/dpdk-next-net-intel
F: drivers/net/avf/
F: doc/guides/nics/features/avf*.ini
net/ifcvf: add ifcvf vDPA driver The IFCVF vDPA (vhost data path acceleration) driver provides support for the Intel FPGA 100G VF (IFCVF). IFCVF's datapath is virtio ring compatible, it works as a HW vhost backend which can send/receive packets to/from virtio directly by DMA. Different VF devices serve different virtio frontends which are in different VMs, so each VF needs to have its own DMA address translation service. During the driver probe a new container is created, with this container vDPA driver can program DMA remapping table with the VM's memory region information. Key vDPA driver ops implemented: - ifcvf_dev_config: Enable VF data path with virtio information provided by vhost lib, including IOMMU programming to enable VF DMA to VM's memory, VFIO interrupt setup to route HW interrupt to virtio driver, create notify relay thread to translate virtio driver's kick to a MMIO write onto HW, HW queues configuration. - ifcvf_dev_close: Revoke all the setup in ifcvf_dev_config. Live migration feature is supported by IFCVF and this driver enables it. For the dirty page logging, VF helps to log for packet buffer write, driver helps to make the used ring as dirty when device stops. Because vDPA driver needs to set up MSI-X vector to interrupt the guest, only vfio-pci is supported currently. Signed-off-by: Xiao Wang <xiao.w.wang@intel.com> Signed-off-by: Rosen Xu <rosen.xu@intel.com> Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com> Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2018-04-17 07:06:23 +00:00
Intel ifc
M: Xiao Wang <xiao.w.wang@intel.com>
T: git://dpdk.org/next/dpdk-next-net-intel
F: drivers/net/ifc/
F: doc/guides/nics/ifc.rst
F: doc/guides/nics/features/ifc*.ini
net/ifcvf: add ifcvf vDPA driver The IFCVF vDPA (vhost data path acceleration) driver provides support for the Intel FPGA 100G VF (IFCVF). IFCVF's datapath is virtio ring compatible, it works as a HW vhost backend which can send/receive packets to/from virtio directly by DMA. Different VF devices serve different virtio frontends which are in different VMs, so each VF needs to have its own DMA address translation service. During the driver probe a new container is created, with this container vDPA driver can program DMA remapping table with the VM's memory region information. Key vDPA driver ops implemented: - ifcvf_dev_config: Enable VF data path with virtio information provided by vhost lib, including IOMMU programming to enable VF DMA to VM's memory, VFIO interrupt setup to route HW interrupt to virtio driver, create notify relay thread to translate virtio driver's kick to a MMIO write onto HW, HW queues configuration. - ifcvf_dev_close: Revoke all the setup in ifcvf_dev_config. Live migration feature is supported by IFCVF and this driver enables it. For the dirty page logging, VF helps to log for packet buffer write, driver helps to make the used ring as dirty when device stops. Because vDPA driver needs to set up MSI-X vector to interrupt the guest, only vfio-pci is supported currently. Signed-off-by: Xiao Wang <xiao.w.wang@intel.com> Signed-off-by: Rosen Xu <rosen.xu@intel.com> Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com> Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2018-04-17 07:06:23 +00:00
Marvell mvpp2
M: Tomasz Duszynski <tdu@semihalf.com>
M: Dmitri Epshtein <dima@marvell.com>
M: Natalie Samsonov <nsamsono@marvell.com>
F: drivers/common/mvep/
F: drivers/net/mvpp2/
F: doc/guides/nics/mvpp2.rst
F: doc/guides/nics/features/mvpp2.ini
Marvell mvneta
M: Zyta Szpak <zr@semihalf.com>
M: Dmitri Epshtein <dima@marvell.com>
M: Natalie Samsonov <nsamsono@marvell.com>
F: drivers/net/mvneta/
F: doc/guides/nics/mvneta.rst
F: doc/guides/nics/features/mvneta.ini
Mellanox mlx4
M: Matan Azrad <matan@mellanox.com>
M: Shahaf Shuler <shahafs@mellanox.com>
T: git://dpdk.org/next/dpdk-next-net-mlx
F: drivers/net/mlx4/
F: doc/guides/nics/mlx4.rst
F: doc/guides/nics/features/mlx4.ini
Mellanox mlx5
M: Shahaf Shuler <shahafs@mellanox.com>
M: Yongseok Koh <yskoh@mellanox.com>
T: git://dpdk.org/next/dpdk-next-net-mlx
F: drivers/net/mlx5/
F: doc/guides/nics/mlx5.rst
F: doc/guides/nics/features/mlx5.ini
Microsoft vdev_netvsc - EXPERIMENTAL
M: Matan Azrad <matan@mellanox.com>
F: drivers/net/vdev_netvsc/
F: doc/guides/nics/vdev_netvsc.rst
F: doc/guides/nics/features/vdev_netvsc.ini
Microsoft Hyper-V netvsc - EXPERIMENTAL
M: Stephen Hemminger <sthemmin@microsoft.com>
M: K. Y. Srinivasan <kys@microsoft.com>
M: Haiyang Zhang <haiyangz@microsoft.com>
F: drivers/net/netvsc/
F: doc/guides/nics/netvsc.rst
F: doc/guides/nics/features/netvsc.ini
Netcope szedata2
M: Jan Remes <remes@netcope.com>
F: drivers/net/szedata2/
F: doc/guides/nics/szedata2.rst
F: doc/guides/nics/features/szedata2.ini
Netronome nfp
M: Alejandro Lucero <alejandro.lucero@netronome.com>
F: drivers/net/nfp/
F: doc/guides/nics/nfp.rst
F: doc/guides/nics/features/nfp*.ini
NXP dpaa
M: Hemant Agrawal <hemant.agrawal@nxp.com>
M: Shreyansh Jain <shreyansh.jain@nxp.com>
F: drivers/mempool/dpaa/
F: drivers/net/dpaa/
F: doc/guides/nics/dpaa.rst
F: doc/guides/nics/features/dpaa.ini
NXP dpaa2
M: Hemant Agrawal <hemant.agrawal@nxp.com>
M: Shreyansh Jain <shreyansh.jain@nxp.com>
F: drivers/mempool/dpaa2/
F: drivers/net/dpaa2/
F: doc/guides/nics/dpaa2.rst
F: doc/guides/nics/features/dpaa2.ini
NXP enetc
M: Gagandeep Singh <g.singh@nxp.com>
M: Pankaj Chauhan <pankaj.chauhan@nxp.com>
F: drivers/net/enetc/
F: doc/guides/nics/enetc.rst
F: doc/guides/nics/features/enetc.ini
QLogic bnx2x
M: Harish Patil <harish.patil@cavium.com>
M: Rasesh Mody <rasesh.mody@cavium.com>
F: drivers/net/bnx2x/
F: doc/guides/nics/bnx2x.rst
F: doc/guides/nics/features/bnx2x*.ini
QLogic qede PMD
M: Rasesh Mody <rasesh.mody@cavium.com>
M: Harish Patil <harish.patil@cavium.com>
M: Shahed Shaikh <shahed.shaikh@cavium.com>
F: drivers/net/qede/
F: doc/guides/nics/qede.rst
F: doc/guides/nics/features/qede*.ini
Solarflare sfc_efx
M: Andrew Rybchenko <arybchenko@solarflare.com>
F: drivers/net/sfc/
F: doc/guides/nics/sfc_efx.rst
F: doc/guides/nics/features/sfc_efx.ini
VMware vmxnet3
M: Yong Wang <yongwang@vmware.com>
F: drivers/net/vmxnet3/
F: doc/guides/nics/vmxnet3.rst
F: doc/guides/nics/features/vmxnet3.ini
Vhost-user
M: Maxime Coquelin <maxime.coquelin@redhat.com>
M: Tiwei Bie <tiwei.bie@intel.com>
M: Zhihong Wang <zhihong.wang@intel.com>
T: git://dpdk.org/next/dpdk-next-virtio
F: lib/librte_vhost/
F: doc/guides/prog_guide/vhost_lib.rst
F: examples/vhost/
F: doc/guides/sample_app_ug/vhost.rst
F: examples/vhost_scsi/
F: doc/guides/sample_app_ug/vhost_scsi.rst
F: examples/vhost_crypto/
F: examples/vdpa/
F: doc/guides/sample_app_ug/vdpa.rst
Vhost PMD
M: Maxime Coquelin <maxime.coquelin@redhat.com>
M: Tiwei Bie <tiwei.bie@intel.com>
M: Zhihong Wang <zhihong.wang@intel.com>
T: git://dpdk.org/next/dpdk-next-virtio
F: drivers/net/vhost/
F: doc/guides/nics/vhost.rst
F: doc/guides/nics/features/vhost.ini
Virtio PMD
M: Maxime Coquelin <maxime.coquelin@redhat.com>
M: Tiwei Bie <tiwei.bie@intel.com>
M: Zhihong Wang <zhihong.wang@intel.com>
T: git://dpdk.org/next/dpdk-next-virtio
F: drivers/net/virtio/
F: doc/guides/nics/virtio.rst
F: doc/guides/nics/features/virtio*.ini
Wind River AVP
M: Allain Legacy <allain.legacy@windriver.com>
M: Matt Peters <matt.peters@windriver.com>
F: drivers/net/avp/
F: doc/guides/nics/avp.rst
F: doc/guides/nics/features/avp.ini
PCAP PMD
M: Ferruh Yigit <ferruh.yigit@intel.com>
F: drivers/net/pcap/
F: doc/guides/nics/pcap_ring.rst
F: doc/guides/nics/features/pcap.ini
Tap PMD
M: Keith Wiles <keith.wiles@intel.com>
F: drivers/net/tap/
F: doc/guides/nics/tap.rst
F: doc/guides/nics/features/tap.ini
KNI PMD
M: Ferruh Yigit <ferruh.yigit@intel.com>
F: drivers/net/kni/
F: doc/guides/nics/kni.rst
F: doc/guides/nics/features/kni.ini
Ring PMD
M: Bruce Richardson <bruce.richardson@intel.com>
F: drivers/net/ring/
F: doc/guides/nics/pcap_ring.rst
F: test/test/test_pmd_ring.c
F: test/test/test_pmd_ring_perf.c
F: doc/guides/nics/features/ring.ini
Null Networking PMD
M: Tetsuya Mukawa <mtetsuyah@gmail.com>
F: drivers/net/null/
F: doc/guides/nics/features/null.ini
Fail-safe PMD
M: Gaetan Rivet <gaetan.rivet@6wind.com>
F: drivers/net/failsafe/
F: doc/guides/nics/fail_safe.rst
F: doc/guides/nics/features/failsafe.ini
Softnic PMD
M: Jasvinder Singh <jasvinder.singh@intel.com>
M: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
F: drivers/net/softnic/
F: doc/guides/nics/features/softnic.ini
F: doc/guides/nics/softnic.rst
Crypto Drivers
--------------
M: Pablo de Lara <pablo.de.lara.guarch@intel.com>
T: git://dpdk.org/next/dpdk-next-crypto
F: doc/guides/cryptodevs/features/default.ini
AMD CCP Crypto
M: Ravi Kumar <ravi1.kumar@amd.com>
F: drivers/crypto/ccp/
F: doc/guides/cryptodevs/ccp.rst
F: doc/guides/cryptodevs/features/ccp.ini
ARMv8 Crypto
M: Jerin Jacob <jerin.jacob@caviumnetworks.com>
F: drivers/crypto/armv8/
F: doc/guides/cryptodevs/armv8.rst
F: doc/guides/cryptodevs/features/armv8.ini
Cavium OCTEON TX crypto
M: Anoob Joseph <anoob.joseph@caviumnetworks.com>
F: drivers/common/cpt/
F: drivers/crypto/octeontx/
F: doc/guides/cryptodevs/octeontx.rst
F: doc/guides/cryptodevs/features/octeontx.ini
Crypto Scheduler
M: Fan Zhang <roy.fan.zhang@intel.com>
F: drivers/crypto/scheduler/
F: doc/guides/cryptodevs/scheduler.rst
Intel AES-NI GCM
M: Declan Doherty <declan.doherty@intel.com>
F: drivers/crypto/aesni_gcm/
F: doc/guides/cryptodevs/aesni_gcm.rst
F: doc/guides/cryptodevs/features/aesni_gcm.ini
aesni_mb: add driver for multi buffer based crypto This patch provides the initial implementation of the AES-NI multi-buffer based crypto poll mode driver using DPDK's new cryptodev framework. This PMD is dependent on Intel's multibuffer library, see the whitepaper "Fast Multi-buffer IPsec Implementations on Intel® Architecture Processors", see ref 1 for details on the library's design and ref 2 to download the library itself. This initial implementation is limited to supporting the chained operations of "hash then cipher" or "cipher then hash" for the following cipher and hash algorithms: Cipher algorithms: - RTE_CRYPTO_CIPHER_AES_CBC (with 128-bit, 192-bit and 256-bit keys supported) Authentication algorithms: - RTE_CRYPTO_AUTH_SHA1_HMAC - RTE_CRYPTO_AUTH_SHA256_HMAC - RTE_CRYPTO_AUTH_SHA512_HMAC - RTE_CRYPTO_AUTH_AES_XCBC_MAC Important Note: Due to the fact that the multi-buffer library is designed for accelerating IPsec crypto operation, the digest's generated for the HMAC functions are truncated to lengths specified by IPsec RFC's, ie RFC2404 for using HMAC-SHA-1 with IPsec specifies that the digest is truncate from 20 to 12 bytes. Build instructions: To build DPDK with the AESNI_MB_PMD the user is required to download (ref 2) and compile the multi-buffer library on there system before building DPDK. The environmental variable AESNI_MULTI_BUFFER_LIB_PATH must be exported with the path where you extracted and built the multi buffer library and finally set CONFIG_RTE_LIBRTE_PMD_AESNI_MB=y in config/common_linuxapp. Current status: It's doesn't support crypto operation across chained mbufs, or cipher only or hash only operations. ref 1: https://www-ssl.intel.com/content/www/us/en/intelligent-systems/intel-technology/fast-multi-buffer-ipsec-implementations-ia-processors-p ref 2: https://downloadcenter.intel.com/download/22972 Signed-off-by: Declan Doherty <declan.doherty@intel.com> Acked-by: Sergio Gonzalez Monroy <sergio.gonzalez.monroy@intel.com>
2015-11-25 13:25:15 +00:00
Intel AES-NI Multi-Buffer
M: Declan Doherty <declan.doherty@intel.com>
F: drivers/crypto/aesni_mb/
F: doc/guides/cryptodevs/aesni_mb.rst
F: doc/guides/cryptodevs/features/aesni_mb.ini
aesni_mb: add driver for multi buffer based crypto This patch provides the initial implementation of the AES-NI multi-buffer based crypto poll mode driver using DPDK's new cryptodev framework. This PMD is dependent on Intel's multibuffer library, see the whitepaper "Fast Multi-buffer IPsec Implementations on Intel® Architecture Processors", see ref 1 for details on the library's design and ref 2 to download the library itself. This initial implementation is limited to supporting the chained operations of "hash then cipher" or "cipher then hash" for the following cipher and hash algorithms: Cipher algorithms: - RTE_CRYPTO_CIPHER_AES_CBC (with 128-bit, 192-bit and 256-bit keys supported) Authentication algorithms: - RTE_CRYPTO_AUTH_SHA1_HMAC - RTE_CRYPTO_AUTH_SHA256_HMAC - RTE_CRYPTO_AUTH_SHA512_HMAC - RTE_CRYPTO_AUTH_AES_XCBC_MAC Important Note: Due to the fact that the multi-buffer library is designed for accelerating IPsec crypto operation, the digest's generated for the HMAC functions are truncated to lengths specified by IPsec RFC's, ie RFC2404 for using HMAC-SHA-1 with IPsec specifies that the digest is truncate from 20 to 12 bytes. Build instructions: To build DPDK with the AESNI_MB_PMD the user is required to download (ref 2) and compile the multi-buffer library on there system before building DPDK. The environmental variable AESNI_MULTI_BUFFER_LIB_PATH must be exported with the path where you extracted and built the multi buffer library and finally set CONFIG_RTE_LIBRTE_PMD_AESNI_MB=y in config/common_linuxapp. Current status: It's doesn't support crypto operation across chained mbufs, or cipher only or hash only operations. ref 1: https://www-ssl.intel.com/content/www/us/en/intelligent-systems/intel-technology/fast-multi-buffer-ipsec-implementations-ia-processors-p ref 2: https://downloadcenter.intel.com/download/22972 Signed-off-by: Declan Doherty <declan.doherty@intel.com> Acked-by: Sergio Gonzalez Monroy <sergio.gonzalez.monroy@intel.com>
2015-11-25 13:25:15 +00:00
Intel QuickAssist
M: John Griffin <john.griffin@intel.com>
M: Fiona Trahe <fiona.trahe@intel.com>
M: Deepak Kumar Jain <deepak.k.jain@intel.com>
F: drivers/crypto/qat/
F: drivers/common/qat/
F: doc/guides/cryptodevs/qat.rst
F: doc/guides/cryptodevs/features/qat.ini
KASUMI
M: Pablo de Lara <pablo.de.lara.guarch@intel.com>
F: drivers/crypto/kasumi/
F: doc/guides/cryptodevs/kasumi.rst
F: doc/guides/cryptodevs/features/kasumi.ini
Marvell Mrvl
M: Tomasz Duszynski <tdu@semihalf.com>
M: Dmitri Epshtein <dima@marvell.com>
M: Natalie Samsonov <nsamsono@marvell.com>
F: drivers/crypto/mvsam/
F: doc/guides/cryptodevs/mvsam.rst
F: doc/guides/cryptodevs/features/mvsam.ini
Null Crypto
M: Declan Doherty <declan.doherty@intel.com>
F: drivers/crypto/null/
F: doc/guides/cryptodevs/null.rst
F: doc/guides/cryptodevs/features/null.ini
NXP CAAM JR
M: Gagandeep Singh <g.singh@nxp.com>
M: Hemant Agrawal <hemant.agrawal@nxp.com>
F: drivers/crypto/caam_jr/
F: doc/guides/cryptodevs/caam_jr.rst
F: doc/guides/cryptodevs/features/caam_jr.ini
NXP DPAA_SEC
M: Akhil Goyal <akhil.goyal@nxp.com>
M: Hemant Agrawal <hemant.agrawal@nxp.com>
F: drivers/crypto/dpaa_sec/
F: doc/guides/cryptodevs/dpaa_sec.rst
F: doc/guides/cryptodevs/features/dpaa_sec.ini
NXP DPAA2_SEC
M: Akhil Goyal <akhil.goyal@nxp.com>
M: Hemant Agrawal <hemant.agrawal@nxp.com>
F: drivers/crypto/dpaa2_sec/
F: doc/guides/cryptodevs/dpaa2_sec.rst
F: doc/guides/cryptodevs/features/dpaa2_sec.ini
OpenSSL
M: Declan Doherty <declan.doherty@intel.com>
F: drivers/crypto/openssl/
F: doc/guides/cryptodevs/openssl.rst
F: doc/guides/cryptodevs/features/openssl.ini
SNOW 3G
M: Pablo de Lara <pablo.de.lara.guarch@intel.com>
F: drivers/crypto/snow3g/
F: doc/guides/cryptodevs/snow3g.rst
F: doc/guides/cryptodevs/features/snow3g.ini
Virtio
M: Jay Zhou <jianjay.zhou@huawei.com>
F: drivers/crypto/virtio/
F: doc/guides/cryptodevs/virtio.rst
F: doc/guides/cryptodevs/features/virtio.ini
ZUC
M: Pablo de Lara <pablo.de.lara.guarch@intel.com>
F: drivers/crypto/zuc/
F: doc/guides/cryptodevs/zuc.rst
F: doc/guides/cryptodevs/features/zuc.ini
Compression Drivers
-------------------
M: Pablo de Lara <pablo.de.lara.guarch@intel.com>
T: git://dpdk.org/next/dpdk-next-crypto
Cavium OCTEON TX zipvf
M: Ashish Gupta <ashish.gupta@cavium.com>
F: drivers/compress/octeontx/
F: doc/guides/compressdevs/octeontx.rst
F: doc/guides/compressdevs/features/octeontx.ini
Intel QuickAssist
M: Fiona Trahe <fiona.trahe@intel.com>
F: drivers/compress/qat/
F: drivers/common/qat/
ISA-L
M: Lee Daly <lee.daly@intel.com>
F: drivers/compress/isal/
F: doc/guides/compressdevs/isal.rst
F: doc/guides/compressdevs/features/isal.ini
ZLIB
M: Sunila Sahu <sunila.sahu@caviumnetworks.com>
F: drivers/compress/zlib/
F: doc/guides/compressdevs/zlib.rst
F: doc/guides/compressdevs/features/zlib.ini
Eventdev Drivers
----------------
M: Jerin Jacob <jerin.jacob@caviumnetworks.com>
T: git://dpdk.org/next/dpdk-next-eventdev
Cavium OCTEON TX ssovf
M: Jerin Jacob <jerin.jacob@caviumnetworks.com>
F: drivers/event/octeontx/
F: doc/guides/eventdevs/octeontx.rst
Cavium OCTEON TX timvf
M: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
F: drivers/event/octeontx/timvf_*
NXP DPAA eventdev
M: Hemant Agrawal <hemant.agrawal@nxp.com>
M: Sunil Kumar Kori <sunil.kori@nxp.com>
F: drivers/event/dpaa/
F: doc/guides/eventdevs/dpaa.rst
NXP DPAA2 eventdev
M: Hemant Agrawal <hemant.agrawal@nxp.com>
M: Nipun Gupta <nipun.gupta@nxp.com>
F: drivers/event/dpaa2/
F: doc/guides/eventdevs/dpaa2.rst
Software Eventdev PMD
M: Harry van Haaren <harry.van.haaren@intel.com>
F: drivers/event/sw/
F: doc/guides/eventdevs/sw.rst
F: examples/eventdev_pipeline/
F: doc/guides/sample_app_ug/eventdev_pipeline.rst
Distributed Software Eventdev PMD
M: Mattias Rönnblom <mattias.ronnblom@ericsson.com>
F: drivers/event/dsw/
F: doc/guides/eventdevs/dsw.rst
Software OPDL Eventdev PMD
M: Liang Ma <liang.j.ma@intel.com>
M: Peter Mccarthy <peter.mccarthy@intel.com>
F: drivers/event/opdl/
F: doc/guides/eventdevs/opdl.rst
Rawdev Drivers
--------------
Intel FPGA
M: Rosen Xu <rosen.xu@intel.com>
M: Tianfei zhang <tianfei.zhang@intel.com>
F: drivers/raw/ifpga_rawdev/
F: doc/guides/rawdevs/ifpga_rawdev.rst
NXP DPAA2 QDMA
M: Nipun Gupta <nipun.gupta@nxp.com>
F: drivers/raw/dpaa2_qdma/
F: doc/guides/rawdevs/dpaa2_qdma.rst
DPAA2 CMDIF
M: Nipun Gupta <nipun.gupta@nxp.com>
F: drivers/raw/dpaa2_cmdif/
F: doc/guides/rawdevs/dpaa2_cmdif.rst
Packet processing
-----------------
Network headers
M: Olivier Matz <olivier.matz@6wind.com>
F: lib/librte_net/
Packet CRC
M: Jasvinder Singh <jasvinder.singh@intel.com>
F: lib/librte_net/rte_net_crc*
F: lib/librte_net/net_crc_sse.h
F: test/test/test_crc.c
IP fragmentation & reassembly
M: Konstantin Ananyev <konstantin.ananyev@intel.com>
F: lib/librte_ip_frag/
F: doc/guides/prog_guide/ip_fragment_reassembly_lib.rst
F: examples/ip_fragmentation/
F: doc/guides/sample_app_ug/ip_frag.rst
F: examples/ip_reassembly/
F: doc/guides/sample_app_ug/ip_reassembly.rst
lib/gro: add Generic Receive Offload API framework Generic Receive Offload (GRO) is a widely used SW-based offloading technique to reduce per-packet processing overhead. It gains performance by reassembling small packets into large ones. This patchset is to support GRO in DPDK. To support GRO, this patch implements a GRO API framework. To enable more flexibility to applications, DPDK GRO is implemented as a user library. Applications explicitly use the GRO library to merge small packets into large ones. DPDK GRO provides two reassembly modes. One is called lightweight mode, the other is called heavyweight mode. If applications want to merge packets in a simple way and the number of packets is relatively small, they can use the lightweight mode. If applications need more fine-grained controls, they can choose the heavyweight mode. rte_gro_reassemble_burst is the main reassembly API which is used in lightweight mode and processes N packets at a time. For applications, performing GRO in lightweight mode is simple. They just need to invoke rte_gro_reassemble_burst. Applications can get GROed packets as soon as rte_gro_reassemble_burst returns. rte_gro_reassemble is the main reassembly API which is used in heavyweight mode and tries to merge N inputted packets with the packets in GRO reassembly tables. For applications, performing GRO in heavyweight mode is relatively complicated. Before performing GRO, applications need to create a GRO context object, which keeps reassembly tables of desired GRO types, by rte_gro_ctx_create. Then applications can use rte_gro_reassemble to merge packets. The GROed packets are in the reassembly tables of the GRO context object. If applications want to get them, applications need to manually flush them by flush API. Signed-off-by: Jiayu Hu <jiayu.hu@intel.com> Reviewed-by: Jianfeng Tan <jianfeng.tan@intel.com>
2017-07-09 05:46:44 +00:00
Generic Receive Offload - EXPERIMENTAL
M: Jiayu Hu <jiayu.hu@intel.com>
F: lib/librte_gro/
F: doc/guides/prog_guide/generic_receive_offload_lib.rst
lib/gro: add Generic Receive Offload API framework Generic Receive Offload (GRO) is a widely used SW-based offloading technique to reduce per-packet processing overhead. It gains performance by reassembling small packets into large ones. This patchset is to support GRO in DPDK. To support GRO, this patch implements a GRO API framework. To enable more flexibility to applications, DPDK GRO is implemented as a user library. Applications explicitly use the GRO library to merge small packets into large ones. DPDK GRO provides two reassembly modes. One is called lightweight mode, the other is called heavyweight mode. If applications want to merge packets in a simple way and the number of packets is relatively small, they can use the lightweight mode. If applications need more fine-grained controls, they can choose the heavyweight mode. rte_gro_reassemble_burst is the main reassembly API which is used in lightweight mode and processes N packets at a time. For applications, performing GRO in lightweight mode is simple. They just need to invoke rte_gro_reassemble_burst. Applications can get GROed packets as soon as rte_gro_reassemble_burst returns. rte_gro_reassemble is the main reassembly API which is used in heavyweight mode and tries to merge N inputted packets with the packets in GRO reassembly tables. For applications, performing GRO in heavyweight mode is relatively complicated. Before performing GRO, applications need to create a GRO context object, which keeps reassembly tables of desired GRO types, by rte_gro_ctx_create. Then applications can use rte_gro_reassemble to merge packets. The GROed packets are in the reassembly tables of the GRO context object. If applications want to get them, applications need to manually flush them by flush API. Signed-off-by: Jiayu Hu <jiayu.hu@intel.com> Reviewed-by: Jianfeng Tan <jianfeng.tan@intel.com>
2017-07-09 05:46:44 +00:00
Generic Segmentation Offload
M: Jiayu Hu <jiayu.hu@intel.com>
F: lib/librte_gso/
F: doc/guides/prog_guide/generic_segmentation_offload_lib.rst
Flow Classify - EXPERIMENTAL
M: Bernard Iremonger <bernard.iremonger@intel.com>
F: lib/librte_flow_classify/
F: test/test/test_flow_classify*
F: doc/guides/prog_guide/flow_classify_lib.rst
F: examples/flow_classify/
F: doc/guides/sample_app_ug/flow_classify.rst
Distributor
M: Bruce Richardson <bruce.richardson@intel.com>
M: David Hunt <david.hunt@intel.com>
F: lib/librte_distributor/
F: doc/guides/prog_guide/packet_distrib_lib.rst
F: test/test/test_distributor*
F: examples/distributor/
F: doc/guides/sample_app_ug/dist_app.rst
Reorder
M: Reshma Pattan <reshma.pattan@intel.com>
F: lib/librte_reorder/
F: doc/guides/prog_guide/reorder_lib.rst
F: test/test/test_reorder*
F: examples/packet_ordering/
F: doc/guides/sample_app_ug/packet_ordering.rst
Hierarchical scheduler
M: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
F: lib/librte_sched/
F: doc/guides/prog_guide/qos_framework.rst
F: test/test/test_red.c
F: test/test/test_sched.c
F: examples/qos_sched/
F: doc/guides/sample_app_ug/qos_scheduler.rst
pdump: add new library for packet capture The librte_pdump library provides a framework for packet capturing in dpdk. The library provides set of APIs to initialize the packet capture framework, to enable or disable the packet capture, and to uninitialize it. The librte_pdump library works on a client/server model. The server is responsible for enabling or disabling the packet capture and the clients are responsible for requesting the enabling or disabling of the packet capture. Enabling APIs are supported with port, queue, ring and mempool parameters. Applications should pass on this information to get the packets from the dpdk ports. For enabling requests from applications, library creates the client request containing the mempool, ring, port and queue information and sends the request to the server. After receiving the request, server registers the Rx and Tx callbacks for all the port and queues. After the callbacks registration, registered callbacks will get the Rx and Tx packets. Packets then will be copied to the new mbufs that are allocated from the user passed mempool. These new mbufs then will be enqueued to the application passed ring. Applications need to dequeue the mbufs from the rings and direct them to the devices like pcap vdev for viewing the packets outside of the dpdk using the packet capture tools. For disabling requests, library creates the client request containing the port and queue information and sends the request to the server. After receiving the request, server removes the Rx and Tx callback for all the port and queues. Signed-off-by: Reshma Pattan <reshma.pattan@intel.com> Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
2016-06-15 14:06:22 +00:00
Packet capture
M: Reshma Pattan <reshma.pattan@intel.com>
F: lib/librte_pdump/
F: doc/guides/prog_guide/pdump_lib.rst
F: app/pdump/
F: doc/guides/tools/pdump.rst
pdump: add new library for packet capture The librte_pdump library provides a framework for packet capturing in dpdk. The library provides set of APIs to initialize the packet capture framework, to enable or disable the packet capture, and to uninitialize it. The librte_pdump library works on a client/server model. The server is responsible for enabling or disabling the packet capture and the clients are responsible for requesting the enabling or disabling of the packet capture. Enabling APIs are supported with port, queue, ring and mempool parameters. Applications should pass on this information to get the packets from the dpdk ports. For enabling requests from applications, library creates the client request containing the mempool, ring, port and queue information and sends the request to the server. After receiving the request, server registers the Rx and Tx callbacks for all the port and queues. After the callbacks registration, registered callbacks will get the Rx and Tx packets. Packets then will be copied to the new mbufs that are allocated from the user passed mempool. These new mbufs then will be enqueued to the application passed ring. Applications need to dequeue the mbufs from the rings and direct them to the devices like pcap vdev for viewing the packets outside of the dpdk using the packet capture tools. For disabling requests, library creates the client request containing the port and queue information and sends the request to the server. After receiving the request, server removes the Rx and Tx callback for all the port and queues. Signed-off-by: Reshma Pattan <reshma.pattan@intel.com> Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
2016-06-15 14:06:22 +00:00
Packet Framework
----------------
M: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
F: lib/librte_pipeline/
F: lib/librte_port/
F: lib/librte_table/
F: doc/guides/prog_guide/packet_framework.rst
F: test/test/test_table*
F: test/test-pipeline/
F: doc/guides/sample_app_ug/test_pipeline.rst
F: examples/ip_pipeline/
F: doc/guides/sample_app_ug/ip_pipeline.rst
Algorithms
----------
ACL
M: Konstantin Ananyev <konstantin.ananyev@intel.com>
F: lib/librte_acl/
F: doc/guides/prog_guide/packet_classif_access_ctrl.rst
F: test/test-acl/
F: test/test/test_acl.*
F: examples/l3fwd-acl/
F: doc/guides/sample_app_ug/l3_forward_access_ctrl.rst
EFD
M: Byron Marohn <byron.marohn@intel.com>
M: Pablo de Lara Guarch <pablo.de.lara.guarch@intel.com>
F: lib/librte_efd/
F: doc/guides/prog_guide/efd_lib.rst
F: test/test/test_efd*
F: examples/server_node_efd/
F: doc/guides/sample_app_ug/server_node_efd.rst
Hashes
M: Bruce Richardson <bruce.richardson@intel.com>
M: Pablo de Lara <pablo.de.lara.guarch@intel.com>
F: lib/librte_hash/
F: doc/guides/prog_guide/hash_lib.rst
F: test/test/test_*hash*
F: test/test/test_func_reentrancy.c
LPM
M: Bruce Richardson <bruce.richardson@intel.com>
F: lib/librte_lpm/
F: doc/guides/prog_guide/lpm*
F: test/test/test_lpm*
F: test/test/test_func_reentrancy.c
F: test/test/test_xmmt_ops.h
Membership - EXPERIMENTAL
M: Yipeng Wang <yipeng1.wang@intel.com>
M: Sameh Gobriel <sameh.gobriel@intel.com>
F: lib/librte_member/
F: doc/guides/prog_guide/member_lib.rst
F: test/test/test_member*
Traffic metering
M: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
F: lib/librte_meter/
F: doc/guides/sample_app_ug/qos_scheduler.rst
F: test/test/test_meter.c
F: examples/qos_meter/
F: doc/guides/sample_app_ug/qos_metering.rst
Other libraries
---------------
Configuration file
M: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
F: lib/librte_cfgfile/
F: test/test/test_cfgfile.c
F: test/test/test_cfgfiles/
Interactive command line
M: Olivier Matz <olivier.matz@6wind.com>
F: lib/librte_cmdline/
F: test/cmdline_test/
F: test/test/test_cmdline*
F: examples/cmdline/
F: doc/guides/sample_app_ug/cmd_line.rst
Key/Value parsing
M: Olivier Matz <olivier.matz@6wind.com>
F: lib/librte_kvargs/
F: test/test/test_kvargs.c
PCI
M: Gaetan Rivet <gaetan.rivet@6wind.com>
F: lib/librte_pci/
Power management
M: David Hunt <david.hunt@intel.com>
F: lib/librte_power/
F: doc/guides/prog_guide/power_man.rst
F: test/test/test_power*
F: examples/l3fwd-power/
F: doc/guides/sample_app_ug/l3_forward_power_man.rst
F: examples/vm_power_manager/
F: doc/guides/sample_app_ug/vm_power_management.rst
Timers
M: Robert Sanford <rsanford@akamai.com>
F: lib/librte_timer/
F: doc/guides/prog_guide/timer_lib.rst
F: test/test/test_timer*
F: examples/timer/
F: doc/guides/sample_app_ug/timer.rst
Job statistics
M: Pablo de Lara <pablo.de.lara.guarch@intel.com>
F: lib/librte_jobstats/
F: examples/l2fwd-jobstats/
F: doc/guides/sample_app_ug/l2_forward_job_stats.rst
Metrics
M: Remy Horton <remy.horton@intel.com>
F: lib/librte_metrics/
Bit-rate statistics
M: Remy Horton <remy.horton@intel.com>
F: lib/librte_bitratestats/
Latency statistics
M: Reshma Pattan <reshma.pattan@intel.com>
F: lib/librte_latencystats/
Telemetry - EXPERIMENTAL
M: Kevin Laatz <kevin.laatz@intel.com>
F: lib/librte_telemetry/
BPF - EXPERIMENTAL
M: Konstantin Ananyev <konstantin.ananyev@intel.com>
F: lib/librte_bpf/
F: test/bpf/
F: test/test/test_bpf.c
F: doc/guides/prog_guide/bpf_lib.rst
Test Applications
-----------------
Unit tests framework
F: test/Makefile
F: test/test/Makefile
F: test/test/autotest*
F: test/test/commands.c
F: test/test/packet_burst_generator.c
F: test/test/packet_burst_generator.h
F: test/test/process.h
F: test/test/resource.*
F: test/test/test.c
F: test/test/test.h
F: test/test/test_pmd_perf.c
F: test/test/test_resource.c
F: test/test/virtual_pmd.c
F: test/test/virtual_pmd.h
Driver testing tool
M: Wenzhuo Lu <wenzhuo.lu@intel.com>
M: Jingjing Wu <jingjing.wu@intel.com>
M: Bernard Iremonger <bernard.iremonger@intel.com>
F: app/test-pmd/
F: doc/guides/testpmd_app_ug/
app/crypto-perf: introduce performance test application This patchset introduce new application which allows measuring performance parameters of PMDs available in crypto tree. The goal of this application is to replace existing performance tests in app/test. Parameters available are: throughput (--ptest throughput) and latency (--ptest latency). User can use multiply cores to run tests on but only one type of crypto PMD can be measured during single application execution. Cipher parameters, type of device, type of operation and chain mode have to be specified in the command line as application parameters. These parameters are checked using device capabilities structure. Couple of new library functions in librte_cryptodev are introduced for application use. To build the application a CONFIG_RTE_APP_CRYPTO_PERF flag has to be set (it is set by default). Example of usage: -c 0xc0 --vdev crypto_aesni_mb_pmd -w 0000:00:00.0 -- --ptest throughput --devtype crypto_aesni_mb --optype cipher-then-auth --cipher-algo aes-cbc --cipher-op encrypt --cipher-key-sz 16 --auth-algo sha1-hmac --auth-op generate --auth-key-sz 64 --auth-digest-sz 12 --total-ops 10000000 --burst-sz 32 --buffer-sz 64 Signed-off-by: Declan Doherty <declan.doherty@intel.com> Signed-off-by: Slawomir Mrozowicz <slawomirx.mrozowicz@intel.com> Signed-off-by: Piotr Azarewicz <piotrx.t.azarewicz@intel.com> Signed-off-by: Marcin Kerlin <marcinx.kerlin@intel.com> Signed-off-by: Michal Kobylinski <michalx.kobylinski@intel.com>
2017-01-25 16:27:33 +00:00
Crypto performance test application
M: Declan Doherty <declan.doherty@intel.com>
F: app/test-crypto-perf/
F: doc/guides/tools/cryptoperf.rst
app/crypto-perf: introduce performance test application This patchset introduce new application which allows measuring performance parameters of PMDs available in crypto tree. The goal of this application is to replace existing performance tests in app/test. Parameters available are: throughput (--ptest throughput) and latency (--ptest latency). User can use multiply cores to run tests on but only one type of crypto PMD can be measured during single application execution. Cipher parameters, type of device, type of operation and chain mode have to be specified in the command line as application parameters. These parameters are checked using device capabilities structure. Couple of new library functions in librte_cryptodev are introduced for application use. To build the application a CONFIG_RTE_APP_CRYPTO_PERF flag has to be set (it is set by default). Example of usage: -c 0xc0 --vdev crypto_aesni_mb_pmd -w 0000:00:00.0 -- --ptest throughput --devtype crypto_aesni_mb --optype cipher-then-auth --cipher-algo aes-cbc --cipher-op encrypt --cipher-key-sz 16 --auth-algo sha1-hmac --auth-op generate --auth-key-sz 64 --auth-digest-sz 12 --total-ops 10000000 --burst-sz 32 --buffer-sz 64 Signed-off-by: Declan Doherty <declan.doherty@intel.com> Signed-off-by: Slawomir Mrozowicz <slawomirx.mrozowicz@intel.com> Signed-off-by: Piotr Azarewicz <piotrx.t.azarewicz@intel.com> Signed-off-by: Marcin Kerlin <marcinx.kerlin@intel.com> Signed-off-by: Michal Kobylinski <michalx.kobylinski@intel.com>
2017-01-25 16:27:33 +00:00
Eventdev test application
M: Jerin Jacob <jerin.jacob@caviumnetworks.com>
F: app/test-eventdev/
F: doc/guides/tools/testeventdev.rst
F: doc/guides/tools/img/eventdev_*
F: test/test/test_event_ring.c
Procinfo tool
M: Maryam Tahhan <maryam.tahhan@intel.com>
M: Reshma Pattan <reshma.pattan@intel.com>
F: app/proc-info/
F: doc/guides/tools/proc_info.rst
Other Example Applications
--------------------------
M: Remy Horton <remy.horton@intel.com>
F: examples/ethtool/
F: doc/guides/sample_app_ug/ethtool.rst
F: examples/exception_path/
F: doc/guides/sample_app_ug/exception_path.rst
M: Ori Kam <orika@mellanox.com>
F: examples/flow_filtering/
F: doc/guides/sample_app_ug/flow_filtering.rst
M: Bruce Richardson <bruce.richardson@intel.com>
M: Pablo de Lara <pablo.de.lara.guarch@intel.com>
F: examples/helloworld/
F: doc/guides/sample_app_ug/hello_world.rst
M: Radu Nicolau <radu.nicolau@intel.com>
M: Akhil Goyal <akhil.goyal@nxp.com>
F: examples/ipsec-secgw/
F: doc/guides/sample_app_ug/ipsec_secgw.rst
F: examples/ipv4_multicast/
F: doc/guides/sample_app_ug/ipv4_multicast.rst
M: Bruce Richardson <bruce.richardson@intel.com>
M: Pablo de Lara <pablo.de.lara.guarch@intel.com>
F: examples/l2fwd/
F: doc/guides/sample_app_ug/l2_forward_real_virtual.rst
M: Tomasz Kantecki <tomasz.kantecki@intel.com>
F: doc/guides/sample_app_ug/l2_forward_cat.rst
F: examples/l2fwd-cat/
F: examples/l3fwd/
F: doc/guides/sample_app_ug/l3_forward.rst
F: examples/l3fwd-vf/
F: doc/guides/sample_app_ug/l3_forward_virtual.rst
F: examples/link_status_interrupt/
F: doc/guides/sample_app_ug/link_status_intr.rst
F: examples/load_balancer/
F: doc/guides/sample_app_ug/load_balancer.rst
F: examples/netmap_compat/
F: doc/guides/sample_app_ug/netmap_compatibility.rst
L-threads - EXPERIMENTAL
M: John McNamara <john.mcnamara@intel.com>
F: examples/performance-thread/
F: doc/guides/sample_app_ug/performance_thread.rst
M: Pablo de Lara <pablo.de.lara.guarch@intel.com>
F: examples/ptpclient/
F: examples/quota_watermark/
F: doc/guides/sample_app_ug/quota_watermark.rst
M: Bruce Richardson <bruce.richardson@intel.com>
M: John McNamara <john.mcnamara@intel.com>
F: examples/rxtx_callbacks/
F: doc/guides/sample_app_ug/rxtx_callbacks.rst
M: Harry van Haaren <harry.van.haaren@intel.com>
F: examples/service_cores/
F: doc/guides/sample_app_ug/service_cores.rst
M: Bruce Richardson <bruce.richardson@intel.com>
M: John McNamara <john.mcnamara@intel.com>
F: examples/skeleton/
F: doc/guides/sample_app_ug/skeleton.rst
M: Xiaoyun Li <xiaoyun.li@intel.com>
F: examples/tep_termination/
F: examples/vmdq/
F: examples/vmdq_dcb/
F: doc/guides/sample_app_ug/vmdq_dcb_forwarding.rst