2018-07-14 01:34:27 +00:00
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/* SPDX-License-Identifier: BSD-3-Clause
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2018-05-23 20:56:55 +00:00
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* Copyright (c) 2016 - 2018 Cavium Inc.
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2016-04-27 14:18:37 +00:00
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* All rights reserved.
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2018-05-23 20:56:55 +00:00
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* www.cavium.com
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2016-04-27 14:18:37 +00:00
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*/
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#include <limits.h>
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2016-04-27 14:18:40 +00:00
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#include <rte_alarm.h>
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2018-05-14 05:00:42 +00:00
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#include <rte_string_fns.h>
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2016-04-27 14:18:37 +00:00
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#include "qede_ethdev.h"
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2020-07-08 22:50:53 +00:00
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/* ######### DEBUG ###########*/
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#include "qede_debug.h"
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2016-04-27 14:18:37 +00:00
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2016-04-27 14:18:40 +00:00
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/* Alarm timeout. */
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#define QEDE_ALARM_TIMEOUT_US 100000
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2016-04-27 14:18:37 +00:00
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/* Global variable to hold absolute path of fw file */
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2018-10-28 23:57:39 +00:00
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char qede_fw_file[PATH_MAX];
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2016-04-27 14:18:37 +00:00
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2018-10-28 23:57:38 +00:00
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static const char * const QEDE_DEFAULT_FIRMWARE =
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2019-10-20 05:20:49 +00:00
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"/lib/firmware/qed/qed_init_values-8.40.33.0.bin";
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2016-04-27 14:18:37 +00:00
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static void
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qed_update_pf_params(struct ecore_dev *edev, struct ecore_pf_params *params)
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{
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int i;
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for (i = 0; i < edev->num_hwfns; i++) {
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struct ecore_hwfn *p_hwfn = &edev->hwfns[i];
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p_hwfn->pf_params = *params;
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}
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}
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static void qed_init_pci(struct ecore_dev *edev, struct rte_pci_device *pci_dev)
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{
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edev->regview = pci_dev->mem_resource[0].addr;
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edev->doorbells = pci_dev->mem_resource[2].addr;
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2017-09-19 01:30:05 +00:00
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edev->db_size = pci_dev->mem_resource[2].len;
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2016-04-27 14:18:37 +00:00
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}
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static int
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qed_probe(struct ecore_dev *edev, struct rte_pci_device *pci_dev,
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2017-06-07 07:42:19 +00:00
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uint32_t dp_module, uint8_t dp_level, bool is_vf)
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2016-04-27 14:18:37 +00:00
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{
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2016-10-19 04:11:25 +00:00
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struct ecore_hw_prepare_params hw_prepare_params;
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2016-04-27 14:18:37 +00:00
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int rc;
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ecore_init_struct(edev);
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2017-03-29 20:36:23 +00:00
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edev->drv_type = DRV_ID_DRV_TYPE_LINUX;
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2017-06-07 07:42:19 +00:00
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/* Protocol type is always fixed to PROTOCOL_ETH */
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2017-03-29 20:36:23 +00:00
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2017-01-05 07:03:53 +00:00
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if (is_vf)
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2016-04-27 14:18:37 +00:00
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edev->b_is_vf = true;
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2017-01-05 07:03:53 +00:00
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2016-04-27 14:18:37 +00:00
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ecore_init_dp(edev, dp_module, dp_level, NULL);
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qed_init_pci(edev, pci_dev);
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2016-10-19 04:11:25 +00:00
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memset(&hw_prepare_params, 0, sizeof(hw_prepare_params));
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2020-02-06 20:01:45 +00:00
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if (is_vf)
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hw_prepare_params.acquire_retry_cnt = ECORE_VF_ACQUIRE_THRESH;
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2016-10-19 04:11:25 +00:00
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hw_prepare_params.personality = ECORE_PCI_ETH;
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hw_prepare_params.drv_resc_alloc = false;
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hw_prepare_params.chk_reg_fifo = false;
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2017-01-05 07:03:43 +00:00
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hw_prepare_params.initiate_pf_flr = true;
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2017-07-01 19:30:00 +00:00
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hw_prepare_params.allow_mdump = false;
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2018-04-09 04:48:09 +00:00
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hw_prepare_params.b_en_pacing = false;
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2020-07-08 22:50:52 +00:00
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hw_prepare_params.epoch = OSAL_GET_EPOCH(ECORE_LEADING_HWFN(edev));
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2016-10-19 04:11:25 +00:00
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rc = ecore_hw_prepare(edev, &hw_prepare_params);
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2016-04-27 14:18:37 +00:00
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if (rc) {
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DP_ERR(edev, "hw prepare failed\n");
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return rc;
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}
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return rc;
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}
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static int qed_nic_setup(struct ecore_dev *edev)
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{
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2017-04-25 07:28:46 +00:00
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int rc;
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2016-04-27 14:18:37 +00:00
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rc = ecore_resc_alloc(edev);
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if (rc)
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return rc;
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DP_INFO(edev, "Allocated qed resources\n");
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ecore_resc_setup(edev);
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return rc;
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}
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2016-10-19 04:11:17 +00:00
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#ifdef CONFIG_ECORE_ZIPPED_FW
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2016-04-27 14:18:37 +00:00
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static int qed_alloc_stream_mem(struct ecore_dev *edev)
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{
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int i;
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for_each_hwfn(edev, i) {
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struct ecore_hwfn *p_hwfn = &edev->hwfns[i];
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p_hwfn->stream = OSAL_ZALLOC(p_hwfn->p_dev, GFP_KERNEL,
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sizeof(*p_hwfn->stream));
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if (!p_hwfn->stream)
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return -ENOMEM;
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}
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return 0;
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}
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static void qed_free_stream_mem(struct ecore_dev *edev)
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{
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int i;
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for_each_hwfn(edev, i) {
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struct ecore_hwfn *p_hwfn = &edev->hwfns[i];
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if (!p_hwfn->stream)
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return;
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OSAL_FREE(p_hwfn->p_dev, p_hwfn->stream);
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}
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}
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2016-10-19 04:11:17 +00:00
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#endif
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2016-04-27 14:18:37 +00:00
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2016-10-19 04:11:17 +00:00
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#ifdef CONFIG_ECORE_BINARY_FW
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2016-04-27 14:18:37 +00:00
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static int qed_load_firmware_data(struct ecore_dev *edev)
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{
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int fd;
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struct stat st;
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const char *fw = RTE_LIBRTE_QEDE_FW;
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if (strcmp(fw, "") == 0)
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2018-10-28 23:57:39 +00:00
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strcpy(qede_fw_file, QEDE_DEFAULT_FIRMWARE);
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2016-04-27 14:18:37 +00:00
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else
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2018-10-28 23:57:39 +00:00
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strcpy(qede_fw_file, fw);
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2016-04-27 14:18:37 +00:00
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2018-10-28 23:57:39 +00:00
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fd = open(qede_fw_file, O_RDONLY);
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2016-04-27 14:18:37 +00:00
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if (fd < 0) {
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2017-07-01 19:29:59 +00:00
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DP_ERR(edev, "Can't open firmware file\n");
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2016-04-27 14:18:37 +00:00
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return -ENOENT;
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}
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if (fstat(fd, &st) < 0) {
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2017-07-01 19:29:59 +00:00
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DP_ERR(edev, "Can't stat firmware file\n");
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2016-11-30 12:32:09 +00:00
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close(fd);
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2016-04-27 14:18:37 +00:00
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return -1;
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}
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edev->firmware = rte_zmalloc("qede_fw", st.st_size,
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RTE_CACHE_LINE_SIZE);
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if (!edev->firmware) {
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2017-07-01 19:29:59 +00:00
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DP_ERR(edev, "Can't allocate memory for firmware\n");
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2016-04-27 14:18:37 +00:00
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close(fd);
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return -ENOMEM;
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}
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if (read(fd, edev->firmware, st.st_size) != st.st_size) {
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2017-07-01 19:29:59 +00:00
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DP_ERR(edev, "Can't read firmware data\n");
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2016-04-27 14:18:37 +00:00
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close(fd);
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return -1;
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}
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edev->fw_len = st.st_size;
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if (edev->fw_len < 104) {
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2017-07-01 19:29:59 +00:00
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DP_ERR(edev, "Invalid fw size: %" PRIu64 "\n",
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2016-04-27 14:18:37 +00:00
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edev->fw_len);
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2016-11-30 12:32:09 +00:00
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close(fd);
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2016-04-27 14:18:37 +00:00
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return -EINVAL;
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}
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2016-11-30 12:32:09 +00:00
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close(fd);
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2016-04-27 14:18:37 +00:00
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return 0;
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}
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2016-10-19 04:11:17 +00:00
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#endif
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2016-04-27 14:18:37 +00:00
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2016-04-27 14:18:40 +00:00
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static void qed_handle_bulletin_change(struct ecore_hwfn *hwfn)
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{
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uint8_t mac[ETH_ALEN], is_mac_exist, is_mac_forced;
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is_mac_exist = ecore_vf_bulletin_get_forced_mac(hwfn, mac,
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&is_mac_forced);
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if (is_mac_exist && is_mac_forced)
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rte_memcpy(hwfn->hw_info.hw_mac_addr, mac, ETH_ALEN);
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/* Always update link configuration according to bulletin */
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2017-11-07 08:34:20 +00:00
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qed_link_update(hwfn);
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2016-04-27 14:18:40 +00:00
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}
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static void qede_vf_task(void *arg)
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{
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struct ecore_hwfn *p_hwfn = arg;
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uint8_t change = 0;
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/* Read the bulletin board, and re-schedule the task */
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ecore_vf_read_bulletin(p_hwfn, &change);
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if (change)
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qed_handle_bulletin_change(p_hwfn);
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rte_eal_alarm_set(QEDE_ALARM_TIMEOUT_US, qede_vf_task, p_hwfn);
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}
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static void qed_start_iov_task(struct ecore_dev *edev)
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{
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struct ecore_hwfn *p_hwfn;
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int i;
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for_each_hwfn(edev, i) {
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p_hwfn = &edev->hwfns[i];
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if (!IS_PF(edev))
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rte_eal_alarm_set(QEDE_ALARM_TIMEOUT_US, qede_vf_task,
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p_hwfn);
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}
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}
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static void qed_stop_iov_task(struct ecore_dev *edev)
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{
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struct ecore_hwfn *p_hwfn;
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int i;
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for_each_hwfn(edev, i) {
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p_hwfn = &edev->hwfns[i];
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if (!IS_PF(edev))
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rte_eal_alarm_cancel(qede_vf_task, p_hwfn);
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}
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}
|
2016-04-27 14:18:37 +00:00
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static int qed_slowpath_start(struct ecore_dev *edev,
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struct qed_slowpath_params *params)
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{
|
2017-09-19 01:29:53 +00:00
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struct ecore_drv_load_params drv_load_params;
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struct ecore_hw_init_params hw_init_params;
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struct ecore_mcp_drv_version drv_version;
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2016-04-27 14:18:37 +00:00
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const uint8_t *data = NULL;
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struct ecore_hwfn *hwfn;
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2017-03-29 20:37:00 +00:00
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struct ecore_ptt *p_ptt;
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2016-04-27 14:18:37 +00:00
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int rc;
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2016-04-27 14:18:40 +00:00
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if (IS_PF(edev)) {
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2017-03-29 20:37:00 +00:00
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#ifdef CONFIG_ECORE_BINARY_FW
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2016-04-27 14:18:40 +00:00
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rc = qed_load_firmware_data(edev);
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if (rc) {
|
2018-10-28 23:57:39 +00:00
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DP_ERR(edev, "Failed to find fw file %s\n",
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qede_fw_file);
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2016-04-27 14:18:40 +00:00
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goto err;
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}
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2016-04-27 14:18:37 +00:00
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#endif
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2017-03-29 20:37:00 +00:00
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hwfn = ECORE_LEADING_HWFN(edev);
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if (edev->num_hwfns == 1) { /* skip aRFS for 100G device */
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p_ptt = ecore_ptt_acquire(hwfn);
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if (p_ptt) {
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ECORE_LEADING_HWFN(edev)->p_arfs_ptt = p_ptt;
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} else {
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DP_ERR(edev, "Failed to acquire PTT for flowdir\n");
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rc = -ENOMEM;
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goto err;
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}
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}
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}
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2016-04-27 14:18:37 +00:00
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rc = qed_nic_setup(edev);
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if (rc)
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goto err;
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/* set int_coalescing_mode */
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edev->int_coalescing_mode = ECORE_COAL_MODE_ENABLE;
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2016-10-19 04:11:17 +00:00
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#ifdef CONFIG_ECORE_ZIPPED_FW
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2016-04-27 14:18:40 +00:00
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if (IS_PF(edev)) {
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/* Allocate stream for unzipping */
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rc = qed_alloc_stream_mem(edev);
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if (rc) {
|
2017-07-01 19:29:59 +00:00
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DP_ERR(edev, "Failed to allocate stream memory\n");
|
2017-04-25 07:28:43 +00:00
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goto err1;
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2016-04-27 14:18:40 +00:00
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}
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2016-04-27 14:18:37 +00:00
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}
|
2017-04-25 07:28:46 +00:00
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#endif
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2016-04-27 14:18:37 +00:00
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2016-04-27 14:18:40 +00:00
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qed_start_iov_task(edev);
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2016-10-19 04:11:17 +00:00
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#ifdef CONFIG_ECORE_BINARY_FW
|
2020-07-08 22:50:53 +00:00
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if (IS_PF(edev)) {
|
2016-10-19 04:11:25 +00:00
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data = (const uint8_t *)edev->firmware + sizeof(u32);
|
2020-07-08 22:50:53 +00:00
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/* ############### DEBUG ################## */
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qed_dbg_pf_init(edev);
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}
|
2016-04-27 14:18:37 +00:00
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#endif
|
2016-10-19 04:11:25 +00:00
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2020-07-08 22:50:53 +00:00
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2016-10-19 04:11:28 +00:00
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/* Start the slowpath */
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memset(&hw_init_params, 0, sizeof(hw_init_params));
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hw_init_params.b_hw_start = true;
|
2018-06-23 21:20:32 +00:00
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hw_init_params.int_mode = params->int_mode;
|
2017-03-29 20:37:00 +00:00
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hw_init_params.allow_npar_tx_switch = true;
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2016-10-19 04:11:28 +00:00
|
|
|
hw_init_params.bin_fw_data = data;
|
2017-09-19 01:29:53 +00:00
|
|
|
|
|
|
|
memset(&drv_load_params, 0, sizeof(drv_load_params));
|
|
|
|
drv_load_params.mfw_timeout_val = ECORE_LOAD_REQ_LOCK_TO_DEFAULT;
|
|
|
|
drv_load_params.avoid_eng_reset = false;
|
|
|
|
drv_load_params.override_force_load = ECORE_OVERRIDE_FORCE_LOAD_ALWAYS;
|
2018-10-31 00:27:03 +00:00
|
|
|
hw_init_params.avoid_eng_affin = false;
|
2017-09-19 01:29:53 +00:00
|
|
|
hw_init_params.p_drv_load_params = &drv_load_params;
|
|
|
|
|
2016-10-19 04:11:28 +00:00
|
|
|
rc = ecore_hw_init(edev, &hw_init_params);
|
2016-04-27 14:18:37 +00:00
|
|
|
if (rc) {
|
|
|
|
DP_ERR(edev, "ecore_hw_init failed\n");
|
|
|
|
goto err2;
|
|
|
|
}
|
|
|
|
|
|
|
|
DP_INFO(edev, "HW inited and function started\n");
|
|
|
|
|
2016-04-27 14:18:40 +00:00
|
|
|
if (IS_PF(edev)) {
|
|
|
|
hwfn = ECORE_LEADING_HWFN(edev);
|
|
|
|
drv_version.version = (params->drv_major << 24) |
|
2016-04-27 14:18:37 +00:00
|
|
|
(params->drv_minor << 16) |
|
|
|
|
(params->drv_rev << 8) | (params->drv_eng);
|
2018-05-14 05:00:42 +00:00
|
|
|
strlcpy((char *)drv_version.name, (const char *)params->name,
|
|
|
|
sizeof(drv_version.name));
|
2016-04-27 14:18:40 +00:00
|
|
|
rc = ecore_mcp_send_drv_version(hwfn, hwfn->p_main_ptt,
|
2016-04-27 14:18:37 +00:00
|
|
|
&drv_version);
|
2016-04-27 14:18:40 +00:00
|
|
|
if (rc) {
|
2017-07-01 19:29:59 +00:00
|
|
|
DP_ERR(edev, "Failed sending drv version command\n");
|
2017-04-25 07:28:43 +00:00
|
|
|
goto err3;
|
2016-04-27 14:18:40 +00:00
|
|
|
}
|
2016-04-27 14:18:37 +00:00
|
|
|
}
|
|
|
|
|
2016-04-27 14:18:39 +00:00
|
|
|
ecore_reset_vport_stats(edev);
|
|
|
|
|
2016-04-27 14:18:37 +00:00
|
|
|
return 0;
|
|
|
|
|
2017-04-25 07:28:43 +00:00
|
|
|
err3:
|
2016-04-27 14:18:37 +00:00
|
|
|
ecore_hw_stop(edev);
|
|
|
|
err2:
|
2017-04-25 07:28:43 +00:00
|
|
|
qed_stop_iov_task(edev);
|
|
|
|
#ifdef CONFIG_ECORE_ZIPPED_FW
|
|
|
|
qed_free_stream_mem(edev);
|
|
|
|
err1:
|
|
|
|
#endif
|
2016-04-27 14:18:37 +00:00
|
|
|
ecore_resc_free(edev);
|
|
|
|
err:
|
2016-10-19 04:11:17 +00:00
|
|
|
#ifdef CONFIG_ECORE_BINARY_FW
|
2016-04-27 14:18:40 +00:00
|
|
|
if (IS_PF(edev)) {
|
|
|
|
if (edev->firmware)
|
|
|
|
rte_free(edev->firmware);
|
|
|
|
edev->firmware = NULL;
|
|
|
|
}
|
2016-04-27 14:18:37 +00:00
|
|
|
#endif
|
2016-04-27 14:18:40 +00:00
|
|
|
qed_stop_iov_task(edev);
|
|
|
|
|
2016-04-27 14:18:37 +00:00
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
qed_fill_dev_info(struct ecore_dev *edev, struct qed_dev_info *dev_info)
|
|
|
|
{
|
2017-09-19 01:29:52 +00:00
|
|
|
struct ecore_hwfn *p_hwfn = ECORE_LEADING_HWFN(edev);
|
2016-04-27 14:18:37 +00:00
|
|
|
struct ecore_ptt *ptt = NULL;
|
2017-03-29 20:36:30 +00:00
|
|
|
struct ecore_tunnel_info *tun = &edev->tunnel;
|
2016-04-27 14:18:37 +00:00
|
|
|
|
|
|
|
memset(dev_info, 0, sizeof(struct qed_dev_info));
|
2017-03-29 20:36:30 +00:00
|
|
|
|
2017-03-29 20:36:31 +00:00
|
|
|
if (tun->vxlan.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN &&
|
|
|
|
tun->vxlan.b_mode_enabled)
|
2017-03-29 20:36:30 +00:00
|
|
|
dev_info->vxlan_enable = true;
|
|
|
|
|
2017-03-29 20:36:31 +00:00
|
|
|
if (tun->l2_gre.b_mode_enabled && tun->ip_gre.b_mode_enabled &&
|
|
|
|
tun->l2_gre.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN &&
|
|
|
|
tun->ip_gre.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN)
|
2017-03-29 20:36:30 +00:00
|
|
|
dev_info->gre_enable = true;
|
|
|
|
|
2017-03-29 20:36:31 +00:00
|
|
|
if (tun->l2_geneve.b_mode_enabled && tun->ip_geneve.b_mode_enabled &&
|
|
|
|
tun->l2_geneve.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN &&
|
|
|
|
tun->ip_geneve.tun_cls == ECORE_TUNN_CLSS_MAC_VLAN)
|
2017-03-29 20:36:30 +00:00
|
|
|
dev_info->geneve_enable = true;
|
|
|
|
|
2016-04-27 14:18:37 +00:00
|
|
|
dev_info->num_hwfns = edev->num_hwfns;
|
|
|
|
dev_info->is_mf_default = IS_MF_DEFAULT(&edev->hwfns[0]);
|
2017-03-29 20:36:21 +00:00
|
|
|
dev_info->mtu = ECORE_LEADING_HWFN(edev)->hw_info.mtu;
|
2017-09-19 01:29:45 +00:00
|
|
|
dev_info->dev_type = edev->type;
|
2017-03-29 20:36:21 +00:00
|
|
|
|
2016-04-27 14:18:37 +00:00
|
|
|
rte_memcpy(&dev_info->hw_mac, &edev->hwfns[0].hw_info.hw_mac_addr,
|
2019-05-21 16:13:05 +00:00
|
|
|
RTE_ETHER_ADDR_LEN);
|
2016-04-27 14:18:37 +00:00
|
|
|
|
2017-04-25 07:28:42 +00:00
|
|
|
dev_info->fw_major = FW_MAJOR_VERSION;
|
|
|
|
dev_info->fw_minor = FW_MINOR_VERSION;
|
|
|
|
dev_info->fw_rev = FW_REVISION_VERSION;
|
|
|
|
dev_info->fw_eng = FW_ENGINEERING_VERSION;
|
|
|
|
|
2016-04-27 14:18:40 +00:00
|
|
|
if (IS_PF(edev)) {
|
2017-09-19 01:51:32 +00:00
|
|
|
dev_info->b_inter_pf_switch =
|
2020-04-27 07:58:55 +00:00
|
|
|
OSAL_GET_BIT(ECORE_MF_INTER_PF_SWITCH, &edev->mf_bits);
|
|
|
|
if (!OSAL_GET_BIT(ECORE_MF_DISABLE_ARFS, &edev->mf_bits))
|
2017-09-19 01:51:40 +00:00
|
|
|
dev_info->b_arfs_capable = true;
|
2016-04-27 14:18:40 +00:00
|
|
|
dev_info->tx_switching = false;
|
2016-04-27 14:18:37 +00:00
|
|
|
|
2017-09-19 01:29:52 +00:00
|
|
|
dev_info->smart_an = ecore_mcp_is_smart_an_supported(p_hwfn);
|
|
|
|
|
2016-04-27 14:18:40 +00:00
|
|
|
ptt = ecore_ptt_acquire(ECORE_LEADING_HWFN(edev));
|
|
|
|
if (ptt) {
|
2016-10-19 04:11:25 +00:00
|
|
|
ecore_mcp_get_mfw_ver(ECORE_LEADING_HWFN(edev), ptt,
|
2016-04-27 14:18:37 +00:00
|
|
|
&dev_info->mfw_rev, NULL);
|
|
|
|
|
2020-04-25 06:13:47 +00:00
|
|
|
ecore_mcp_get_mbi_ver(ECORE_LEADING_HWFN(edev), ptt,
|
|
|
|
&dev_info->mbi_version);
|
|
|
|
|
2016-04-27 14:18:40 +00:00
|
|
|
ecore_mcp_get_flash_size(ECORE_LEADING_HWFN(edev), ptt,
|
2016-04-27 14:18:37 +00:00
|
|
|
&dev_info->flash_size);
|
|
|
|
|
2016-04-27 14:18:40 +00:00
|
|
|
/* Workaround to allow PHY-read commands for
|
|
|
|
* B0 bringup.
|
|
|
|
*/
|
|
|
|
if (ECORE_IS_BB_B0(edev))
|
|
|
|
dev_info->flash_size = 0xffffffff;
|
2016-04-27 14:18:37 +00:00
|
|
|
|
2016-04-27 14:18:40 +00:00
|
|
|
ecore_ptt_release(ECORE_LEADING_HWFN(edev), ptt);
|
|
|
|
}
|
|
|
|
} else {
|
2016-10-19 04:11:25 +00:00
|
|
|
ecore_mcp_get_mfw_ver(ECORE_LEADING_HWFN(edev), ptt,
|
|
|
|
&dev_info->mfw_rev, NULL);
|
2016-04-27 14:18:37 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
|
|
|
qed_fill_eth_dev_info(struct ecore_dev *edev, struct qed_dev_eth_info *info)
|
|
|
|
{
|
2016-10-19 04:11:42 +00:00
|
|
|
uint8_t queues = 0;
|
2016-04-27 14:18:37 +00:00
|
|
|
int i;
|
|
|
|
|
|
|
|
memset(info, 0, sizeof(*info));
|
|
|
|
|
|
|
|
info->num_tc = 1 /* @@@TBD aelior MULTI_COS */;
|
|
|
|
|
2016-04-27 14:18:40 +00:00
|
|
|
if (IS_PF(edev)) {
|
2016-10-19 04:11:34 +00:00
|
|
|
int max_vf_vlan_filters = 0;
|
|
|
|
|
2016-04-27 14:18:40 +00:00
|
|
|
info->num_queues = 0;
|
|
|
|
for_each_hwfn(edev, i)
|
|
|
|
info->num_queues +=
|
|
|
|
FEAT_NUM(&edev->hwfns[i], ECORE_PF_L2_QUE);
|
2016-04-27 14:18:37 +00:00
|
|
|
|
2017-09-19 01:51:26 +00:00
|
|
|
if (IS_ECORE_SRIOV(edev))
|
2016-10-19 04:11:34 +00:00
|
|
|
max_vf_vlan_filters = edev->p_iov_info->total_vfs *
|
|
|
|
ECORE_ETH_VF_NUM_VLAN_FILTERS;
|
|
|
|
info->num_vlan_filters = RESC_NUM(&edev->hwfns[0], ECORE_VLAN) -
|
|
|
|
max_vf_vlan_filters;
|
2016-04-27 14:18:37 +00:00
|
|
|
|
2016-04-27 14:18:40 +00:00
|
|
|
rte_memcpy(&info->port_mac, &edev->hwfns[0].hw_info.hw_mac_addr,
|
2019-05-21 16:13:05 +00:00
|
|
|
RTE_ETHER_ADDR_LEN);
|
2016-04-27 14:18:40 +00:00
|
|
|
} else {
|
2016-10-19 04:11:42 +00:00
|
|
|
ecore_vf_get_num_rxqs(ECORE_LEADING_HWFN(edev),
|
|
|
|
&info->num_queues);
|
2017-09-19 01:51:28 +00:00
|
|
|
if (ECORE_IS_CMT(edev)) {
|
2016-10-19 04:11:42 +00:00
|
|
|
ecore_vf_get_num_rxqs(&edev->hwfns[1], &queues);
|
|
|
|
info->num_queues += queues;
|
|
|
|
}
|
2016-04-27 14:18:40 +00:00
|
|
|
|
|
|
|
ecore_vf_get_num_vlan_filters(&edev->hwfns[0],
|
2016-10-19 04:11:34 +00:00
|
|
|
(u8 *)&info->num_vlan_filters);
|
2016-04-27 14:18:40 +00:00
|
|
|
|
|
|
|
ecore_vf_get_port_mac(&edev->hwfns[0],
|
|
|
|
(uint8_t *)&info->port_mac);
|
2016-12-23 00:48:08 +00:00
|
|
|
|
|
|
|
info->is_legacy = ecore_vf_get_pre_fp_hsi(&edev->hwfns[0]);
|
2016-04-27 14:18:40 +00:00
|
|
|
}
|
2016-04-27 14:18:37 +00:00
|
|
|
|
|
|
|
qed_fill_dev_info(edev, &info->common);
|
|
|
|
|
2016-04-27 14:18:40 +00:00
|
|
|
if (IS_VF(edev))
|
2019-05-21 16:13:05 +00:00
|
|
|
memset(&info->common.hw_mac, 0, RTE_ETHER_ADDR_LEN);
|
2016-04-27 14:18:40 +00:00
|
|
|
|
2016-04-27 14:18:37 +00:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2017-03-29 20:36:23 +00:00
|
|
|
static void qed_set_name(struct ecore_dev *edev, char name[NAME_SIZE])
|
2016-04-27 14:18:37 +00:00
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
|
|
|
rte_memcpy(edev->name, name, NAME_SIZE);
|
|
|
|
for_each_hwfn(edev, i) {
|
|
|
|
snprintf(edev->hwfns[i].name, NAME_SIZE, "%s-%d", name, i);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static uint32_t
|
|
|
|
qed_sb_init(struct ecore_dev *edev, struct ecore_sb_info *sb_info,
|
2017-06-07 07:42:19 +00:00
|
|
|
void *sb_virt_addr, dma_addr_t sb_phy_addr, uint16_t sb_id)
|
2016-04-27 14:18:37 +00:00
|
|
|
{
|
|
|
|
struct ecore_hwfn *p_hwfn;
|
|
|
|
int hwfn_index;
|
|
|
|
uint16_t rel_sb_id;
|
2017-06-07 07:42:19 +00:00
|
|
|
uint8_t n_hwfns = edev->num_hwfns;
|
2016-04-27 14:18:37 +00:00
|
|
|
uint32_t rc;
|
|
|
|
|
|
|
|
hwfn_index = sb_id % n_hwfns;
|
|
|
|
p_hwfn = &edev->hwfns[hwfn_index];
|
|
|
|
rel_sb_id = sb_id / n_hwfns;
|
|
|
|
|
|
|
|
DP_INFO(edev, "hwfn [%d] <--[init]-- SB %04x [0x%04x upper]\n",
|
|
|
|
hwfn_index, rel_sb_id, sb_id);
|
|
|
|
|
|
|
|
rc = ecore_int_sb_init(p_hwfn, p_hwfn->p_main_ptt, sb_info,
|
|
|
|
sb_virt_addr, sb_phy_addr, rel_sb_id);
|
|
|
|
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void qed_fill_link(struct ecore_hwfn *hwfn,
|
2017-09-19 01:29:56 +00:00
|
|
|
__rte_unused struct ecore_ptt *ptt,
|
2016-04-27 14:18:37 +00:00
|
|
|
struct qed_link_output *if_link)
|
|
|
|
{
|
|
|
|
struct ecore_mcp_link_params params;
|
|
|
|
struct ecore_mcp_link_state link;
|
|
|
|
struct ecore_mcp_link_capabilities link_caps;
|
|
|
|
uint8_t change = 0;
|
|
|
|
|
|
|
|
memset(if_link, 0, sizeof(*if_link));
|
|
|
|
|
|
|
|
/* Prepare source inputs */
|
2016-04-27 14:18:40 +00:00
|
|
|
if (IS_PF(hwfn->p_dev)) {
|
|
|
|
rte_memcpy(¶ms, ecore_mcp_get_link_params(hwfn),
|
2016-04-27 14:18:37 +00:00
|
|
|
sizeof(params));
|
2016-04-27 14:18:40 +00:00
|
|
|
rte_memcpy(&link, ecore_mcp_get_link_state(hwfn), sizeof(link));
|
|
|
|
rte_memcpy(&link_caps, ecore_mcp_get_link_capabilities(hwfn),
|
2016-04-27 14:18:37 +00:00
|
|
|
sizeof(link_caps));
|
2016-04-27 14:18:40 +00:00
|
|
|
} else {
|
|
|
|
ecore_vf_read_bulletin(hwfn, &change);
|
|
|
|
ecore_vf_get_link_params(hwfn, ¶ms);
|
|
|
|
ecore_vf_get_link_state(hwfn, &link);
|
|
|
|
ecore_vf_get_link_caps(hwfn, &link_caps);
|
|
|
|
}
|
2016-04-27 14:18:37 +00:00
|
|
|
|
|
|
|
/* Set the link parameters to pass to protocol driver */
|
|
|
|
if (link.link_up)
|
|
|
|
if_link->link_up = true;
|
|
|
|
|
|
|
|
if (link.link_up)
|
|
|
|
if_link->speed = link.speed;
|
|
|
|
|
|
|
|
if_link->duplex = QEDE_DUPLEX_FULL;
|
|
|
|
|
2016-11-11 17:41:36 +00:00
|
|
|
/* Fill up the native advertised speed cap mask */
|
|
|
|
if_link->adv_speed = params.speed.advertised_speeds;
|
2016-10-31 18:35:01 +00:00
|
|
|
|
2016-04-27 14:18:37 +00:00
|
|
|
if (params.speed.autoneg)
|
|
|
|
if_link->supported_caps |= QEDE_SUPPORTED_AUTONEG;
|
|
|
|
|
|
|
|
if (params.pause.autoneg || params.pause.forced_rx ||
|
|
|
|
params.pause.forced_tx)
|
|
|
|
if_link->supported_caps |= QEDE_SUPPORTED_PAUSE;
|
|
|
|
|
|
|
|
if (params.pause.autoneg)
|
|
|
|
if_link->pause_config |= QED_LINK_PAUSE_AUTONEG_ENABLE;
|
|
|
|
|
|
|
|
if (params.pause.forced_rx)
|
|
|
|
if_link->pause_config |= QED_LINK_PAUSE_RX_ENABLE;
|
|
|
|
|
|
|
|
if (params.pause.forced_tx)
|
|
|
|
if_link->pause_config |= QED_LINK_PAUSE_TX_ENABLE;
|
2017-09-19 01:29:55 +00:00
|
|
|
|
|
|
|
if (link_caps.default_eee == ECORE_MCP_EEE_UNSUPPORTED) {
|
|
|
|
if_link->eee_supported = false;
|
|
|
|
} else {
|
|
|
|
if_link->eee_supported = true;
|
|
|
|
if_link->eee_active = link.eee_active;
|
|
|
|
if_link->sup_caps = link_caps.eee_speed_caps;
|
|
|
|
/* MFW clears adv_caps on eee disable; use configured value */
|
|
|
|
if_link->eee.adv_caps = link.eee_adv_caps ? link.eee_adv_caps :
|
|
|
|
params.eee.adv_caps;
|
|
|
|
if_link->eee.lp_adv_caps = link.eee_lp_adv_caps;
|
|
|
|
if_link->eee.enable = params.eee.enable;
|
|
|
|
if_link->eee.tx_lpi_enable = params.eee.tx_lpi_enable;
|
|
|
|
if_link->eee.tx_lpi_timer = params.eee.tx_lpi_timer;
|
|
|
|
}
|
2016-04-27 14:18:37 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
qed_get_current_link(struct ecore_dev *edev, struct qed_link_output *if_link)
|
|
|
|
{
|
2017-09-19 01:29:56 +00:00
|
|
|
struct ecore_hwfn *hwfn;
|
|
|
|
struct ecore_ptt *ptt;
|
2016-04-27 14:18:37 +00:00
|
|
|
|
2017-09-19 01:29:56 +00:00
|
|
|
hwfn = &edev->hwfns[0];
|
|
|
|
if (IS_PF(edev)) {
|
|
|
|
ptt = ecore_ptt_acquire(hwfn);
|
|
|
|
if (!ptt)
|
|
|
|
DP_NOTICE(hwfn, true, "Failed to fill link; No PTT\n");
|
|
|
|
|
|
|
|
qed_fill_link(hwfn, ptt, if_link);
|
|
|
|
|
|
|
|
if (ptt)
|
|
|
|
ecore_ptt_release(hwfn, ptt);
|
|
|
|
} else {
|
|
|
|
qed_fill_link(hwfn, NULL, if_link);
|
|
|
|
}
|
2016-04-27 14:18:37 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static int qed_set_link(struct ecore_dev *edev, struct qed_link_params *params)
|
|
|
|
{
|
|
|
|
struct ecore_hwfn *hwfn;
|
|
|
|
struct ecore_ptt *ptt;
|
|
|
|
struct ecore_mcp_link_params *link_params;
|
|
|
|
int rc;
|
|
|
|
|
2016-04-27 14:18:40 +00:00
|
|
|
if (IS_VF(edev))
|
|
|
|
return 0;
|
|
|
|
|
2016-04-27 14:18:37 +00:00
|
|
|
/* The link should be set only once per PF */
|
|
|
|
hwfn = &edev->hwfns[0];
|
|
|
|
|
|
|
|
ptt = ecore_ptt_acquire(hwfn);
|
|
|
|
if (!ptt)
|
|
|
|
return -EBUSY;
|
|
|
|
|
|
|
|
link_params = ecore_mcp_get_link_params(hwfn);
|
|
|
|
if (params->override_flags & QED_LINK_OVERRIDE_SPEED_AUTONEG)
|
|
|
|
link_params->speed.autoneg = params->autoneg;
|
|
|
|
|
|
|
|
if (params->override_flags & QED_LINK_OVERRIDE_PAUSE_CONFIG) {
|
|
|
|
if (params->pause_config & QED_LINK_PAUSE_AUTONEG_ENABLE)
|
|
|
|
link_params->pause.autoneg = true;
|
|
|
|
else
|
|
|
|
link_params->pause.autoneg = false;
|
|
|
|
if (params->pause_config & QED_LINK_PAUSE_RX_ENABLE)
|
|
|
|
link_params->pause.forced_rx = true;
|
|
|
|
else
|
|
|
|
link_params->pause.forced_rx = false;
|
|
|
|
if (params->pause_config & QED_LINK_PAUSE_TX_ENABLE)
|
|
|
|
link_params->pause.forced_tx = true;
|
|
|
|
else
|
|
|
|
link_params->pause.forced_tx = false;
|
|
|
|
}
|
|
|
|
|
2017-09-19 01:29:55 +00:00
|
|
|
if (params->override_flags & QED_LINK_OVERRIDE_EEE_CONFIG)
|
|
|
|
memcpy(&link_params->eee, ¶ms->eee,
|
|
|
|
sizeof(link_params->eee));
|
|
|
|
|
2016-04-27 14:18:37 +00:00
|
|
|
rc = ecore_mcp_set_link(hwfn, ptt, params->link_up);
|
|
|
|
|
|
|
|
ecore_ptt_release(hwfn, ptt);
|
|
|
|
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
2017-11-07 08:34:20 +00:00
|
|
|
void qed_link_update(struct ecore_hwfn *hwfn)
|
2016-04-27 14:18:40 +00:00
|
|
|
{
|
2017-11-07 08:34:20 +00:00
|
|
|
struct ecore_dev *edev = hwfn->p_dev;
|
|
|
|
struct qede_dev *qdev = (struct qede_dev *)edev;
|
2018-06-07 16:30:52 +00:00
|
|
|
struct rte_eth_dev *dev = (struct rte_eth_dev *)qdev->ethdev;
|
2016-04-27 14:18:40 +00:00
|
|
|
|
2018-06-07 16:30:52 +00:00
|
|
|
if (!qede_link_update(dev, 0))
|
|
|
|
_rte_eth_dev_callback_process(dev,
|
|
|
|
RTE_ETH_EVENT_INTR_LSC, NULL);
|
2016-04-27 14:18:40 +00:00
|
|
|
}
|
|
|
|
|
2016-04-27 14:18:37 +00:00
|
|
|
static int qed_drain(struct ecore_dev *edev)
|
|
|
|
{
|
|
|
|
struct ecore_hwfn *hwfn;
|
|
|
|
struct ecore_ptt *ptt;
|
|
|
|
int i, rc;
|
|
|
|
|
2016-04-27 14:18:40 +00:00
|
|
|
if (IS_VF(edev))
|
|
|
|
return 0;
|
|
|
|
|
2016-04-27 14:18:37 +00:00
|
|
|
for_each_hwfn(edev, i) {
|
|
|
|
hwfn = &edev->hwfns[i];
|
|
|
|
ptt = ecore_ptt_acquire(hwfn);
|
|
|
|
if (!ptt) {
|
2017-07-01 19:29:59 +00:00
|
|
|
DP_ERR(hwfn, "Failed to drain NIG; No PTT\n");
|
2016-04-27 14:18:37 +00:00
|
|
|
return -EBUSY;
|
|
|
|
}
|
|
|
|
rc = ecore_mcp_drain(hwfn, ptt);
|
|
|
|
if (rc)
|
|
|
|
return rc;
|
|
|
|
ecore_ptt_release(hwfn, ptt);
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int qed_nic_stop(struct ecore_dev *edev)
|
|
|
|
{
|
|
|
|
int i, rc;
|
|
|
|
|
|
|
|
rc = ecore_hw_stop(edev);
|
|
|
|
for (i = 0; i < edev->num_hwfns; i++) {
|
|
|
|
struct ecore_hwfn *p_hwfn = &edev->hwfns[i];
|
|
|
|
|
|
|
|
if (p_hwfn->b_sp_dpc_enabled)
|
|
|
|
p_hwfn->b_sp_dpc_enabled = false;
|
|
|
|
}
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int qed_slowpath_stop(struct ecore_dev *edev)
|
|
|
|
{
|
|
|
|
#ifdef CONFIG_QED_SRIOV
|
|
|
|
int i;
|
|
|
|
#endif
|
|
|
|
|
|
|
|
if (!edev)
|
|
|
|
return -ENODEV;
|
|
|
|
|
2016-04-27 14:18:40 +00:00
|
|
|
if (IS_PF(edev)) {
|
2016-10-19 04:11:17 +00:00
|
|
|
#ifdef CONFIG_ECORE_ZIPPED_FW
|
2016-04-27 14:18:40 +00:00
|
|
|
qed_free_stream_mem(edev);
|
2016-10-19 04:11:17 +00:00
|
|
|
#endif
|
2016-04-27 14:18:37 +00:00
|
|
|
|
2016-04-27 14:18:40 +00:00
|
|
|
#ifdef CONFIG_QED_SRIOV
|
|
|
|
if (IS_QED_ETH_IF(edev))
|
|
|
|
qed_sriov_disable(edev, true);
|
|
|
|
#endif
|
|
|
|
}
|
2016-04-27 14:18:37 +00:00
|
|
|
|
2017-03-29 20:36:57 +00:00
|
|
|
qed_nic_stop(edev);
|
|
|
|
|
|
|
|
ecore_resc_free(edev);
|
2016-04-27 14:18:40 +00:00
|
|
|
qed_stop_iov_task(edev);
|
2016-04-27 14:18:37 +00:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void qed_remove(struct ecore_dev *edev)
|
|
|
|
{
|
|
|
|
if (!edev)
|
|
|
|
return;
|
|
|
|
|
|
|
|
ecore_hw_remove(edev);
|
|
|
|
}
|
|
|
|
|
2017-03-29 20:36:02 +00:00
|
|
|
static int qed_send_drv_state(struct ecore_dev *edev, bool active)
|
|
|
|
{
|
|
|
|
struct ecore_hwfn *hwfn = ECORE_LEADING_HWFN(edev);
|
|
|
|
struct ecore_ptt *ptt;
|
|
|
|
int status = 0;
|
|
|
|
|
|
|
|
ptt = ecore_ptt_acquire(hwfn);
|
|
|
|
if (!ptt)
|
|
|
|
return -EAGAIN;
|
|
|
|
|
|
|
|
status = ecore_mcp_ov_update_driver_state(hwfn, ptt, active ?
|
|
|
|
ECORE_OV_DRIVER_STATE_ACTIVE :
|
|
|
|
ECORE_OV_DRIVER_STATE_DISABLED);
|
|
|
|
|
|
|
|
ecore_ptt_release(hwfn, ptt);
|
|
|
|
|
|
|
|
return status;
|
|
|
|
}
|
|
|
|
|
2017-03-29 20:36:04 +00:00
|
|
|
static int qed_get_sb_info(struct ecore_dev *edev, struct ecore_sb_info *sb,
|
|
|
|
u16 qid, struct ecore_sb_info_dbg *sb_dbg)
|
|
|
|
{
|
|
|
|
struct ecore_hwfn *hwfn = &edev->hwfns[qid % edev->num_hwfns];
|
|
|
|
struct ecore_ptt *ptt;
|
|
|
|
int rc;
|
|
|
|
|
|
|
|
if (IS_VF(edev))
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
ptt = ecore_ptt_acquire(hwfn);
|
|
|
|
if (!ptt) {
|
2017-07-01 19:29:59 +00:00
|
|
|
DP_ERR(hwfn, "Can't acquire PTT\n");
|
2017-03-29 20:36:04 +00:00
|
|
|
return -EAGAIN;
|
|
|
|
}
|
|
|
|
|
|
|
|
memset(sb_dbg, 0, sizeof(*sb_dbg));
|
|
|
|
rc = ecore_int_get_sb_dbg(hwfn, ptt, sb, sb_dbg);
|
|
|
|
|
|
|
|
ecore_ptt_release(hwfn, ptt);
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
2016-04-27 14:18:37 +00:00
|
|
|
const struct qed_common_ops qed_common_ops_pass = {
|
|
|
|
INIT_STRUCT_FIELD(probe, &qed_probe),
|
|
|
|
INIT_STRUCT_FIELD(update_pf_params, &qed_update_pf_params),
|
|
|
|
INIT_STRUCT_FIELD(slowpath_start, &qed_slowpath_start),
|
2017-03-29 20:36:23 +00:00
|
|
|
INIT_STRUCT_FIELD(set_name, &qed_set_name),
|
2016-04-27 14:18:37 +00:00
|
|
|
INIT_STRUCT_FIELD(chain_alloc, &ecore_chain_alloc),
|
|
|
|
INIT_STRUCT_FIELD(chain_free, &ecore_chain_free),
|
|
|
|
INIT_STRUCT_FIELD(sb_init, &qed_sb_init),
|
2017-04-25 07:28:46 +00:00
|
|
|
INIT_STRUCT_FIELD(get_sb_info, &qed_get_sb_info),
|
2016-04-27 14:18:37 +00:00
|
|
|
INIT_STRUCT_FIELD(get_link, &qed_get_current_link),
|
|
|
|
INIT_STRUCT_FIELD(set_link, &qed_set_link),
|
|
|
|
INIT_STRUCT_FIELD(drain, &qed_drain),
|
|
|
|
INIT_STRUCT_FIELD(slowpath_stop, &qed_slowpath_stop),
|
|
|
|
INIT_STRUCT_FIELD(remove, &qed_remove),
|
2017-03-29 20:36:02 +00:00
|
|
|
INIT_STRUCT_FIELD(send_drv_state, &qed_send_drv_state),
|
2020-07-08 22:50:53 +00:00
|
|
|
/* ############### DEBUG ####################*/
|
|
|
|
|
|
|
|
INIT_STRUCT_FIELD(dbg_get_debug_engine, &qed_get_debug_engine),
|
|
|
|
INIT_STRUCT_FIELD(dbg_set_debug_engine, &qed_set_debug_engine),
|
|
|
|
|
|
|
|
INIT_STRUCT_FIELD(dbg_protection_override,
|
|
|
|
&qed_dbg_protection_override),
|
|
|
|
INIT_STRUCT_FIELD(dbg_protection_override_size,
|
|
|
|
&qed_dbg_protection_override_size),
|
|
|
|
|
|
|
|
INIT_STRUCT_FIELD(dbg_grc, &qed_dbg_grc),
|
|
|
|
INIT_STRUCT_FIELD(dbg_grc_size, &qed_dbg_grc_size),
|
|
|
|
|
|
|
|
INIT_STRUCT_FIELD(dbg_idle_chk, &qed_dbg_idle_chk),
|
|
|
|
INIT_STRUCT_FIELD(dbg_idle_chk_size, &qed_dbg_idle_chk_size),
|
|
|
|
|
|
|
|
INIT_STRUCT_FIELD(dbg_mcp_trace, &qed_dbg_mcp_trace),
|
|
|
|
INIT_STRUCT_FIELD(dbg_mcp_trace_size, &qed_dbg_mcp_trace_size),
|
|
|
|
|
|
|
|
INIT_STRUCT_FIELD(dbg_fw_asserts, &qed_dbg_fw_asserts),
|
|
|
|
INIT_STRUCT_FIELD(dbg_fw_asserts_size, &qed_dbg_fw_asserts_size),
|
|
|
|
|
|
|
|
INIT_STRUCT_FIELD(dbg_ilt, &qed_dbg_ilt),
|
|
|
|
INIT_STRUCT_FIELD(dbg_ilt_size, &qed_dbg_ilt_size),
|
|
|
|
|
|
|
|
INIT_STRUCT_FIELD(dbg_reg_fifo_size, &qed_dbg_reg_fifo_size),
|
|
|
|
INIT_STRUCT_FIELD(dbg_reg_fifo, &qed_dbg_reg_fifo),
|
|
|
|
|
|
|
|
INIT_STRUCT_FIELD(dbg_igu_fifo_size, &qed_dbg_igu_fifo_size),
|
|
|
|
INIT_STRUCT_FIELD(dbg_igu_fifo, &qed_dbg_igu_fifo),
|
2016-04-27 14:18:37 +00:00
|
|
|
};
|
2017-06-07 07:42:19 +00:00
|
|
|
|
|
|
|
const struct qed_eth_ops qed_eth_ops_pass = {
|
|
|
|
INIT_STRUCT_FIELD(common, &qed_common_ops_pass),
|
|
|
|
INIT_STRUCT_FIELD(fill_dev_info, &qed_fill_eth_dev_info),
|
|
|
|
};
|
|
|
|
|
|
|
|
const struct qed_eth_ops *qed_get_eth_ops(void)
|
|
|
|
{
|
|
|
|
return &qed_eth_ops_pass;
|
|
|
|
}
|