Commit Graph

671 Commits

Author SHA1 Message Date
Qi Zhang
bbed2226fd net/ice/base: implement new shadow RAM read
Remove the ice_read_sr_aq function and implement ice_read_sr_word_aq
directly in terms of the new ice_read_flat_nvm function. This simplifies
the code by reducing a now unnecessary reading function.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-04-21 13:57:05 +02:00
Qi Zhang
9f041a7214 net/ice/base: add macro specifying max NVM offset
The ice_aq_read_nvm function uses a somewhat weird construction for
verifying that the incoming offset is valid. Replace this construction
with a simple greater-than expression, and define the maximum value
(24bits) in the ice_adminq_cmd.h

By providing a macro, the check becomes more clear. Additionally the
maximum offset can be used in other locations.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-04-21 13:57:05 +02:00
Qi Zhang
2516684aed net/ice/base: extract logic of flat NVM read to function
The ice_read_sr_buf_aq function implements logic to correctly break
apart NVM reads into 4Kb chunks. Additionally, it ensures that each read
never crosses a Shadow RAM sector boundary. This logic is useful when
reading the flat NVM as a byte-addressable stream.

Extract that logic in terms of bytes and implement it as
ice_read_flat_nvm. Use this new function to implement ice_read_sr_buf_aq
function.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-04-21 13:57:05 +02:00
Qi Zhang
84551c9565 net/ice/base: add AN masks to get PHY capabilities
Adds masks indicating AN clauses to the Get PHY Capabilities
command. Changes the name of the low_power_ctrl field to be
properly descriptive of it being an AN field.

Signed-off-by: Lev Faerman <lev.faerman@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-04-21 13:57:05 +02:00
Qi Zhang
87e1f7f3d8 net/ice/base: add shared driver parameter command
Adds the Driver Shared Parameters (0x0C90) AQ command.

Signed-off-by: Lev Faerman <lev.faerman@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-04-21 13:57:05 +02:00
Qi Zhang
1d6cf7df2a net/ice/base: add PHY number definition values
As title.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-04-21 13:57:05 +02:00
Qi Zhang
6cfacf7d71 net/ice/base: capitalize abbreviations
Fix abbreviations as found by abbrevcheck

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-04-21 13:57:05 +02:00
Qi Zhang
486d29fda5 net/ice/base: add dedicate MAC type for E810
Add a new MAC type ICE_MAC_E810 to distinguish E810 devices from other
devices. MAC types for all other devices will be ICE_MAC_GENERIC till
there's a need to distinguish further between devices.

Signed-off-by: Anirudh Venkataramanan <anirudh.venkataramanan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-04-21 13:57:04 +02:00
Qi Zhang
6cad4aa1a5 net/ice/base: support link default override
Adds functions to check for link override firmware support and get
the override settings for a port. Link override allows a user to force
link settings that are not normally supported.

Firmware support is version dependent so a function to check support has
been added.

The link FC settings will use the override if available.

Signed-off-by: Evan Swanson <evan.swanson@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-04-21 13:57:04 +02:00
Qi Zhang
762e946d59 net/ice/base: support GTPU uplink and downlink
Enable GTPU uplink and downlink flag usage.
TCAM with different GTPU extend header flag can be separated.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-04-21 13:57:04 +02:00
Qi Zhang
ceb2f4c387 net/ice/base: minor fixes
This is a collection of minor fixes that were found during code review.
Changes are:
- Call ice_hweight8() instead of calculating it ourselves in
  ice_bits_max_set().
- Call ice_test_and_clear_bit() over calling ice_is_bit_set() then
  ice_clear_bit() in ice_rem_vsi_rss_list().
- Remove 'chrs' variable in ice_add_prof_id_flow() as it's not being
  used for anything.
- Return result directly instead of assigning to variable then
  returning the variable in ice_rem_vsig().
- Reduce scope, and don't initialize, 'or_vsig' in
  ice_add_prof_id_flow().
- Return error immediately in ice_add_prof_id_vsig(). Since the memory
  wasn't allocated, there is no need to goto and attempt to free memory.
- Show that values 37-38 are reserved in ice_flow_avf_hdr_field as the
  other reserved values are shown.
- Fix RCT ordering
- Remove initialization of values that aren't needed
- Fix function headers to match function names
- Use offsetof instead of calculating ourselves in ice_pkg_buf_alloc()
- In ice_rem_prof(), do not set status to ICE_SUCCESS as, due to code
  flow, this will always be ICE_SUCCESS.
- Remove unnecessary semicolon in ice_prof_gen_key()
- Remove unnecessary initializations
- correct bw_alloc type in ice_sched_add_root_node

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-04-21 13:57:04 +02:00
Qi Zhang
701f7ba619 net/ice/base: add NVM netlist macros
As title, these macros are added for future use.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-04-21 13:57:04 +02:00
Qi Zhang
88ea6b3b7a net/ice/base: refactor a function
Refactor function ice_prof_bld_xlt2, a switch statement is better suited
for this situation and eliminates the need for the "found" variable.

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-04-21 13:57:04 +02:00
Qi Zhang
795604170a net/ice/base: use descriptive variable name than type
The variable name 'type' is not very descriptive. Replace instances of
those with a variable name that is more descriptive or replace it if not
needed.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-04-21 13:57:04 +02:00
Qi Zhang
71fbaee92d net/ice/base: use struct size helper
For structures using the common C "struct hack" technique to create a
flexible length structure member at the end of the structure, use the
ice_struct_size macro to determine the length of the structure instead
of open coding the calculation.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-04-21 13:57:04 +02:00
Qi Zhang
4a3c620f61 net/ice/base: replace u16 with enum
Use enum ice_flow_field directly so no need to be converted
from u16 for ice_flow_xtract_fld

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-04-21 13:57:04 +02:00
Qi Zhang
3a98d6cbdb net/ice/base: allow VLAN and ethertype filter for port
Add new API function which allow user to choose port on which
VLAN and ethertype rule going to be added.

Signed-off-by: Michal Swiatkowski <michal.swiatkowski@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-04-21 13:57:04 +02:00
Qi Zhang
76ac9d771c net/ice/base: read PSM clock frequency from register
Read the GLGEN_CLKSTAT_SRC register to determine which PSM clock
frequency is selected.  This ensures that the rate limiter profile
calculations will be correct.

Fixes: 453d087cca ("net/ice/base: add common functions")
Cc: stable@dpdk.org

Signed-off-by: Ben Shelton <benjamin.h.shelton@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-04-21 13:57:04 +02:00
Qi Zhang
a1f5c1c27c net/ice/base: fix removing MAC rule
Send correct recp_list to ice_remove_mac_rule. ICE_SW_LKUP_ETHERTYPE
rule list was sent instead of ICE_SW_LKUP_MAC. That caused problem
with adding new mac rule on VF, because rule wasn't removed correctly.

Fixes: c7dd159311 ("net/ice/base: add virtual switch code")
Cc: stable@dpdk.org

Signed-off-by: Michal Swiatkowski <michal.swiatkowski@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-04-21 13:57:04 +02:00
Qi Zhang
eb433cb20d net/ice/base: add and update E822 device IDs
Add the device IDs for the Intel(R) Ethernet Connection E822-L and
E822-X SKUs. Update the codenames and branding strings for the previous
C822N device IDs which should be using E822-C.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-04-21 13:57:04 +02:00
Qi Zhang
cdfa0dc170 net/ice/base: fix uninitialized stack variables
Via code inspection, I found that some partially initialized
stack variables were being passed along to called functions,
which could eventually result in those uninitialized members
being used.  To fix this, make sure the local variables are
zeroed out before partially initializing them.  This should
prevent any unintended consequences from using stack memory that
might have junk in it.

In addition to the memsets, this patch also initializes one
member in one function, that needed to be initialized to non-zero.

Fixes: fed0c5ca5f ("net/ice/base: support programming a new switch recipe")
Cc: stable@dpdk.org

Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-04-21 13:57:04 +02:00
Thomas Monjalon
ce6427ddca replace cold attributes
The new macro __rte_cold, for compiler hinting,
is now used where appropriate for consistency.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Reviewed-by: David Christensen <drc@linux.vnet.ibm.com>
2020-04-16 18:30:58 +02:00
Thomas Monjalon
f2fc83b40f replace unused attributes
There is a common macro __rte_unused, avoiding warnings,
which is now used where appropriate for consistency.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2020-04-16 18:30:58 +02:00
Thomas Monjalon
33011cb3df replace always-inline attributes
There is a macro __rte_always_inline, forcing functions to be inlined,
which is now used where appropriate for consistency.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2020-04-16 18:16:46 +02:00
Thomas Monjalon
ef5baf3486 replace packed attributes
There is a common macro __rte_packed for packing structs,
which is now used where appropriate for consistency.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2020-04-16 18:16:46 +02:00
Pavan Nikhilesh
acec04c4b2 build: disable experimental API check internally
Remove setting ALLOW_EXPERIMENTAL_API individually for each Makefile and
meson.build. Instead, enable ALLOW_EXPERIMENTAL_API flag across app, lib
and drivers.
This changes reduces the clutter across the project while still
maintaining the functionality of ALLOW_EXPERIMENTAL_API i.e. warning
external applications about experimental API usage.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Signed-off-by: David Marchand <david.marchand@redhat.com>
2020-04-14 16:22:34 +02:00
Qi Zhang
edec6dd838 net/ice: remove redundant functions
Remove function ice_clear_queues, since all equivalent code
has already been executed during ice_rx|tx_queue_stop.

Also function ice_rx|tx_queue_release_mbufs simply wrapped a
function pointer call which is not necessary, remove them.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
2020-03-18 10:21:42 +01:00
Qi Zhang
af3f83032b net/ice: remove bulk alloc option
Remove CONFIG_RTE_LIBRTE_ICE_RX_ALLOW_BULK_ALLOC with below
consideration:

1. A default Rx path can always be selected by setting a proper
   rx_free_thresh value at runtime, see
   ice_check_rx_burst_bulk_alloc_preconditions.

2. Its not a big deal to always reserve more space for desc ring.
   "ring_size = (uint16_t)(rxq->nb_rx_desc + ICE_RX_MAX_BURST);"

3. Fixes a potential invalid memory access in ice_reset_rx_queue.
   If CONFIG_RTE_LIBRTE_ICE_RX_ALLOW_BULK_ALLOC is turned on while
   ice_check_rx_burst_bulk_alloc_preconditions return fail.
   Below code will have problem.

   for (i = 0; i < ICE_RX_MAX_BURST; ++i)
   	rxq->sw_ring[rxq->nb_rx_desc + i].mbuf = &rxq->fake_mbuf;

Fixes: 50370662b7 ("net/ice: support device and queue ops")
Cc: stable@dpdk.org

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2020-03-18 10:21:41 +01:00
Qi Zhang
31108c69ba net/ice: remove unnecessary variable
Remove unnecessary variable "meta" in ice_flow_create and
ice_flow_validate, it should be defined when really needed:
its ice_parse_engine_create and ice_parse_engine_validate.

A meta data created by parser->parse_pattern_action should be
freed inside parser->engine->create.

During a validate operation, since parser->engine_>create will not
be invoked, it is unnecessary to create a meta during parser, so
NULL will passed to engine->parse_pattern_action and all parser's
parse_pattern_action need to be modified to handle meta = NULL
properly.

With above implementation, the patch also fixes a potential memory
leak in ice_parse_engine_validate, since meta may not be freed.

BTW, an engine without a create op should be regarded as a bug. So
use RTE_ASSERT to replace runtime engine->create == NULL check in
ice_parse_engine_create.

Fixes: 4e27d3ed02 ("net/ice: fix flow API framework")
Cc: stable@dpdk.org

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
2020-03-18 10:21:41 +01:00
Tao Zhu
f761def512 net/ice: fix hash flow crash
Commit 'dc36bd5dfdeb' mistakenly initializes ret as -rte_errno, then
return ret if ice_search_pattern_match_item fails, if rte_errno happens
to be 0 in this case, it would cause an unrecognized flow rule to be
marked as recognition success. Later, when the code tries to parse the
flow rule, a segmentation fault will occur due to null pointer
reference.

Fixes: dc36bd5dfd ("net/ice: fix flow FDIR/switch memory leak")
Cc: stable@dpdk.org

Signed-off-by: Tao Zhu <taox.zhu@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
2020-03-18 10:21:41 +01:00
Tao Zhu
8b0add355f net/ice: fix queue MSI-X interrupt binding
Operator '<<' should be used instead of '<' for shifting value to be
set in MSI-X configuration register.

Old code adds 1 on even MSI-X interrupt vector index used by queue,
resulting in interrupt mapping error.

Fixes: 65dfc889d8 ("net/ice: support Rx queue interruption")
Cc: stable@dpdk.org

Signed-off-by: Tao Zhu <taox.zhu@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2020-02-21 11:41:20 +01:00
Sunil Pai G
fe38133c42 net/ice: fix unchecked Tx cleanup error
Coverity complains of unchecked return value warning of
ice_xmit_cleanup, while this cleanup is opportunistic and will not cause
problems if it fails. So instead of checking the return value of
ice_xmit_cleanup and return in case of cleanup failure, we directly cast
it to void function to make the Coverity happy.

Coverity issue: 353623
Fixes: 17c7d0f9d6 ("net/ice: support basic Rx/Tx")
Cc: stable@dpdk.org

Signed-off-by: Sunil Pai G <sunil.pai.g@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2020-02-14 12:42:13 +01:00
Yahui Cao
0d14c49b28 net/ice: fix flow director passthru
The original PASSTHRU implementation is forwarding to queue 0. The
corrected implementation is forwarding to the next stage filter.

Fixes: f5cafa961f ("net/ice: add flow director create and destroy")
Cc: stable@dpdk.org

Signed-off-by: Yahui Cao <yahui.cao@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2020-02-14 12:42:12 +01:00
Qi Zhang
89a532ba87 net/ice: fix GTP-U rule conflict
The patch distinguishes fdir rules for GTPU with or without
extend header, so flow to match below patterns can be created
correctly.

1. eth / ipv4 / udp / gtpu teid is 10 / ...
2. eth / ipv4 / udp / gtpu teid is 10 / gtp_psc / ...
3. eth / ipv4 / udp / gtpu / gtp_psc qfi is 10 / ...
4. eth / ipv4 / udp / gtpu teid is 10 / gtp_psc is 10 / ...

Fixes: efc16c6214 ("net/ice: support flow director GTPU tunnel")
Cc: stable@dpdk.org

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2020-02-05 09:51:21 +01:00
Chenmin Sun
1bfc89ec1e net/ice: add outer IPv4 matching for GTP-U flow
This patch adds the capability of matching the outer IPv4
headers for GTPU flows.

Fixes: efc16c6214 ("net/ice: support flow director GTPU tunnel")
Cc: stable@dpdk.org

Signed-off-by: Chenmin Sun <chenmin.sun@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2020-02-05 09:51:19 +01:00
Qi Zhang
ab76e2b03d net/ice: fix flow director GTP-U pattern
Based on current FDIR implementation for GTP-U, inner specification is
not supported, issue a rule for eth/ipv4/gtpu/ipv4 will also match
eth/ipv4/gtpu/ipv6, the patch adds new pattern list to align with
existed implementation.

Fixes: efc16c6214 ("net/ice: support flow director GTPU tunnel")
Cc: stable@dpdk.org

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2020-02-05 09:51:19 +01:00
Tao Zhu
dc36bd5dfd net/ice: fix flow FDIR/switch memory leak
1. Fix ice FDIR and hash flow memory leak.
2. Fix the ice definition of LIST_FOR_EACH_ENTRY_SAFE not
   save tmp which cause list deletion incompletely.

Fixes: 5f0978e962 ("net/ice/base: add OS specific implementation")
Fixes: f5cafa961f ("net/ice: add flow director create and destroy")
Fixes: 5ad3db8d4b ("net/ice: enable advanced RSS")
Cc: stable@dpdk.org

Signed-off-by: Tao Zhu <taox.zhu@intel.com>
Reviewed-by: Simei Su <simei.su@intel.com>
Reviewed-by: Yahui Cao <yahui.cao@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2020-02-05 09:51:19 +01:00
Beilei Xing
1f0bc0592a net/ice: fix flow director flag
If there's no mark action when creating a FDIR rule,
there shouldn't be FDIR flags in mbuf.

Fixes: f5cafa961f ("net/ice: add flow director create and destroy")
Fixes: bd984f155f ("net/ice/base: support FDIR")
Cc: stable@dpdk.org

Signed-off-by: Beilei Xing <beilei.xing@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2020-02-05 09:51:19 +01:00
Haiyue Wang
332f1649d8 net/ice/base: clean up compatibility layer
Remove the unused definitions, rewrite the IO data read/write helpers,
and put the common definitions related to RTE defines under the macro
__INTEL_NET_BASE_OSDEP__, so it works like OS(RTE) dependency.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2020-01-17 19:59:18 +01:00
Haiyue Wang
48cdce7894 net/ice: unify bool type value
Replaces the redefined TRUE and FALSE values with standard ones to
match the 'bool' type definition.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2020-01-17 19:59:18 +01:00
Xiaoyun Li
f1514bcb27 net/ice: fix Tx when TSO is enabled
Hardware limits that max buffer size per Tx descriptor should be
(16K-1)B. So when TSO enabled, the mbuf data size may exceed the
limit and cause malicious behavior to the NIC. This patch fixes
this issue by using more Tx descs for this kind of large buffer.

Fixes: 17c7d0f9d6 ("net/ice: support basic Rx/Tx")
Cc: stable@dpdk.org

Signed-off-by: Xiaoyun Li <xiaoyun.li@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2020-01-17 19:59:18 +01:00
Chenxu Di
ab7cfe1fe3 net/ice: cleanup Tx buffers
Add support to the ice driver for the API rte_eth_tx_done_cleanup
to force free consumed buffers on Tx ring.

Signed-off-by: Chenxu Di <chenxux.di@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-01-17 19:46:26 +01:00
Haiyue Wang
c7c5e26210 net/ice: use ethernet copy API to do MAC assignment
Use the API rte_ether_addr_copy to do MAC assignment, instead of
calling rte_memcpy function directly.

Fixes: 84dc7a95a2 ("net/ice: enable flow director engine")
Cc: stable@dpdk.org

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2020-01-17 19:46:02 +01:00
Qi Zhang
ed9e6396ae net/ice/base: clean up
Couple minor code clean include:
1. Improve debug message format.
2. Add missing macro and comment.
3. Remove unnecessary compile options.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-01-17 19:46:01 +01:00
Qi Zhang
566fbec564 net/ice: support 1/10G device IDs
Add support for 1/10G devices.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-01-17 19:46:01 +01:00
Qi Zhang
3ee1b0159e net/ice/base: support adding MAC rules on specific port
ice_add_mac_rule allow user to add rule to port based on
hw->port_info->lport number. Function in some case should
allow user to add filter rule on different port, write
another function which implemented that behaviour.
The same situation is which removing mac function.

Add new API function which allow user to choose port on which
rule going to be added. Leave add mac rule function that always
add rule on hw->port_info->lport to avoid changes in components
which don't need to choose different port. Also add function to
remove rule from specific port.

Alloc more switch_info structs to track separately rules for each
port. Choose switch_info struct basing on logic port number
because in FW added rules are connected with port.

Signed-off-by: Michal Swiatkowski <michal.swiatkowski@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-01-17 19:46:01 +01:00
Qi Zhang
3c87d2787a net/ice/base: rework flow director desc preparation
Change internal implementation of how FD filter programming desc
is prepared. This is to minimize the amount of code needed to prep
the FD filter programming desc (avoid memcpy, etc...) and just use
predefined shifts and mask. This type of change are needed to expedite
FD setup during data path (ADQ uses this codepath during initial
flow setup) and it will also be useful when adding side-band
flow-director filter.

Signed-off-by: Kiran Patil <kiran.patil@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-01-17 19:46:01 +01:00
Qi Zhang
54cf696d5a net/ice/base: increase PF reset wait timeout
Increase the maximum time that the driver will wait for a PF reset
from 200 milliseconds to 300 milliseconds, to account for possibility
of a slightly longer than expected PF reset.

Fixes: 453d087cca ("net/ice/base: add common functions")
Cc: stable@dpdk.org

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-01-17 19:46:01 +01:00
Qi Zhang
c2915d3f8a net/ice/base: fix loop limit
In ice_prot_type_to_id routine, correct the loop limit check
to use ARRAY_SIZE instead of looking for the array element to
have a specific value.

Fixes: fed0c5ca5f ("net/ice/base: support programming a new switch recipe")
Cc: stable@dpdk.org

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-01-17 19:46:01 +01:00
Qi Zhang
969890d505 net/ice/base: enable clearing of HW tables
Enable the code to clear the HW tables.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-01-17 19:46:01 +01:00
Qi Zhang
0837e5662b net/ice/base: allow flexbytes matching on header
Change the extraction sequence generated by flow director flexbytes to
use package mac protocol. Without this change data in packet headers
cannot be used for flexbyte matching. The old extraction for flex bytes
started at the beginning of the payload which is after the header.

Signed-off-by: Henry Tieman <henry.w.tieman@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-01-17 19:46:01 +01:00
Qi Zhang
1fbb24a3a8 net/ice/base: cleanup format of static const declarations
Use a format consistent with the rest of the code.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-01-17 19:46:01 +01:00
Qi Zhang
05802f9820 net/ice/base: do not wait for PE unit to load
When RDMA is not enabled, when checking for completion of a CORER or
GLOBR do not wait for the PE unit to be loaded (indicated by GLNVM_ULD
register's PE_DONE bit being set) since that does not happen and will
cause issues such as failing to initialize the device.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-01-17 19:46:01 +01:00
Qi Zhang
72c4b592ab net/ice/base: support MAC/VLAN with TCP/UDP in switch
Add a feature to allow user to add switch filter using input like
MAC + VLAN (C-tag only) + L4 (TCP/UDP) port. API "ice_add_adv_rule"
is extended to handle this filter type.

Signed-off-by: Kiran Patil <kiran.patil@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-01-17 19:46:01 +01:00
Qi Zhang
e0e325065b net/ice/base: whitelist register for NVM access
Allow tools to access register offset 0xB8188 (GLGEN_RSTAT) for
NVMUpdate operations.  This is a read-only register, so risk of other
issues stemming from this change is low. Even so, update the write
command to prevent and reject any commands which attempt to write to
this register, just like we do for GL_HICR_EN.

Signed-off-by: Jeb Cramer <jeb.j.cramer@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-01-17 19:46:01 +01:00
Beilei Xing
a9faa2223a net/ice: fix VSI context
There'll always be a MDD event triggered when adding
a FDIR rule. The root cause is 'LAN enable' is not
configured during control VSI setup.
Besides, correct FDIR fields for both main VSI and
control VSI.

Fixes: 84dc7a95a2 ("net/ice: enable flow director engine")
Cc: stable@dpdk.org

Signed-off-by: Beilei Xing <beilei.xing@intel.com>
Acked-by: Jingjing Wu <jingjing.wu@intel.com>
2020-01-17 19:46:01 +01:00
Ting Xu
08a5992c55 net/ice: add device IDs for C822N
This patch added new device IDs for C822N.

Signed-off-by: Ting Xu <ting.xu@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2020-01-17 19:46:01 +01:00
Shougang Wang
f27efe4eaf net/ice: fix packet type table
According to comms package, index 94 should be MAC_IPV6_ICMP,
not MAC_IPV4_ICMP. This patch fixes the issue.

Fixes: 4cf29798b4 ("net/ice: fix packet type table")
Cc: stable@dpdk.org

Signed-off-by: Shougang Wang <shougangx.wang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2020-01-17 19:45:23 +01:00
Tao Zhu
a224832088 net/ice: disable TSO offload in vector path
ICE choices VECTOR TX path or Basic TX path by macro
ICE_NO_VECTOR_FLAGS.
TSO offload only processed by Basic TX path.

Fixes: f88de4694d ("net/ice: support Tx SSE vector")
Cc: stable@dpdk.org

Signed-off-by: Tao Zhu <taox.zhu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2020-01-17 19:45:23 +01:00
Yahui Cao
a57fdc78b6 net/ice: support flow director for normal GTPU
Add FDIR support for normal GTP-U packet, which doesn't contain GTP_PSC
extension header.

Fixes: efc16c6214 ("net/ice: support flow director GTPU tunnel")

Signed-off-by: Yahui Cao <yahui.cao@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-11-26 18:05:15 +01:00
Yahui Cao
c08a72c79c net/ice: fix pattern name of GTPU with extension header
Pattern name of GTP-U flow with extension header should be
xxx_gtpu_eh_xxx. So it will not conflict with the pattern name of a
GTP-U flow that does not contains extension header.

Fixes: 3e4eab9c21 ("net/ice: add pattern manifest")

Signed-off-by: Yahui Cao <yahui.cao@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-11-26 18:05:15 +01:00
Qi Zhang
5bf1b87eb7 net/ice: fix flow director conflict
Flow type "IPv4 + UDP" or "IPv4 + TCP" is conflict with "IPv4 + any"
flow type. If a rule for IPv4 + any is created, we should reject any
rule for IPv4 + UDP otherwise the first rule may be impacted, same
decision should be made on a reverse order.  For IPv6 and IPv4 GTPU
inner case, we have the same limitation.

Fixes: 109e8e0624 ("net/ice: configure HW flow director rule")

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Tested-by: Beilei Xing <beilei.xing@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-11-26 18:05:15 +01:00
Pawel Modrak
85ff364f3b build: align symbols with global ABI version
Merge all versions in linker version script files to DPDK_20.0.

This commit was generated by running the following command:

:~/DPDK$ buildtools/update-abi.sh 20.0

Signed-off-by: Pawel Modrak <pawelx.modrak@intel.com>
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
2019-11-20 23:05:39 +01:00
Anatoly Burakov
fbaf943887 build: remove individual library versions
Since the library versioning for both stable and experimental ABI's is
now managed globally, the LIBABIVER and version variables no longer
serve any useful purpose, and can be removed.

The replacement in Makefiles was done using the following regex:

	^(#.*\n)?LIBABIVER\s*:=\s*\d+\n(\s*\n)?

(LIBABIVER := numbers, optionally preceded by a comment and optionally
succeeded by an empty line)

The replacement for meson files was done using the following regex:

	^(#.*\n)?version\s*=\s*\d+\n(\s*\n)?

(version = numbers, optionally preceded by a comment and optionally
succeeded by an empty line)

[David]: those variables are manually removed for the files:
- drivers/common/qat/Makefile
- lib/librte_eal/meson.build
[David]: the LIBABIVER is restored for the external ethtool example
library.

Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
2019-11-20 23:05:39 +01:00
Yahui Cao
c1b22c18de net/ice: fix flow director rule duplication check
When FDIR filter detects duplicated rule and then returns EEXIST, ice
flow will capture this error and return immediately.

Fixes: 4e27d3ed02 ("net/ice: fix flow API framework")

Signed-off-by: Yahui Cao <yahui.cao@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-11-20 17:36:06 +01:00
Qi Zhang
3b4888d53d net/ice: add flow mark hint
Since not all data paths support flow mark, the driver needs
a hint from application to select the correct data path if
flow mark is required. The patch introduces a devarg
"flow-mark-support" as a workaround solution, since a standard
way is still ongoing.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-11-20 17:36:06 +01:00
Yahui Cao
c8a9eacb21 net/ice: fix flow director rule after device stop
By moving irq enable/disable from device start/stop to FDIR
setup/teardown, FDIR queue irq config is independent of LAN queue irq
config. So device stop will not cause FDIR rule failure.

Fixes: 84dc7a95a2 ("net/ice: enable flow director engine")

Signed-off-by: Yahui Cao <yahui.cao@intel.com>
Signed-off-by: Beilei Xing <beilei.xing@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Tested-by: Qi Zhang <qi.z.zhang@intel.com>
2019-11-20 17:36:06 +01:00
Yahui Cao
ac1f6b51ad net/ice: fix flow director programming status check
To make sure if FDIR programming succeed or fail, legacy programming
status descriptor WB format is enabled and FDIR queue irq is opened.

Fixes: 84dc7a95a2 ("net/ice: enable flow director engine")

Signed-off-by: Yahui Cao <yahui.cao@intel.com>
Signed-off-by: Beilei Xing <beilei.xing@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Tested-by: Qi Zhang <qi.z.zhang@intel.com>
2019-11-20 17:36:06 +01:00
Qi Zhang
6e0fbe16df net/ice: fix flow type selection for flow director
The FDIR parser will select ICE_FLTR_PTYPE_NONF_IPV4_OTHER as flow type
for an IPv4 UDP flow with empty l4 matching field which is not correct.
Same issues happens on all the combination between IPv4/IPv6 and
UDP/TCP/SCTP cases.

The patch fixes all the wrong flow ptype selections.

Fixes: f5cafa961f ("net/ice: add flow director create and destroy")

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
2019-11-20 17:36:06 +01:00
Qi Zhang
62f2d75e88 net/ice/base: update version
Update base code version info in readme.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-11-20 17:36:06 +01:00
Andrew Rybchenko
73fb89dd6a drivers/net: fix RSS hash offload flag if no RSS
By default RSS hash delivery (offload) is bound to RSS mode and
it is incorrect to advertise it as enabled if Rx multi-queue mode
has no RSS.

Fixes: 8b945a7f7d ("drivers/net: update Rx RSS hash offload capabilities")

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2019-11-20 17:36:06 +01:00
Yahui Cao
1422df2908 net/ice: add SPDX tag
Fixes: 84dc7a95a2 ("net/ice: enable flow director engine")

Signed-off-by: Yahui Cao <yahui.cao@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-11-20 17:36:05 +01:00
Qi Zhang
2f11d96fea net/ice: ignore error when removing RSS rule
Currently, multiple rte_flow RSS rules may map to the same
hardware rule if a later rule is just for input set change or
symm turn on/off. So after one of the rules be destroyed, we will
get error ICE_ERR_DOES_NOT_EXIST when destroying any other rules.
The patch simply fixes this by ignoring this error. A more
sophisticated fix that remember the sequence and replay properly
will be provided in the future.

Fixes: 5ad3db8d4b ("net/ice: enable advanced RSS")

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
2019-11-20 17:36:05 +01:00
Simei Su
702055151a net/ice: fix RSS flow destroy
In ice_hash_create(), whatever the hash_function is, the
filter_ptr->symm is always 0 and when we destroy the flow, the
ice_rem_rss_cfg() is never carried out. So the destroy function never
works well. The patch fixes this issue and at the same time
distinguishes between simple_xor and symmetric_toeplitz.

To fix this issue, the patch adds a new structure to include a flag to
indicate if it is a simple_xor flow so that it's easier to remove the
config when destroying the flow. The patch also simplifies code
implementation logic in ice_hash_create().

Fixes: 5ad3db8d4b ("net/ice: enable advanced RSS")

Signed-off-by: Simei Su <simei.su@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-11-20 17:36:05 +01:00
Shougang Wang
1ad37a2c58 net/ice: fix wild pointer
To avoid wild pointer, pointers should be set to NULL after free them.

Fixes: 1a2fc1799f ("net/ice: reject duplicated flow for flow director")
Fixes: 84dc7a95a2 ("net/ice: enable flow director engine")
Fixes: 0f880c3df1 ("net/ice: add flow director counter resource init/release")

Signed-off-by: Shougang Wang <shougangx.wang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-11-20 17:36:05 +01:00
Shougang Wang
01af3d0a41 net/ice: fix flow director counter resource release
All the counter resources should be cleaned up when teardown.

Fixes: 0f880c3df1 ("net/ice: add flow director counter resource init/release")

Signed-off-by: Shougang Wang <shougangx.wang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-11-20 17:36:05 +01:00
Shougang Wang
3916416737 net/ice: fix flow director profile removal
The removal of FDIR profile should start from the next
of ICE_FLTR_PTYPE_NONF_NONE.

Fixes: 109e8e0624 ("net/ice: configure HW flow director rule")

Signed-off-by: Shougang Wang <shougangx.wang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-11-20 17:36:05 +01:00
Shougang Wang
b8e609e8e2 net/ice: fix memzone reserve and release in flow director
To avoid memzone reserve failure and memory leak, following
resources management should be added.
- Check if the FDIR Memzone already exists before reserving.
- Free FDIR memzone when teardown and other failure scenarios.

Fixes: 84dc7a95a2 ("net/ice: enable flow director engine")

Signed-off-by: Shougang Wang <shougangx.wang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-11-20 17:36:05 +01:00
Wei Zhao
9ffb871222 net/ice/base: fix switch programming for IPv6
Correct an error in the IPV6 header bitmask used for programming switch
rules.

Also, change other programming switch headers to use big endian
fields in order to make setting these easier.

Fixes: 04b8ec1ea8 ("net/ice/base: add protocol structures and defines")
Cc: stable@dpdk.org

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-11-20 17:36:05 +01:00
Qi Zhang
89a3286f9c net/ice/base: fix TCAM entry management
Order intermediate VSIG list correct in order to correctly match
existing VSIG lists.

When overriding pre-existing TCAM entries, properly delete the existing
entry and remove it from the change/update list.

Fixes: 51d04e4933 ("net/ice/base: add flexible pipeline module")

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Tested-by: Zhirun Yan <zhirun.yan@intel.com>
2019-11-20 17:36:05 +01:00
Simei Su
6410b1d993 net/ice: fix crash with wrong package
This patch fixes core dump issue when entering safe mode with a
wrong ice.pkg. In safe mode, rte_flow is not supported and it
won't initialize any flow engine.

Fixes: 7615a68950 ("net/ice: rework for generic flow enabling")

Signed-off-by: Simei Su <simei.su@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-11-20 17:36:05 +01:00
Qiming Yang
fdcf92ed66 net/ice: fix link status recovery
This patch fixes a kernel driver link status issue by recovering
link status when device stops.

Fixes: e6161345d8 ("net/ice: support link status change")
Cc: stable@dpdk.org

Signed-off-by: Qiming Yang <qiming.yang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-11-20 17:36:05 +01:00
Simei Su
db6730a809 net/ice: fix RSS rule destroy
This patch changes RSS rule destroy interface from ice_rem_vsi_rss_cfg()
to ice_rem_rss_cfg(). To coordinate with input set change, it should
destroy a specific flow rule but not all vsi cfg.

Fixes: 5ad3db8d4b ("net/ice: enable advanced RSS")

Signed-off-by: Simei Su <simei.su@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-11-20 17:36:05 +01:00
Pavan Nikhilesh
8b945a7f7d drivers/net: update Rx RSS hash offload capabilities
Add DEV_RX_OFFLOAD_RSS_HASH flag for all PMDs that support RSS hash
delivery.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Reviewed-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2019-11-11 16:15:37 +01:00
Haiyue Wang
328dc5baa7 doc: add ice PMD in doxygen
Add the doxygen for ice protocol extraction feature APIs.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-11-11 14:23:02 +01:00
Haiyue Wang
efc1b2799f net/ice: optimize protocol extraction by dynamic mbuf
The original design is to use rte_mbuf::udata64 to save the metadata of
protocol extraction which has network protocol data fields and type, a
private API is used to decode this metadata.

Use the dynamic mbuf field and flags to register the needed fields in
mbuf, to avoid overwriting 'rte_mbuf::udata64', since the application
may use it. Now the protocol extraction metadate is saved into dynamic
mbuf field with 4B size, and its type and validity is indicated by the
related dynamic mbuf flags in 'rte_mbuf::ol_flags'.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-11-11 14:23:02 +01:00
Qi Zhang
c9657ad01f net/ice: free HW tables when device closed
Free the HW tables during dev_close.
Otherwise there will be two issues:
1. Memory won't be freed if the device is detached.
2. Driver can't be initialized correctly after device reset.

Fixes: a4c8c48fe3 ("net/ice: load OS default package")
Cc: stable@dpdk.org

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-11-11 14:23:02 +01:00
Tao Zhu
8c559a928f net/ice: remove VLAN TPID set
Set vlan tpid is not supported by ice hardware. Delete driver code
that doesn't work.

Signed-off-by: Tao Zhu <taox.zhu@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-11-11 14:23:02 +01:00
Simei Su
1a5a8a8efd net/ice: add error cases for wrong packages
If the switch/fdir/hash module can't resolve a correct parser,
it should return error.

Fixes: 47d460d632 ("net/ice: rework switch filter")
Fixes: efc16c6214 ("net/ice: support flow director GTPU tunnel")
Fixes: 5ad3db8d4b ("net/ice: enable advanced RSS")

Signed-off-by: Simei Su <simei.su@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-11-11 14:23:02 +01:00
Yahui Cao
228df3edb1 net/ice: fix flow director tunnel profile existence check
If first rule is issued and then the second rule is issued with the same
input set as first rule's, FDIR driver can't find there is an identical
input set.

Fixes: 109e8e0624 ("net/ice: configure HW flow director rule")

Signed-off-by: Yahui Cao <yahui.cao@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-11-08 23:15:05 +01:00
Qi Zhang
14c4647517 net/ice/base: add new device IDs
Add device IDs for E810_XXV.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-11-08 23:15:05 +01:00
Haiyue Wang
8dedb54699 ethdev: enhance burst mode information API
Change the type of burst mode information from bit field to free string
data, so that each PMD can describe the Rx/Tx busrt functions flexibly.

Fixes: eb5902504a ("ethdev: add API for getting burst mode information")
Fixes: 6b6609f68c ("net/i40e: support Rx/Tx burst mode info")
Fixes: e9a10e6c21 ("net/ice: support Rx/Tx burst mode info")
Fixes: 7fe108edcf ("app/testpmd: show Rx/Tx burst mode description")

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Ray Kinsella <ray.kinsella@intel.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2019-11-08 23:15:04 +01:00
Jiaqi Min
1161029318 net/ice: fix setting max frame size
Max frame size is not set to HW, so packets above the MTU
do not get dropped by HW. The patch fixed the issue.

Fixes: 50370662b7 ("net/ice: support device and queue ops")
Cc: stable@dpdk.org

Signed-off-by: Jiaqi Min <jiaqix.min@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-11-08 23:15:04 +01:00
Qi Zhang
25f5b7c78c net/ice/base: fix symmetric hash configure
When a new hash profile is created, we need to reset all related
GLQF_HSYMM registers, otherwise unexpected hash behaviour may happen
on packet that hits that profile.

The patch fixes the issue that we only do reset when symmetric hash
is required, but actually for non symmetric hash we also need this,
since GLQF_HSYMM might be polluted by previous configuration.

Fixes: ddae044035 ("net/ice/base: enable symmetric hash for RSS")

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Tested-by: Simei Su <simei.su@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-11-08 23:15:04 +01:00
Yahui Cao
cc70e83dee net/ice: remove GTPU tunnel support for inner L4
The current code doesn't support L4 matching, it only supports L3
matching so remove the code for inner L4.

Fixes: efc16c6214 ("net/ice: support flow director GTPU tunnel")

Signed-off-by: Yahui Cao <yahui.cao@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-11-08 23:15:04 +01:00
Ying A Wang
05e7bdf57a net/ice: fix flow director
Flow director rule can't be created when the flow table is nearly full.
The patch fixed this issue to enable created flows reaching the maximum
number.

Fixes: 1a2fc1799f ("net/ice: reject duplicated flow for flow director")

Signed-off-by: Ying A Wang <ying.a.wang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-11-08 23:15:04 +01:00
Simei Su
16e255c4b9 net/ice: correct key length and queues check for RSS
This patch corrects key_len and queues check. The key_len and queues
are not supported to configure for RSS in rte_flow.

Fixes: 5ad3db8d4b ("net/ice: enable advanced RSS")

Signed-off-by: Simei Su <simei.su@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-11-08 23:15:04 +01:00
Qi Zhang
fe33a6a65f net/ice/base: fix ptype mapping pollution from GTP flow
A new gtp flow's profile will capture other profile's non-gtp ptypes
which is unexpected. For example, a RSS flow for inner IP / UDP on
regular tunnel packet's behaviour will be changed by a following GTP RSS
rule where inner IP is the only inputset, since all tunnel ptypes have
been shifted from the first profile to the second one.

The patch fixes the issue by correcting the ptype mapping that prevents
the ptype shift.

Fixes: d1c2f76b44 ("net/ice/base: support GTP and PPPoE protocols")

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Tested-by: Simei Su <simei.su@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-11-08 23:15:04 +01:00
Simei Su
e5cc4e13f6 net/ice: fix RSS types check
This patch corrects logic error for checking rss->types to match
pattern in RSS action parser.

Fixes: 5ad3db8d4b ("net/ice: enable advanced RSS")

Signed-off-by: Simei Su <simei.su@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-11-08 23:15:04 +01:00
Ying A Wang
4e27d3ed02 net/ice: fix flow API framework
In non-pipeline mode, switch should be used as FDIR'S backup.
The patch fixed rule can't be created when FDIR'S flow table is full.

Fixes: 7615a68950 ("net/ice: rework for generic flow enabling")

Signed-off-by: Ying A Wang <ying.a.wang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-11-08 23:15:04 +01:00
Ying A Wang
4cf29798b4 net/ice: fix packet type table
The original packet type table's hw-ptype index to sw-ptype
mapping is wrong. This patch fixed the issue.

Fixes: ab9dccf09a ("net/ice: support packet type getting")
Cc: stable@dpdk.org

Signed-off-by: Ying A Wang <ying.a.wang@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-11-08 23:15:04 +01:00
Yahui Cao
16cbe5f469 net/ice: fix IPv6 UDP port matching
Reverse the src and dest notion, since the HW expects them to be from Tx
perspective where as the input from user is from Rx filter view.

Fixes: f5cafa961f ("net/ice: add flow director create and destroy")

Signed-off-by: Yahui Cao <yahui.cao@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-25 19:20:24 +02:00
Yahui Cao
a5d7c23ec5 net/ice: fix flow director for IPv6 dest MAC
Fixes: f5cafa961f ("net/ice: add flow director create and destroy")

Signed-off-by: Yahui Cao <yahui.cao@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-25 19:20:08 +02:00
Ting Xu
927a0e20e2 net/ice: add GTP tunnel type
Add GTP tunnel type in ice pmd tunneling parameters parse
to enable Tx checksum offload.

Signed-off-by: Ting Xu <ting.xu@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2019-10-23 16:43:10 +02:00
Wei Zhao
368f9f2f77 net/ice: fix queue index for switch filter
When calculate queue index for queue action in
switch filter, vsi base queue should be included.

Fixes: 57c4f26935 ("net/ice: enable switch filter")
Cc: stable@dpdk.org

Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-23 16:43:10 +02:00
Simei Su
5ad3db8d4b net/ice: enable advanced RSS
This patch supports:

- symmetric hash by rte_flow RSS action.
- input set change by rte_flow RSS action.

Signed-off-by: Simei Su <simei.su@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-10-23 16:43:10 +02:00
Simei Su
44c63fcbd9 net/ice: add RSS configuration for GTPU/PPPoE
This patch adds rss support for gtpu with input set teid and
pppoe/pppod with input set source mac and session id.

Signed-off-by: Simei Su <simei.su@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-10-23 16:43:10 +02:00
Ying A Wang
7edc7158d7 net/ice: cleanup RSS/FDIR profile on device init
When app restarts, RSS/FDIR profile ID will increase which may
run out of all the profile resources.

The patch cleanup RSS/FDIR profile resources when device init
to fix this issue.

Fixes: d7d150b930 ("net/ice: enable RSS when device init")
Cc: stable@dpdk.org

Signed-off-by: Ying A Wang <ying.a.wang@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-23 16:43:10 +02:00
Yahui Cao
efc16c6214 net/ice: support flow director GTPU tunnel
Enable FDIR GTPU matching for RTE_FLOW

Signed-off-by: Yahui Cao <yahui.cao@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-23 16:43:10 +02:00
Yahui Cao
97efac1bed net/ice: support flow director VXLAN tunnel
Enable FDIR vxlan tunnel matching for RTE_FLOW

Signed-off-by: Yahui Cao <yahui.cao@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-23 16:43:10 +02:00
Yahui Cao
1a2fc1799f net/ice: reject duplicated flow for flow director
Enable duplication lookup for existing flow director rule entry.

Signed-off-by: Yahui Cao <yahui.cao@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-23 16:43:10 +02:00
Yahui Cao
2adc30cf2a net/ice: support flow director counter
This patch add FDIR statistical counter support
and it includes RTE_FLOW count actions support
and query support.

RTE_FLOW count actions support id and shared.
RTE_FLOW query record packet hits by default.

Signed-off-by: Yahui Cao <yahui.cao@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-23 16:43:10 +02:00
Yahui Cao
0f880c3df1 net/ice: add flow director counter resource init/release
The patch integrates the counter resource init/release into fdir's
init/release scenario

Signed-off-by: Yahui Cao <yahui.cao@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-23 16:43:10 +02:00
Yahui Cao
63b094f8fa net/ice: enable flow director queue group
FDIR can send packet to a group of queues and distruibte it by RSS.

Signed-off-by: Yahui Cao <yahui.cao@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-23 16:43:10 +02:00
Yahui Cao
f5cafa961f net/ice: add flow director create and destroy
Add ice_create_fdir_filter to create a rule. If a flow is matched by
flow director filter, filter rule will be set to HW. For now common
pattern and queue/passthru/drop/mark actions are supported.

Signed-off-by: Yahui Cao <yahui.cao@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-23 16:43:10 +02:00
Beilei Xing
109e8e0624 net/ice: configure HW flow director rule
This patch adds a HW FDIR rule to the FDIR HW table
without adding a FDIR filter.

Signed-off-by: Beilei Xing <beilei.xing@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-23 16:43:10 +02:00
Beilei Xing
84dc7a95a2 net/ice: enable flow director engine
Enable flow director engine, including initialization and teardown.
 - Control VSI create and release.
 - Queue pair allocated, set up and release.
 - Programming packet create and release.
 - FDIR profile create and release.

Signed-off-by: Beilei Xing <beilei.xing@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-23 16:43:10 +02:00
Leyi Rong
41eb707e82 net/ice: invoke callback when link status change
Needs to call _rte_eth_dev_callback_process to run registered
callbacks when link status change.

Fixes: cf911d90e3 ("net/ice: support link update")
Cc: stable@dpdk.org

Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-23 16:43:09 +02:00
Wei Zhao
47d460d632 net/ice: rework switch filter
The patch reworks packet process engine's binary classifier
(switch) for the new framework. It also adds support for new
packet type like PPPoE for switch filter.

Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-23 16:43:09 +02:00
Ying A Wang
3e4eab9c21 net/ice: add pattern manifest
The patch adds a manifest for all patterns which can be selected
by low level filter engine to compose their supported list.

Signed-off-by: Ying A Wang <ying.a.wang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-23 16:43:09 +02:00
Ying A Wang
7615a68950 net/ice: rework for generic flow enabling
The patch reworks the generic flow API (rte_flow) implementation.
It introduces an abstract layer which provides a unified interface
for low-level filter engine (switch, fdir, hash) to register supported
patterns and actions and implement flow validate/create/destroy/flush/
query activities.

The patch also removes the existing switch filter implementation to
avoid compile error. Switch filter implementation for the new framework
will be added in the following patch.

Signed-off-by: Ying A Wang <ying.a.wang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-23 16:43:09 +02:00
Qiming Yang
0998c89a85 net/ice: add devargs to control pipeline mode
Added a devarg to control the mode in generic flow API.
We use none-pipeline mode by default.

Signed-off-by: Qiming Yang <qiming.yang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-23 16:43:09 +02:00
Ying A Wang
23ecda2aa5 net/ice: clean up redundant assignment and indentations
The patch removes redundant code and cleans up some wrong indentations.

Signed-off-by: Ying A Wang <ying.a.wang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-23 16:43:09 +02:00
Leyi Rong
43840e9d69 net/ice: support RSS in AVX path
Support 32 bits RSS in FlexMD fields in AVX path.

Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
2019-10-23 16:43:09 +02:00
Leyi Rong
9c9f24e915 net/ice: support RSS in SSE path
Support 32 bits RSS in FlexMD fields in SSE path.

Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
2019-10-23 16:43:09 +02:00
Simei Su
47c90af057 net/ice: fix LUT type for RSS
This patch changes RSS lut_type to corresponding macro.

Fixes: ff963bfa7c ("net/ice: support RSS")
Cc: stable@dpdk.org

Signed-off-by: Simei Su <simei.su@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-10-23 16:43:09 +02:00
Haiyue Wang
83665e492f net/ice: fix protocol extraction devargs parsing
If the default dev args 'proto_xtr' is not in the first position, it
will overwrite the parsed queue map value, so use an new variable to
save the default.

And enhance the error message printing to show the right information.

Fixes: 7e124ff12c ("net/ice: support protocol extraction per Rx queue")

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-23 16:43:09 +02:00
Haiyue Wang
f93949c3af net/ice: fix memory leak on dev closed
The original protocol extraction memory free is removed by introducing
new design for releasing port upon close.

Fixes: bd513ece3c ("net/ice: release port upon close")

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-23 16:43:09 +02:00
Haiyue Wang
e9a10e6c21 net/ice: support Rx/Tx burst mode info
Retrieve burst mode options according to the selected Rx/Tx burst
function name.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-23 16:43:09 +02:00
Qi Zhang
93b59ccf12 net/ice/base: improve misc code style
Combine a couple of function definitions that can fit on one line.
RCT a variable declaration.

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-23 16:43:09 +02:00
Qi Zhang
5479b0aff7 net/ice/base: add QFI for flow director
Added the GTP QFI field to the Flow director interface to allow
matching against this field. Since this field only appears in GTP
packets with extension headers, this also requires adding profile
TCAM mask matching capability.  This allows comprehending different
PTYPE attributes by examining flags from the parser. Using this
method, different profiles can be used by examining flag values
from the parser.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-23 16:43:09 +02:00
Qi Zhang
d1a6a2da5d net/ice/base: fix switch rule programming for all profiles
In switch rule programming, if the caller requested tunnel type of
ICE_SW_TUN_AND_NON_TUN, then the code would incorrectly attempt to
add a tunneled UDP port in the training packet, this would cause the
rule addition to fail. This patch does not attempt to add the UDP
port so that the rule programming will succeed.

Fixes: c3d6ac02c0 ("net/ice/base: update switch training packets with open ports")

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-23 16:43:09 +02:00
Qi Zhang
d173b59d25 net/ice/base: fix flow raw field vector extraction
Correct the ordering of raw field extraction in the field vector
by taking into account the ordering setting for requesting block.

Fixes: aa1cd410fa ("net/ice/base: add flow module")
Cc: stable@dpdk.org

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-23 16:43:09 +02:00
Qi Zhang
98ba06d0b7 net/ice/base: fix unexpected switch rule overwrite
A switch rule with "drop" action will be overwritten by a
rule with same pattern match but with a "to queue" action.
While in an inversed flow creation sequence, the "to queue"
can't be overwritten by the "drop" rule.

The inconsistent behavior is not expected, the patch
fix the issue by preventing rule overwrite in both cases.

Fixes: fed0c5ca5f ("net/ice/base: support programming a new switch recipe")
Cc: stable@dpdk.org

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-23 16:43:09 +02:00
Qi Zhang
40dceddab7 net/ice/base: initialize structures to zero
Some functions create ice_pkg_enum structure, but it seems it's possible
some of the members are used un-initialized.  So we'll initialize all
instantiations of this structure within ice_flex_pipe.c

The patch also fix header comment mismatch issue for
ice_init_prof_result_bm

Signed-off-by: Jeb Cramer <jeb.j.cramer@intel.com>
Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-23 16:43:09 +02:00
Qi Zhang
65d934d5b1 net/ice/base: remove dead error condition
The pointer cmd is set to an address of a structure, which can never be
NULL.  Remove the check-for-NULL lines since it's dead code anyway.

Signed-off-by: Jeb Cramer <jeb.j.cramer@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-23 16:43:09 +02:00
Qi Zhang
34a0e7c44f net/ice/base: improve flow director masking
Currently, 3-tuple FD matching is implemented using masking. However,
this is using up twenty-four of the thirty-two FD masks available. This
patch uses the swap register more efficiently to implement the 3-tuple
matches, which saves all FD masks for other uses.

Added IPV6 versions of DSCP, TTL and Protocol fields for flow director
use.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-23 16:43:09 +02:00
Qi Zhang
76211f7c4a net/ice/base: support GTPU TEID for flow director
Added the training packet for GTPU TEID field to the Flow director to
allow matching against this field.

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-23 16:43:09 +02:00
Qi Zhang
a1da29ee80 net/ice/base: update flow packet type bitmaps
In the flow API, the outer first ptype bitmaps contained many
references to inner ptypes. Because of PTG assignments, these were
causing issues when programming rules on the inner ptypes.
For example, in RSS when programming the outer IPV6 hash fields,
it also programmed several inner IPV4 PTGs with the same extraction.

There were several ptypes that have been removed, thus this patch
removes those bits from the type bitmaps.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-23 16:43:09 +02:00
Qi Zhang
e15b319bd3 net/ice/base: fix NVGRE switch rule programming
Correct for GRE/NVGRE training packets to include the
correct protocol IDs for TCP and UDP respectively.

Fixes: b83a0c2903 ("net/ice/base: fix inner TCP and UDP support for GRE")
Cc: stable@dpdk.org

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-23 16:43:09 +02:00
Qi Zhang
2048f3a965 net/ice/base: fix adding PPPoE switch rule
Update VLAN protocol ID to correct value for single VXLAN scenario.
Fix the missing ethertype offset for PPPoE dummy packet offset to
allow matching the corresponding field.

Fixes: d1c2f76b44 ("net/ice/base: support GTP and PPPoE protocols")

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-23 16:43:09 +02:00
Gavin Hu
8669e6ae05 net/ice: use relaxed and remove duplicate barrier
To guarantee the orderings of successive stores to CIO and MMIO memory,
a lighter weight rte_io_wmb [1] can be used instead of rte_wmb, and since
the ICE_PCI_REG_WRITE API already has an inclusive rte_io_wmb, this
explicit call can even be saved.

[1] http://git.dpdk.org/dpdk/tree/lib/librte_eal/common/include/generic/
rte_atomic.h#n98

Signed-off-by: Gavin Hu <gavin.hu@arm.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-10-08 12:14:30 +02:00
Stephen Hemminger
c67c8c5c14 net/ice: use dynamic log type for Tx/Rx debug
The generic RTE_LOGTYPE_PMD is a historical relic and should
not be used. Every driver must dynamic log types.

Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2019-10-07 15:00:58 +02:00
Chenxu Di
bd513ece3c net/ice: release port upon close
Set RTE_ETH_DEV_CLOSE_REMOVE upon probe so all the private resources
 for the port can be freed by rte_eth_dev_close().

Signed-off-by: Chenxu Di <chenxux.di@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:57 +02:00
Haiyue Wang
13676bd300 net/ice: remove legacy Rx descriptor definition
Since now the ice PMD only handles Rx Flex descriptor, so remove the
legacy descriptor definition.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-10-07 15:00:56 +02:00
Leyi Rong
4ab7dbb0a0 net/ice: switch to Rx flexible descriptor in AVX path
Switch to Rx flexible descriptor format instead of legacy
descriptor format.

Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-10-07 15:00:56 +02:00
Wenzhuo Lu
ece1f8a8f1 net/ice: switch to flexible descriptor in SSE path
With this path, the flexible descriptor is supported
in SSE path. And the legacy descriptor is not supported.

Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-10-07 15:00:56 +02:00
Haiyue Wang
7e124ff12c net/ice: support protocol extraction per Rx queue
The ice has the feature to extract protocol fields into flex descriptor
by programming per queue. Currently, the ice PMD will put the protocol
fields into rte_mbuf::udata64 with different type format. Application
can access the protocol fields quickly.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-10-07 15:00:56 +02:00
Haiyue Wang
dbf3c0e77a net/ice: handle Rx flex descriptor
Set the RXDID with flex descriptor type by default, change the Rx
function to support new descriptor handling.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-10-07 15:00:56 +02:00
Haiyue Wang
ae2e9514ee net/ice: add Rx flex descriptor definition
The Rx flex descriptor has 16B and 32B size, with different
field definitions compared to legacy type.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
3ac83b1141 net/ice/base: remove unused code
Remove unused code.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
53c4d83e41 net/ice/base: support switch for IPv6 TC field
Add support for IPv6 traffic class (tc) field for switch rule.
Correct ice_ipv6_hdr based on the IPv6 Protocol using bitfields.
Add big/little endian convert for tc field before it is inserted,
since tc is only one byte and also does not have a byte-aligned
offset.

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
f19c0a84c5 net/ice/base: fix packet type bitmap
Before this patch, IPv4 and UDP inner hash rule will be over
written by later rules after RSS initialization phase. This is
because the PTYPE bitmap table cover some PTYPEs belong to another
PTGs. And some PTYPEs are reserved. Remove these PTYPEs in TCP,
UDP, SCTP and ipv4 bitmap table.

Fixes: aa1cd410fa ("net/ice/base: add flow module")

Signed-off-by: Zhirun Yan <zhirun.yan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
8dad92662b net/ice/base: fix alignment
As title says, fix an alignment issue.

Fixes: 51d04e4933 ("net/ice/base: add flexible pipeline module")
Cc: stable@dpdk.org

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
fadf46b1ee net/ice/base: use bitmap copy where appropriate
ice_cp_bitmap() already exists and should be used instead of
using ice_memcpy().  Note, there are a couple comments that suggest
using a bitmap-specific copy function, but those are not correct
since the source block of memory is not a bitmap.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
737dcad0f8 net/ice/base: remove unnecessary error log
Remove the error log message when attempting to download a
package that has an unsupported version.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
4831259477 net/ice/base: fix 4 bytes alignment for PPPoE dummy packet
Add two bytes to meet the requirement of 4 bytes alignment for dummy
packet for creating switch rule for PPPoE.

Fixes: d1c2f76b44 ("net/ice/base: support GTP and PPPoE protocols")

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
2ed5eb0caa net/ice/base: search field vector indices for result slots
Previously, switch code would use only pre-reserved index
slots at the end of each field vector for recipe result index
locations. This patch adds code that detects other internal
empty index slots that could potentially be used. For each
recipe that is added, a determ ination is made as to whether
any of these additional index slots alige with all the profiles
selected for the recipe; if alignment is achieved, then these
result index slots can be used.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
ef2bf3dee2 net/ice/base: remove unused DDP package macros
Macros no longer be used and can be removed

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
0dc55879ce net/ice/base: fix segment in remove existing RSS rule
Before this patch, RSS tunneled rules can not be destroyed at runtime.
This is because it can not find the existing matching profile for tunnels.
segs[0] should always be zero and all matched, segs[1] for inner part.
It only construct one segment.

This patch modifies construct segment in ice_rem_rss_cfg_sync() to
match ice_add_rss_cfg_sync().

Fixes: b7d34ccc47 ("net/ice/base: packet encapsulation for RSS")

Signed-off-by: Zhirun Yan <zhirun.yan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
7818106ce6 net/ice/base: fix bitmap for TCP in RSS
Before this patch, if set rule for IPv4 first and then set rule
for TCP with IPv4. The first rule for inner IP will be overwritten
by TCP rule. This is because MAC_IPV6_TUN_MAC_IPV4_PAY using the
same ptgs PTG_TUN_INNER_IPV4_OTHER with MAC_IPV4_TUN_MAC_IPV4_PAY,
this ptype should not in TCP bitmap.
Remove this bit in TCP bitmap.

Fixes: aa1cd410fa ("net/ice/base: add flow module")
Cc: stable@dpdk.org

Signed-off-by: Zhirun Yan <zhirun.yan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
b5c274f4e2 net/ice/base: support FDIR for GTPU QFI field
Add GTPU qfi field support for flow director. Note that for GTPU pkt,
only qfi field (6 bits) can be set for FD. The supported GTPU pkts are
defined as:
ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_UDP,
ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_TCP,
ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_ICMP,
ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_OTHER (FRAG and PAY belong to this)

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
3a010f01d3 net/ice/base: replace alloc-followed-by-copy with memdup
ice_memdup() is preferred over an alloc immediately followed by a copy.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
ddae044035 net/ice/base: enable symmetric hash for RSS
Add parameter "symm" to rss configuration APIs.
When symm is 1, Symmetric Teoplitz Hash can be enabled by
configuring GLQF_HSYMM properly.

NOTE:
Symmetric Teoplitz hash will work only if hash schema of
VSIQF_HASH_CTL be configured to 01b and it is assumed be enabled
in PMD.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
29897f43a1 net/ice/base: update FW API minor version
Update FW API minor version to align to current value advertised
by FW in NVM images.

Signed-off-by: Kevin Scott <kevin.c.scott@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
bf8d075f73 net/ice/base: support destination MAC field for FDIR
Add dest MAC address support so that this field can be matched when
we set Flow Director filter with dst addr for MAC.

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
70b14768e3 net/ice/base: enable setting up FDIR counters
Enable getting value from input to set up flow director counters,
so that the FDIR counters can count none, packets only, bytes only
or both packets and bytes as demanded.

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
34c6724765 net/ice/base: enable FDIR queue region
Add fdir queue region support.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
b2ad03452a net/ice/base: enable RSS for PPPoE with SCTP
Add two ptypes(MAC_PPPOE_IPV4_SCTP and MAC_PPPOE_IPV6_SCTP) in
sctp ptype bitmap to enable rss.

Signed-off-by: Zhirun Yan <zhirun.yan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
d6eed0ddb4 net/ice/base: associate switch recipe to profiles
Properly associate switch recipes to profiles. Previous code was
using the wrong bitfield for updating the associations, which was
causing other PFs to not properly identify and use existing
recipes. This sometimes resulted in rules not being added when it
should have been possible.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
a4b14d3939 net/ice/base: refactor data structure
When declaring the ice_prot_ext, and ice_prot_id_tbl structure,
we can use a fixed length array instead of a variable length one
which helps us catch future code changes that might desynchronize
the enum ice_protocol_type and the structs.  This change also
necessitates removing the last member of the structs which was
just there to be a placeholder.

Also reorder the ice_prot_ext struct to match the ordering in the
associated enum ice_protocol_type.

Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
5037444203 net/ice/base: support switch rule about VLAN PPPoE
Add support for switch rule about single-VLAN-PPPoE. Note that double
VLAN is not supported by the hardware at this point, therefore only
single-VLAN support for PPPoE is added.

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
333e5c9d43 net/ice/base: remove RSS code as iavf host
The DPDK PF doesn't support SRIOV so remove the related iavf host
code.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
cfaeec82d2 net/ice/base: remove null check of port info
The code in ice_sched_cleanup_all checks whether the port info is NULL
prior to calling ice_sched_clear_port.

More importantly, it also checks whether the port structure has been
initialized by checking its port_state field as well.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
bb8851a31d net/ice/base: propagate errors from functions
There could be an error returned from ice_fill_adv_dummy_packet()
so we need to propagate that to the caller. Additionally, the
call to ice_flow_xtract_pkt_flags() could also return an error so
we need to propagate it as well.

Also add in the correct offsets for GENEVE and VXLAN_GPE to the
dummy packets.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:56 +02:00
Qi Zhang
e7858c8b4a net/ice/base: fix mask for checking protocol header
Before this patch, the logic of protocol header checking only support
non-tunneled packet. This patch remove the inner protocol in L3/L4 RSS
seg hdr mask and change the protocol header validation to reflect this.
So, for ice_add_rss_cfg(), the last parameter addl_hdrs could specify
the protocol header for tunnel.

Signed-off-by: Zhirun Yan <zhirun.yan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:55 +02:00
Qi Zhang
b726c1a865 net/ice/base: add non-word aligned IPv6 field support
Add non-word aligned field support for IPv6 with hlim, tc and proto.
All these fields are one byte within one word. In order to match
bytes within the IPv6 header for flow director we need to use a mask.

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:55 +02:00
Qi Zhang
04e0690800 net/ice/base: add non-word aligned IPv4 field support
Add non-word aligned field support for ipv4 with ttl, tos and proto.
All these fields are one byte within one word. In order to match
bytes within the IPv4 header for flow director we need to use a mask.

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:55 +02:00
Qi Zhang
f344a9e11d net/ice/base: support tunnel packets
Add VXLAN tunnel training packets to flow director and change the
interface to support tunnel packets.

Signed-off-by: Henry Tieman <henry.w.tieman@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:55 +02:00
Qi Zhang
6b1172d4dc net/ice/base: remove redundant empty lines
Remove redundant empty lines

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-10-07 15:00:55 +02:00
Ivan Ilchenko
ca041cd44f ethdev: change allmulticast callbacks to return status
Enabling/disabling of allmulticast mode is not always successful and
it should be taken into account to be able to handle it properly.

When correct return status is unclear from driver code, -EAGAIN is used.

Signed-off-by: Ivan Ilchenko <ivan.ilchenko@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Acked-by: Hyong Youb Kim <hyonkim@cisco.com>
2019-10-07 15:00:55 +02:00
Igor Romanov
9970a9ad07 ethdev: make stats and xstats reset callbacks return int
Change return value of the callbacks from void to int. Make
implementations across all drivers return negative errno
values in case of error conditions.

Both callbacks are updated together because a large number of
drivers assign the same function to both callbacks.

Signed-off-by: Igor Romanov <igor.romanov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2019-10-07 15:00:54 +02:00
Andrew Rybchenko
9039c81257 ethdev: change promiscuous callbacks to return status
Enabling/disabling of promiscuous mode is not always successful and
it should be taken into account to be able to handle it properly.

When correct return status is unclear from driver code, -EAGAIN is used.

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Acked-by: Matan Azrad <matan@mellanox.com>
Acked-by: Hyong Youb Kim <hyonkim@cisco.com>
2019-10-07 15:00:54 +02:00
Ting Xu
03a05924da net/ice: support device-specific DDP package loading
This patch adds the feature that supports loading DDP package
according to the device serial number. Prior to loading the
default DDP package (ice.pkg), the driver will check for the
presence of a device-specific DDP package with the name containing
64-bit PCIe Device Serial Number (ice-xxxxxxxxxxxxxxxx.pkg)
during initialization. Users can use "lspci -vs" to get the device
serial number.
The pkg search path are /lib/firmware/updates/intel/ice/ddp/
and /lib/firmware/intel/ice/ddp/. If the package exists,
the driver will download it to the device instead of the default
one. The loaded package type (OS default and COMMS) will be
stored in ice_adapter->active_pkg_type. The package version is
stored in ice_hw->active_pkg_ver.

Signed-off-by: Ting Xu <ting.xu@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
3ba381eb65 net/ice/base: ignore inverse switch recipes
When looking for an existing recipes, never choose an inverse
recipe as these are used for anti-spoofing. Choosing inverse
recipes for source MAC address rules was causing errors while
adding the rule.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
8c1c61f970 net/ice/base: update profile to recipe bitmap array
Correctly update profile to recipe bitmap array after adding and
associating recipes. This fixes an issue where determining unused
recipe result index slots was incorrect.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
9b6f0c969b net/ice/base: add GENEVE offset
Add Geneve offset for tunneled packets to allow dummy packets to be
properly created.

Signed-off-by: Doug Dziggel <douglas.a.dziggel@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
c5adb3c448 net/ice/base: enable RSS with ether layer for PPPoE
Add these two ptype(MAC_PPPOD_PAY and MAC_PPPOE_PAY) in outer mac
bitmap, so it can hash for outer mac.

Signed-off-by: Zhirun Yan <zhirun.yan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
661264d19f net/ice/base: remove Rx flex descriptor programming
Removing Rx flex descriptor metadata and flag programming from the code,
these registers cannot be written to as they are read only.
The programming for all fields per RxDID is now handled differently.

Signed-off-by: Vignesh Sridhar <vignesh.sridhar@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
f4f79aa849 net/ice/base: add AQC get link topology handle support
Add AQC get link topology handle support. This is needed to determine
Direct Attach (DA) or backplane media type for PHY types that support
either. Get link topology handle cage node type request can be used to
determine if a cage is present or not. If a cage is present for PHY
types that supports both DA and backplane media type, then the media
type is DA, else the media type is backplane.

Signed-off-by: Paul Greenwalt <paul.greenwalt@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
fc882012b3 net/ice/base: delay less
Shorten the delay for SQ responses, but increase the number of loops.
Max delay time is unchanged, but some operations complete much more
quickly.

In the process, add a new define to make the delay count and delay time
more explicit, and simplify the code so it's the same for both switch
and NIC mode. Add comments to make things more explicit.

Signed-off-by: Mitch Williams <mitch.a.williams@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
82f3e28d23 net/ice/base: replace open-code duplication
Use BIT_ULL() instead of ICE_FLOW_HASH_FLD() which does the same bit shift
operation.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
8b4cd4eda0 net/ice/base: update to register definition file
Added register definitions for GL_MDCK_TX_TDPU and GL_MDET_TX_TDPU.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
6632c0556d net/ice/base: correct abbreviations
Correct abbreviation issues found by running abbrevcheck.

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
e123d30f4a net/ice/base: remove unnecessary if branch
We are already in the branch "if (fm_list->vsi_count == 1)"
no need to exit and re-enter.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
dbe449e5dc net/ice/base: remove unnecessary dummy packet finding
We don't need to find a dummy packet when removing a rule so remove
the call to get the dummy packet. This also obviates some variables
so remove them also.

Also reduce the scope of rule_buf_sz.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
c3d6ac02c0 net/ice/base: update switch training packets with open ports
This patch updates UDP tunneled training packets with an appropriate
UDP dest port. For the correct profile to be chosen, an open tunnel
port must be included in the training packet.

Added GENEVE tunnel labels in the test package in order to test GENEVE
tunnel rule creation.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
c932653c36 net/ice/base: maximize switch recipe words per line
Remove grouping rules to maximize the number of words placed into
a recipe line. This will allow more recipes to be added by reducing
the number of result indices required.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
58f116731d net/ice/base: refactor removal of VLAN promiscuous rules
Currently ice_clear_vsi_promisc() detects if the VLAN ID sent is not 0
and sets the recipe_id to ICE_SW_LKUP_PROMISC_VLAN in that case and
ICE_SW_LKUP_PROMISC if the VLAN_ID is 0. However this doesn't allow VLAN
0 promiscuous rules to be removed, but they can be added. Fix this by
checking if the promisc_mask contains ICE_PROMISC_VLAN_RX or
ICE_PROMISC_VLAN_TX. This change was made to match what is being done
for ice_set_vsi_promisc().

Signed-off-by: Brett Creeley <brett.creeley@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
21b28a9ef7 net/ice/base: fix flag settings in AQ call
Removed setting Read flag in the Get Allocated Resource Descriptors AQ
command (0x020A). The read flag is not required for this command and
causes the FW to return an error.

Fixes: d781ccbdd1 ("net/ice/base: add functions to get allocated resources")
Cc: stable@dpdk.org

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
b32be950a3 net/ice/base: remove unnecessary conditional check
There is no reason to do this conditional check before the assignment so
simply remove it.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
2aaf1d1b67 net/ice/base: add RSS support for PPPoE and GTPU
Added RSS support for PPPoE with inner TCP and UDP.
Added RSS support for GTPU with IPv4 and IPv6.

Signed-off-by: Zhirun Yan <zhirun.yan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
b7d34ccc47 net/ice/base: packet encapsulation for RSS
RSS configurations calls currently support only non-tunneled packets,
which uses outer-first IPs. Adding another call to configure RSS for
tunneled packets which will enable hashing on inner-last IP. RSS hash
will only be done on the innermost IP.
- Update RSS configuration calls to take packet segment count as input
  argument
- Update flow profile ID to include identifier for encapsulated packet
  [0:31] : Packet match fields
  [32:62]: Protocol header header
  [63]: Encapsulation flag, 0 if non-tunneled, 1 if tunneled

Signed-off-by: Vignesh Sridhar <vignesh.sridhar@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
12f6ea93f0 net/ice/base: fix for RSS hash on inner UDP port
Before this patch, only outer IP with inner UDP port can appear in
RSS hash, because the extraction sequence uses outer IP protocol
ID with Inner UDP protocol ID. ICE_PROT_UDP_OF always extracts the
TUNNELED UDP port values (i.e., 4789 for VXLAN). ICE_PROT_UDP_IL_OR_S
will extract NON-TUNNELED UDP port or inner UDP port.

Fixes: aa1cd410fa ("net/ice/base: add flow module")
Cc: stable@dpdk.org

Signed-off-by: Zhirun Yan <zhirun.yan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
282bd7d78d net/ice/base: consolidate packet type group
This patch is an optimization to decrease the number of TCAM entries
used in the profile blocks, especially for RSS. To be most effective
this will also require a package change in order to decrease the number
of PTYPE groups necessary to program RSS, FD and ACL rules.

Change required package version to 1.3.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
56c0ab4405 net/ice/base: add routine for tunnel port query
Add ice_get_open_tunnel_port routine, which can be used to find
an open tunnel port for creating switch and flow director training
packets.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
f636f2888c net/ice/base: move and add some help function and macros
The patch move ice_ilog2 and ice_is_pow2 to ice_type.h, also add help
macro ROUND_UP and IS_ETHER_ADDR_EQUAL.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
eda40e22b8 net/ice/base: improve switch chained recipe
When updating switch database with chained recipes from
firmware, where a null pointer derefence was occurring due to looking
into a sub-recipe entry which is not filled in.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
8b6e6e4024 net/ice/base: update UDP tunnel switch training packets
Change UDP tunnel training packets for the switch to work for both
Geneve and VXLAN cases.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
aa6ff47ad8 net/ice/base: return switch error on invalid match criteria
Modify ice_add_adv_rule to return an error when an invalid match
criteria is requested by the caller. This happens when the protocol
and offset pair is not supported by the package.

This change required a fix for the offset in the VXLAN GPE header,
and also found an issue with NVGRE where the package does not seem
to extract the correct offsets.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
55744222e6 net/ice/base: associate recipes by profile type
Change recipe to profile association logic to determine the profile type
to determine if a profile is compatible with the rule being added.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
54f75a4ce2 net/ice/base: support not locking sideband queue
For certain PTP clock adjustments, there is a use case for locking the
sideband queue at a higher level and performing an atomic series of
operations while the sideband queue is locked.  To accommodate this use
case, split ice_sw_send_cmd() into a version that takes the lock and a
version that does not.

Signed-off-by: Ben Shelton <benjamin.h.shelton@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
d1880ece7d net/ice/base: add function to configure Tx AQ command
This function is needed by the driver to move PSM leaf nodes to a new
parent.

Additionally, add struct ice_aqc_move_txqs to struct ice_aq_desc so
driver code can access it.

Signed-off-by: Ben Shelton <benjamin.h.shelton@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
5f9c389466 net/ice/base: initialize driver NVM data earlier
The driver detects and warns about FW rollback mode before getting the NVM
version (through ice_init_nvm) which results in "0.00 0x0 0.0.0" being
printed. Fix this by calling ice_init_nvm earlier.

This could have been fixed by moving ice_print_rollback_msg as well, but
it made more sense to move ice_init_nvm closer to the flow that gets the
FW version information (i.e. control queue init flow).

Signed-off-by: Anirudh Venkataramanan <anirudh.venkataramanan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
381bd0f265 net/ice/base: set status when global cfg lock is unavailable
To download the DDP file to the device, a PF first has to grab the
global configuration lock. When a PF can't grab this lock, set
hw->pkg_dwnld_status to ICE_AQ_RC_EEXIST.

Signed-off-by: Anirudh Venkataramanan <anirudh.venkataramanan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
3b326f5945 net/ice/base: add more opcode and macros
Add more opcode and macros:

1. Add opcode for the NVM Update EMPR command.
2. Add opcode for NVM save factory settings
3. Add opcode for NVM Write/Write Activate calls
4. Add loopback reporting to get link response macros
5. Add link event defines macros

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
7b6b3886de net/ice/base: update flag bits
Currently the VLAN ice_flg64_bits are off by 1. Fix this by
setting the ICE_FLG_EVLAN_x8100 flag to 14, which also updates
ICE_FLG_EVLAN_x9100 to 15 and ICE_FLG_VLAN_x8100 to 16.

Signed-off-by: Brett Creeley <brett.creeley@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
a6d7b12cab net/ice/base: add 32-byte Flex Rx descriptor
Add 32-byte Flex RX Descriptor structure definition.

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
2ebf458473 net/ice/base: add 16-byte Flex Rx descriptor
Add 16-byte Flex RX descriptor structure definition.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
7bfb7c6468 net/ice/base: move function declaration
Improve code orgnization, move declaration of ice_cfg_tc_nod_bw_alloc and
ice_cfg_rl_burst_size from ice_common.h to ice_nvm.h.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
18a6dd5222 net/ice/base: improve switch advanced rule
Correct algorithm to detect free field vector indexes to be
used for recipe line result values. The code now scans all
recipes that are associated with all the field vector being
targed for a new recipe to detect which result indexes are
unused.

Change recipe chaining code to place recipe on a single line
if it will fit, rather than looking to break things apart
according to preferred combinations.

These improvements fix a condition where recipes were getting
added with conflicting result index values.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
ca9a2c6974 net/ice/base: add locks for flow functions
Wrap functions to search for flow profiles, add and remove RSS
configurations with flow profile locks. This is to ensure that if
several VFs and PFs are disabled at the same time functions that access
the flow profile lists are thread safe.

Signed-off-by: Vignesh Sridhar <vignesh.sridhar@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
d1c2f76b44 net/ice/base: support GTP and PPPoE protocols
Added switch protocol segments for both GTP and PPPOE protocols.
Added RSS protocol segments for both GTP and PPPOE protocols.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
f035feb474 net/ice/base: support NVM access commands
Add a new structure, ice_nvm_access, used to request access to read or
write certain NVM related registers.

The structure is used by NVM Update to request read or write of specific
NVM registers in order to perform updates.

Additionally, there is a command to request the driver "features"
structure which represents data about what features of the NVM access
interface the driver supports.

Implement ice_handle_nvm_access to parse the access request and perform
the necessary function.

This function verifies that the access request is valid. If so, the
function will delegate to perform the register read, register write, or
copying of the driver ice_nvm_features structure.

If the request is invalid, the function will report a suitable error
codition that can be propagated out.

Only a subset of registers is accessible, and all other registers will
be rejected with ICE_ERR_OUT_OF_RANGE.

When reading, the contents of the variable sized data buffer will be
used as storage for returning the register value. When writing, the
contents will be used as input for the value to write to the register.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
b06499a433 net/ice/base: update Boot Configuration Section read of NVM
Boot Configuration Section Block has been moved to the
Preserved Field Area (PFA) of NVM. So, this patch updates
the NVM reads that involve Boot Configuration Section.

Signed-off-by: Md Fahad Iqbal Polash <md.fahad.iqbal.polash@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
07c417e5fc net/ice/base: fix overrun
Added boundary check for layer_num in function ice_sched_rm_rl_profile,
and ice_sched_add_rl_profile.

Cc: stable@dpdk.org

Tarun Singh <tarun.k.singh@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
807331f3ef net/ice/base: fix type-mismatch
The iterators are u8, but the values being compared against are u16s.
It may not ever be the case that the comparison is against a value
larger than the upper bound of the smaller type, but code analysis tools
don't know that.

Fixes: 93e84b1bfc ("net/ice/base: add basic Tx scheduler")
Cc: stable@dpdk.org

Signed-off-by: Jeb Cramer <jeb.j.cramer@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
a823afa55f net/ice/base: check root pointer for validity
ice_sched_get_tc_node uses pi->root without checking for NULL. Add a
check to prevent NULL pointer dereference.

Signed-off-by: Anirudh Venkataramanan <anirudh.venkataramanan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
348ea028ea net/ice/base: fix memory leak
Need to free new ice_vsig_prof if no valid ptype can be found.

Fixes: d935fb5bb0 ("net/ice/base: fix packet type size")
Cc: stable@dpdk.org

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
2db7c617f6 net/ice/base: resolve static analysis issues
Coverity complains first_free can be -1 resulting in a negative shift left
when k equals 0; i.e. the expression 1 << (first_free - k). Fix this by
explicitly checking for this case.

Cc: stable@dpdk.org

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
9467486f17 net/ice/base: enable masking for RSS and FD field vectors
Allow masking per word field on RSS and FD field vectors.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
37e960435c net/ice/base: move VSI to VSI group
Add function to add a VSI to a given VSIG and update package with this
entry. The usual flow in XLT management would iterate through all
characteristics of the input VSI and create a new VSIG and TCAMs till a
matching characteristic is found. When a match is found the VSI is moved
into a matching VSIG and entries are collapsed, leading to added package
update calls. This function serves as an optimization if we know
beforehand that the input VSI has characteristics same as VSI configured
previously added to a VSIG. This is particularly useful for VF VSIs
which are all usually programmed with the same configurations.

Signed-off-by: Vignesh Sridhar <vignesh.sridhar@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
7e5778f880 net/ice/base: add NVM pkg flag
Add flag for case where active package has been loaded from NVM.

Signed-off-by: Ashish Shah <ashish.n.shah@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
99c1bd25bd net/ice/base: adjust DCB INIT for SW mode
Adjust ice_init_dcb to set the is_sw_lldp boolean
in the case where the FW has been detected to be
in an untenable state such that the driver
should forcibly make sure it is off.

This will ensure that the FW is in a known state.

Signed-off-by: Dave Ertman <david.m.ertman@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
0f11bdc08f net/ice/base: support reading REPC statistics
The GLV_REPC register contains statistics for tracking received packets
that are discarded due to certain errors.

This register behaves differently from some of the other related
statistics registers in two ways. First, it contains two 16bit
statistics, and thus cannot be read as a 32bit or 40bit statistic.

Second, the two stats do not roll over, but instead cap at 0xFFFF.

Add a new ice_stat_update_repc function which will read the register and
increment the appropriate statistics in the ice_eth_stats structure.

Since the register does not roll over, make use of the "Write Clear"
behavior, and write to the register to reset it every time we read it.

Add extra space for the two statistics that are counted by this
register, rx_errors, and rx_no_desc.

For now, wrap the new function and stats counters in !LINUX_SUPPORT.
This can later be removed if and when the Linux driver implements
support for reading the statistics.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
d13ad9cf17 net/ice/base: add helper functions for PHY caching
Add additional functions to aide in caching PHY
configuration.  In order to cache the initial modes,
we need to determine the operating mode based on
capabilities.   Add helper functions for flow control
and FEC to take a set of capabilities and return the
operating mode matching those capabilities.  Also add
a helper function to determine whether a PHY capability
matches a PHY configuration.

Introduce a mask for valid link speeds and unwrap
ice_copy_caps_to_cfg() for more builds so that we can utilize
it in more places.

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
a175216fba net/ice/base: add capabilities when in safe mode
The dynamic device personalization (DDP) file download onto the device
can fail, and when this happens the driver has to transition to "safe
mode" where only basic functionality is possible.

The device though doesn't understand safe mode, and so the opcodes to
discover device/function capabilities (0x000A and 0x000B) return all
the capabilities of the device, which includes capabilities that the
driver cannot support when in safe mode.

The initialization flows in the driver are based on the capabilities
information (obtained by the driver with the above mentioned opcodes).
To reuse the same initialization flows in safe mode, it becomes
necessary for the driver to override the currently stored capabilities
information with safe mode capabilities. This is done by a new function
introduced in this patch - ice_set_safe_mode_caps.

Signed-off-by: Anirudh Venkataramanan <anirudh.venkataramanan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
bd4392a923 net/ice/base: improve debug print message
Improve debug print message.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
ebd64602fc net/ice/base: add SFF EEPROM AQ command
read/write module eeprom on i2c bus.

Signed-off-by: Scott W Taylor <scott.w.taylor@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
a491f9fa3e net/ice/base: remove debug code
Remove firmware logging debug code.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
03ac4b8d11 net/ice/base: correct argument port info
correct argument pi(port_info) passed in function
ice_sched_get_first_node(), otherwise it will return the incorrect
node.

functions ice_sched_get_agg_node and ice_sched_cfg_sibl_node_prio:
change argument from hw to pi for it to align to correct port.

Moved saving tc node bw info from hardware structure(hw) to port info
structure(pi). This change allows multiple ports to save and replay
the information correctly.

Signed-off-by: Tarun Singh <tarun.k.singh@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
5d0b7b5fc4 net/ice/base: add read PBA module function
New support function added - ice_get_pfa_module_tlv(), the driver or
other modules can make use of this function to read the pfa area.

Signed-off-by: Tarun Singh <tarun.k.singh@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:52 +02:00
Qi Zhang
449ccdf7b5 net/ice/base: store number of functions for the device
Store the number of functions the device has.  This value can be
very useful when calculating how to best allocate global resources.

Signed-off-by: Kevin Scott <kevin.c.scott@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:52 +02:00
Qi Zhang
255454425c net/ice/base: support init RXDID descs fields
Add new switch cases to init RXDID descs MD fields.

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:52 +02:00
Qi Zhang
5b674b57e7 net/ice/base: support NVM rollback detection
This patch adds code to detect NVM rollback. The rollback detection
is done as part of the HW init flow. When NVM rollback is detected,
a warning message is printed along with the FW/NVM version data.
To do this, this patch adds a helper function ice_get_nvm_version.

Also, a pointer to hw->nvm is already available in ice_init_nvm. Just use
this instead of &hw->nvm.

Signed-off-by: Anirudh Venkataramanan <anirudh.venkataramanan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:52 +02:00
Qi Zhang
6277fc33e2 net/ice/base: add function to get FW mode
Add a helper function to get FW mode. The FW mode can be normal,
debug, recovery or rollback.

This makes ice_is_fw_in_rec_mode redundant, so remove it.

Signed-off-by: Anirudh Venkataramanan <anirudh.venkataramanan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:52 +02:00
Qi Zhang
4b6e8c03be net/ice/base: enhance NVM read
Add an option to read NVM from flash directly.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:52 +02:00
Ivan Ilchenko
bdad90d12e ethdev: change device info get callback to return int
Change eth_dev_infos_get_t return value from void to int.
Make eth_dev_infos_get_t implementations across all drivers to return
negative errno values if case of error conditions.

Signed-off-by: Ivan Ilchenko <ivan.ilchenko@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2019-10-07 14:45:35 +02:00
Xiao Zhang
0ed5e26eb0 net/ice: support multi-process
Add multiple processes support for ice, secondary processes will share
memory and configuration with primary process, do not need further
initialization for secondary processes.

Signed-off-by: Xiao Zhang <xiao.zhang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-08-30 18:06:35 +02:00
Xiao Zhang
91342addd1 net/ice: fix address of first segment
This patch fixes (dereference after null check) coverity issue.
The address of first segmented packets was not set correctly during
reassembling packets which led to this issue.

Coverity issue: 343452, 343407
Fixes: c68a52b8b3 ("net/ice: support vector SSE in Rx")
Cc: stable@dpdk.org

Signed-off-by: Xiao Zhang <xiao.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-08-06 13:29:25 +02:00